Sean Flannigan - Computer-Architecture

README.md

@@ -1,3 +1,4 @@
+<!-- https://github.com/LambdaSchool/Computer-Architecture/pull/199 -->
 # Computer Architecture
 
 ## Project
@@ -7,24 +8,24 @@
 ## Task List: add this to the first comment of your Pull Request
 
 ### Day 1: Get `print8.ls8` running
-- [ ] Inventory what is here
-- [ ] Implement `struct cpu` in `cpu.h`
-- [ ] Add RAM functions `cpu_ram_read` and `cpu_ram_write`
-- [ ] Implement `cpu_init()`
-- [ ] Implement the core of `cpu_run()`
-- [ ] Implement the `HLT` instruction handler
-- [ ] Add the `LDI` instruction
-- [ ] Add the `PRN` instruction
+- [x] Inventory what is here
+- [x] Implement `struct cpu` in `cpu.h`
+- [x] Add RAM functions `cpu_ram_read` and `cpu_ram_write`
+- [x] Implement `cpu_init()`
+- [x] Implement the core of `cpu_run()`
+- [x] Implement the `HLT` instruction handler
+- [x] Add the `LDI` instruction
+- [x] Add the `PRN` instruction
 
 ### Day 2: Add the ability to load files dynamically, get `mult.ls8` and `stack.ls8` running
-- [ ] Un-hardcode the machine code
-- [ ] Implement the `cpu_load` function to load an `.ls8` file given the filename passed in as an argument
-- [ ] Implement a Multiply instruction and Print the result (run `mult8.ls8`)
-- [ ] Implement the System Stack and be able to run the `stack.ls8` program
+- [x] Un-hardcode the machine code
+- [x] Implement the `cpu_load` function to load an `.ls8` file given the filename passed in as an argument
+- [x] Implement a Multiply instruction and Print the result (run `mult8.ls8`)
+- [x] Implement the System Stack and be able to run the `stack.ls8` program
 
 ### Day 3: Get `call.ls8` running
-- [ ] Implement the CALL and RET instructions
-- [ ] Implement Subroutine Calls and be able to run the `call.ls8` program
+- [x] Implement the CALL and RET instructions
+- [x] Implement Subroutine Calls and be able to run the `call.ls8` program
 
 ### Stretch
 - [ ] Add the timer interrupt to the LS-8 emulator

ls8/cpu.c

@@ -1,45 +1,101 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
 #include "cpu.h"
 
 #define DATA_LEN 6
 
 /**
  * Load the binary bytes from a .ls8 source file into a RAM array
  */
-void cpu_load(struct cpu *cpu)
+void cpu_load(char *filename, struct cpu *cpu)
 {
-  char data[DATA_LEN] = {
-    // From print8.ls8
-    0b10000010, // LDI R0,8
-    0b00000000,
-    0b00001000,
-    0b01000111, // PRN R0
-    0b00000000,
-    0b00000001  // HLT
-  };
-
-  int address = 0;
-
-  for (int i = 0; i < DATA_LEN; i++) {
-    cpu->ram[address++] = data[i];
+  // get the file | will get file path via argument later
+  // per guided demo
+  FILE *fp;
+  char line[1024];
+
+  int address = 0x00;
+
+  if((fp = fopen(filename, "r")) == NULL) {
+    fprintf(stderr, "Unable to open file %s\n", filename);
+    exit(2);
+  }
+
+  while (fgets(line, sizeof line, fp) != NULL) {
+    char *endpoint;
+    unsigned char value;
+
+    value = strtoul(line, &endpoint, 2);
+
+    if(endpoint == line) {
+      continue;
+    }
+
+    cpu->ram[address++] = value;
+
   }
 
   // TODO: Replace this with something less hard-coded
 }
 
+// MAR - memory address register | where does is go
+// MDR - memory data register | what it is
+void cpu_ram_write(struct cpu *cpu, unsigned char mar, unsigned char mdr) {
+  cpu->ram[mar] = mdr;
+}
+
+unsigned char cpu_ram_read(struct cpu *cpu, unsigned char mar) {
+  return cpu->ram[mar];
+}
+
 /**
  * ALU
  */
 void alu(struct cpu *cpu, enum alu_op op, unsigned char regA, unsigned char regB)
 {
+  unsigned char *reg = cpu->reg;
+
+  // assign operands to values
+  unsigned char valueA = reg[regA];
+  unsigned char valueB = reg[regB];
+
   switch (op) {
     case ALU_MUL:
-      // TODO
+      reg[regA] *= valueB;
+      break;
+    case ALU_ADD:
+      reg[regA] += valueB;
+      break;
+    case ALU_CMP:
+      if (valueA == valueB) {
+        cpu->FL = 1;
+        // printf("even %d\n", cpu->FL);
+      } else if (valueA < valueB) {
+        cpu->FL = 2;
+        // printf("less %d\n", cpu->FL);
+      } else {
+        cpu->FL = 3;
+        // printf("greater %d\n", cpu->FL);
+      }
       break;
 
     // TODO: implement more ALU ops
   }
 }
 
+void push_to_stack(struct cpu *cpu, int val) {
+  cpu->reg[7]--;
+  cpu->ram[cpu->reg[7]] = val;
+}
+
+unsigned char pop_from_stack(struct cpu *cpu) {
+  unsigned char val = cpu->ram[cpu->reg[7]];
+  cpu->reg[7]++;
+  return val;
+}
+
 /**
  * Run the CPU
  */
@@ -50,10 +106,77 @@ void cpu_run(struct cpu *cpu)
   while (running) {
     // TODO
     // 1. Get the value of the current instruction (in address PC).
+    unsigned char IR = cpu_ram_read(cpu, cpu->PC);
     // 2. Figure out how many operands this next instruction requires
     // 3. Get the appropriate value(s) of the operands following this instruction
+    unsigned char operand0 = cpu_ram_read(cpu, cpu->PC + 1);
+    unsigned char operand1 = cpu_ram_read(cpu, cpu->PC + 2);
     // 4. switch() over it to decide on a course of action.
     // 5. Do whatever the instruction should do according to the spec.
+    switch (IR) {
+      // BE SURE CASE IS SAVED AS BINARY LITERALS IN CPU.H FILE
+      case LDI:
+        cpu->reg[operand0] = operand1;
+        cpu->PC += 3;
+        break;
+      case PRN:
+        printf("%d\n", cpu->reg[operand0]);
+        cpu->PC += 2;
+        break;
+      case HLT:
+        cpu->PC++;
+        exit(1);
+        // return 0;
+      case MUL:
+        alu(cpu, ALU_MUL, operand0, operand1);
+        cpu->PC += 3;
+        break;
+      case ADD:
+        alu(cpu, ALU_ADD, operand0, operand1);
+        cpu->PC += 3;
+        break;
+      case PUSH:
+        push_to_stack(cpu, cpu->reg[operand0]);
+        cpu->PC += 2;
+        break;
+      case POP:
+        cpu->reg[operand0] = pop_from_stack(cpu);
+        cpu->PC += 2;
+        break;
+      case CALL:
+        push_to_stack(cpu, cpu->PC + 2);
+        cpu->PC = cpu->reg[operand0];
+        break;
+      case RET:
+        cpu->PC = pop_from_stack(cpu);
+        break;
+      case CMP:
+        alu(cpu, ALU_CMP, operand0, operand1);
+        cpu->PC += 3;
+        break;
+      case JMP:
+        cpu->PC = cpu->reg[operand0];
+        break;
+      case JEQ:
+        if (cpu->FL == 1) {
+          cpu->PC = cpu->reg[operand0];
+        } else {
+          cpu->PC += 2;
+        }
+        break;
+      case JNE:
+        if (cpu->FL != 1) {
+          cpu->PC = cpu->reg[operand0];
+        } else {
+          cpu->PC += 2;
+        }
+        break;
+
+      default:
+        // beej printed IR & cpu->PC
+        printf("unexpected command\n");
+        exit(1);
+    }
     // 6. Move the PC to the next instruction.
   }
 }
@@ -64,4 +187,16 @@ void cpu_run(struct cpu *cpu)
 void cpu_init(struct cpu *cpu)
 {
   // TODO: Initialize the PC and other special registers
+  // set r0-r6 to clear to 0
+  for (int i = 0; i < 7; i++) {
+    cpu->reg[i] = 0;
+  }
+  // set r7 to 0xF4
+  cpu->reg[7] = 0xF4;
+  // set PC & flag to 0
+  cpu->PC = 0;
+  cpu->FL = 0;
+  // set ram to 0
+  memset(cpu->ram, 0, sizeof cpu->ram);
+
 }

ls8/cpu.h

@@ -5,13 +5,20 @@
 struct cpu {
   // TODO
   // PC
+  unsigned char PC;
   // registers (array)
+  unsigned char reg[8];
   // ram (array)
+  unsigned char ram[256];
+  // create a flag
+  unsigned char FL;
 };
 
 // ALU operations
 enum alu_op {
-	ALU_MUL
+	ALU_MUL,
+  ALU_ADD,
+  ALU_CMP
 	// Add more here
 };
 
@@ -23,11 +30,22 @@ enum alu_op {
 #define LDI  0b10000010
 #define HLT  0b00000001
 #define PRN  0b01000111
+#define MUL  0b10100010
+#define ADD  0b10100000
+#define PUSH 0b01000101
+#define POP  0b01000110
+#define CALL 0b01010000
+#define RET  0b00010001
+#define CMP  0b10100111
+#define JMP  0b01010100
+#define JEQ  0b01010101
+#define JNE  0b01010110
+
 // TODO: more instructions here. These can be used in cpu_run().
 
 // Function declarations
 
-extern void cpu_load(struct cpu *cpu);
+extern void cpu_load(char *filename, struct cpu *cpu);
 extern void cpu_init(struct cpu *cpu);
 extern void cpu_run(struct cpu *cpu);
 

ls8/examples/sctest.ls8

@@ -0,0 +1,86 @@
+# Code to test the Sprint Challenge
+#
+# Expected output:
+# 1
+# 4
+# 5
+
+10000010 # LDI R0,10
+00000000
+00001010
+10000010 # LDI R1,20
+00000001
+00010100
+10000010 # LDI R2,TEST1
+00000010
+00010011
+10100111 # CMP R0,R1
+00000000
+00000001
+01010101 # JEQ R2
+00000010
+10000010 # LDI R3,1
+00000011
+00000001
+01000111 # PRN R3
+00000011
+# TEST1 (address 19):
+10000010 # LDI R2,TEST2
+00000010
+00100000
+10100111 # CMP R0,R1
+00000000
+00000001
+01010110 # JNE R2
+00000010
+10000010 # LDI R3,2
+00000011
+00000010
+01000111 # PRN R3
+00000011
+# TEST2 (address 32):
+10000010 # LDI R1,10
+00000001
+00001010
+10000010 # LDI R2,TEST3
+00000010
+00110000
+10100111 # CMP R0,R1
+00000000
+00000001
+01010101 # JEQ R2
+00000010
+10000010 # LDI R3,3
+00000011
+00000011
+01000111 # PRN R3
+00000011
+# TEST3 (address 48):
+10000010 # LDI R2,TEST4
+00000010
+00111101
+10100111 # CMP R0,R1
+00000000
+00000001
+01010110 # JNE R2
+00000010
+10000010 # LDI R3,4
+00000011
+00000100
+01000111 # PRN R3
+00000011
+# TEST4 (address 61):
+10000010 # LDI R3,5
+00000011
+00000101
+01000111 # PRN R3
+00000011
+10000010 # LDI R2,TEST5
+00000010
+01001001
+01010100 # JMP R2
+00000010
+01000111 # PRN R3
+00000011
+# TEST5 (address 73):
+00000001 # HLT