bittide · lmbollen · Jan 20, 2026 · Jan 20, 2026 · Jan 20, 2026 · Jan 20, 2026
diff --git a/.github/synthesis/debug.json b/.github/synthesis/debug.json
@@ -0,0 +1,3 @@
+[
+  {"top": "softUgnDemoTest",       "stage": "test", "cc_report": true}
+]
diff --git a/bittide-cpus/data/Riscv32imc0.scala b/bittide-cpus/data/Riscv32imc0.scala
@@ -44,7 +44,7 @@ object Riscv32imc0 extends App {
         ),
 
         new CsrPlugin(
-            CsrPluginConfig.smallest.copy(
+            CsrPluginConfig.all.copy(
               ebreakGen = true,
               mtvecAccess = CsrAccess.READ_WRITE,
               withPrivilegedDebug = true

diff --git a/bittide-cpus/data/Riscv32imc1.scala b/bittide-cpus/data/Riscv32imc1.scala
@@ -44,7 +44,7 @@ object Riscv32imc1 extends App {
         ),
 
         new CsrPlugin(
-            CsrPluginConfig.smallest.copy(
+            CsrPluginConfig.all.copy(
               ebreakGen = true,
               mtvecAccess = CsrAccess.READ_WRITE,
               withPrivilegedDebug = true

diff --git a/bittide-cpus/data/Riscv32imc2.scala b/bittide-cpus/data/Riscv32imc2.scala
@@ -44,7 +44,7 @@ object Riscv32imc2 extends App {
         ),
 
         new CsrPlugin(
-            CsrPluginConfig.smallest.copy(
+            CsrPluginConfig.all.copy(
               ebreakGen = true,
               mtvecAccess = CsrAccess.READ_WRITE,
               withPrivilegedDebug = true

diff --git a/bittide-cpus/data/Riscv32imc3.scala b/bittide-cpus/data/Riscv32imc3.scala
@@ -44,7 +44,7 @@ object Riscv32imc3 extends App {
         ),
 
         new CsrPlugin(
-            CsrPluginConfig.smallest.copy(
+            CsrPluginConfig.all.copy(
               ebreakGen = true,
               mtvecAccess = CsrAccess.READ_WRITE,
               withPrivilegedDebug = true

diff --git a/bittide-extra/src/Project/Chan.hs b/bittide-extra/src/Project/Chan.hs
@@ -5,6 +5,7 @@ module Project.Chan where
 
 import Prelude hiding (filter)
 
+import Control.Concurrent.Async (async, waitAnyCancel)
 import Control.Concurrent.Chan
 import Data.ByteString (ByteString)
 import Debug.Trace
@@ -46,3 +47,15 @@ Do not use on Handles that might return non-ASCII characters.
 -}
 readUntilLine :: Chan ByteString -> String -> IO [String]
 readUntilLine h = readUntilLineWith h readChan
+
+{- | Wait for a line to appear on any channel and return its index.
+Only use in combination with sensible timeouts.
+-}
+waitForLineAny :: (HasCallStack) => [Chan ByteString] -> String -> IO Int
+waitForLineAny chans expected = do
+  asyncs <-
+    mapM
+      (\(idx, chan) -> async $ waitForLine chan expected >> pure idx)
+      (zip [0 :: Int ..] chans)
+  (_, idx) <- waitAnyCancel asyncs
+  pure idx
diff --git a/bittide-instances/src/Bittide/Instances/Hitl/Driver/Si539xConfiguration.hs b/bittide-instances/src/Bittide/Instances/Hitl/Driver/Si539xConfiguration.hs
@@ -68,7 +68,7 @@ driverFunc _name targets = do
               <> show (L.length <$> allTapInfos)
 
     Gdb.withGdbs (L.length targets) $ \gdbs -> do
-      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-board") gdbs peTapInfos targets
+      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-board" Release) gdbs peTapInfos targets
       liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) gdbs
 
       let picocomStarts = liftIO <$> L.zipWith (initPicocom hitlDir) targets [0 ..]

diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/Core.hs b/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/Core.hs
@@ -75,8 +75,8 @@ muConfig ::
 muConfig =
   PeConfig
     { cpu = Riscv32imc.vexRiscv1
-    , depthI = SNat @(Div (128 * 1024) 4)
-    , depthD = SNat @(Div (64 * 1024) 4)
+    , depthI = SNat @(Div (320 * 1024) 4)
+    , depthD = SNat @(Div (80 * 1024) 4)
     , initI = Nothing
     , initD = Nothing
     , iBusTimeout = d0

diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/Driver.hs b/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/Driver.hs
@@ -71,7 +71,7 @@ driver testName targets = do
 
       Gdb.withGdbs (L.length targets) $ \bootGdbs -> do
         liftIO
-          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot") bootGdbs bootTapInfos targets
+          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot" Release) bootGdbs bootTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) bootGdbs
         liftIO $ mapConcurrently_ Gdb.continue bootGdbs
         liftIO
@@ -102,11 +102,11 @@ driver testName targets = do
               <> show (L.length <$> allTapInfos)
 
     Gdb.withGdbs (L.length targets) $ \ccGdbs -> do
-      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control") ccGdbs ccTapInfos targets
+      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control" Release) ccGdbs ccTapInfos targets
       liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) ccGdbs
 
       Gdb.withGdbs (L.length targets) $ \muGdbs -> do
-        liftIO $ zipWithConcurrently3_ (initGdb hitlDir "soft-ugn-mu") muGdbs muTapInfos targets
+        liftIO $ zipWithConcurrently3_ (initGdb hitlDir "soft-ugn-mu" Release) muGdbs muTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) muGdbs
 
         brackets picocomStarts (liftIO . snd) $ \(L.map fst -> picocoms) -> do
@@ -131,17 +131,6 @@ driver testName targets = do
             hardwareRoundtrips = calculateRoundtripLatencies $ L.concat hardwareUgns
           _ <- liftIO $ do
             putStrLn "\n=== Hardware UGN Roundtrip Latencies ==="
-            mapM print hardwareRoundtrips
-          liftIO
-            $ T.tryWithTimeoutOn
-              T.PrintActionTime
-              "Waiting for calendar initialization"
-              (30_000_000)
-              goDumpCcSamples
-            $ forConcurrently_ picocoms
-            $ \pico ->
-              waitForLine pico "[MU] All calendars initialized"
-
           softwareUgnsPerNode <-
             liftIO
               $ T.tryWithTimeoutOn
@@ -222,3 +211,117 @@ driver testName targets = do
           liftIO goDumpCcSamples
 
           pure ExitSuccess
+
+driver2 ::
+  (HasCallStack) =>
+  String ->
+  [(HwTarget, DeviceInfo)] ->
+  VivadoM ExitCode
+driver2 testName targets = do
+  liftIO
+    . putStrLn
+    $ "Running driver function for targets "
+    <> show ((\(_, info) -> info.deviceId) <$> targets)
+
+  projectDir <- liftIO $ findParentContaining "cabal.project"
+  let hitlDir = projectDir </> "_build/hitl" </> testName
+
+  forM_ targets (assertProbe "probe_test_start")
+
+  let
+    -- BOOT / MU / CC IDs
+    expectedJtagIds = [0x0514C001, 0x1514C001, 0x2514C001]
+    toInitArgs (_, deviceInfo) targetIndex =
+      Ocd.InitOpenOcdArgs{deviceInfo, expectedJtagIds, hitlDir, targetIndex}
+    initArgs = L.zipWith toInitArgs targets [0 ..]
+    optionalBootInitArgs = L.repeat def{Ocd.logPrefix = "boot-", Ocd.initTcl = "vexriscv_boot_init.tcl"}
+    openOcdBootStarts = liftIO <$> L.zipWith Ocd.initOpenOcd initArgs optionalBootInitArgs
+
+  let picocomStarts = liftIO <$> L.zipWith (initPicocom hitlDir) targets [0 ..]
+  brackets picocomStarts (liftIO . snd) $ \(L.map fst -> picocoms) -> do
+    -- Start OpenOCD that will program the boot CPU
+    brackets openOcdBootStarts (liftIO . (.cleanup)) $ \initOcdsData -> do
+      let bootTapInfos = parseBootTapInfo <$> initOcdsData
+
+      Gdb.withGdbs (L.length targets) $ \bootGdbs -> do
+        liftIO
+          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot" Release) bootGdbs bootTapInfos targets
+        liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) bootGdbs
+        liftIO $ mapConcurrently_ Gdb.continue bootGdbs
+        liftIO
+          $ T.tryWithTimeout T.PrintActionTime "Waiting for done" 60_000_000
+          $ forConcurrently_ picocoms
+          $ \pico ->
+            waitForLine pico "[BT] Going into infinite loop.."
+
+  let
+    optionalInitArgs = L.repeat def
+    openOcdStarts = liftIO <$> L.zipWith Ocd.initOpenOcd initArgs optionalInitArgs
+
+  -- Start OpenOCD instances for all CPUs
+  brackets openOcdStarts (liftIO . (.cleanup)) $ \initOcdsData -> do
+    let
+      allTapInfos = parseTapInfo expectedJtagIds <$> initOcdsData
+
+      _bootTapInfos, muTapInfos, ccTapInfos :: [Ocd.TapInfo]
+      (_bootTapInfos, muTapInfos, ccTapInfos)
+        | all (== L.length expectedJtagIds) (L.length <$> allTapInfos)
+        , [boots, mus, ccs] <- L.transpose allTapInfos =
+            (boots, mus, ccs)
+        | otherwise =
+            error
+              $ "Unexpected number of OpenOCD taps initialized. Expected: "
+              <> show (L.length expectedJtagIds)
+              <> ", but got: "
+              <> show (L.length <$> allTapInfos)
+
+      gdbStarts = liftIO <$> fmap (const Gdb.start) targets
+      gdbCleanupAction gdb = do
+        putStrLn "Retrieving final CPU state"
+        Gdb.interruptCommand gdb
+        Gdb.runCommand gdb
+          . unlines
+          $ [ "printf \"Final CPU state\\n\""
+            , "i r"
+            , "bt"
+            ]
+        Gdb.stop gdb
+
+    brackets gdbStarts (liftIO . gdbCleanupAction) $ \ccGdbs -> do
+      -- Gdb.withGdbs (L.length targets) $ \ccGdbs -> do
+      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control" Release) ccGdbs ccTapInfos targets
+      liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) ccGdbs
+
+      brackets gdbStarts (liftIO . gdbCleanupAction) $ \muGdbs -> do
+        -- Gdb.withGdbs (L.length targets) $ \muGdbs -> do
+        liftIO
+          $ zipWithConcurrently3_ (initGdb hitlDir "soft-ugn-demo-mu-2" Release) muGdbs muTapInfos targets
+        liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) muGdbs
+
+        brackets picocomStarts (liftIO . snd) $ \(L.map fst -> picocoms) -> do
+          let goDumpCcSamples = dumpCcSamples hitlDir (defCcConf (natToNum @FpgaCount)) ccGdbs
+
+          _ <- liftIO $ do
+            mapConcurrently
+              ( \gdb -> do
+                  Gdb.setBreakpoints gdb ["_start_trap_rust"]
+                  Gdb.setBreakpointHook gdb
+              )
+              muGdbs
+
+          liftIO $ mapConcurrently_ Gdb.continue ccGdbs
+          liftIO $ mapConcurrently_ Gdb.continue muGdbs
+
+          liftIO
+            $ T.tryWithTimeoutOn
+              T.PrintActionTime
+              "Waiting for CPU test status"
+              (360_000_000)
+              goDumpCcSamples
+            $ forConcurrently_ picocoms
+            $ \pico ->
+              waitForLine pico "[MU] Demo complete."
+
+          liftIO goDumpCcSamples
+
+          pure ExitSuccess
diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/TopEntity.hs b/bittide-instances/src/Bittide/Instances/Hitl/SoftUgnDemo/TopEntity.hs
@@ -109,11 +109,11 @@ tests =
     , externalHdl = []
     , testCases =
         [ HitlTestCase
-            { name = "Bittide_Demo_DUT"
+            { name = "Bittide_Demo_DUT_mu2"
             , parameters = paramForHwTargets allHwTargets ()
             , postProcData = ()
             }
         ]
-    , mDriverProc = Just Driver.driver
+    , mDriverProc = Just Driver.driver2
     , mPostProc = Nothing
     }
diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SwitchDemo/Driver.hs b/bittide-instances/src/Bittide/Instances/Hitl/SwitchDemo/Driver.hs
@@ -115,15 +115,16 @@ dumpCcSamples hitlDir ccConf ccGdbs = do
 initGdb ::
   FilePath ->
   String ->
+  CargoBuildType ->
   Gdb ->
   Ocd.TapInfo ->
   (HwTarget, DeviceInfo) ->
   IO ()
-initGdb hitlDir binName gdb tapInfo (hwT, _d) = do
+initGdb hitlDir binName buildType gdb tapInfo (hwT, _d) = do
   Gdb.setLogging gdb
     $ hitlDir
     </> "gdb-" <> binName <> "-" <> show (getTargetIndex hwT) <> ".log"
-  Gdb.setFile gdb $ firmwareBinariesDir "riscv32imc" Release </> binName
+  Gdb.setFile gdb $ firmwareBinariesDir "riscv32imc" buildType </> binName
   Gdb.setTarget gdb tapInfo.gdbPort
   Gdb.setTimeout gdb Nothing
   Gdb.runCommand gdb "echo connected to target device"
@@ -376,7 +377,7 @@ driver testName targets = do
 
       Gdb.withGdbs (L.length targets) $ \bootGdbs -> do
         liftIO
-          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot") bootGdbs bootTapInfos targets
+          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot" Release) bootGdbs bootTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) bootGdbs
         liftIO $ mapConcurrently_ Gdb.continue bootGdbs
         liftIO
@@ -407,12 +408,12 @@ driver testName targets = do
                 <> show (L.length <$> allTapInfos)
 
       Gdb.withGdbs (L.length targets) $ \ccGdbs -> do
-        liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control") ccGdbs ccTapInfos targets
+        liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control" Release) ccGdbs ccTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) ccGdbs
 
         Gdb.withGdbs (L.length targets) $ \muGdbs -> do
           liftIO
-            $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-mu") muGdbs muTapInfos targets
+            $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-mu" Release) muGdbs muTapInfos targets
           liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) muGdbs
 
           let goDumpCcSamples = dumpCcSamples hitlDir (defCcConf (natToNum @FpgaCount)) ccGdbs

diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SwitchDemoGppe/Driver.hs b/bittide-instances/src/Bittide/Instances/Hitl/SwitchDemoGppe/Driver.hs
@@ -70,7 +70,7 @@ driver testName targets = do
 
       Gdb.withGdbs (L.length targets) $ \bootGdbs -> do
         liftIO
-          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot") bootGdbs bootTapInfos targets
+          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo1-boot" Release) bootGdbs bootTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) bootGdbs
         liftIO $ mapConcurrently_ Gdb.continue bootGdbs
         liftIO
@@ -101,17 +101,17 @@ driver testName targets = do
               <> show (L.length <$> allTapInfos)
 
     Gdb.withGdbs (L.length targets) $ \ccGdbs -> do
-      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control") ccGdbs ccTapInfos targets
+      liftIO $ zipWithConcurrently3_ (initGdb hitlDir "clock-control" Release) ccGdbs ccTapInfos targets
       liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) ccGdbs
 
       Gdb.withGdbs (L.length targets) $ \muGdbs -> do
         liftIO
-          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo2-mu") muGdbs muTapInfos targets
+          $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo2-mu" Release) muGdbs muTapInfos targets
         liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) muGdbs
 
         Gdb.withGdbs (L.length targets) $ \gppeGdbs -> do
           liftIO
-            $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo2-gppe") gppeGdbs gppeTapInfos targets
+            $ zipWithConcurrently3_ (initGdb hitlDir "switch-demo2-gppe" Release) gppeGdbs gppeTapInfos targets
           liftIO $ mapConcurrently_ ((assertEither =<<) . Gdb.loadBinary) gppeGdbs
 
           brackets picocomStarts (liftIO . snd) $ \(L.map fst -> picocoms) -> do