Commit 2645612

committed

Massive overhall to switch to using block design

WIP, need to incorperate actual design into AXI IP and set back up unit tests

1 parent 4222f67 commit 2645612Copy full SHA for 2645612

46 files changed

+7118

-605

lines changed

.gitignore
build.bat
build.tcl
from_git.bat
from_git.sh
from_git.tcl
project_cleaner.tcl
script_changer.py
src
- bd
- hdl
- ip/tis100_1.0
  - bd
    - bd.tcl
  - component.xml
  - drivers/tis100_v1_0
    - data
      - tis100.mdd
      - tis100.tcl
    - src
  - example_designs
    - bfm_design
      - design.tcl
      - tis100_v1_0_tb.sv
    - debug_hw_design
      - design.tcl
      - tis100_v1_0_hw_test.tcl
  - hdl
  - src
  - xgui
    - tis100_v1_0.tcl
tis100.tcl
to_git.bat
to_git.sh
to_git.tcl

46 files changed

+7118

-605

lines changed

`‎.gitignore`

+3-1

-Original file line number
+Diff line change
 **/.mypy_cache/
 .Xil/
 -tis100/
 *.jou
 *.log
 +work_dir/
 +IP_repo/
++
 out.mem

`‎build.bat`

-1

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