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Add RFC for structured VCD output #74
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Thank you, this is very well written! My comments:
(Edit: I now noticed the "Does this feature need to be gated/opt-in by default?" unresolved question, which would cover my second comment.) |
@@ -204,9 +207,13 @@ $upscope $end | |||
- Should we continue to include the "flattened" [pure bit-vector] representation of aggregate signals in the VCD? | |||
- Does this feature need to be gated/opt-in by default? | |||
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- The simulator currently depends on [westerndigitalcorporation/pyvcd](https://github.com/westerndigitalcorporation/pyvcd) when writing VCD files. | |||
However, `pyvcd` only emits scope types defined by the VCD specification (and does not include the `vhdl_record`/`vhdl_array` scopes). | |||
When implementing this RFC, should we continue relying on `pyvcd`, or does this warrant the addition of our own code in the simulator for writing VCD files? |
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One reason to use pyvcd (VCD itself is not hard to emit) is its support for .gtkw
files. I really don't want to have more GTKWave specific code in Amaranth...
Thinking about it, I feel that a prototype for this functionality would be not too difficult to build (you could depend on a git repo with a fork of pyvcd) and it would allow everyone impacted by the change to evaluate how it'll affect their workflow. One consumer with little support for advanced VCD features that we need to care about is the Amaranth playground. |
I closed the PR accidentally (Shift+Enter), apologies! |
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