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README.md

+6-5
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# NVIDIA Jetson driver (Beta)
22

33

4-
Driver (Beta) for Allied Vision Alvium MIPI cameras for NVIDIA Jetson with JetPack 5.1.1 (L4T 35.3.1)
4+
Driver (Beta) for Allied Vision Alvium MIPI cameras for NVIDIA Jetson with JetPack 5.1.2 (L4T 35.4.1)
55
https://developer.nvidia.com/embedded/jetpack
66
![Alvium camera](https://cdn.alliedvision.com/fileadmin/content/images/cameras/Alvium/various/alvium-cameras-models.png)
77

@@ -13,13 +13,14 @@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLI
1313

1414
The scripts in this project build and install the Allied Vision MIPI camera driver to the NVIDIA Jetson boards.
1515

16-
Compatible platforms with JetPack 5.1.1 (L4T 35.3.1) :
16+
Compatible platforms with JetPack 5.1.2 (L4T 35.4.1) :
1717

1818
- AGX Orin Developer Kit
1919
- AGX Xavier DevKit
2020
- Xavier NX DevKit
2121
- Auvidea carrier JNX30-PD with Xavier NX
2222
- Orin Nano Developer Kit (**NEW**)
23+
- Orin NX on the Orin Nano Developer Kit Carrier Board (**NEW**)
2324

2425
***Before starting the installation, make sure to create a backup of your Jetson system.***
2526

@@ -28,9 +29,9 @@ Compatible platforms with JetPack 5.1.1 (L4T 35.3.1) :
2829
### Host PC
2930
The scripts for the driver installation require Git on the host PC.
3031

31-
### Install JetPack 5.1.1
32+
### Install JetPack 5.1.2
3233

33-
Install JetPack 5.1.1 (L4T 35.3.1) as per NVIDIA's instructions
34+
Install JetPack 5.1.2 (L4T 35.4.1) as per NVIDIA's instructions
3435
https://developer.nvidia.com/embedded/jetpack
3536

3637
Recommendation: Use NVIDIA SDK Manager to install JetPack and useful tools such as CUDA.
@@ -46,7 +47,7 @@ https://docs.nvidia.com/sdk-manager/
4647
Install the precompiled kernel, which includes the driver and an installation menu.
4748

4849
1. Extract the tarball on a host PC.
49-
The tarball contains helper scripts and another tarball with the precompiled binaries named AlliedVision_NVidia_L4T_35.3.1.0_<git-rev>.tar.gz.
50+
The tarball contains helper scripts and another tarball with the precompiled binaries named AlliedVision_NVidia_L4T_35.4.1.0_<git-rev>.tar.gz.
5051

5152
2. Copy the tarball to the target board.
5253
3. On the target board, extract the tarball and run the included install script.

avt_build/jetson_build/board.py

+5-5
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@
33
from . import upstream
44
from . import build
55

6-
AVT_RELEASE = "5.1.1"
7-
KERNEL_RELEASE = "5.10.104-tegra"
8-
L4T_VERSION = "35.3.1"
6+
AVT_RELEASE = "5.1.2"
7+
KERNEL_RELEASE = "5.10.120-tegra"
8+
L4T_VERSION = "35.4.1"
99

1010
FileSet = namedtuple('FileSet', [
1111
'driver_package',
@@ -14,9 +14,9 @@
1414

1515

1616
def get_tx2_agx_nx_upstream_files(UpstreamFile):
17-
driver_package = UpstreamFile("https://developer.download.nvidia.com/embedded/L4T/r35_Release_v3.1/release/Jetson_Linux_R35.3.1_aarch64.tbz2", "80a55504a2ce9cdc0a328edb6fd0690615c4ffde9c2b32f4e64e0a1a3432a2e2")
17+
driver_package = UpstreamFile("https://developer.download.nvidia.com/embedded/L4T/r35_Release_v4.1/release/Jetson_Linux_R35.4.1_aarch64.tbz2", "72b75a0c7fa3bf6ef41ae06634bb67c38a92682155d1206026dbee4a6b9a016f")
1818
#rootfs = UpstreamFile("https://developer.nvidia.com/embedded/l4t/r32_release_v7.1/t186/tegra_linux_sample-root-filesystem_r32.7.1_aarch64.tbz2", "17996e861dd092043509e0b7e9ae038e271e5b0b7b78f26a34db4f03df2b12b8")
19-
public_sources = UpstreamFile("https://developer.download.nvidia.com/embedded/L4T/r35_Release_v3.1/sources/public_sources.tbz2", "cd914110043cdb2a19a298fefc52d9dacbbcd560f781955fe03a1e98b470f2ae")
19+
public_sources = UpstreamFile("https://developer.download.nvidia.com/embedded/L4T/r35_Release_v4.1/sources/public_sources.tbz2", "cad6179ae16cc23720dc019f3a36f054df5d153ce833f45cf1bd09a376f5442c")
2020

2121
return FileSet(
2222
public_sources=public_sources,

avt_build/jetson_build/files/bootloader/control

+3-3
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ Maintainer: Allied Vision Technologies GmbH
33

44
Package: avt-nvidia-l4t-bootloader
55
Architecture: arm64
6-
Pre-Depends: nvidia-l4t-core (>> 35.3-0), nvidia-l4t-core (<< 35.4-0)
7-
Depends: nvidia-l4t-tools (>> 35.3-0), nvidia-l4t-tools (<< 35.4-0), nvidia-l4t-init (>> 35.3-0), nvidia-l4t-init (<< 35.4-0)
8-
Conflicts: nvidia-l4t-bootloader (<< 35.4-0)
6+
Pre-Depends: nvidia-l4t-core (>> 35.4-0), nvidia-l4t-core (<< 35.5-0)
7+
Depends: nvidia-l4t-tools (>> 35.4-0), nvidia-l4t-tools (<< 35.5-0), nvidia-l4t-init (>> 35.4-0), nvidia-l4t-init (<< 35.5-0)
8+
Conflicts: nvidia-l4t-bootloader (<< 35.5-0)
99
Section: bootloader
1010
Priority: standard
1111
Homepage: http://developer.nvidia.com/jetson

avt_build/jetson_build/files/kernel-deb/control

+3-3
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ Maintainer: Allied Vision Technologies GmbH
33

44
Package: avt-nvidia-l4t-kernel
55
Architecture: arm64
6-
Pre-Depends: nvidia-l4t-core (>> 35.3-0), nvidia-l4t-core (<< 35.4-0)
7-
Depends: nvidia-l4t-tools (>> 35.3-0), nvidia-l4t-tools (<< 35.4-0)
8-
Conflicts: nvidia-l4t-kernel (<< 35.4-0)
6+
Pre-Depends: nvidia-l4t-core (>> 35.4-0), nvidia-l4t-core (<< 35.5-0)
7+
Depends: nvidia-l4t-tools (>> 35.4-0), nvidia-l4t-tools (<< 35.5-0)
8+
Conflicts: nvidia-l4t-kernel (<< 35.5-0)
99
Section: kernel
1010
Priority: standard
1111
Homepage: http://developer.nvidia.com/jetson
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
11
#!/bin/bash
22

3-
depmod -a "5.10.104-tegra"
3+
depmod -a "5.10.120-tegra"

avt_build/jetson_build/files/kernel-dtb-deb/control

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ Maintainer: Allied Vision Technologies GmbH
33

44
Package: avt-nvidia-l4t-kernel-dtbs
55
Architecture: arm64
6-
Pre-Depends: nvidia-l4t-core (>> 35.3-0), nvidia-l4t-core (<< 35.4-0)
6+
Pre-Depends: nvidia-l4t-core (>> 35.4-0), nvidia-l4t-core (<< 35.5-0)
77
Depends: device-tree-compiler, avt-nvidia-l4t-kernel (= ${KERNEL_RELEASE}-${L4T_VERSION}-${AVT_RELEASE})
8-
Conflicts: nvidia-l4t-kernel-dtbs (<< 35.4-0)
8+
Conflicts: nvidia-l4t-kernel-dtbs (<< 35.5-0)
99
Section: kernel
1010
Priority: standard
1111
Homepage: http://developer.nvidia.com/jetson

avt_build/jetson_build/files/kernel-headers-deb/control

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ Maintainer: Allied Vision Technologies GmbH
33

44
Package: avt-nvidia-l4t-kernel-headers
55
Architecture: arm64
6-
Pre-Depends: nvidia-l4t-core (>> 35.3-0), nvidia-l4t-core (<< 35.4-0)
6+
Pre-Depends: nvidia-l4t-core (>> 35.4-0), nvidia-l4t-core (<< 35.5-0)
77
Depends: libc6, avt-nvidia-l4t-kernel (= ${KERNEL_RELEASE}-${L4T_VERSION}-${AVT_RELEASE})
8-
Conflicts: nvidia-l4t-kernel-headers (<< 35.4-0)
8+
Conflicts: nvidia-l4t-kernel-headers (<< 35.5-0)
99
Section: kernel
1010
Priority: standard
1111
Homepage: http://developer.nvidia.com/jetson

avt_build/jetson_build/installer/install.sh

+1-1
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ NC='\033[0m'
3030
RED='\033[0;31m'
3131
GREEN='\033[0;32m'
3232
REQ_MACHINE="NVidia Jetson"
33-
REQ_KERNEL="5.10.104"
33+
REQ_KERNEL="5.10.120"
3434
DEST="/boot"
3535

3636

hardware/nvidia/platform/t19x/common/kernel-dts/t19x-common-modules/tegra194-camera-ar0234-a00.dtsi

+19-19
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
2+
* Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
33
*
44
* This program is free software; you can redistribute it and/or modify
55
* it under the terms of the GNU General Public License as published by
@@ -26,7 +26,7 @@
2626
reg = <0>;
2727
ar0234_vi_in0: endpoint {
2828
vc-id = <0>;
29-
port-index = <1>;
29+
port-index = <0>;
3030
bus-width = <2>;
3131
remote-endpoint = <&ar0234_csi_out0>;
3232
};
@@ -35,15 +35,15 @@
3535
reg = <1>;
3636
ar0234_vi_in1: endpoint {
3737
vc-id = <1>;
38-
port-index = <1>;
38+
port-index = <0>;
3939
bus-width = <2>;
4040
remote-endpoint = <&ar0234_csi_out1>;
4141
};
4242
};
4343
port@2 {
4444
reg = <2>;
4545
ar0234_vi_in2: endpoint {
46-
vc-id = <2>;
46+
vc-id = <0>;
4747
port-index = <1>;
4848
bus-width = <2>;
4949
remote-endpoint = <&ar0234_csi_out2>;
@@ -52,7 +52,7 @@
5252
port@3 {
5353
reg = <3>;
5454
ar0234_vi_in3: endpoint {
55-
vc-id = <3>;
55+
vc-id = <1>;
5656
port-index = <1>;
5757
bus-width = <2>;
5858
remote-endpoint = <&ar0234_csi_out3>;
@@ -74,7 +74,7 @@
7474
port@0 {
7575
reg = <0>;
7676
ar0234_csi_in0: endpoint@0 {
77-
port-index = <1>;
77+
port-index = <0>;
7878
bus-width = <2>;
7979
remote-endpoint = <&ar0234_ar0234_out0>;
8080
};
@@ -95,7 +95,7 @@
9595
port@0 {
9696
reg = <0>;
9797
ar0234_csi_in1: endpoint@2 {
98-
port-index = <1>;
98+
port-index = <0>;
9999
bus-width = <2>;
100100
remote-endpoint = <&ar0234_ar0234_out1>;
101101
};
@@ -268,7 +268,7 @@
268268
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
269269
mclk_khz = "24000";
270270
num_lanes = "2";
271-
tegra_sinterface = "serial_b";
271+
tegra_sinterface = "serial_a";
272272
phy_mode = "DPHY";
273273
vc_id = "0";
274274
discontinuous_clk = "no";
@@ -286,7 +286,7 @@
286286
inherent_gain = "1";
287287
mclk_multiplier = "3.01";
288288
pix_clk_hz = "134400000";
289-
serdes_pix_clk_hz = "280000000";
289+
serdes_pix_clk_hz = "299000000";
290290

291291
gain_factor = "100";
292292
min_gain_val = "100"; /* dB */
@@ -315,7 +315,7 @@
315315
reg = <0>;
316316
ar0234_ar0234_out0: endpoint {
317317
vc-id = <0>;
318-
port-index = <1>;
318+
port-index = <0>;
319319
bus-width = <2>;
320320
remote-endpoint = <&ar0234_csi_in0>;
321321
};
@@ -435,7 +435,7 @@
435435
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
436436
mclk_khz = "24000";
437437
num_lanes = "2";
438-
tegra_sinterface = "serial_b";
438+
tegra_sinterface = "serial_a";
439439
vc_id = "1";
440440
discontinuous_clk = "no";
441441
dpcm_enable = "false";
@@ -452,7 +452,7 @@
452452
inherent_gain = "1";
453453
mclk_multiplier = "3.01";
454454
pix_clk_hz = "134400000";
455-
serdes_pix_clk_hz = "280000000";
455+
serdes_pix_clk_hz = "299000000";
456456

457457
gain_factor = "100";
458458
min_gain_val = "100"; /* dB */
@@ -481,7 +481,7 @@
481481
reg = <0>;
482482
ar0234_ar0234_out1: endpoint {
483483
vc-id = <1>;
484-
port-index = <1>;
484+
port-index = <0>;
485485
bus-width = <2>;
486486
remote-endpoint = <&ar0234_csi_in1>;
487487
};
@@ -603,7 +603,7 @@
603603
mclk_khz = "24000";
604604
num_lanes = "2";
605605
tegra_sinterface = "serial_b";
606-
vc_id = "2";
606+
vc_id = "0";
607607
discontinuous_clk = "no";
608608
dpcm_enable = "false";
609609
cil_settletime = "0";
@@ -619,7 +619,7 @@
619619
inherent_gain = "1";
620620
mclk_multiplier = "3.01";
621621
pix_clk_hz = "134400000";
622-
serdes_pix_clk_hz = "280000000";
622+
serdes_pix_clk_hz = "299000000";
623623

624624
gain_factor = "100";
625625
min_gain_val = "100"; /* dB */
@@ -647,7 +647,7 @@
647647
port@0 {
648648
reg = <0>;
649649
ar0234_ar0234_out2: endpoint {
650-
vc-id = <2>;
650+
vc-id = <0>;
651651
port-index = <1>;
652652
bus-width = <2>;
653653
remote-endpoint = <&ar0234_csi_in2>;
@@ -769,7 +769,7 @@
769769
mclk_khz = "24000";
770770
num_lanes = "2";
771771
tegra_sinterface = "serial_b";
772-
vc_id = "3";
772+
vc_id = "1";
773773
discontinuous_clk = "no";
774774
dpcm_enable = "false";
775775
cil_settletime = "0";
@@ -785,7 +785,7 @@
785785
inherent_gain = "1";
786786
mclk_multiplier = "3.01";
787787
pix_clk_hz = "134400000";
788-
serdes_pix_clk_hz = "280000000";
788+
serdes_pix_clk_hz = "299000000";
789789

790790
gain_factor = "100";
791791
min_gain_val = "100"; /* dB */
@@ -813,7 +813,7 @@
813813
port@0 {
814814
reg = <0>;
815815
ar0234_ar0234_out3: endpoint {
816-
vc-id = <3>;
816+
vc-id = <1>;
817817
port-index = <1>;
818818
bus-width = <2>;
819819
remote-endpoint = <&ar0234_csi_in3>;

hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi

+3-2
Original file line numberDiff line numberDiff line change
@@ -272,6 +272,7 @@
272272
dpaux3_pins {
273273
pins = "dpaux3-3";
274274
function = "i2c";
275+
nvidia,set-rcv-det-3.3v-signal;
275276
};
276277
};
277278
};
@@ -544,14 +545,14 @@
544545

545546
ethernet@2490000 {
546547
nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(R, 1) 0>;
547-
nvidia,phy-reset-post-delay = <224>;
548-
nvidia,phy-reset-duration = <10000>;
549548
mdio {
550549
compatible = "nvidia,eqos-mdio";
551550
#address-cells = <1>;
552551
#size-cells = <0>;
553552
phy0: phy@0 {
554553
reg = <1>;
554+
nvidia,phy-rst-pdelay-msec = <224>;
555+
nvidia,phy-rst-duration-usec = <10000>;
555556
};
556557
};
557558
};
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
1+
/*
2+
* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
3+
*
4+
* This program is free software; you can redistribute it and/or modify it
5+
* under the terms and conditions of the GNU General Public License,
6+
* version 2, as published by the Free Software Foundation.
7+
*
8+
* This program is distributed in the hope it will be useful, but WITHOUT
9+
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10+
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11+
* more details.
12+
*
13+
* You should have received a copy of the GNU General Public License
14+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
15+
*/
16+
#include <dt-bindings/gpio/tegra234-gpio.h>
17+
18+
/ {
19+
/* TSC Signal Generators */
20+
tsc_sig_gen@c6a0000 {
21+
compatible = "nvidia,tegra234-cam-cdi-tsc";
22+
ranges = <0x0 0x0 0xc6a0000 0x10000>;
23+
reg = <0x0 0xc6a0000 0x0 0x18>;
24+
#address-cells = <1>;
25+
#size-cells = <1>;
26+
status = "okay";
27+
28+
/* EDGE_OUT #0 */
29+
generator@380 {
30+
reg = <0x380 0x80>;
31+
freq_hz = <30>;
32+
duty_cycle = <25>;
33+
offset_ms = <0>;
34+
gpio_pinmux = <&tegra_aon_gpio TEGRA234_AON_GPIO(BB, 2) GPIO_ACTIVE_LOW>;
35+
status = "okay";
36+
};
37+
38+
/* EDGE_OUT #1 */
39+
generator@400 {
40+
reg = <0x400 0x80>;
41+
freq_hz = <30>;
42+
duty_cycle = <25>;
43+
offset_ms = <0>;
44+
status = "disabled";
45+
};
46+
47+
/* EDGE_OUT #2 */
48+
generator@480 {
49+
reg = <0x480 0x80>;
50+
freq_hz = <30>;
51+
duty_cycle = <25>;
52+
offset_ms = <0>;
53+
status = "disabled";
54+
};
55+
56+
/* EDGE_OUT #3 */
57+
generator@500 {
58+
reg = <0x500 0x80>;
59+
freq_hz = <30>;
60+
duty_cycle = <25>;
61+
offset_ms = <0>;
62+
status = "disabled";
63+
};
64+
};
65+
};

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