v0.18.0
Release created on: 23.12.2022 - 22:38:50
New Features
- Added
Documentproperty toDesignUnit. - Added
LibraryReferenceSymbol,PackageReferenceSymbolandContextReferenceSymbol. - Added new packages
stdandieeecontaining pre-defined VHDL libraries and VHDL packages. - Added
LoadStdLibraryandLoadIEEELibrarytoDesign. - Added
IterateDesignUnitsgenerator onDesignandLibrary. - Implemented various analyze methods on
Design:LinkLibraryReferencesLinkArchitecturesLinkPackageBodies
- Added
_Add***methods toDocument. - Added
DesignUnits,VerificationUnits,VerificationPropertiesandVerificationModesproperties toDocument.
Changes
- Moved classes:
pyVHDLModel.SyntaxModel.Name→pyVHDLModel.NamepyVHDLModel.SyntaxModel.Symbol→pyVHDLModel.SymbolpyVHDLModel.SyntaxModel.Reference→pyVHDLModel.ReferencepyVHDLModel.SyntaxModel.LibraryClause→pyVHDLModel.LibraryClausepyVHDLModel.SyntaxModel.UseClause→pyVHDLModel.UseClausepyVHDLModel.SyntaxModel.ContextReference→pyVHDLModel.ContextReference
- Property
PrimaryUnit.Libraryuses it's own private field_libraryinstead of_parent, so_parentcan be used to refer to the document a design unit is in. - Improved
EntitySymbol,ArchitectureSymbol,PackageSymbol. - Improved
GetLibraryinDesign. - Improved
AddDocumentinLibrary. - Changed almost all internal lists in
LibraryandDocumentto dictionaries for quick name lookups. - Enabled CI job Windows + Python 3.11 again.
- Bumped dependencies.
- Updated MAKEFILE for Sphinx documentation.
Bug Fixes
- Fixed usage of Names vs. Symbols.
Related PRs:
None