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2 changes: 1 addition & 1 deletion docs/rvfi.md
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Expand Up @@ -129,7 +129,7 @@ If reading a CSR has side effects, those side effects are not triggered by raise
The Verilog define `RISCV_FORMAL_CSR_<CSRNAME>` must be set for each CSR traced
via RVFI by the core under test.

See [RISC-V Formal CSR Sematics](csrs.md) for the exact semantics of CSR values
See [RISC-V Formal CSR Semantics](csrs.md) for the exact semantics of CSR values
output via RVFI.

### Handling of Speculative Execution
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