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18 workflow runs

18 workflow runs

shrinking to 3x2 docs #18: Commit a0bbd27 pushed by patrickschaumont

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change info.yaml and config parameters use 4x2 now docs #17: Commit db6da6e pushed by zliu1Charlotte

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change tile to 6x2 docs #16: Commit d01006d pushed by zliu1Charlotte

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yosys final edits on rtl files passed docs #15: Commit 9f15ad9 pushed by zliu1Charlotte

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tile change and uio_out[4:0]=0 docs #14: Commit b84357c pushed by zliu1Charlotte

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no gpio ports assigned docs #13: Commit e6925a3 pushed by zliu1Charlotte

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add wire type again in all files docs #12: Commit 76b3240 pushed by zliu1Charlotte

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add wiretype docs #11: Commit b20a25e pushed by zliu1Charlotte

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default_nettype wire docs #10: Commit 155ce6a pushed by zliu1Charlotte

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edit docs docs #9: Commit 3d363fc pushed by zliu1Charlotte

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edit inv_buf_passgate.v docs #8: Commit 95cfb3e pushed by zliu1Charlotte

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edit tristate -> inv and buf cell docs #7: Commit ff50f8b pushed by zliu1Charlotte

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edit test.py 03 -> 3 docs #6: Commit 5090840 pushed by zliu1Charlotte

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edit test.py docs #5: Commit 1d4b230 pushed by zliu1Charlotte

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edit ./test/tb.v top module name docs #4: Commit 3680f95 pushed by zliu1Charlotte

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edit makefile in ./test docs #3: Commit cbd7a62 pushed by zliu1Charlotte

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added ./src and editedinfo.ymal docs #2: Commit dedf90d pushed by zliu1Charlotte

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Update info.yaml docs #1: Commit 1c272ea pushed by patrickschaumont

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