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Users/bimani/rocm 21691 cas implementation correctness#7754

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users/bimani/ROCM-21691-CAS-implementation-correctness
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Users/bimani/rocm 21691 cas implementation correctness#7754
bimaniamd wants to merge 1 commit into
developfrom
users/bimani/ROCM-21691-CAS-implementation-correctness

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Motivation

Technical Details

JIRA ID

Test Plan

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@bimaniamd bimaniamd force-pushed the users/bimani/ROCM-21691-CAS-implementation-correctness branch 2 times, most recently from 6473bcd to 1dfec93 Compare June 25, 2026 14:17

@dayatsin-amd dayatsin-amd left a comment

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Approving changes interrupt_signal. I will let Shweta/Chris review roctst changes

@bimaniamd bimaniamd force-pushed the users/bimani/ROCM-21691-CAS-implementation-correctness branch 3 times, most recently from 812e41e to 9090fbb Compare June 26, 2026 13:39
    ## Motivation

        Currently the implementations in InterruptSignal (e.g.
        InterruptSignal::CasAcqRel) call SetEvent() unconditionally resulting
        in spurious wakes for any waiting agent in cases where the signal does
        not have the expected value

    ## Technical Details

        Check added to see if the observed value is the same as the
        expected value and only then SetEvent() is invoked.

        Also Added a test case to compare the difference between a case
        when SetEvent is invoked everytime vs when its not invoked as
        the observed value is the same as expected value.Compared the
        context switch between the threads and the efficiency gained. Added to
        the stress test as the only effect this change has is a performance
        improvement.

    ## JIRA ID

        ROCM-21691
@bimaniamd bimaniamd force-pushed the users/bimani/ROCM-21691-CAS-implementation-correctness branch from 9090fbb to d8f4ab7 Compare June 26, 2026 15:51
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