[gschorcht]

Contribution description

This PR fixes an issue with SPI RAM cache for ESP32 revisions < 3.

ESP32 revisions < 3 have a hardware bug in the SPI RAM cache: if an interrupt occurs while a cache line is fetched from SPI RAM, writes to SPI RAM can get lost. ESP-IDF works around this bug with CONFIG_SPIRAM_CACHE_WORKAROUND, which is enabled by default if SPI RAM is used on ESP32. In that case, ESP-IDF (components/esp_psram/CMakeLists.txt and project_include.cmake):

• compiles all code with -mfix-esp32-psram-cache-issue and -mfix-esp32-psram-cache-strategy=memw, so that the compiler avoids the vulnerable instruction sequences, and
• links with -mfix-esp32-psram-cache-issue, so that the linker uses the esp32/psram multilib variants of libc and libgcc, which are compiled with this workaround.

In RIOT, CONFIG_SPIRAM_CACHE_WORKAROUND and CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW are already defined in sdkconfig_esp32.h, but the corresponding compiler and linker flags were never used. Writes to SPI RAM could therefore get lost on affected ESP32 modules. This corrupted, for example, the TLSF block headers of the heap in SPI RAM.

This PR adds the flags to CFLAGS and LINKFLAGS if module esp_spi_ram is used on ESP32. Other ESP32x SoCs are not affected.

The issue was identified during the migration to ESP-IDF v6.1 in PR #22946. This PR is a split-off from of PR #22946 and simplifies PR #22946.

Testing procedure

• Green CI.

• Compile an application with SPI RAM for an ESP32 board, e.g.:

  USEMODULE=esp_spi_ram BOARD=esp32-wrover-kit make -C tests/sys/malloc QUIET=0 | grep fix-esp32-psram-cache-issue
  

  Check that the files are compiled with -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw, and the map file shows that libc_nano.a and libgcc.a are taken from the esp32/psram multilib directories of the toolchain.

  grep -E "libc_nano|libgcc" /tests/sys/malloc/bin/esp32-wrover-kit/tests_malloc.map
  

• tests/sys/malloc with USEMODULE=esp_spi_ram on an ESP32 module with SPI RAM, ideally an ESP32 revision < 3 (e.g. the ESP32-WROVER of an older esp32-wrover-kit), should still succeed:

  USEMODULE=esp_spi_ram BOARD=esp32-wrover-kit make -C tests/sys/malloc flash test
  

Issues/PRs references

Split-off from PR #22946

Declaration of AI-Tools / LLMs usage:

AI-Tools / LLMs that were used are:

• Claude Code with Claude Opus 5.5 for analyzing the problem and generating the code and the commit message, with user review

[riot-ci]

Murdock results

✔️ PASSED

94865b3 cpu/esp32: enable SPI RAM cache workaround for ESP32

Success	Failures	Total	Runtime
14012	0	14013	09m:41s

Artifacts

• Documentation preview