[codex] Strengthen PTODSL A5 micro flow

[zhoubot]

What changed

This PR strengthens the A5 PTODSL library surface and refreshes the checked-in generated examples.

The main changes are:

• add explicit public pointer typing for non-GM spaces via pto.ptr(..., space=...) and PtrType(..., memory_space=...)
• continue the A5 split into opcode-focused files and add checked-in header coverage tracking
• remove the duplicate readable alias shim layer from the public A5 op surface and keep the canonical t... / T... entrypoints
• refresh the generated A5 .pto examples
• add pure micro generated examples that lower end-to-end through PTOAS VPTO into HIVM LLVM
• teach the generation script to emit .ll sidecars only for kernels that are intentionally marked HIVM-lowerable

Why

The old surface still had compatibility shims and did not provide a stable end-to-end proof that PTODSL could produce a kernel which PTOAS lowers into CCE/HIVM intrinsics.

This change makes the PTODSL side stronger in two ways:

• the public API can now express the pointer spaces needed by micro kernels directly
• the repo now carries a checked-in micro kernel example and regression that proves PTODSL -> PTOAS -> llvm.hivm.*

Impact

Users can now write and generate pure PTODSL micro kernels without reaching into the A5 internals for pointer typing, and the generated examples clearly distinguish:

• frontend/tile examples that are useful PTODSL coverage
• pure micro examples that are the canonical current VPTO/HIVM lowering path

The generated A5 artifacts now include:

• a5_hivm_vadd_demo.pto
• a5_hivm_vadd_demo.ll
• a5_vector_copy.ll

Validation

Ran:

• PYTHONPATH=... python -m pytest -q tests/regression
• result: 56 passed in 1.04s
• PYTHONPATH=... python scripts/generate_a5_pto.py --emit-hivm-llvm
• direct PTOAS check on a5_hivm_vadd_demo.pto confirms emission of:
  • llvm.hivm.vldsx1.v64f32
  • llvm.hivm.vadd.v64f32.x
  • llvm.hivm.vstsx1.v64f32

Current boundary

The canonical passing backend path is now the pure micro PTODSL flow. The higher-level tensor-view and tile-buffer examples remain valuable frontend coverage, but they are not yet the canonical PTOAS VPTO/HIVM lowering path.