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Open-source high-performance RISC-V processor
Scala 6.2k 751
Documentation for XiangShan
Markdown 408 138
Open-source high-performance non-blocking cache
Scala 78 38
Modern co-simulation framework for RISC-V CPUs
C++ 140 77
XiangShan Frontend Develop Environment
Shell 55 54
C 270 102
RISC-V AIA in Chisel
This repo includes XiangShan's function units
Open-source non-blocking L2 cache
XSPdb is a Python-based extension of pdb designed for the XiangShan IP, providing GDB-like "interactive debugging" capabilities.
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