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@davidkern
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Discussion on esp-rs/esp32#14 (comment) after that PR was merged has indicated some mistakes with the approach taken in that PR.

Generally, peripheral names can be determined directly from the interrupt names by taking the prefix of the names. Some renaming is required to match up to peripherals extracted from the registers in the IDF source.

This is not ready yet - I'm opening the PR early for discussion on what to do with interrupts for indexed peripherals.

@davidkern
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All interrupts are now associated with peripherals, except for the indexed ones:

Failed to match peripheral "SLC0" for interrupt "SLC0_INTR"
Failed to match peripheral "SLC1" for interrupt "SLC1_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_T0_LEVEL_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_T1_LEVEL_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_WDT_LEVEL_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_LACT_LEVEL_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_T0_LEVEL_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_T1_LEVEL_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_WDT_LEVEL_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_LACT_LEVEL_INTR"
Failed to match peripheral "I2S0" for interrupt "I2S0_INTR"
Failed to match peripheral "UART0" for interrupt "UART0_INTR"
Failed to match peripheral "PWM0" for interrupt "PWM0_INTR"
Failed to match peripheral "TIMER1" for interrupt "TIMER1_INTR"
Failed to match peripheral "TIMER2" for interrupt "TIMER2_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_T0_EDGE_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_T1_EDGE_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_WDT_EDGE_INTR"
Failed to match peripheral "TG0" for interrupt "TG0_LACT_EDGE_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_T0_EDGE_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_T1_EDGE_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_WDT_EDGE_INTR"
Failed to match peripheral "TG1" for interrupt "TG1_LACT_EDGE_INTR"

(TIMER1 & TIMER2 are legacy interrupts carried over from the 8266 per @igrr - I'll throw them on a LEGACY_TIMER "peripheral" in a next update so they could optionally be used for RTFM's task scheduler).

Associating the remaining interrupts will require handling indexed peripherals in a better fashion here rather than patching (https://github.com/esp-rs/esp32/tree/master/svd/patches). I'll play around with trying to extract that info out of the IDF source next - I'm assuming there isn't an obvious way to do that, or @MabezDev would have done it already?

@MabezDev
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This is great work!

I'll play around with trying to extract that info out of the IDF source next - I'm assuming there isn't an obvious way to do that, or @MabezDev would have done it already?

I never found an easy way unfortunately; that said I didn't spend too much time on it. Maybe a bit of fuzzing when searching for the peripheral might work?

i.e we preload the peripherals including there indexed variants (SLC0, SLC1) and when we find reg or interrupt info on SLC, we add it to both SLC0 & SLC1.

@arjanmels
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@davidkern We are getting a bit stuck because of the limitations of the svdtool (which we can only do limited edits to to ensure compatibility with stm32). So it looks like improving idf2svd is the way to go.

Did you happen to make progress with the indexed peripherals?

@davidkern
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@arjanmels I had gone down some blind alleys, was a bit stuck learning nom and then found myself without time to work on this. But I'm making progress this weekend - I nearly have enough of a C parser working to "query" the ESP-IDF source to be able to correctly infer the relationship between peripherals and more generally not need to make brittle regex's.

Maybe I won't be able to get everything done this weekend, but the code is definitely easier to understand. So I'll put up a PR as soon as it can at least do what idf2svd can do now!

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4 participants