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import all the x86-galileo devices. these will need to be incorporate…
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…d into the build system.
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dmswany committed Sep 17, 2016
1 parent 7fbccfe commit 069b1d6
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60 changes: 60 additions & 0 deletions device/x86-galileo/eth/colon2mac.c
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/* colon2mac.c - colon2mac */

#include <xinu.h>
#include <ctype.h>

/*------------------------------------------------------------------------
* colonmac - Parse a colon-hex Ethernet address and convert to binary
*------------------------------------------------------------------------
*/
int32 colon2mac (
char *src, /* Ptr to Ethernet address in ASCII of */
/* the form: xx:xx:xx:xx:xx:xx */
byte *dst /* Where to put binary form of address */
)
{
int32 cnt; /* Count of output bytes */
int32 digit = 0; /* Next digit in binary */
int32 ch = 0; /* Next digit in ASCII */

/* Validate arguments */

if (src == NULL || dst == NULL) {
return SYSERR;
}

/* For each of the six bytes in an Ethernet address */

for (cnt = 0; (cnt < ETH_ADDR_LEN) && (src != NULLCH); cnt++) {

/* Get first hex character and convert to binary */

ch = *src++;
if (isdigit(ch)) {
digit = ch - '0';
} else if (isxdigit(ch)) {
digit = 10 + ch - (isupper(ch) ? 'A' : 'a');
} else {
digit = 0;
}
dst[cnt] = digit << 4;

/* Get second hex character and convert to binary */

ch = *src++;

if (isdigit(ch)) {
digit = ch - '0';
} else if (isxdigit(ch)) {
digit = 10 + ch - (isupper(ch) ? 'A' : 'a');
} else {
digit = 0;
}
dst[cnt] |= digit;

if (*src++ != ':') {
break;
}
}
return cnt;
}
47 changes: 47 additions & 0 deletions device/x86-galileo/eth/ethcontrol.c
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/* ethcontrol.c - ethcontrol */

#include <xinu.h>

/*------------------------------------------------------------------------
* ethcontrol - implement control function for a quark ethernet device
*------------------------------------------------------------------------
*/
devcall ethcontrol (
struct dentry *devptr, /* entry in device switch table */
int32 func, /* control function */
int32 arg1, /* argument 1, if needed */
int32 arg2 /* argument 2, if needed */
)
{
struct ethcblk *ethptr; /* Ethertab entry pointer */
int32 retval = OK; /* Return value of cntl function*/

ethptr = &ethertab[devptr->dvminor];

switch (func) {

/* Get MAC address */

case ETH_CTRL_GET_MAC:
memcpy((byte *)arg1, ethptr->devAddress,
ETH_ADDR_LEN);
break;

/* Add a multicast address */

case ETH_CTRL_ADD_MCAST:
retval = ethmcast_add(ethptr, (byte *)arg1);
break;

/* Remove a multicast address */

case ETH_CTRL_REMOVE_MCAST:
retval = ethmcast_remove(ethptr, (byte *)arg1);
break;

default:
return SYSERR;
}

return retval;
}
20 changes: 20 additions & 0 deletions device/x86-galileo/eth/ethdispatch.S
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/* ethdispatch.S - ethdispatch */

#include <icu.s>
.text
.globl ethdispatch
.globl ethhandler
ethdispatch:
pushal
pushfl
cli
movb $EOI,%al # clear the interrupt
outb %al,$OCW1_2
movb $EOI,%al
outb %al,$OCW2_2

call ethhandler

popfl
popal
iret
127 changes: 127 additions & 0 deletions device/x86-galileo/eth/ethhandler.c
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/* ethhandler.c - ethhandler */

#include <xinu.h>

/*------------------------------------------------------------------------
* ethhandler - Interrupt handler for Intel Quark Ethernet
*------------------------------------------------------------------------
*/
interrupt ethhandler(void)
{
struct ethcblk *ethptr; /* Ethertab entry pointer */
struct eth_q_csreg *csrptr; /* Pointer to Ethernet CRSs */
struct eth_q_tx_desc *tdescptr;/* Pointer to tx descriptor */
struct eth_q_rx_desc *rdescptr;/* Pointer to rx descriptor */
volatile uint32 sr; /* Copy of status register */
uint32 count; /* Variable used to count pkts */

ethptr = &ethertab[devtab[ETHER0].dvminor];

csrptr = (struct eth_q_csreg *)ethptr->csr;

/* Copy the status register into a local variable */

sr = csrptr->sr;

/* If there is no interrupt pending, return */

if((csrptr->sr & ETH_QUARK_SR_NIS) == 0) {
return;
}

/* Acknowledge the interrupt */

csrptr->sr = sr;

/* Check status register to figure out the source of interrupt */

if (sr & ETH_QUARK_SR_TI) { /* Transmit interrupt */

/* Pointer to the head of transmit desc ring */

tdescptr = (struct eth_q_tx_desc *)ethptr->txRing +
ethptr->txHead;

/* Start packet count at zero */

count = 0;

/* Repeat until we process all the descriptor slots */

while(ethptr->txHead != ethptr->txTail) {

/* If the descriptor is owned by DMA, stop here */

if(tdescptr->ctrlstat & ETH_QUARK_TDCS_OWN) {
break;
}

/* Descriptor was processed; increment count */

count++;

/* Go to the next descriptor */

tdescptr += 1;

/* Increment the head of the transmit desc ring */

ethptr->txHead += 1;
if(ethptr->txHead >= ethptr->txRingSize) {
ethptr->txHead = 0;
tdescptr = (struct eth_q_tx_desc *)
ethptr->txRing;
}
}

/* 'count' packets were processed by DMA, and slots are */
/* now free; signal the semaphore accordingly */

signaln(ethptr->osem, count);

}
if(sr & ETH_QUARK_SR_RI) { /* Receive interrupt */

/* Get the pointer to the tail of the receive desc list */

rdescptr = (struct eth_q_rx_desc *)ethptr->rxRing +
ethptr->rxTail;

count = 0; /* Start packet count at zero */

/* Repeat until we have received */
/* maximum no. packets that can fit in queue */

while(count <= ethptr->rxRingSize) {

/* If the descriptor is owned by the DMA, stop */

if(rdescptr->status & ETH_QUARK_RDST_OWN) {
break;
}

/* Descriptor was processed; increment count */
count++;

/* Go to the next descriptor */

rdescptr += 1;

/* Increment the tail index of the rx desc ring */

ethptr->rxTail += 1;
if(ethptr->rxTail >= ethptr->rxRingSize) {
ethptr->rxTail = 0;
rdescptr = (struct eth_q_rx_desc *)
ethptr->rxRing;
}
}

/* 'count' packets were received and are available, */
/* so signal the semaphore accordingly */

signaln(ethptr->isem, count);
}

return;
}
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