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I added some minor stuff. Note 8 tester would be higly apriciated(?) before release. #3

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1 change: 1 addition & 0 deletions arch/arm64/configs/exynos8895-dream2lte_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -3083,6 +3083,7 @@ CONFIG_EXYNOS_DECON_LCD_SPI=y
CONFIG_EXYNOS_DECON_LCD_COPR=y
CONFIG_EXYNOS_DECON_LCD_TUNING=y
CONFIG_PANEL_AID_DIMMING=y
CONFIG_PANEL_SMART_DIMMING=y
# CONFIG_EXYNOS_DECON_LCD_S6E3HF4 is not set
CONFIG_EXYNOS_DECON_LCD_S6E3HA6=y
CONFIG_ACTIVE_CLOCK=y
Expand Down
1 change: 1 addition & 0 deletions arch/arm64/configs/exynos8895-dreamlte_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -3083,6 +3083,7 @@ CONFIG_EXYNOS_DECON_LCD_SPI=y
CONFIG_EXYNOS_DECON_LCD_COPR=y
CONFIG_EXYNOS_DECON_LCD_TUNING=y
CONFIG_PANEL_AID_DIMMING=y
ONFIG_PANEL_SMART_DIMMING=y
# CONFIG_EXYNOS_DECON_LCD_S6E3HF4 is not set
CONFIG_EXYNOS_DECON_LCD_S6E3HA6=y
CONFIG_ACTIVE_CLOCK=y
Expand Down
1 change: 1 addition & 0 deletions arch/arm64/configs/exynos8895-greatlte_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -3085,6 +3085,7 @@ CONFIG_EXYNOS_DECON_LCD_SPI=y
CONFIG_EXYNOS_DECON_LCD_COPR=y
CONFIG_EXYNOS_DECON_LCD_TUNING=y
CONFIG_PANEL_AID_DIMMING=y
ONFIG_PANEL_SMART_DIMMING=y
# CONFIG_EXYNOS_DECON_LCD_S6E3HF4 is not set
CONFIG_EXYNOS_DECON_LCD_S6E3HA6=y
CONFIG_ACTIVE_CLOCK=y
Expand Down
5 changes: 5 additions & 0 deletions drivers/video/fbdev/exynos/panel/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,11 @@ config PANEL_AID_DIMMING
tristate "Support AID Dimming"
default n

config PANEL_SMART_DIMMING
depends on PANEL_AID_DIMMING
tristate "Support SMART Dimming"
default n

config EXYNOS_DECON_LCD_S6E3HF4
depends on EXYNOS_DECON_LCD && EXYNOS_MIPI_DSIM
tristate "S6E3HF4 AMOLED WQHD LCD driver(1440 x 2560)"
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -188,7 +188,11 @@ static u8 dream2_a2_sa_mps_table[][1] = { { 0xCC }, { 0xDC } };
static u8 dream2_a2_sa_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
{
/* OVER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C }, { 0x0D }, { 0x0E },
#else
{ 0x0A }, { 0x0A }, { 0x0A }, { 0x0A }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C }, { 0x0D }, { 0x0E },
#endif
{ 0x0F }, { 0x11 }, { 0x13 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
Expand All @@ -205,7 +209,11 @@ static u8 dream2_a2_sa_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
},
{
/* UNDER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C }, { 0x0D }, { 0x0E },
#else
{ 0x0A }, { 0x0A }, { 0x0A }, { 0x0A }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C }, { 0x0D }, { 0x0E },
#endif
{ 0x0F }, { 0x11 }, { 0x13 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
Expand Down Expand Up @@ -1766,7 +1774,11 @@ DEFINE_VARIABLE_PACKET(dream2_a2_sa_gram_img_pattern_1, DSI_PKT_TYPE_WR_MEM, DRE
#endif

DEFINE_VARIABLE_PACKET(dream2_a2_sa_gamma, DSI_PKT_TYPE_WR, DREAM2_A2_SA_GAMMA, &dream2_a2_sa_maptbl[GAMMA_MAPTBL], 1);
#ifndef CONFIG_PANEL_SMART_DIMMING
DEFINE_VARIABLE_PACKET(dream2_a2_sa_aor, DSI_PKT_TYPE_WR, DREAM2_A2_SA_AOR, &dream2_a2_sa_maptbl[AOR_MAPTBL], 1);
#else
DEFINE_STATIC_PACKET(dream2_a2_sa_aor, DSI_PKT_TYPE_WR, DREAM2_A2_SA_AOR);
#endif

static struct pkt_update_info PKTUI(dream2_a2_sa_tset_mps_elvss)[] = {
{ .offset = 1, .maptbl = &dream2_a2_sa_maptbl[TSET_MAPTBL] },
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
* LDI : S6E3HA6
* PANEL : DREAM2_A2_SA
*/
#ifndef CONFIG_PANEL_SMART_DIMMING
/* gray scale offset values */
static s32 dream2_a2_sa_rtbl2nit[11] = { 0, 0, 25, 24, 21, 17, 14, 11, 5, 4, 0 };
static s32 dream2_a2_sa_rtbl3nit[11] = { 0, 0, 24, 23, 19, 15, 13, 11, 5, 4, 0 };
Expand Down Expand Up @@ -249,6 +250,87 @@ static struct dimming_lut dream2_a2_sa_dimming_lut[] = {
DIM_LUT_V0_INIT(412, 416, GAMMA_2_15, dream2_a2_sa_rtbl412nit, dream2_a2_sa_ctbl412nit),
DIM_LUT_V0_INIT(420, 420, GAMMA_2_20, dream2_a2_sa_rtbl420nit, dream2_a2_sa_ctbl420nit),
};
#else
static s32 rtbl420nit[11] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
static s32 ctbl420nit[33] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };

static struct dimming_lut dream2_a2_sa_dimming_lut[] = {
DIM_LUT_V0_INIT(2, 6, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(3, 6, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(4, 7, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(5, 7, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(6, 8, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(7, 8, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(8, 9, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(9, 9, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(10, 10, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(11, 11, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(12, 12, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(13, 13, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(14, 14, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(15, 15, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(16, 16, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(17, 17, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(19, 19, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(20, 20, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(21, 21, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(22, 22, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(24, 24, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(25, 25, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(27, 27, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(29, 29, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(30, 30, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(32, 32, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(34, 34, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(37, 37, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(39, 39, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(41, 41, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(44, 44, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(47, 47, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(50, 50, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(53, 53, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(56, 56, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(60, 60, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(64, 64, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(68, 68, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(72, 72, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(77, 77, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(82, 82, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(87, 87, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(93, 93, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(98, 98, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(105, 105, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(111, 111, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(119, 119, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(126, 126, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(134, 134, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(143, 143, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(152, 152, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(162, 162, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(172, 172, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(183, 183, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(195, 195, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(207, 207, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(220, 220, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(234, 234, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(249, 249, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(265, 265, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(282, 282, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(300, 300, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(316, 316, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(333, 333, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(350, 350, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(357, 357, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(365, 365, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(372, 372, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(380, 380, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(387, 387, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(395, 395, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(403, 403, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(412, 412, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(420, 420, GAMMA_2_20, rtbl420nit, ctbl420nit),
};
#endif

#if PANEL_BACKLIGHT_PAC_STEPS == 512
static unsigned int dream2_a2_sa_brt_to_step_tbl[S6E3HA6_TOTAL_PAC_STEPS] = {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -188,8 +188,13 @@ static u8 dream_a3_da_mps_table[][1] = { { 0xCC }, { 0xDC } };
static u8 dream_a3_da_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
{
/* OVER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 },
{ 0x14 }, { 0x14 }, { 0x14 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
#else
{ 0x07 }, { 0x07 }, { 0x08 }, { 0x08 }, { 0x09 }, { 0x0A }, { 0x0B }, { 0x0C }, { 0x0D }, { 0x0F },
{ 0x11 }, { 0x13 }, { 0x15 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
#endif
{ 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
{ 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
{ 0x17 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x16 }, { 0x15 },
Expand All @@ -205,7 +210,11 @@ static u8 dream_a3_da_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
},
{
/* UNDER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 }, { 0x14 },
#else
{ 0x10 }, { 0x10 }, { 0x10 }, { 0x10 }, { 0x10 }, { 0x10 }, { 0x10 }, { 0x14 }, { 0x14 }, { 0x14 },
#endif
{ 0x14 }, { 0x14 }, { 0x14 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
{ 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
{ 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 }, { 0x17 },
Expand Down Expand Up @@ -1759,7 +1768,11 @@ DEFINE_VARIABLE_PACKET(dream_a3_da_gram_img_pattern_1, DSI_PKT_TYPE_WR_MEM, DREA
#endif

DEFINE_VARIABLE_PACKET(dream_a3_da_gamma, DSI_PKT_TYPE_WR, DREAM_A3_DA_GAMMA, &dream_a3_da_maptbl[GAMMA_MAPTBL], 1);
#ifndef CONFIG_PANEL_SMART_DIMMING
DEFINE_VARIABLE_PACKET(dream_a3_da_aor, DSI_PKT_TYPE_WR, DREAM_A3_DA_AOR, &dream_a3_da_maptbl[AOR_MAPTBL], 1);
#else
DEFINE_STATIC_PACKET(dream_a3_da_aor, DSI_PKT_TYPE_WR, DREAM_A3_DA_AOR);
#endif

static struct pkt_update_info PKTUI(dream_a3_da_tset_mps_elvss)[] = {
{ .offset = 1, .maptbl = &dream_a3_da_maptbl[TSET_MAPTBL] },
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
* LDI : S6E3HA6
* PANEL : DREAM_A3_DA
*/
#ifndef CONFIG_PANEL_SMART_DIMMING
/* gray scale offset values */
static s32 dream_a3_da_rtbl2nit[11] = { 0, 0, 16, 15, 14, 12, 10, 10, 8, 7, 0 };
static s32 dream_a3_da_rtbl3nit[11] = { 0, 0, -3, -5, 4, 6, 6, 6, 7, 6, 0 };
Expand Down Expand Up @@ -249,6 +250,84 @@ static struct dimming_lut dream_a3_da_dimming_lut[] = {
DIM_LUT_V0_INIT(412, 413, GAMMA_2_15, dream_a3_da_rtbl412nit, dream_a3_da_ctbl412nit),
DIM_LUT_V0_INIT(420, 420, GAMMA_2_20, dream_a3_da_rtbl420nit, dream_a3_da_ctbl420nit),
};
#else
static struct dimming_lut dream_a3_da_dimming_lut[] = {
DIM_LUT_V0_INIT(2, 6, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(3, 6, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(4, 7, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(5, 7, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(6, 8, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(7, 8, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(8, 9, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(9, 9, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(10, 10, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(11, 11, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(12, 12, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(13, 13, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(14, 14, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(15, 15, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(16, 16, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(17, 17, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(19, 19, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(20, 20, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(21, 21, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(22, 22, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(24, 24, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(25, 25, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(27, 27, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(29, 29, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(30, 30, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(32, 32, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(34, 34, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(37, 37, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(39, 39, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(41, 41, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(44, 44, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(47, 47, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(50, 50, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(53, 53, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(56, 56, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(60, 60, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(64, 64, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(68, 68, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(72, 72, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(77, 77, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(82, 82, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(87, 87, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(93, 93, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(98, 98, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(105, 105, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(111, 111, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(119, 119, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(126, 126, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(134, 134, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(143, 143, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(152, 152, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(162, 162, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(172, 172, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(183, 183, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(195, 195, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(207, 207, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(220, 220, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(234, 234, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(249, 249, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(265, 265, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(282, 282, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(300, 300, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(316, 316, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(333, 333, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(350, 350, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(357, 357, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(365, 365, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(372, 372, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(380, 380, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(387, 387, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(395, 395, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(403, 403, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(412, 412, GAMMA_2_15, rtbl420nit, ctbl420nit),
DIM_LUT_V0_INIT(420, 420, GAMMA_2_20, rtbl420nit, ctbl420nit),
};
#endif

#if PANEL_BACKLIGHT_PAC_STEPS == 512
static unsigned int dream_a3_da_brt_to_step_tbl[S6E3HA6_TOTAL_PAC_STEPS] = {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,11 @@ static u8 great_a3_sa_mps_table[][1] = { { 0xCC }, { 0xDC } };
static u8 great_a3_sa_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
{
/* OVER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C },
#else
{ 0x0A }, { 0x0A }, { 0x0A }, { 0x0A }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C },
#endif
{ 0x0D }, { 0x0E }, { 0x0F }, { 0x11 }, { 0x13 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
Expand All @@ -158,7 +162,11 @@ static u8 great_a3_sa_elvss_table[][S6E3HA6_TOTAL_NR_LUMINANCE][1] = {
},
{
/* UNDER_ZERO */
#ifdef CONFIG_PANEL_SMART_DIMMING
{ 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C },
#else
{ 0x0A }, { 0x0A }, { 0x0A }, { 0x0A }, { 0x0B }, { 0x0B }, { 0x0B }, { 0x0C },
#endif
{ 0x0D }, { 0x0E }, { 0x0F }, { 0x11 }, { 0x13 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
{ 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 }, { 0x15 },
Expand Down Expand Up @@ -1772,7 +1780,11 @@ DEFINE_VARIABLE_PACKET(great_a3_sa_gram_img_pattern_1, DSI_PKT_TYPE_WR_MEM, GREA
#endif

DEFINE_VARIABLE_PACKET(great_a3_sa_gamma, DSI_PKT_TYPE_WR, GREAT_A3_SA_GAMMA, &great_a3_sa_maptbl[GAMMA_MAPTBL], 1);
#ifndef CONFIG_PANEL_SMART_DIMMING
DEFINE_VARIABLE_PACKET(great_a3_sa_aor, DSI_PKT_TYPE_WR, GREAT_A3_SA_AOR, &great_a3_sa_maptbl[AOR_MAPTBL], 1);
#else
DEFINE_STATIC_PACKET(great_a3_sa_aor, DSI_PKT_TYPE_WR, GREAT_A3_SA_AOR);
#endif

static struct pkt_update_info pktui_great_a3_sa_tset_mps_elvss[] = {
{ .offset = 1, .maptbl = &great_a3_sa_maptbl[TSET_MAPTBL] },
Expand Down
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