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Commit b8dee83

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author
Stanislav Bobokalo
committed
dts: renesas: fix syntax error in multiple DTS/DTSI files
Properties in bclk nodes were defined after the bclkout subnode, disk subnode was defined before properties in a few boards DTS files which violates the Devicetree Specification v0.4, section 6.3: "Nodes may contain property definitions and/or child node definitions. If both are present, properties shall come before child nodes." This caused the Device Tree Compiler error: "Properties must precede subnodes. Unable to parse input tree" This commit moves nested nodes after properties, fixing the syntax error and ensuring compliance with the Devicetree Specification. Signed-off-by: Stanislav Bobokalo <[email protected]>
1 parent 9c1fbc8 commit b8dee83

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11 files changed

+33
-31
lines changed

11 files changed

+33
-31
lines changed

‎boards/renesas/rcar_h3ulcb/rcar_h3ulcb_r8a77951_a57.dts‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -65,18 +65,18 @@
6565
&sd0_data0_uhs &sd0_data1_uhs &sd0_data2_uhs &sd0_data3_uhs>;
6666
pinctrl-names = "default", "uhs";
6767

68-
disk {
69-
compatible = "zephyr,sdmmc-disk";
70-
disk-name = "SD";
71-
status = "okay";
72-
};
73-
7468
vmmc-supply = <&vcc_sd0>;
7569
vqmmc-supply = <&vccq_sd0>;
7670

7771
bus-width = <4>;
7872
mmc-sdr104-support;
7973
status = "okay";
74+
75+
disk {
76+
compatible = "zephyr,sdmmc-disk";
77+
disk-name = "SD";
78+
status = "okay";
79+
};
8080
};
8181

8282
&scif2 {

‎boards/renesas/rcar_salvator_xs/rcar_salvator_xs.dts‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -45,13 +45,14 @@
4545
&emmc2_data4 &emmc2_data5 &emmc2_data6 &emmc2_data7>;
4646
pinctrl-names = "default", "uhs";
4747

48+
bus-width = <8>;
49+
mmc-hs200-1_8v;
50+
mmc-hs400-1_8v;
51+
non-removable;
52+
4853
disk {
4954
compatible = "zephyr,mmc-disk";
5055
disk-name = "SD2";
5156
status = "disabled";
5257
};
53-
bus-width = <8>;
54-
mmc-hs200-1_8v;
55-
mmc-hs400-1_8v;
56-
non-removable;
5758
};

‎boards/renesas/rcar_spider_s4/rcar_spider_s4_r8a779f0_a55.dts‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,15 @@
4141
&mmc_data4 &mmc_data5 &mmc_data6 &mmc_data7>;
4242
pinctrl-names = "default", "uhs";
4343

44-
disk {
45-
compatible = "zephyr,mmc-disk";
46-
disk-name = "SD2";
47-
status = "okay";
48-
};
4944
bus-width = <8>;
5045
mmc-hs200-1_8v;
5146
mmc-hs400-1_8v;
5247
non-removable;
5348
status = "okay";
49+
50+
disk {
51+
compatible = "zephyr,mmc-disk";
52+
disk-name = "SD2";
53+
status = "okay";
54+
};
5455
};

‎dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -177,15 +177,15 @@
177177
bclk: bclk {
178178
compatible = "renesas,ra-cgc-pclk";
179179
div = <2>;
180+
#clock-cells = <2>;
181+
status = "okay";
180182

181183
bclkout: bclkout {
182184
compatible = "renesas,ra-cgc-busclk";
183185
clk-out-div = <2>;
184186
sdclk = <0>;
185187
#clock-cells = <0>;
186188
};
187-
#clock-cells = <2>;
188-
status = "okay";
189189
};
190190

191191
uclk: uclk {

‎dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -232,15 +232,15 @@
232232
bclk: bclk {
233233
compatible = "renesas,ra-cgc-pclk";
234234
div = <2>;
235+
#clock-cells = <2>;
236+
status = "okay";
235237

236238
bclkout: bclkout {
237239
compatible = "renesas,ra-cgc-busclk";
238240
clk-out-div = <2>;
239241
sdclk = <1>;
240242
#clock-cells = <0>;
241243
};
242-
#clock-cells = <2>;
243-
status = "okay";
244244
};
245245

246246
uclk: uclk {

‎dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -288,15 +288,15 @@
288288
bclk: bclk {
289289
compatible = "renesas,ra-cgc-pclk";
290290
div = <2>;
291+
#clock-cells = <2>;
292+
status = "okay";
291293

292294
bclkout: bclkout {
293295
compatible = "renesas,ra-cgc-busclk";
294296
clk-out-div = <2>;
295297
sdclk = <1>;
296298
#clock-cells = <0>;
297299
};
298-
#clock-cells = <2>;
299-
status = "okay";
300300
};
301301

302302
uclk: uclk {

‎dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -473,15 +473,15 @@
473473
bclk: bclk {
474474
compatible = "renesas,ra-cgc-pclk";
475475
div = <2>;
476+
#clock-cells = <2>;
477+
status = "okay";
476478

477479
bclkout: bclkout {
478480
compatible = "renesas,ra-cgc-busclk";
479481
clk-out-div = <2>;
480482
sdclk = <0>;
481483
#clock-cells = <0>;
482484
};
483-
#clock-cells = <2>;
484-
status = "okay";
485485
};
486486

487487
fclk: fclk {

‎dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -526,15 +526,15 @@
526526
bclk: bclk {
527527
compatible = "renesas,ra-cgc-pclk";
528528
div = <2>;
529+
#clock-cells = <2>;
530+
status = "okay";
529531

530532
bclkout: bclkout {
531533
compatible = "renesas,ra-cgc-busclk";
532534
clk-out-div = <2>;
533535
sdclk = <0>;
534536
#clock-cells = <0>;
535537
};
536-
#clock-cells = <2>;
537-
status = "okay";
538538
};
539539

540540
fclk: fclk {

‎dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -199,15 +199,15 @@
199199
bclk: bclk {
200200
compatible = "renesas,ra-cgc-pclk";
201201
div = <4>;
202+
#clock-cells = <2>;
203+
status = "okay";
202204

203205
bclkout: bclkout {
204206
compatible = "renesas,ra-cgc-busclk";
205207
clk-out-div = <2>;
206208
sdclk = <1>;
207209
#clock-cells = <0>;
208210
};
209-
#clock-cells = <2>;
210-
status = "okay";
211211
};
212212

213213
fclk: fclk {

‎dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -177,15 +177,15 @@
177177
bclk: bclk {
178178
compatible = "renesas,ra-cgc-pclk";
179179
div = <4>;
180+
#clock-cells = <2>;
181+
status = "okay";
180182

181183
bclkout: bclkout {
182184
compatible = "renesas,ra-cgc-busclk";
183185
clk-out-div = <2>;
184186
sdclk = <1>;
185187
#clock-cells = <0>;
186188
};
187-
#clock-cells = <2>;
188-
status = "okay";
189189
};
190190

191191
fclk: fclk {

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