diff --git a/zephyr/esp32/CMakeLists.txt b/zephyr/esp32/CMakeLists.txt
index 18424e9f2e..df1d9541db 100644
--- a/zephyr/esp32/CMakeLists.txt
+++ b/zephyr/esp32/CMakeLists.txt
@@ -172,6 +172,11 @@ if(CONFIG_SOC_SERIES_ESP32)
     ../../components/hal/i2c_hal.c
     )
 
+  zephyr_sources_ifdef(
+    CONFIG_I2S_ESP32
+    ../../components/hal/i2s_hal.c
+    )
+
   if (CONFIG_ESP_SPIRAM)
     zephyr_compile_definitions(CONFIG_SPIRAM)
     zephyr_sources(
diff --git a/zephyr/esp32s2/CMakeLists.txt b/zephyr/esp32s2/CMakeLists.txt
index 85d19a1b9a..20224e67c2 100644
--- a/zephyr/esp32s2/CMakeLists.txt
+++ b/zephyr/esp32s2/CMakeLists.txt
@@ -176,6 +176,11 @@ if(CONFIG_SOC_SERIES_ESP32S2)
     ../../components/hal/i2c_hal.c
     )
 
+  zephyr_sources_ifdef(
+    CONFIG_I2S_ESP32
+    ../../components/hal/i2s_hal.c
+    )
+
   zephyr_sources_ifdef(
     CONFIG_UART_ESP32
     ../../components/hal/uart_hal.c
diff --git a/zephyr/port/pincfgs/esp32.yml b/zephyr/port/pincfgs/esp32.yml
index 2362a15cbf..8762dbbc58 100644
--- a/zephyr/port/pincfgs/esp32.yml
+++ b/zephyr/port/pincfgs/esp32.yml
@@ -1,4 +1,4 @@
-# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+# Copyright (c) 2022-2025 Espressif Systems (Shanghai) Co., Ltd.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Notes:
@@ -121,66 +121,52 @@ i2c1:
     gpio: [[0, 23], [25, 27], [32, 33]]
 
 i2s0:
-  mclk:
-    sigo: i2s0_mclk_out
-    gpio: [0, 1, 3]
   i_bck:
     sigi: i2s0i_bck_in
     sigo: i2s0i_bck_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   i_ws:
     sigi: i2s0i_ws_in
     sigo: i2s0i_ws_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   i_sd:
     sigi: i2s0i_data_in0
     gpio: [[0, 23], [25, 27], [32, 39]]
   o_bck:
     sigi: i2s0o_bck_in
     sigo: i2s0o_bck_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   o_ws:
     sigi: i2s0o_ws_in
     sigo: i2s0o_ws_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   o_sd:
     sigo: i2s0o_data_out0
     gpio: [[0, 23], [25, 27], [32, 33]]
 
 i2s1:
-  mclk:
-    sigo: i2s1_mclk_out
-    gpio: [0, 1, 3]
-  i_bck_in:
-    gpio: [[0, 23], [25, 27], [32, 39]]
-  i_bck_out:
+  i_bck:
     sigi: i2s1i_bck_in
     sigo: i2s1i_bck_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
-  i_ws_in:
-    sigi: i2s1i_ws_in
     gpio: [[0, 23], [25, 27], [32, 39]]
-  i_ws_out:
+  i_ws:
+    sigi: i2s1i_ws_in
     sigo: i2s1i_ws_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   i_sd:
     sigi: i2s1i_data_in0
-    gpio: [[0, 23], [25, 27], [32, 33]]
-  o_bck_in:
-    sigi: i2s1o_bck_in
     gpio: [[0, 23], [25, 27], [32, 39]]
-  o_bck_out:
+  o_bck:
+    sigi: i2s1o_bck_in
     sigo: i2s1o_bck_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
-  o_ws_in:
-    sigi: i2s1o_ws_in
     gpio: [[0, 23], [25, 27], [32, 39]]
-  o_ws_out:
+  o_ws:
+    sigi: i2s1o_ws_in
     sigo: i2s1o_ws_out
-    gpio: [[0, 23], [25, 27], [32, 33]]
+    gpio: [[0, 23], [25, 27], [32, 39]]
   o_sd:
     sigo: i2s1o_data_out0
-    gpio: [[0, 23], [25, 27], [32, 39]]
+    gpio: [[0, 23], [25, 27], [32, 33]]
 
 twai:
   rx:
diff --git a/zephyr/port/pincfgs/esp32s2.yml b/zephyr/port/pincfgs/esp32s2.yml
index 850dbb06ca..5af2eb8321 100644
--- a/zephyr/port/pincfgs/esp32s2.yml
+++ b/zephyr/port/pincfgs/esp32s2.yml
@@ -1,4 +1,4 @@
-# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+# Copyright (c) 2022-2025 Espressif Systems (Shanghai) Co., Ltd.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Notes:
@@ -116,27 +116,27 @@ i2c1:
 
 i2s0:
   mclk:
-    sigo: i2s0_mclk_out
-    gpio: [[0, 21], [26, 45]]
+    sigo: clk_i2s
+    gpio: [[0, 21], [26, 46]]
   i_bck:
     sigi: i2s0i_bck_in
     sigo: i2s0i_bck_out
-    gpio: [[0, 21], [26, 45]]
+    gpio: [[0, 21], [26, 46]]
   i_ws:
     sigi: i2s0i_ws_in
     sigo: i2s0i_ws_out
-    gpio: [[0, 21], [26, 45]]
+    gpio: [[0, 21], [26, 46]]
   i_sd:
     sigi: i2s0i_data_in0
-    gpio: [[0, 21], [26, 45]]
+    gpio: [[0, 21], [26, 46]]
   o_bck:
     sigi: i2s0o_bck_in
     sigo: i2s0o_bck_out
-    gpio: [[0, 21], [26, 45]]
+    gpio: [[0, 21], [26, 46]]
   o_ws:
     sigi: i2s0o_ws_in
     sigo: i2s0o_ws_out
-    gpio: [[0, 21], [26, 45]]
+    gpio: [[0, 21], [26, 46]]
   o_sd:
     sigo: i2s0o_data_out0
     gpio: [[0, 21], [26, 45]]