diff --git a/.wolfssl_known_macro_extras b/.wolfssl_known_macro_extras index 11c6b5d4b2..0b51116de2 100644 --- a/.wolfssl_known_macro_extras +++ b/.wolfssl_known_macro_extras @@ -43,6 +43,12 @@ BSP_SDCARD_SDHC_CHANNEL BSP_SDCARD_SPI_CHANNEL CAAM_OUT_INVALIDATE CERT_REL_PREFIX +CHIP_FEATURE_BLE +CHIP_FEATURE_BT +CHIP_FEATURE_EMB_FLASH +CHIP_FEATURE_EMB_PSRAM +CHIP_FEATURE_IEEE802154 +CHIP_FEATURE_WIFI_BGN CIOCASYMFEAT CIOCGSESSINFO CMSIS_OS2_H_ @@ -103,16 +109,23 @@ CONFIG_ESP_WOLFSSL_NO_HW_RSA_PRI_EXPTMOD CONFIG_ESP_WOLFSSL_NO_HW_RSA_PRI_MP_MUL CONFIG_ESP_WOLFSSL_NO_HW_RSA_PRI_MULMOD CONFIG_ESP_WOLFSSL_NO_STACK_SIZE_BUILD_WARNING +CONFIG_ESP_WOLFSSL_USE_RSA CONFIG_FREERTOS_HZ CONFIG_FREERTOS_UNICORE +CONFIG_FREERTOS_USE_TRACE_FACILITY +CONFIG_IDF_INIT_VERSION CONFIG_IDF_TARGET CONFIG_IDF_TARGET_ARCH_RISCV CONFIG_IDF_TARGET_ARCH_XTENSA CONFIG_IDF_TARGET_ESP32 CONFIG_IDF_TARGET_ESP32C2 CONFIG_IDF_TARGET_ESP32C3 +CONFIG_IDF_TARGET_ESP32C5 CONFIG_IDF_TARGET_ESP32C6 +CONFIG_IDF_TARGET_ESP32C61 CONFIG_IDF_TARGET_ESP32H2 +CONFIG_IDF_TARGET_ESP32H21 +CONFIG_IDF_TARGET_ESP32H4 CONFIG_IDF_TARGET_ESP32P4 CONFIG_IDF_TARGET_ESP32S2 CONFIG_IDF_TARGET_ESP32S3 @@ -174,6 +187,7 @@ CONFIG_WOLFSSL_TARGET_PORT CONFIG_WOLFSSL_TLS13_ENABLED CONFIG_WOLFSSL_TLS_VERSION_1_2 CONFIG_WOLFSSL_TLS_VERSION_1_3 +CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG CONFIG_WOLFTPM CONFIG_WOLFTPM_EXAMPLE_NAME_ESPRESSIF CONFIG_X86 @@ -275,6 +289,7 @@ HAVE_MDK_RTX HAVE_NETX_BSD HAVE_PKCS7_RSA_RAW_SIGN_CALLBACK HAVE_POCO_LIB +HAVE_RSA HAVE_RTP_SYS HAVE_SECURE_GETENV HAVE_STACK_SIZE_VERBOSE_LOG @@ -310,6 +325,8 @@ LIBWOLFSSL_VERSION_GIT_HASH_DATE LIBWOLFSSL_VERSION_GIT_ORIGIN LIBWOLFSSL_VERSION_GIT_SHORT_HASH LIBWOLFSSL_VERSION_GIT_TAG +LIBWOLFSSL_VERSION_IDF_PATH +LIBWOLFSSL_VERSION_WOLFSSL_ROOT LINUXKM_DONT_FORCE_FIPS_ENABLED LINUXKM_LKCAPI_PRIORITY_ALLOW_MASKING LINUX_CYCLE_COUNT @@ -725,6 +742,7 @@ WOLFSSL_HARDEN_TLS_ALLOW_OLD_TLS WOLFSSL_HARDEN_TLS_ALLOW_TRUNCATED_HMAC WOLFSSL_HARDEN_TLS_NO_PKEY_CHECK WOLFSSL_HARDEN_TLS_NO_SCR_CHECK +WOLFSSL_HAVE_LINKER_REGION_PEEK WOLFSSL_HOSTNAME_VERIFY_ALT_NAME_ONLY WOLFSSL_I2D_ECDSA_SIG_ALLOC WOLFSSL_IAR_ARM_TIME diff --git a/wolfcrypt/benchmark/benchmark.c b/wolfcrypt/benchmark/benchmark.c index 40ca470bc9..0ba32ff480 100644 --- a/wolfcrypt/benchmark/benchmark.c +++ b/wolfcrypt/benchmark/benchmark.c @@ -380,7 +380,8 @@ .resolution_hz = CONFIG_XTAL_FREQ * 100000, }; #elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) #include #if ESP_IDF_VERSION_MAJOR >= 5 #include @@ -1494,7 +1495,8 @@ static const char* bench_result_words3[][5] = { #endif #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) #ifdef WOLFSSL_BENCHMARK_TIMER_DEBUG ESP_ERROR_CHECK(gptimer_get_raw_count(esp_gptimer, &thisTimerVal)); @@ -1651,7 +1653,8 @@ static const char* bench_result_words3[][5] = { * for the next measurement. */ #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { #ifdef WOLFSSL_BENCHMARK_TIMER_DEBUG ESP_ERROR_CHECK(gptimer_get_raw_count(esp_gptimer, @@ -15664,7 +15667,8 @@ int wolfcrypt_benchmark_main(int argc, char** argv) { #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { #ifdef WOLFSSL_BENCHMARK_TIMER_DEBUG if (esp_gptimer == NULL) { @@ -15687,7 +15691,8 @@ int wolfcrypt_benchmark_main(int argc, char** argv) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { #ifdef WOLFSSL_BENCHMARK_TIMER_DEBUG ESP_ERROR_CHECK(gptimer_stop(esp_gptimer)); diff --git a/wolfcrypt/src/port/Espressif/esp32_aes.c b/wolfcrypt/src/port/Espressif/esp32_aes.c index 4eed1d8f38..56c7887f05 100644 --- a/wolfcrypt/src/port/Espressif/esp32_aes.c +++ b/wolfcrypt/src/port/Espressif/esp32_aes.c @@ -115,7 +115,8 @@ static int esp_aes_hw_InUse(void) DPORT_REG_WRITE(AES_DMA_ENABLE_REG, 0); } #elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { /* Select working mode. Can be typical or DMA. * 0 => typical @@ -216,7 +217,7 @@ static int esp_aes_hw_Set_KeyMode(Aes *ctx, ESP32_AESPROCESS mode) ESP_LOGE(TAG, "esp_aes_hw_Set_KeyMode unsupported mode: %i", mode_); ret = BAD_FUNC_ARG; } -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61) #define TARGET_AES_KEY_BASE AES_KEY_0_REG if (mode_ == 1 || mode_ == 3 || mode_ == 5 || mode_ > 6) { /* this should have been detected in aes.c and fall back to SW */ @@ -303,7 +304,7 @@ static void esp_aes_bk(const byte* in, byte* out) /* read-out blocks */ esp_dport_access_read_buffer((uint32_t*)outwords, AES_TEXT_OUT_BASE, 4); -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61) /* See ESP32-C6 technical reference manual: ** 18.4.3 Operation process using CPU working mode. ** The ESP32-C6 also supports a DMA mode. (not ywt implemented) @@ -380,7 +381,7 @@ int wc_esp32AesSupportedKeyLenValue(int keylen) ret = ESP_OK; /* keylen 24 (192 bit) not supported */ } -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61) if (keylen == 16 || keylen == 32) { ret = 1; } diff --git a/wolfcrypt/src/port/Espressif/esp32_mp.c b/wolfcrypt/src/port/Espressif/esp32_mp.c index c40998ac7b..5c69a40e36 100644 --- a/wolfcrypt/src/port/Espressif/esp32_mp.c +++ b/wolfcrypt/src/port/Espressif/esp32_mp.c @@ -113,7 +113,8 @@ * with operand length N = 32 * x, where x in {1, 2, 3, . . . , 48}. * 32 * (96/2) = 32 * (48/2) = 1536 */ #define ESP_HW_MULTI_RSAMAX_BITS 1536 -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* See 22.3.1 Large-number Modular Exponentiation * esp32-c6_technical_reference_manual_en.pdf * The RSA accelerator supports operands of length N = (32 * x), @@ -169,7 +170,8 @@ #if defined(CONFIG_IDF_TARGET_ESP32C3) #include #include -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) #include #elif defined(CONFIG_IDF_TARGET_ESP32S2) #include @@ -300,7 +302,9 @@ static int esp_mp_hw_wait_clean(void) /* wait. expected delay 1 to 2 uS */ ESP_EM__MP_HW_WAIT_CLEAN } -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) ESP_EM__PRE_MP_HW_WAIT_CLEAN while (!ESP_TIMEOUT(++timeout) && DPORT_REG_READ(RSA_QUERY_CLEAN_REG) != 1) { @@ -464,7 +468,8 @@ static int esp_mp_hw_lock(void) } portEXIT_CRITICAL_SAFE(&wc_rsa_reg_lock); } -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* See: 21.3 Functional Description * * The RSA accelerator is activated on the ESP32-C6 by: @@ -575,7 +580,8 @@ static int esp_mp_hw_unlock(void) SYSTEM_RSA_PD_CTRL_REG); } portEXIT_CRITICAL_SAFE(&wc_rsa_reg_lock); -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* TODO: When implementing DS (Digital Signature HW), need to * notify RSA HW is available. */ @@ -791,26 +797,28 @@ static int process_start(u_int32_t reg) int ret = MP_OKAY; /* see 3.16 "software needs to always use the "volatile" ** attribute when accessing registers in these two address spaces. */ - DPORT_REG_WRITE((volatile word32*)reg, 1); + DPORT_REG_WRITE((volatile uint32_t *)(uintptr_t)reg, 1); ESP_EM__POST_PROCESS_START; return ret; } /* wait until RSA math register indicates operation completed */ -static int wait_until_done(word32 reg) +static int wait_until_done(uint32_t reg) { int ret = MP_OKAY; word32 timeout = 0; /* wait until done && not timeout */ ESP_EM__MP_HW_WAIT_DONE; - while (!ESP_TIMEOUT(++timeout) && DPORT_REG_READ(reg) != 1) { + while (!ESP_TIMEOUT(++timeout) && + DPORT_REG_READ((volatile uint32_t)(uintptr_t)reg) != 1) { asm volatile("nop"); /* wait */ } ESP_EM__DPORT_FIFO_READ; -#if defined(CONFIG_IDF_TARGET_ESP32C6) +#if defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* Write 1 or 0 to the RSA_INT_ENA_REG register to * enable or disable the interrupt function. */ DPORT_REG_WRITE(RSA_INT_CLR_REG, 1); /* write 1 to clear */ @@ -855,7 +863,7 @@ static int esp_memblock_to_mpint(const word32 mem_address, for (volatile word32 i = 0; i < numwords; ++i) { ESP_EM__3_16; mp->dp[i] = DPORT_SEQUENCE_REG_READ( - (volatile word32)(mem_address + i * 4)); + (volatile uint32_t)(uintptr_t)(mem_address + i * 4)); } DPORT_INTERRUPT_RESTORE(); #endif @@ -902,8 +910,8 @@ static int esp_zero_memblock(u_int32_t mem_address, int wordSz) DPORT_INTERRUPT_DISABLE(); for (int i=0; i < wordSz; i++) { DPORT_REG_WRITE( - (volatile u_int32_t *)(mem_address + (i * sizeof(word32))), - (u_int32_t)(0) /* zero memory blocks [wordSz] words long */ + (volatile uint32_t *)(uintptr_t)(mem_address + (i * sizeof(word32))), + (u_int32_t)(0) /* zero memory blocks [wordSz] words long */ ); } DPORT_INTERRUPT_RESTORE(); @@ -1146,7 +1154,8 @@ int esp_mp_montgomery_init(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, if (mph->Xs <= ESP_RSA_EXPT_XBITS) { /* hard floor 8 bits, problematic in some older ESP32 chips */ - #ifdef WOLFSSL_HW_METRICS + #if defined(WOLFSSL_HW_METRICS) && \ + !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD) { /* track how many times we fall back */ esp_mp_mulmod_small_x_ct++; @@ -1160,7 +1169,8 @@ int esp_mp_montgomery_init(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, else { if (mph->Ys <= ESP_RSA_EXPT_YBITS) { /* hard floor 8 bits, problematic in some older ESP32 chips */ - #ifdef WOLFSSL_HW_METRICS + #if defined(WOLFSSL_HW_METRICS) && \ + !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD) { /* track how many times we fall back */ esp_mp_mulmod_small_y_ct++; @@ -1205,7 +1215,9 @@ int esp_mp_montgomery_init(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, */ #if defined(CONFIG_IDF_TARGET_ESP32) exp = mph->hwWords_sz << 6; -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) exp = mph->maxWords_sz * BITS_IN_ONE_WORD * 2; #elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) exp = mph->maxWords_sz * BITS_IN_ONE_WORD * 2; @@ -1392,7 +1404,9 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z) ESP_LOGW(TAG, "mp-mul X %d bits exceeds max bit length (%d)", Xs, ESP_HW_MULTI_RSAMAX_BITS); #endif +#if defined(WOLFSSL_HW_METRICS) esp_mp_mul_max_exceeded_ct++; +#endif return MP_HW_FALLBACK; } if (Ys > ESP_HW_MULTI_RSAMAX_BITS) { @@ -1400,7 +1414,9 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z) ESP_LOGW(TAG, "mp-mul Y %d bits exceeds max bit length (%d)", Ys, ESP_HW_MULTI_RSAMAX_BITS); #endif +#if defined(WOLFSSL_HW_METRICS) esp_mp_mul_max_exceeded_ct++; +#endif return MP_HW_FALLBACK; } @@ -1646,7 +1662,8 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z) /* 6. read the result form MEM_Z */ esp_memblock_to_mpint(RSA_MEM_Z_BLOCK_BASE, Z, resultWords_sz); } -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* Unlike the ESP32 that is limited to only four operand lengths, * the ESP32-C6 The RSA Accelerator supports large-number modular * multiplication with operands of 96 different lengths. (1 .. 96 words) @@ -1969,7 +1986,9 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) #if defined(CONFIG_IDF_TARGET_ESP32) -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) word32 OperandBits; int WordsForOperand; #elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) @@ -2178,29 +2197,39 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) process_start(RSA_MULT_START_REG); /* step.5,6 wait until done */ - wait_until_done(RSA_INTERRUPT_REG); + ret = wait_until_done(RSA_INTERRUPT_REG); - /* step.7 Y to MEM_X */ - esp_mpint_to_memblock(RSA_MEM_X_BLOCK_BASE, - Y, mph->Ys, - mph->hwWords_sz); + /* step.6 read the result form MEM_Z */ + if (ret == MP_OKAY) { + /* step.7 Y to MEM_X */ + esp_mpint_to_memblock(RSA_MEM_X_BLOCK_BASE, + Y, mph->Ys, + mph->hwWords_sz); #ifdef DEBUG_WOLFSSL - /* save value to peek at the result stored in RSA_MEM_Z_BLOCK_BASE */ - esp_memblock_to_mpint(RSA_MEM_X_BLOCK_BASE, - PEEK, - 128); - esp_clean_result(PEEK, 0); + /* save value to peek at result stored in RSA_MEM_Z_BLOCK_BASE */ + esp_memblock_to_mpint(RSA_MEM_X_BLOCK_BASE, + PEEK, + 128); + esp_clean_result(PEEK, 0); #endif /* DEBUG_WOLFSSL */ - /* step.8 start process */ - process_start(RSA_MULT_START_REG); - - /* step.9,11 wait until done */ - wait_until_done(RSA_INTERRUPT_REG); + /* step.8 start process */ + process_start(RSA_MULT_START_REG); - /* step.12 read the result from MEM_Z */ - esp_memblock_to_mpint(RSA_MEM_Z_BLOCK_BASE, tmpZ, zwords); + /* step.9,11 wait until done */ + ret = wait_until_done(RSA_INTERRUPT_REG); + if (ret == MP_OKAY) { + /* step.12 read the result from MEM_Z */ + esp_memblock_to_mpint(RSA_MEM_Z_BLOCK_BASE, tmpZ, zwords); + } + else { + ESP_LOGE(TAG, "ERROR: wait_until_done failed in esp32_mp"); + } + } + else { + ESP_LOGE(TAG, "ERROR: step 7 skip wait_until_done esp32_mp failed"); + } } /* step 1 .. 12 */ /* step.13 clear and release HW */ @@ -2304,7 +2333,8 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) } /* end if CONFIG_IDF_TARGET_ESP32C3 */ -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* Steps to perform large number modular multiplication. * Calculates Z = (X * Y) modulo M. * The number of bits in the operands (X, Y) is N. N can be 32x,where @@ -2691,7 +2721,9 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) #if defined(CONFIG_IDF_TARGET_ESP32) /* different calc */ -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) word32 OperandBits; word32 WordsForOperand; #elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) @@ -2845,9 +2877,11 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) * RSA_MODEXP_START_REG in docs? */ /* step.5 wait until done */ - wait_until_done(RSA_INTERRUPT_REG); - /* step.6 read a result form memory */ - esp_memblock_to_mpint(RSA_MEM_Z_BLOCK_BASE, Z, BITS_TO_WORDS(mph->Ms)); + ret = wait_until_done(RSA_INTERRUPT_REG); + if (ret == MP_OKAY) { + /* step.6 read a result form memory */ + esp_memblock_to_mpint(RSA_MEM_Z_BLOCK_BASE, Z, BITS_TO_WORDS(mph->Ms)); + } } /* step.7 clear and release expt_mod HW */ @@ -2952,10 +2986,12 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) } /* end if CONFIG_IDF_TARGET_ESP32C3 */ -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) OperandBits = max(max(mph->Xs, mph->Ys), mph->Ms); if (OperandBits > ESP_HW_MOD_RSAMAX_BITS) { - #ifdef WOLFSSL_HW_METRICS + #if !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD) && \ + defined(WOLFSSL_HW_METRICS) ESP_LOGW(TAG, "exptmod operand bits %d exceeds max bit length %d", OperandBits, ESP_HW_MOD_RSAMAX_BITS); esp_mp_mulmod_max_exceeded_ct++; @@ -2963,6 +2999,10 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) if (exptmod_lock_called) { ret = esp_mp_hw_unlock(); } + #ifdef DEBUG_WOLFSSL + ESP_LOGW(TAG, "Falling back to software"); + esp_mp_exptmod_depth_counter--; + #endif ESP_LOGV(TAG, "Return esp_mp_exptmod fallback"); /* HW not capable for this size, return error to fall back to SW: */ diff --git a/wolfcrypt/src/port/Espressif/esp32_sha.c b/wolfcrypt/src/port/Espressif/esp32_sha.c index 474a0c5718..f49075c47b 100644 --- a/wolfcrypt/src/port/Espressif/esp32_sha.c +++ b/wolfcrypt/src/port/Espressif/esp32_sha.c @@ -55,6 +55,9 @@ #include #include +#elif defined(CONFIG_IDF_TARGET_ESP32C61) + #include + #include #elif defined(CONFIG_IDF_TARGET_ESP32) || \ defined(CONFIG_IDF_TARGET_ESP32S2) || \ defined(CONFIG_IDF_TARGET_ESP32S3) @@ -89,7 +92,8 @@ static const char* TAG = "wolf_hw_sha"; #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* Keep track of the currently active SHA hash object for interleaving. */ const static word32 ** _active_digest_address = 0; #endif @@ -250,7 +254,8 @@ int esp_sha_need_byte_reversal(WC_ESP32SHA* ctx) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) if (ctx == NULL) { ESP_LOGE(TAG, " ctx is null"); /* Return true for bad params */ @@ -494,7 +499,8 @@ int esp_sha_ctx_copy(struct wc_Sha* src, struct wc_Sha* dst) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* Reverse digest for C2/C3/C6 RISC-V platform * only when HW enabled but fallback to SW. */ ByteReverseWords(dst->digest, dst->digest, WC_SHA_DIGEST_SIZE); @@ -582,7 +588,8 @@ int esp_sha256_ctx_copy(struct wc_Sha256* src, struct wc_Sha256* dst) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { /* Reverse digest byte order for C3 fallback to SW. */ ByteReverseWords(dst->digest, @@ -630,7 +637,8 @@ int esp_sha384_ctx_copy(struct wc_Sha512* src, struct wc_Sha512* dst) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { /* We should ever be calling the HW sHA384 copy for this target. */ ESP_LOGW(TAG, "Warning: esp_sha384_ctx_copy() called for %s!", @@ -700,7 +708,8 @@ int esp_sha512_ctx_copy(struct wc_Sha512* src, struct wc_Sha512* dst) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* There's no SHA512 HW on these RISC-V SoC so there's nothing to do. * (perhaps a future one will?) */ #elif defined(CONFIG_IDF_TARGET_ESP32) || \ @@ -736,7 +745,8 @@ int esp_sha512_ctx_copy(struct wc_Sha512* src, struct wc_Sha512* dst) ** but we need to set our initializer breadcrumb: */ #if !defined(CONFIG_IDF_TARGET_ESP32C2) && \ !defined(CONFIG_IDF_TARGET_ESP32C3) && \ - !defined(CONFIG_IDF_TARGET_ESP32C6) + !defined(CONFIG_IDF_TARGET_ESP32C6) && \ + !defined(CONFIG_IDF_TARGET_ESP32C61) dst->ctx.initializer = (uintptr_t)&(dst->ctx); #endif #if defined(ESP_MONITOR_HW_TASK_LOCK) && !defined(SINGLE_THREADED) @@ -858,7 +868,8 @@ static int wc_esp_wait_until_idle(void) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* ESP32-C3 and ESP32-C6 RISC-V */ while ((sha_ll_busy() == 1) && (loop_ct > 0)) { loop_ct--; @@ -916,7 +927,8 @@ int esp_unroll_sha_module_enable(WC_ESP32SHA* ctx) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /************* RISC-V Architecture *************/ (void)max_unroll_count; (void)_active_digest_address; @@ -1517,7 +1529,8 @@ int esp_sha_try_hw_lock(WC_ESP32SHA* ctx) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { ESP_LOGV(TAG, "ets_sha_enable for RISC-V"); ets_sha_enable(); @@ -1575,7 +1588,8 @@ int esp_sha_hw_unlock(WC_ESP32SHA* ctx) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) ets_sha_disable(); /* disable also resets active, ongoing hash */ ESP_LOGV(TAG, "ets_sha_disable in esp_sha_hw_unlock()"); #else @@ -1656,7 +1670,8 @@ int esp_sha_hw_unlock(WC_ESP32SHA* ctx) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* ESP32-C3 HAL has built-in process start, nothing to declare here. */ #else /* Everything else uses esp_sha_start_process() */ @@ -1677,7 +1692,8 @@ static int esp_sha_start_process(WC_ESP32SHA* sha) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) ESP_LOGV(TAG, "SHA1 SHA_START_REG"); if (sha->isfirstblock) { sha_ll_start_block(SHA2_256); @@ -1903,7 +1919,8 @@ static int wc_esp_process_block(WC_ESP32SHA* ctx, /* see ctx->sha_type */ #elif defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /************* RISC-V Architecture ************* * * SHA_M_1_REG is not a macro: @@ -2033,7 +2050,8 @@ int wc_esp_digest_state(WC_ESP32SHA* ctx, byte* hash) defined(CONFIG_IDF_TARGET_ESP32C3) || \ defined(CONFIG_IDF_TARGET_ESP32S2) || \ defined(CONFIG_IDF_TARGET_ESP32S3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) if (ctx->sha_type >= SHA_TYPE_MAX) { #else ESP_LOGE(TAG, "unexpected target for wc_esp_digest_state"); @@ -2092,7 +2110,8 @@ int wc_esp_digest_state(WC_ESP32SHA* ctx, byte* hash) wc_esp_sha_digest_size(ctx->sha_type) / sizeof(word32) ); #elif defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) wc_esp_wait_until_idle(); sha_ll_read_digest( ctx->sha_type, @@ -2108,7 +2127,8 @@ int wc_esp_digest_state(WC_ESP32SHA* ctx, byte* hash) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) #elif defined(CONFIG_IDF_TARGET_ESP32S2) @@ -2232,6 +2252,7 @@ int esp_sha_digest_process(struct wc_Sha* sha, byte blockprocess) if (blockprocess) { ESP_LOGV(TAG, "esp_sha_digest_process NEW UNLOCK"); esp_sha_hw_unlock(&sha->ctx); /* also unlocks mutex */ + ESP_LOGV(TAG, "sha blockprocess mutex_ctx_owner = NULLPTR"); mutex_ctx_owner = NULLPTR; } @@ -2337,7 +2358,8 @@ int esp_sha512_block(struct wc_Sha512* sha, const word32* data, byte isfinal) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) /* No SHA-512 HW on RISC-V SoC, so nothing to do. */ #else /* note that in SW mode, wolfSSL uses 64 bit words */ @@ -2398,7 +2420,8 @@ int esp_sha512_digest_process(struct wc_Sha512* sha, byte blockproc) #if defined(CONFIG_IDF_TARGET_ESP32C2) || \ defined(CONFIG_IDF_TARGET_ESP8684) || \ defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) { ESP_LOGW(TAG, "Warning: no SHA512 HW to digest on %s", CONFIG_IDF_TARGET); diff --git a/wolfcrypt/src/port/Espressif/esp32_util.c b/wolfcrypt/src/port/Espressif/esp32_util.c index c7f44b1201..0bcc495844 100644 --- a/wolfcrypt/src/port/Espressif/esp32_util.c +++ b/wolfcrypt/src/port/Espressif/esp32_util.c @@ -37,6 +37,16 @@ #endif /* Espressif */ +#if defined(ESP_PLATFORM) && !defined(ESP8266) + #if __has_include("esp_chip_info.h") + #include /* IDF v5 or newer */ + #else + #include /* older IDF system AP provides esp_chip_info */ + #endif +#else + /* ESP8266 RTOS SDK */ + #include "esp_system.h" +#endif #include #include #if ESP_IDF_VERSION_MAJOR > 4 @@ -310,6 +320,8 @@ static int ShowExtendedSystemInfo_platform_espressif(void) WOLFSSL_VERSION_PRINTF("ESP32_CRYPT is enabled for ESP32-C3."); #elif defined(CONFIG_IDF_TARGET_ESP32C6) WOLFSSL_VERSION_PRINTF("ESP32_CRYPT is enabled for ESP32-C6."); + #elif defined(CONFIG_IDF_TARGET_ESP32C61) + WOLFSSL_VERSION_PRINTF("ESP32_CRYPT is enabled for ESP32-C61."); #elif defined(CONFIG_IDF_TARGET_ESP32H2) WOLFSSL_VERSION_PRINTF("ESP32_CRYPT is enabled for ESP32-H2."); #else @@ -378,37 +390,65 @@ static int ShowExtendedSystemInfo_git(void) #if defined(LIBWOLFSSL_VERSION_GIT_TAG) /* git config describe --tags --abbrev=0 */ WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_TAG = %s", - LIBWOLFSSL_VERSION_GIT_TAG); + LIBWOLFSSL_VERSION_GIT_TAG); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_TAG not defined"); #endif #if defined(LIBWOLFSSL_VERSION_GIT_ORIGIN) /* git config --get remote.origin.url */ - WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_ORIGIN = %s", - LIBWOLFSSL_VERSION_GIT_ORIGIN); + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_ORIGIN = %s", + LIBWOLFSSL_VERSION_GIT_ORIGIN); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); #endif #if defined(LIBWOLFSSL_VERSION_GIT_BRANCH) /* git rev-parse --abbrev-ref HEAD */ - WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_BRANCH = %s", + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_BRANCH = %s", LIBWOLFSSL_VERSION_GIT_BRANCH); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); #endif #if defined(LIBWOLFSSL_VERSION_GIT_HASH) /* git rev-parse HEAD */ - WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH = %s", - LIBWOLFSSL_VERSION_GIT_HASH); + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH = %s", + LIBWOLFSSL_VERSION_GIT_HASH); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); #endif #if defined(LIBWOLFSSL_VERSION_GIT_SHORT_HASH ) /* git rev-parse --short HEAD */ WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_SHORT_HASH = %s", - LIBWOLFSSL_VERSION_GIT_SHORT_HASH); + LIBWOLFSSL_VERSION_GIT_SHORT_HASH); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); #endif #if defined(LIBWOLFSSL_VERSION_GIT_HASH_DATE) /* git show --no-patch --no-notes --pretty=\'\%cd\' */ - WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE = %s", - LIBWOLFSSL_VERSION_GIT_HASH_DATE); + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE = %s", + LIBWOLFSSL_VERSION_GIT_HASH_DATE); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); +#endif + +#if defined(LIBWOLFSSL_VERSION_WOLFSSL_ROOT) + /* saved in wolfssl cmake */ + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_WOLFSSL_ROOT = %s", + LIBWOLFSSL_VERSION_WOLFSSL_ROOT); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_GIT_HASH_DATE not defined"); +#endif + +#if defined(LIBWOLFSSL_VERSION_IDF_PATH) + /* saved in wolfssl cmake */ + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_IDF_PATH = %s", + LIBWOLFSSL_VERSION_IDF_PATH); +#else + WOLFSSL_VERSION_PRINTF("LIBWOLFSSL_VERSION_IDF_PATH not defined"); #endif return ESP_OK; @@ -433,38 +473,56 @@ static int ShowExtendedSystemInfo_thread(void) */ static int ShowExtendedSystemInfo_platform(void) { + int ret = ESP_OK; #if defined(WOLFSSL_ESPIDF) -#if defined(CONFIG_IDF_TARGET) - WOLFSSL_VERSION_PRINTF("CONFIG_IDF_TARGET = %s", - CONFIG_IDF_TARGET); - ShowExtendedSystemInfo_platform_espressif(); -#endif + #if defined(CONFIG_IDF_TARGET) + WOLFSSL_VERSION_PRINTF("CONFIG_IDF_TARGET = %s", + CONFIG_IDF_TARGET); + ret = ShowExtendedSystemInfo_platform_espressif(); + #else + ESP_LOGW(TAG, "CONFIG_IDF_TARGET expected, not defined"); + ret = ESP_FAIL; + #endif +#else + ESP_LOGW(TAG, "WOLFSSL_ESPIDF expected, not defined"); + ret = ESP_FAIL; #endif - return ESP_OK; + return ret; } -int esp_increment_boot_count(void) +static int esp_increment_boot_count(void) { return ++_boot_count; } -int esp_current_boot_count(void) +static int esp_current_boot_count(void) { return _boot_count; } +static const char hd1[] = + "Macro Name Defined Not Defined"; +static const char hd2[] = + "----------------------------------- --------- ------------"; + /* See macro helpers above; not_defined is macro name when *not* defined */ static int show_macro(char* s, char* not_defined) { - const char hd1[] = "Macro Name Defined Not Defined"; - char hd2[] = "------------------------- --------- -------------"; - char msg[] = "......................... "; - /* 012345678901234567890123456789012345678901234567890 */ - /* 1 2 3 4 5 */ + char msg[] = "................................... "; + /* 01234567890123456789012345678901234567890123456789012345678 */ + /* 1 2 3 4 5 */ size_t i = 0; - #define MAX_STATUS_NAME_LENGTH 25 - #define ESP_SMS_ENA_POS 30 - #define ESP_SMS_DIS_POS 42 + #define MAX_STATUS_NAME_LENGTH 36 + /* Show Macro Status Enabled string Position: */ + #define ESP_SMS_ENA_POS (MAX_STATUS_NAME_LENGTH + 5) + /* Show Macro Status Disabled string Position: */ + #define ESP_SMS_DIS_POS (MAX_STATUS_NAME_LENGTH + 17) + +#ifndef CONFIG_IDF_TARGET_ESP8266 + /* the longest msg for disabled macros is 35 + 17 + 1 = 53 */ + ESP_STATIC_ASSERT((ESP_SMS_DIS_POS + 1) < sizeof(msg), + "ESP_SMS_DIS_POS exceeds msg buffer length"); +#endif /* save our string (s) into the space-padded message (msg) */ while (s[i] != '\0' && msg[i] != '\0' && (i < MAX_STATUS_NAME_LENGTH)) { @@ -472,14 +530,20 @@ static int show_macro(char* s, char* not_defined) i++; } - /* Depending on if defined, put an "x" in the appropriate column */ - if (not_defined == NULL || not_defined[0] == '\0') { + /* Depending on if defined, put an "X" in the appropriate column. + * + * Reminder the not_defined string expands to '1' only when the macro + * IS defined AND is assigned a value of 1, such as ESP-IDF menu config, + * meaning the feature IS enabled. So put X in enabled column, too: */ + if (not_defined == NULL || not_defined[0] == '\0' + || not_defined[0] == '1') { msg[ESP_SMS_ENA_POS] = 'X'; - msg[ESP_SMS_ENA_POS+1] = 0; /* end of line to eliminate space pad */ + msg[ESP_SMS_ENA_POS + 1] = 0; /* end of line to eliminate space pad */ } else { + /* Put an X in the Show Macro Status "Disabled" Column: */ msg[ESP_SMS_DIS_POS] = 'X'; - msg[ESP_SMS_DIS_POS+1] = 0; /* end of line to eliminate space pad */ + msg[ESP_SMS_DIS_POS + 1] = 0; /* end of line to eliminate space pad */ } /* do we need a header? */ @@ -494,8 +558,106 @@ static int show_macro(char* s, char* not_defined) return ESP_OK; } +static const char* map_model_to_name(esp_chip_model_t m) +{ + /* See ESP-IDF ./components/esp_hw_support/include/esp_chip_info.h */ + switch (m) { + #ifdef CONFIG_IDF_TARGET_ESP8266 + case 0: return "esp8266"; /* n/a */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32 + case CHIP_ESP32: return "esp32"; /* 1 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32S2 + case CHIP_ESP32S2: return "esp32s2"; /* 2 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32S3 + case CHIP_ESP32S3: return "esp32s3"; /* 9 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32C3 + case CHIP_ESP32C3: return "esp32c3"; /* 5 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32C2 + case CHIP_ESP32C2: return "esp32c2"; /* 12 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32C6 + case CHIP_ESP32C6: return "esp32c6"; /* 13 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32H2 + case CHIP_ESP32H2: return "esp32h2"; /* 16 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32P4 + case CHIP_ESP32H2: return "esp32p4"; /* 18 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32C61 + case CHIP_ESP32C6: return "esp32c61"; /* 20 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32C5 + case CHIP_ESP32C5: return "esp32c5"; /* 23 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32H21 + case CHIP_ESP32P4: return "esp32h21"; /* 25 */ + #endif + #ifdef CONFIG_IDF_TARGET_ESP32H4 + case CHIP_ESP32P4: return "esp32h4"; /* 28 */ + #endif + default: return "esp32-unknown"; /* ? */ + } +} + +esp_err_t esp_sdk_device_show_info(void) +{ + esp_chip_info_t info; + esp_err_t ret; + ret = ESP_OK; + memset(&info, 0, sizeof(info)); + esp_chip_info(&info); /* present since IDF v3.x */ + + ESP_LOGI(TAG,"Device %s model=%d cores=%u rev=%u features=0x%08x", + map_model_to_name(info.model), + (int)info.model, (unsigned)info.cores, + (unsigned)info.revision, (unsigned)info.features); + +#if defined(DEBUG_WOLFSSL) + /* OPTIONAL: print only the feature flags that exist in this SDK */ + /* (no tables or name mapping; just #ifdef + bit test) */ + ESP_LOGI(TAG,"feature_flags:"); + #ifdef CHIP_FEATURE_EMB_FLASH + if (info.features & CHIP_FEATURE_EMB_FLASH) { + ESP_LOGI(TAG," EMB_FLASH"); + } + #endif + #ifdef CHIP_FEATURE_WIFI_BGN + if (info.features & CHIP_FEATURE_WIFI_BGN) { + ESP_LOGI(TAG," WIFI_BGN"); + } + #endif + #ifdef CHIP_FEATURE_BLE + if (info.features & CHIP_FEATURE_BLE) { + ESP_LOGI(TAG," BLE"); + } + #endif + #ifdef CHIP_FEATURE_BT + if (info.features & CHIP_FEATURE_BT) { + ESP_LOGI(TAG," BT"); + } + #endif + #ifdef CHIP_FEATURE_IEEE802154 + if (info.features & CHIP_FEATURE_IEEE802154) { + ESP_LOGI(TAG," IEEE802154"); + } + #endif + #ifdef CHIP_FEATURE_EMB_PSRAM + if (info.features & CHIP_FEATURE_EMB_PSRAM) { + ESP_LOGI(TAG," EMB_PSRAM"); + } + #endif +#endif + return ret; +} /* esp_show_device_info */ + /* Show some interesting settings */ -esp_err_t ShowExtendedSystemInfo_config(void) +static esp_err_t ShowExtendedSystemInfo_config(void) { esp_ShowMacroStatus_need_header = 1; @@ -560,8 +722,62 @@ esp_err_t ShowExtendedSystemInfo_config(void) show_macro("DEBUG_WOLFSSL", STR_IFNDEF(DEBUG_WOLFSSL)); show_macro("WOLFSSL_DEBUG_CERTS", STR_IFNDEF(WOLFSSL_DEBUG_CERTS)); show_macro("NO_WOLFSSL_DEBUG_CERTS", STR_IFNDEF(NO_WOLFSSL_DEBUG_CERTS)); - show_macro("WOLFSSL_DEBUG_ERRORS_ONLY", STR_IFNDEF(WOLFSSL_DEBUG_ERRORS_ONLY)); + show_macro("WOLFSSL_DEBUG_ERRORS_ONLY", + STR_IFNDEF(WOLFSSL_DEBUG_ERRORS_ONLY)); + + ESP_LOGI(TAG, "%s", hd2); /* ------------------------------------------- */ + + show_macro("NO_DH", STR_IFNDEF(NO_DH)); + show_macro("NO_RSA", STR_IFNDEF(NO_RSA)); + show_macro("HAVE_RSA", STR_IFNDEF(HAVE_RSA)); + show_macro("HAVE_CURVE25519", STR_IFNDEF(HAVE_CURVE25519)); + show_macro("NO_RSA", STR_IFNDEF(NO_RSA)); + show_macro("FP_MAX_BITS", STR_IFNDEF(FP_MAX_BITS)); + + /* esp-tls component related settings */ + show_macro("NO_WOLFSSL_USE_ASM_CERT", + STR_IFNDEF(NO_WOLFSSL_USE_ASM_CERT)); + show_macro("WOLFSSL_CMAKE_REQUIRED_ESP_TLS", + STR_IFNDEF(WOLFSSL_CMAKE_REQUIRED_ESP_TLS)); + ESP_LOGI(TAG, "%s", hd2); /* ------------------------------------------- */ + + show_macro("CONFIG_ESP_TLS_USING_WOLFSSL", + STR_IFNDEF(CONFIG_ESP_TLS_USING_WOLFSSL)); + show_macro("CONFIG_ESP_WOLFSSL_DEBUG_CERT_BUNDLE", + STR_IFNDEF(CONFIG_ESP_WOLFSSL_DEBUG_CERT_BUNDLE)); + show_macro("CONFIG_WOLFSSL_NO_ASN_STRICT", + STR_IFNDEF(CONFIG_WOLFSSL_NO_ASN_STRICT)); + show_macro("CONFIG_WOLFSSL_ASN_ALLOW_0_SERIAL", + STR_IFNDEF(CONFIG_WOLFSSL_ASN_ALLOW_0_SERIAL)); + show_macro("CONFIG_WOLFSSL_CERTIFICATE_BUNDLE_DEFAULT_NONE", + STR_IFNDEF(CONFIG_WOLFSSL_CERTIFICATE_BUNDLE_DEFAULT_NONE)); + + ESP_LOGI(TAG, "%s", hd2); /* ------------------------------------------- */ + + /* Low memory checks & warnings */ +#ifdef WOLFSSL_LOW_MEMORY + #if (defined(CONFIG_ESP_WOLFSSL_USE_RSA) && CONFIG_ESP_WOLFSSL_USE_RSA) + ESP_LOGW(TAG, "RSA config enabled in very low memory environment"); + #if defined(NO_RSA) + ESP_LOGW(TAG, "NO_RSA not found with CONFIG_ESP_WOLFSSL_USE_RSA"); + #else + /* RSA enable on low-memory devices */ + #endif + #if defined(HAVE_RSA) + /* RSA enable on low-memory devices */ + #else + ESP_LOGW(TAG, "HAVE_RSA not found with CONFIG_ESP_WOLFSSL_USE_RSA"); + #endif + #endif +#endif + +#ifdef CONFIG_ESP_TLS_USING_WOLFSSL + ESP_LOGI(TAG, "ESP-IDF is configured to use wolfSSL in esp-tls"); +#else + ESP_LOGW(TAG, "ESP-IDF is NOT configured to use wolfSSL in esp-tls"); +#endif + /* Compiler optimization details */ ESP_LOGI(TAG, WOLFSSL_ESPIDF_BLANKLINE_MESSAGE); #if defined(CONFIG_COMPILER_OPTIMIZATION_DEFAULT) ESP_LOGI(TAG, "Compiler Optimization: Default"); @@ -576,6 +792,7 @@ esp_err_t ShowExtendedSystemInfo_config(void) #endif ESP_LOGI(TAG, WOLFSSL_ESPIDF_BLANKLINE_MESSAGE); + esp_sdk_device_show_info(); return ESP_OK; } /* @@ -583,7 +800,7 @@ esp_err_t ShowExtendedSystemInfo_config(void) ** The internal, portable, but currently private ShowExtendedSystemInfo() ******************************************************************************* */ -int ShowExtendedSystemInfo(void) +static int ShowExtendedSystemInfo(void) { #if ESP_IDF_VERSION_MAJOR > 4 unsigned chip_rev = -1; @@ -666,6 +883,16 @@ int ShowExtendedSystemInfo(void) #else ESP_LOGW(TAG, "LIBWOLFSSL_CMAKE_OUTPUT: No cmake messages detected"); #endif + ESP_LOGI(TAG, "ESP-IDF SDK Config:"); + +#if defined(CONFIG_IDF_INIT_VERSION) + WOLFSSL_VERSION_PRINTF("CONFIG_IDF_INIT_VERSION = %s", + CONFIG_IDF_INIT_VERSION); +#endif +#if defined(CONFIG_IDF_TARGET) + WOLFSSL_VERSION_PRINTF("CONFIG_IDF_TARGET = %s", + CONFIG_IDF_TARGET); +#endif /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ #if defined(CONFIG_IDF_TARGET_ESP32) @@ -688,7 +915,8 @@ int ShowExtendedSystemInfo(void) CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ ); -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) ESP_LOGI(TAG, "CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = %u MHz", CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ ); @@ -758,10 +986,11 @@ esp_err_t esp_DisableWatchdog(void) #if defined(CONFIG_IDF_TARGET_ESP32) rtc_wdt_protect_off(); rtc_wdt_disable(); - #elif defined(CONFIG_IDF_TARGET_ESP32C2) || \ - defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) || \ - defined(CONFIG_IDF_TARGET_ESP32H2) || \ + #elif defined(CONFIG_IDF_TARGET_ESP32C2) || \ + defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) || \ + defined(CONFIG_IDF_TARGET_ESP32H2) || \ defined(CONFIG_IDF_TARGET_ESP32P4) #if ESP_IDF_VERSION_MINOR >= 3 #if CONFIG_ESP_TASK_WDT @@ -774,8 +1003,14 @@ esp_err_t esp_DisableWatchdog(void) ESP_LOGW(TAG, "esp_task_wdt_deinit not implemented"); #endif #else - rtc_wdt_protect_off(); - rtc_wdt_disable(); + #if ESP_IDF_VERSION_MINOR >= 4 + ESP_LOGW(TAG, + "rtc_wdt_protect_off not implemented on ESP_IDF v%d.%d", + ESP_IDF_VERSION_MAJOR, ESP_IDF_VERSION_MINOR); + #else + rtc_wdt_protect_off(); + rtc_wdt_disable(); + #endif #endif } #else @@ -794,7 +1029,6 @@ esp_err_t esp_DisableWatchdog(void) /* * Enable the watchdog timer. */ - esp_err_t esp_EnabledWatchdog(void) { esp_err_t ret = ESP_OK; @@ -809,10 +1043,11 @@ esp_err_t esp_EnabledWatchdog(void) #if defined(CONFIG_IDF_TARGET_ESP32) rtc_wdt_protect_on(); rtc_wdt_enable(); - #elif defined(CONFIG_IDF_TARGET_ESP32C2) || \ - defined(CONFIG_IDF_TARGET_ESP32C3) || \ - defined(CONFIG_IDF_TARGET_ESP32C6) || \ - defined(CONFIG_IDF_TARGET_ESP32H2) || \ + #elif defined(CONFIG_IDF_TARGET_ESP32C2) || \ + defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) || \ + defined(CONFIG_IDF_TARGET_ESP32H2) || \ defined(CONFIG_IDF_TARGET_ESP32P4) ESP_LOGW(TAG, "No known rtc_wdt_protect_off for this platform."); esp_task_wdt_config_t twdt_config = { @@ -824,8 +1059,14 @@ esp_err_t esp_EnabledWatchdog(void) esp_task_wdt_init(&twdt_config); esp_task_wdt_add(NULL); #else - rtc_wdt_protect_on(); - rtc_wdt_enable(); + #if ESP_IDF_VERSION_MINOR >= 4 + ESP_LOGW(TAG, + "rtc_wdt_protect_on not implemented on ESP_IDF v%d.%d", + ESP_IDF_VERSION_MAJOR, ESP_IDF_VERSION_MINOR); + #else + rtc_wdt_protect_on(); + rtc_wdt_enable(); + #endif #endif } #else diff --git a/wolfcrypt/src/port/Espressif/esp_crt_bundle/esp_crt_bundle.c b/wolfcrypt/src/port/Espressif/esp_crt_bundle/esp_crt_bundle.c index 722147d79b..78a625eb39 100644 --- a/wolfcrypt/src/port/Espressif/esp_crt_bundle/esp_crt_bundle.c +++ b/wolfcrypt/src/port/Espressif/esp_crt_bundle/esp_crt_bundle.c @@ -42,6 +42,10 @@ /* Espressif */ #include +#if defined(DEBUG_WOLFSSL) || defined(WOLFSSL_DEBUG_CERT_BUNDLE) + #include +#endif + #if defined(CONFIG_ESP_TLS_USING_WOLFSSL) #include @@ -937,6 +941,14 @@ static CB_INLINE int wolfssl_ssl_conf_verify_cb_no_signer(int preverify, * that caused the callback. See the Cerfiicate Manager for * validation and possible overriding of preverify values. */ ESP_LOGCBI(TAG, "\n\nAdding Cert for Certificate Store!\n"); + #if defined(DEBUG_WOLFSSL) || defined(WOLFSSL_DEBUG_CERT_BUNDLE) + ESP_LOGI(TAG, "Feed watchdog"); + ret = esp_task_wdt_reset(); + if (ret != ESP_OK) { + ESP_LOGE("WDT", "reset failed (%s) in task %s", + esp_err_to_name(ret), pcTaskGetName(NULL)); + } + #endif ret = wolfSSL_X509_STORE_add_cert(store->store, bundle_cert); if (ret == WOLFSSL_SUCCESS) { ESP_LOGCBI(TAG, "Successfully added cert to wolfSSL " @@ -1578,13 +1590,16 @@ esp_err_t wolfSSL_bundle_cleanup(void) ESP_LOGI(TAG, "Free s_crt_bundle.crts in wolfSSL_bundle_cleanup"); #endif free(s_crt_bundle.crts); + ESP_LOGCBI(TAG, "Free s_crt_bundle.crts in wolfSSL_bundle_cleanup done"); s_crt_bundle.crts = NULL; } #ifdef WOLFSSL_CMAKE_REQUIRED_ESP_TLS /* When the esp-tls is linked as a requirement in CMake and used by the * ESP-IDF in the esp-tls component, call at cleanup time: */ + ESP_LOGCBI(TAG, "Free esp_tls_free_global_ca_store in wolfSSL_bundle_cleanup"); esp_tls_free_global_ca_store(); + ESP_LOGCBI(TAG, "Free esp_tls_free_global_ca_store in wolfSSL_bundle_cleanup done"); #endif /* Be sure to free the bundle_cert first, as it may be part of store. */ @@ -1592,7 +1607,9 @@ esp_err_t wolfSSL_bundle_cleanup(void) #ifdef DEBUG_WOLFSSL_MALLOC ESP_LOGI(TAG, "Free bundle_cert in wolfSSL_bundle_cleanup"); #endif + ESP_LOGCBI(TAG, "Free wolfSSL_X509_free bundle_cert in wolfSSL_bundle_cleanup"); wolfSSL_X509_free(bundle_cert); + ESP_LOGCBI(TAG, "Free wolfSSL_X509_free bundle_cert in wolfSSL_bundle_cleanup done"); bundle_cert = NULL; } @@ -1600,7 +1617,9 @@ esp_err_t wolfSSL_bundle_cleanup(void) #ifdef DEBUG_WOLFSSL_MALLOC ESP_LOGI(TAG, "Free store_cert in wolfSSL_bundle_cleanup"); #endif + ESP_LOGCBI(TAG, "Free wolfSSL_X509_free store_cert in wolfSSL_bundle_cleanup"); wolfSSL_X509_free(store_cert); + ESP_LOGCBI(TAG, "Free wolfSSL_X509_free store_cert in wolfSSL_bundle_cleanup done"); store_cert = NULL; } diff --git a/wolfcrypt/src/port/Espressif/esp_sdk_mem_lib.c b/wolfcrypt/src/port/Espressif/esp_sdk_mem_lib.c index 8478e57a04..c73366bb7b 100644 --- a/wolfcrypt/src/port/Espressif/esp_sdk_mem_lib.c +++ b/wolfcrypt/src/port/Espressif/esp_sdk_mem_lib.c @@ -53,6 +53,12 @@ #include "sdkconfig.h" /* programmatically generated from sdkconfig */ #include #include +#ifdef CONFIG_IDF_TARGET_ESP8266 + #include +#else + #include + #include +#endif /* wolfSSL */ #include @@ -76,8 +82,8 @@ extern wc_ptr_t _rtc_bss_end[]; extern wc_ptr_t _iram_start[]; extern wc_ptr_t _iram_end[]; #if defined(CONFIG_IDF_TARGET_ESP8266) -extern wc_ptr_t _init_start[]; -extern wc_ptr_t _init_end[]; + extern wc_ptr_t _init_start[]; + extern wc_ptr_t _init_end[]; #endif extern wc_ptr_t _iram_text_start[]; extern wc_ptr_t _iram_text_end[]; @@ -105,28 +111,54 @@ extern wc_ptr_t _heap_end[]; extern void* _thread_local_end; #endif -/* See https://github.com/esp8266/esp8266-wiki/wiki/Memory-Map */ -#define MEM_MAP_IO_START ((void*)(0x3FF00000)) -#define MEM_MAP_IO_END ((void*)(0x3FF0FFFF)) -#define USER_DATA_START ((void*)(0x3FFE8000)) -#define USER_DATA_END ((void*)(0x3FFE8000 + 0x14000)) -#define ETS_SYS_START ((void*)(0x3FFFC000)) -#define ETS_SYS_END ((void*)(0x3FFFC000 + 0x4000)) -#define IRAM1_START ((void*)(0x40100000)) -#define IRAM1_END ((void*)(0x40100000 + 0x8000)) -#define IRAMF1_START ((void*)(0x40108000)) -#define IRAMF1_END ((void*)(0x40108000 + 0x4000)) -#define IRAMF2_START ((void*)(0x4010C000)) -#define IRAMF2_END ((void*)(0x4010C000 + 0x4000)) - -#if defined(ESP_IDF_VERSION) && (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(6, 0, 0)) - /* Skipping for ESP-IDF v6.0 */ +#ifdef WOLFSSL_HAVE_LINKER_REGION_PEEK + /* cmake may have found a ld/region_peek.ld helper file */ + extern wc_ptr_t __dram0_start[] __attribute__((weak)); + extern wc_ptr_t __dram0_end[] __attribute__((weak)); + extern wc_ptr_t __drom0_start[] __attribute__((weak)); + extern wc_ptr_t __drom0_end[] __attribute__((weak)); + + #define MEM_MAP_IO_START ((void*)(0x3FF00000)) + #define MEM_MAP_IO_END ((void*)(0x3FF0FFFF)) + #define USER_DATA_START ((void*)(0x3FFE8000)) + #define USER_DATA_END ((void*)(0x3FFE8000 + 0x14000)) + #define ETS_SYS_START ((void*)(0x3FFFC000)) + #define ETS_SYS_END ((void*)(0x3FFFC000 + 0x4000)) + #define IRAM1_START ((void*)(0x40100000)) + #define IRAM1_END ((void*)(0x40100000 + 0x8000)) + #define IRAMF1_START ((void*)(0x40108000)) + #define IRAMF1_END ((void*)(0x40108000 + 0x4000)) + #define IRAMF2_START ((void*)(0x4010C000)) + #define IRAMF2_END ((void*)(0x4010C000 + 0x4000)) + #define DRAM0_START __dram0_start + #define DRAM0_END __dram0_end + #define DROM0_START __drom0_start + #define DROM0_END __drom0_end #else + /* See https://github.com/esp8266/esp8266-wiki/wiki/Memory-Map */ + #define MEM_MAP_IO_START ((void*)(0x3FF00000)) + #define MEM_MAP_IO_END ((void*)(0x3FF0FFFF)) + #define USER_DATA_START ((void*)(0x3FFE8000)) + #define USER_DATA_END ((void*)(0x3FFE8000 + 0x14000)) + #define ETS_SYS_START ((void*)(0x3FFFC000)) + #define ETS_SYS_END ((void*)(0x3FFFC000 + 0x4000)) + #define IRAM1_START ((void*)(0x40100000)) + #define IRAM1_END ((void*)(0x40100000 + 0x8000)) + #define IRAMF1_START ((void*)(0x40108000)) + #define IRAMF1_END ((void*)(0x40108000 + 0x4000)) + #define IRAMF2_START ((void*)(0x4010C000)) + #define IRAMF2_END ((void*)(0x4010C000 + 0x4000)) +#endif +#if 0 + /* Optional Stack Debugging */ + extern void *xPortSupervisorStackPointer; +#endif + enum sdk_memory_segment { /* Ensure this list exactly matches order in sdk_memory_segment_text */ mem_map_io = 0, - thread_local, + thread_local_mem, data, user_data_ram, bss, @@ -142,6 +174,8 @@ enum sdk_memory_segment text, rodata, rtc_data, + dram_org, + drom_org, SDK_MEMORY_SEGMENT_COUNT }; @@ -165,6 +199,8 @@ static const char* sdk_memory_segment_text[SDK_MEMORY_SEGMENT_COUNT + 1] = { "* text ", "* rodata ", "* rtc data ", + "C dram_org ", + "C drom_org ", "last item", }; @@ -173,7 +209,7 @@ static const char* sdk_memory_segment_text[SDK_MEMORY_SEGMENT_COUNT + 1] = { int sdk_log_meminfo(enum sdk_memory_segment m, void* start, void* end) { const char* str; - word32 len = 0; + size_t len = 0; str = sdk_memory_segment_text[m]; sdk_memory_segment_start[m] = start; sdk_memory_segment_end[m] = end; @@ -185,26 +221,31 @@ int sdk_log_meminfo(enum sdk_memory_segment m, void* start, void* end) ESP_LOGI(TAG, " Start End Length"); } else { - len = (word32)end - (word32)start; - ESP_LOGI(TAG, "%s: %p ~ %p : 0x%05x (%d)", str, start, end, len, len ); + if (end == NULL) { + /* The weak attribute: linker probably didn't find a value */ + len = 0; + ESP_LOGV(TAG, "Value not found for: %s", str); + } + else { + len = (size_t)end - (size_t)start; + ESP_LOGI(TAG, "%s: %p ~ %p : 0x%05x (%d)", + str, start, end, len, len ); + } } + return ESP_OK; } -#endif /* Show all known linker memory segment names, starting & ending addresses. */ int sdk_init_meminfo(void) { -#if defined(ESP_IDF_VERSION) && (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(6, 0, 0)) - ESP_LOGI(TAG, "sdk_init_meminfo not available for ESP-IDF V6.0"); -#else void* sample_heap_var; int sample_stack_var = 0; sdk_log_meminfo(SDK_MEMORY_SEGMENT_COUNT, NULL, NULL); /* print header */ sdk_log_meminfo(mem_map_io, MEM_MAP_IO_START, MEM_MAP_IO_END); #if defined(CONFIG_IDF_TARGET_ARCH_XTENSA) && CONFIG_IDF_TARGET_ARCH_XTENSA == 1 - sdk_log_meminfo(thread_local, _thread_local_start, _thread_local_end); + sdk_log_meminfo(thread_local_mem, _thread_local_start, _thread_local_end); #endif sdk_log_meminfo(data, _data_start, _data_end); sdk_log_meminfo(user_data_ram, USER_DATA_START, USER_DATA_END); @@ -212,6 +253,10 @@ int sdk_init_meminfo(void) /* TODO: Find ESP32-S2 equivalent of bss */ #else sdk_log_meminfo(bss, _bss_start, _bss_end); +#endif +#if defined(WOLFSSL_HAVE_LINKER_REGION_PEEK) + sdk_log_meminfo(dram_org, DRAM0_START, DRAM0_END); + sdk_log_meminfo(drom_org, DROM0_START, DROM0_END); #endif sdk_log_meminfo(noinit, _noinit_start, _noinit_end); sdk_log_meminfo(ets_system, ETS_SYS_START, ETS_SYS_END); @@ -235,6 +280,7 @@ int sdk_init_meminfo(void) #else sdk_log_meminfo(rtc_data, _rtc_data_start, _rtc_data_end); #endif + ESP_LOGI(TAG, "-----------------------------------------------------"); sample_heap_var = malloc(1); if (sample_heap_var == NULL) { @@ -245,7 +291,6 @@ int sdk_init_meminfo(void) sdk_var_whereis("sample_heap_var", sample_heap_var); free(sample_heap_var); } -#endif return ESP_OK; } @@ -253,9 +298,6 @@ int sdk_init_meminfo(void) esp_err_t sdk_var_whereis(const char* v_name, void* v) { esp_err_t ret = ESP_FAIL; -#if defined(ESP_IDF_VERSION) && (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(6, 0, 0)) - ESP_LOGI(TAG, "sdk_var_whereis not available for ESP-IDF V6.0"); -#else for (enum sdk_memory_segment m = 0 ;m < SDK_MEMORY_SEGMENT_COUNT; m++) { if (v >= sdk_memory_segment_start[m] && @@ -268,7 +310,6 @@ esp_err_t sdk_var_whereis(const char* v_name, void* v) } } } -#endif if (ret == ESP_FAIL) { ESP_LOGW(TAG, "%s not found in known memory map: %p", v_name, v); @@ -303,6 +344,205 @@ esp_err_t esp_sdk_mem_lib_init(void) return ret; } +static size_t free_heap = 0; /* current free heap */ +static size_t min_free_heap = 0; /* current minumim heap size */ +static size_t min_x_free_heap = 0; /* smallest seen free_heap */ +static size_t max_x_free_heap = 0; /* largest seen free_heap */ + +static size_t last_free_heap = 0; /* prior esp_get_free_heap_size */ +static size_t last_min_heap = 0; /* prior esp_get_minimum_free_heap_size */ +static size_t heap_peek_ct = 0; +static size_t stack_hwm = 0; +static size_t min_stack_hwm = 0; +static size_t max_stack_hwm = 0; + +static heap_track_reset_t heap_reset_reason = HEAP_TRACK_RESET_NONE; + +static size_t largest_allocable(size_t limit) { + size_t lo = 0, hi = limit, best = 0; + while (lo <= hi) { + size_t mid = (lo + hi) / 2; + void *p = malloc(mid); + if (p) { + free(p); + best = mid; + lo = mid + 1; + } + else { + hi = (mid == 0 ? 0 : mid - 1); + } + } + return best; +} + +static size_t largest_allocable_wolf(size_t limit) +{ + size_t best = 0; +#ifdef WOLFSSL_NO_MALLOC + #ifdef DEBUG_WOLFSSL + ESP_LOGE(TAG, "Error: largest_allocable_wolf called with no malloc"); + #endif +#else + size_t lo; + size_t hi; + void* (*mc)(size_t); + void (*fc)(void*); + void* (*rc)(void*, size_t); + + mc = NULL; + fc = NULL; + rc = NULL; + wolfSSL_GetAllocators(&mc, &fc, &rc); + + /* Fallback: if no custom allocators are set, use system malloc/free. */ + if (mc == NULL) { + mc = malloc; + } + if (fc == NULL) { + fc = free; + } + + lo = 0; + hi = limit; + best = 0; + + while (lo <= hi) { + size_t mid = (lo + hi) / 2; + void* p = mc(mid); + if (p != NULL) { + fc(p); + best = mid; + lo = mid + 1; + } + else { + hi = (mid == 0 ? 0 : mid - 1); + } + } +#endif + return best; +} + +static esp_err_t esp_sdk_stack_info(heap_track_reset_t reset) +{ + int ret = ESP_OK; + const char* this_task; + size_t max_alloc = 0; + + max_alloc = largest_allocable(10 * 1024); + ESP_LOGI(TAG, "max_alloc = %d", max_alloc); + + max_alloc = largest_allocable_wolf(12 * 1024); + ESP_LOGI(TAG, "max_alloc wolf = %d", max_alloc); +#ifdef CONFIG_IDF_TARGET_ESP8266 + /* words not bytes! */ + stack_hwm = uxTaskGetStackHighWaterMark(NULL) * sizeof(StackType_t); + if (min_stack_hwm == 0) { + min_stack_hwm = stack_hwm; + } + if (stack_hwm < min_stack_hwm) { + ESP_LOGW(TAG, "New min high watermark: %u bytes, delta = %d", + min_stack_hwm, stack_hwm - min_stack_hwm); + min_stack_hwm = stack_hwm; + } + if (stack_hwm > max_stack_hwm) { + ESP_LOGW(TAG, "New max high watermark: %u bytes, delta = %d", + max_stack_hwm, stack_hwm - max_stack_hwm); + max_stack_hwm = stack_hwm; + } + this_task = "ESP8266"; +#elif defined(CONFIG_FREERTOS_USE_TRACE_FACILITY) + TaskStatus_t status; + vTaskGetInfo(NULL, &status, pdTRUE, eInvalid); + stack_hwm = (unsigned)status.usStackHighWaterMark; + if (status.pcTaskName == NULL || status.pcTaskName[0] == '\0') { + this_task = "unknown"; + ret = ESP_FAIL; + } + else { + this_task = status.pcTaskName; + } +#else + this_task = "unknown"; + ESP_LOGW(TAG, "vTaskGetInfo not available"); +#endif + + ESP_LOGI(TAG, "Task: %s, High watermark: %u bytes", this_task, stack_hwm); + ESP_LOGI(TAG, "Min high watermark: %u bytes", min_stack_hwm); + ESP_LOGI(TAG, "Max high watermark: %u bytes", max_stack_hwm); + return ret; +} /* esp_sdk_stack_info */ + +static esp_err_t esp_sdk_heap_info(heap_track_reset_t reset) +{ + int ret = ESP_OK; + + if (reset != HEAP_TRACK_RESET_NONE) { + free_heap = 0; + min_free_heap = 0; + min_x_free_heap = 0; + max_x_free_heap = 0; + + last_free_heap = 0; + last_min_heap = 0; + heap_peek_ct = 0; + heap_reset_reason = reset; + } /* heap track metric reset */ + heap_peek_ct++; + +#ifdef CONFIG_IDF_TARGET_ESP8266 + free_heap = (unsigned)esp_get_free_heap_size(); + min_free_heap = (unsigned)esp_get_minimum_free_heap_size(); +#else + free_heap = heap_caps_get_free_size(MALLOC_CAP_DEFAULT); + min_free_heap = heap_caps_get_minimum_free_size(MALLOC_CAP_DEFAULT); +#endif + if (last_free_heap > 0) { + + if (last_free_heap != free_heap) { + ESP_LOGW(TAG, "LAST free heap: %u bytes, delta = %d", + last_free_heap, free_heap - last_free_heap); + } + if (free_heap < min_x_free_heap) { + min_x_free_heap = free_heap; + ESP_LOGW(TAG, "New min ever free heap %u bytes", min_x_free_heap); + } + if (free_heap > max_x_free_heap) { + max_x_free_heap = free_heap; + ESP_LOGW(TAG, "New max ever free heap: %u bytes", max_x_free_heap); + } + } + else { + min_x_free_heap = free_heap; + max_x_free_heap = free_heap; + } + + if ((last_min_heap > 0) && (last_min_heap != min_free_heap)) { + ESP_LOGW(TAG, "LAST minimum free heap: %u bytes", last_min_heap); + } + + ESP_LOGI(TAG, "Current free heap: %u bytes", free_heap); + ESP_LOGI(TAG, "Minimum free heap: %u bytes", min_free_heap); + ESP_LOGI(TAG, "Minimum ever free heap: %u bytes", min_x_free_heap); + ESP_LOGI(TAG, "Maximum ever free heap: %u bytes", max_x_free_heap); + + /* Save current values for next query */ + last_free_heap = free_heap; + last_min_heap = min_free_heap; + + return ret; +} /* esp_sdk_heap_info */ + +esp_err_t esp_sdk_stack_heap_info(heap_track_reset_t reset) +{ + int ret = ESP_OK; + ret = esp_sdk_heap_info(reset) + + esp_sdk_stack_info(reset); + if (ret != ESP_OK) { + ret = ESP_FAIL; + } + return ret; +} + #if defined(DEBUG_WOLFSSL_MALLOC) || defined(DEBUG_WOLFSSL) void* wc_debug_pvPortMalloc(size_t size, const char* file, int line, const char* fname) @@ -311,6 +551,11 @@ void* wc_pvPortMalloc(size_t size) #endif { void* ret = NULL; +#ifdef WOLFSSL_NO_MALLOC + #ifdef DEBUG_WOLFSSL + ESP_LOGE(TAG, "Error: wc_pvPortMalloc called with no malloc"); + #endif +#else wolfSSL_Malloc_cb mc; wolfSSL_Free_cb fc; wolfSSL_Realloc_cb rc; @@ -326,12 +571,18 @@ void* wc_pvPortMalloc(size_t size) ret = pvPortMalloc(size); #endif } - +#endif #if defined(DEBUG_WOLFSSL_MALLOC) || defined(DEBUG_WOLFSSL) if (ret == NULL) { ESP_LOGE("malloc", "%s:%d (%s)", file, line, fname); ESP_LOGE("malloc", "Failed Allocating memory of size: %d bytes", size); } +#ifdef DEBUG_WOLFSSL_MALLOC_VERBOSE + else { + ESP_LOGI("malloc", "%s:%d (%s)", file, line, fname); + ESP_LOGI("malloc", "Allocate memory at %p of size: %d bytes", ret, size); + } +#endif /* DEBUG_WOLFSSL_MALLOC_VERBOSE */ #endif return ret; } /* wc_debug_pvPortMalloc */ @@ -343,6 +594,11 @@ void wc_debug_pvPortFree(void *ptr, void wc_pvPortFree(void *ptr) #endif { +#ifdef WOLFSSL_NO_MALLOC + #ifdef DEBUG_WOLFSSL + ESP_LOGE(TAG, "Error: wc_pvPortFree called with no malloc"); + #endif +#else wolfSSL_Malloc_cb mc; wolfSSL_Free_cb fc; wolfSSL_Realloc_cb rc; @@ -352,6 +608,9 @@ void wc_pvPortFree(void *ptr) #endif } else { +#ifdef DEBUG_WOLFSSL_MALLOC_VERBOSE + ESP_LOGI("malloc", "free %p %s:%d (%s)", ptr, file, line, fname); +#endif wolfSSL_GetAllocators(&mc, &fc, &rc); if (fc == NULL) { @@ -365,6 +624,7 @@ void wc_pvPortFree(void *ptr) #endif } } +#endif /* WOLFSSL_NO_MALLOC check */ } /* wc_debug_pvPortFree */ #ifndef WOLFSSL_NO_REALLOC @@ -377,6 +637,11 @@ void* wc_pvPortRealloc(void* ptr, size_t size) #endif { void* ret = NULL; +#ifdef WOLFSSL_NO_MALLOC + #ifdef DEBUG_WOLFSSL + ESP_LOGE(TAG, "Error: wc_pvPortRealloc called with no malloc"); + #endif +#else wolfSSL_Malloc_cb mc; wolfSSL_Free_cb fc; wolfSSL_Realloc_cb rc; @@ -404,7 +669,8 @@ void* wc_pvPortRealloc(void* ptr, size_t size) ESP_LOGE("realloc", "Failed Re-allocating memory of size: %d bytes", size); } -#endif +#endif /* debug */ +#endif /* WOLFSSL_NO_MALLOC check */ return ret; } /* wc_debug_pvPortRealloc */ #endif /* WOLFSSL_NO_REALLOC */ diff --git a/wolfcrypt/src/port/Espressif/esp_sdk_time_lib.c b/wolfcrypt/src/port/Espressif/esp_sdk_time_lib.c index 7f27a2dfc5..b0c013ade3 100644 --- a/wolfcrypt/src/port/Espressif/esp_sdk_time_lib.c +++ b/wolfcrypt/src/port/Espressif/esp_sdk_time_lib.c @@ -52,22 +52,25 @@ esp_err_t esp_sdk_time_lib_init(void) } #if defined(CONFIG_IDF_TARGET_ESP8266) + #undef HAS_ESP_NETIF_SNTP #include + #include + #include -#elif defined(ESP_IDF_VERSION_MAJOR) && defined(ESP_IDF_VERSION_MINOR) - #if (ESP_IDF_VERSION_MAJOR == 5) && (ESP_IDF_VERSION_MINOR == 1) +#elif defined(ESP_IDF_VERSION_MAJOR) && defined(ESP_IDF_VERSION) + #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(6, 0, 0)) #define HAS_ESP_NETIF_SNTP 1 - #include - #include - #elif (ESP_IDF_VERSION_MAJOR == 5) && (ESP_IDF_VERSION_MINOR > 1) + #include /* types, sync modes, helpers */ + #include /* ESP-NETIF SNTP service APIs */ + #elif (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) #define HAS_ESP_NETIF_SNTP 1 #include #include #else + #undef HAS_ESP_NETIF_SNTP #include #include #endif - #else /* TODO Consider non ESP-IDF environments */ #endif @@ -102,12 +105,22 @@ esp_err_t esp_sdk_time_lib_init(void) #define NELEMS(x) ( (int)(sizeof(x) / sizeof((x)[0])) ) /* See also CONFIG_LWIP_SNTP_MAX_SERVERS in sdkconfig */ -#define NTP_SERVER_LIST ( (char*[]) { \ - "pool.ntp.org", \ - "time.nist.gov", \ - "utcnist.colorado.edu" \ - } \ - ) +#if !defined(CONFIG_LWIP_SNTP_MAX_SERVERS) || \ + (defined(CONFIG_LWIP_SNTP_MAX_SERVERS) && \ + (CONFIG_LWIP_SNTP_MAX_SERVERS == 3)) + #define NTP_SERVER_LIST ( (char*[]) { \ + "pool.ntp.org", \ + "time.nist.gov", \ + "utcnist.colorado.edu" \ + } \ + ) +#else + #define NTP_SERVER_LIST ( (char*[]) { \ + "pool.ntp.org", \ + } \ + ) +#endif + /* #define NTP_SERVER_COUNT using NELEMS: * * (int)(sizeof(NTP_SERVER_LIST) / sizeof(NTP_SERVER_LIST[0])) @@ -257,10 +270,33 @@ int set_time(void) return ESP_FAIL; } +static void time_sync_cb(struct timeval* tv) { + ESP_LOGI(TAG, "Time synchronized, epoch=%ld", (long)tv->tv_sec); +} + int set_time_wait_for_ntp(void) { - ESP_LOGE(TAG, "set_time_wait_for_ntp not implemented for ESP8266"); - return ESP_FAIL; + sntp_setoperatingmode(SNTP_OPMODE_POLL); + sntp_set_time_sync_notification_cb(time_sync_cb); + sntp_setservername(0, "pool.ntp.org"); /* or your local NTP server */ + sntp_init(); + + /* Optional: set your local time zone *before* using localtime_r() */ + setenv("TZ", "PST8PDT,M3.2.0/2,M11.1.0/2", 1); /* example for US Pacific */ + tzset(); + + /* Wait for first sync */ + for (int i = 0; (i < 10) && + (sntp_get_sync_status() == SNTP_SYNC_STATUS_RESET); ++i) { + vTaskDelay(pdMS_TO_TICKS(2000)); + } + + time_t now; struct tm tm_info; char buf[64]; + time(&now); + localtime_r(&now, &tm_info); + strftime(buf, sizeof(buf), "%c", &tm_info); + ESP_LOGI(TAG, "Local time: %s", buf); + return ESP_OK; } #else @@ -351,8 +387,11 @@ int set_time(void) ESP_SNTP_SERVER_LIST(ntpServerList[0]) ); #else - esp_sntp_config_t config = - ESP_NETIF_SNTP_DEFAULT_CONFIG(ntpServerList[0]); + #if defined(ESP_IDF_VERSION) && \ + (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) + esp_sntp_config_t config = + ESP_NETIF_SNTP_DEFAULT_CONFIG(ntpServerList[0]); + #endif #endif /* CONFIG_LWIP_SNTP_MAX_SERVERS > 1 */ #endif /* HAS_ESP_NETIF_SNTP */ @@ -388,42 +427,60 @@ int set_time(void) * * WARNING: do not set operating mode while SNTP client is running! */ - /* TODO Consider esp_sntp_setoperatingmode(SNTP_OPMODE_POLL); */ +#if defined(ESP_IDF_VERSION) && \ + (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 5, 0)) + esp_sntp_setoperatingmode(SNTP_OPMODE_POLL); +#else sntp_setoperatingmode(SNTP_OPMODE_POLL); +#endif if (NTP_SERVER_COUNT > CONFIG_LWIP_SNTP_MAX_SERVERS) { ESP_LOGW(TAG, "WARNING: %d NTP Servers defined, but " "CONFIG_LWIP_SNTP_MAX_SERVERS = %d", NTP_SERVER_COUNT,CONFIG_LWIP_SNTP_MAX_SERVERS); } - ESP_LOGI(TAG, "sntp_setservername:"); +#if defined(ESP_IDF_VERSION) && \ + (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) + ESP_LOGI(TAG, "esp_sntp_setservername:"); +#else + ESP_LOGI(TAG, "Found sntp_setservername:"); +#endif for (i = 0; i < CONFIG_LWIP_SNTP_MAX_SERVERS; i++) { const char* thisServer = ntpServerList[i]; if (strncmp(thisServer, "\x00", 1) == 0) { /* just in case we run out of NTP servers */ break; } - ESP_LOGI(TAG, "%s", thisServer); + ESP_LOGI(TAG, " %s", thisServer); +#if defined(ESP_IDF_VERSION) && \ + (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 5, 0)) + esp_sntp_setservername(i, thisServer); +#else sntp_setservername(i, thisServer); +#endif ret = ESP_OK; } - #ifdef HAS_ESP_NETIF_SNTP +#ifdef HAS_ESP_NETIF_SNTP + #if defined(ESP_IDF_VERSION) && \ + (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) + ESP_LOGI(TAG, "SNTP init v6 init with esp_netif_sntp_init"); ret = esp_netif_sntp_init(&config); #else + sntp_init(); + #endif +#else ESP_LOGW(TAG,"Warning: Consider upgrading ESP-IDF to take advantage " "of updated SNTP libraries"); - #endif - if (ret == ESP_OK) { - ESP_LOGV(TAG, "Successfully called esp_netif_sntp_init"); - } - else { - ESP_LOGE(TAG, "ERROR: esp_netif_sntp_init return = %d", ret); - } +#endif - sntp_init(); switch (ret) { + case ESP_OK: + ESP_LOGV(TAG, "Successfully called esp_netif_sntp_init"); + break; case ESP_ERR_INVALID_STATE: + ESP_LOGE(TAG, "ERROR: esp_netif_sntp_init invalid state"); break; default: + ESP_LOGE(TAG, "ERROR: esp_netif_sntp_init return = %d", ret); break; } ESP_LOGI(TAG, "sntp_init done."); @@ -442,13 +499,30 @@ int set_time(void) int set_time_wait_for_ntp(void) { int ret = 0; -#ifdef HAS_ESP_NETIF_SNTP +#if defined(HAS_ESP_NETIF_SNTP) && defined(ESP_IDF_VERSION) int ntp_retry = 0; const int ntp_retry_count = NTP_RETRY_COUNT; - ret = esp_netif_sntp_start(); - - ret = esp_netif_sntp_sync_wait(500 / portTICK_PERIOD_MS); + #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) + ret = esp_netif_sntp_start(); + #else + ret = esp_sntp_start(); + #endif + if (ret != ESP_OK) { + ESP_LOGE(TAG, "esp_netif_sntp_start ERROR %d", + ret); + } + else { + #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)) + ret = esp_netif_sntp_sync_wait(500 / portTICK_PERIOD_MS); + #else + ret = esp_sntp_sync_wait(500 / portTICK_PERIOD_MS); + #endif + if ((ret != ESP_OK) && (ret != ESP_ERR_TIMEOUT)) { + ESP_LOGE(TAG, "esp_netif_sntp_sync_wait exited with error %d", + ret); + } + } #else ESP_LOGE(TAG, "HAS_ESP_NETIF_SNTP not defined"); #endif /* HAS_ESP_NETIF_SNTP */ @@ -467,6 +541,8 @@ int set_time_wait_for_ntp(void) #ifdef TIME_ZONE setenv("TZ", TIME_ZONE, 1); tzset(); +#else + ESP_LOGW(TAG, "Timezone not set"); #endif if (ret == ESP_OK) { diff --git a/wolfcrypt/src/port/Espressif/esp_sdk_wifi_lib.c b/wolfcrypt/src/port/Espressif/esp_sdk_wifi_lib.c index b3c62e98b6..11815a586c 100644 --- a/wolfcrypt/src/port/Espressif/esp_sdk_wifi_lib.c +++ b/wolfcrypt/src/port/Espressif/esp_sdk_wifi_lib.c @@ -31,7 +31,8 @@ #include #if defined(WOLFSSL_ESPIDF) /* Entire file is only for Espressif EDP-IDF */ -#if defined(USE_WOLFSSL_ESP_SDK_WIFI) && ESP_IDF_VERSION_MAJOR > 4 +#if defined(USE_WOLFSSL_ESP_SDK_WIFI) && \ + (ESP_IDF_VERSION_MAJOR >= 4 || defined(CONFIG_IDF_TARGET_ESP8266)) /* Espressif */ #include "sdkconfig.h" /* programmatically generated from sdkconfig */ @@ -39,6 +40,19 @@ #include #include +/* Includes for showing IP address in esp_sdk_wifi_show_ip() */ +#if __has_include("esp_netif.h") + /* IDF v4.1+ (esp_netif), required on v5+ */ + #include "esp_netif.h" + #include "lwip/ip4_addr.h" + #include "lwip/inet.h" +#else + /* Older stacks including ESP8266 RTOS SDK 3.4 (tcpip_adapter) */ + #include "tcpip_adapter.h" + #include "lwip/ip4_addr.h" + #include "lwip/inet.h" +#endif + /* wolfSSL */ #include @@ -60,13 +74,16 @@ esp_err_t esp_sdk_wifi_lib_init(void) #define WIFI_LOW_HEAP_WARNING 21132 #if defined(CONFIG_IDF_TARGET_ESP8266) + /* No special ESP83266 setting */ #elif ESP_IDF_VERSION_MAJOR >= 5 && defined(FOUND_PROTOCOL_EXAMPLES_DIR) /* example path set in cmake file */ #elif ESP_IDF_VERSION_MAJOR > 4 /* #include "protocol_examples_common.h" */ #else - const static int CONNECTED_BIT = BIT0; - static EventGroupHandle_t wifi_event_group; + #if (0) + const static int CONNECTED_BIT = BIT0; + static EventGroupHandle_t wifi_event_group; + #endif #endif #if defined(CONFIG_IDF_TARGET_ESP8266) @@ -79,7 +96,7 @@ esp_err_t esp_sdk_wifi_lib_init(void) const static int CONNECTED_BIT = BIT0; static EventGroupHandle_t wifi_event_group; #endif - #if (ESP_IDF_VERSION_MAJOR == 5) + #if (ESP_IDF_VERSION_MAJOR >= 5) #define HAS_WPA3_FEATURES #else #undef HAS_WPA3_FEATURES @@ -89,9 +106,11 @@ esp_err_t esp_sdk_wifi_lib_init(void) #endif #if defined(CONFIG_IDF_TARGET_ESP8266) + #ifndef CONFIG_ESP_MAX_STA_CONN #define CONFIG_ESP_MAX_STA_CONN 4 #endif + #define EXAMPLE_MAX_STA_CONN CONFIG_ESP_MAX_STA_CONN #define WIFI_CONNECTED_BIT BIT0 @@ -129,37 +148,38 @@ static void event_handler(void* arg, esp_event_base_t event_base, } } #else +static volatile bool WiFiEthernetReady = 0; + static void event_handler(void* arg, esp_event_base_t event_base, int32_t event_id, void* event_data) { - if (event_base == WIFI_EVENT) { - if (event_id == WIFI_EVENT_STA_START) { + if (event_base == WIFI_EVENT && event_id == WIFI_EVENT_STA_START) { + WiFiEthernetReady = 0; + esp_wifi_connect(); + } + else if (event_base == WIFI_EVENT && event_id == WIFI_EVENT_STA_DISCONNECTED) { + if (s_retry_num < EXAMPLE_ESP_MAXIMUM_RETRY) { esp_wifi_connect(); - ESP_LOGV(TAG, "Connect event!!"); + s_retry_num++; + ESP_LOGI(TAG, "retry to connect to the AP"); } else { - if (event_id == WIFI_EVENT_STA_DISCONNECTED) { - if (s_retry_num < EXAMPLE_ESP_MAXIMUM_RETRY) { - esp_wifi_connect(); - s_retry_num++; - ESP_LOGI(TAG, ">> Retry to connect to the AP"); - } - else { - xEventGroupSetBits(s_wifi_event_group, WIFI_FAIL_BIT); - } - ESP_LOGI(TAG, ">> Connect to the AP fail"); - } /* WIFI_EVENT_STA_DISCONNECTED */ - else if(event_id == IP_EVENT_STA_GOT_IP) { - ip_event_got_ip_t* event = (ip_event_got_ip_t*) event_data; - ESP_LOGI(TAG, "got ip:%s", ip4addr_ntoa(&event->ip_info.ip)); - s_retry_num = 0; - xEventGroupSetBits(s_wifi_event_group, WIFI_CONNECTED_BIT); - } /* IP_EVENT_STA_GOT_IP */ - } /* not WIFI_EVENT_STA_START */ - } /* event_base == WIFI_EVENT */ + xEventGroupSetBits(s_wifi_event_group, WIFI_FAIL_BIT); + } + ESP_LOGI(TAG, "connect to the AP fail"); + WiFiEthernetReady = 0; + } + else if (event_base == IP_EVENT && event_id == IP_EVENT_STA_GOT_IP) { + ip_event_got_ip_t* event = (ip_event_got_ip_t*)event_data; + ESP_LOGI(TAG, "got ip:" IPSTR, IP2STR(&event->ip_info.ip)); + s_retry_num = 0; + xEventGroupSetBits(s_wifi_event_group, WIFI_CONNECTED_BIT); + WiFiEthernetReady = 1; + } } /* event_handler */ #endif + esp_err_t esp_sdk_wifi_init_sta(void) { word32 this_heap; @@ -191,6 +211,10 @@ esp_err_t esp_sdk_wifi_init_sta(void) * can be enabled by commenting below line */ if (strlen((char *)wifi_config.sta.password)) { wifi_config.sta.threshold.authmode = WIFI_AUTH_WPA2_PSK; +#if (0) + /* optional pmf_cfg */ + wifi_config.pmf_cfg = { .capable = true, .required = false }; +#endif } ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA) ); @@ -201,12 +225,14 @@ esp_err_t esp_sdk_wifi_init_sta(void) this_heap = esp_get_free_heap_size(); ESP_LOGI(TAG, "this heap = %d", this_heap); if (this_heap < WIFI_LOW_HEAP_WARNING) { + ESP_LOGW(TAG, "esp_get_free_heap_size: %d", this_heap); ESP_LOGW(TAG, "Warning: WiFi low heap: %d", WIFI_LOW_HEAP_WARNING); } /* Waiting until either the connection is established (WIFI_CONNECTED_BIT) * or connection failed for the maximum number of re-tries (WIFI_FAIL_BIT). * The bits are set by event_handler() * (see above) */ + ESP_LOGI(TAG, "xEventGroupWaitBits ..."); EventBits_t bits = xEventGroupWaitBits(s_wifi_event_group, WIFI_CONNECTED_BIT | WIFI_FAIL_BIT, pdFALSE, @@ -252,6 +278,28 @@ esp_err_t esp_sdk_wifi_init_sta(void) return ESP_OK; } +esp_err_t esp_sdk_wifi_show_ip(void) +{ + int ret = ESP_OK; + /* tcpip_adapter path (ESP8266 RTOS SDK 3.4 / old IDF) */ + tcpip_adapter_ip_info_t ipi; + if (tcpip_adapter_get_ip_info(TCPIP_ADAPTER_IF_STA, &ipi) == ESP_OK) { + ip4_addr_t ip = { .addr = ipi.ip.addr }; + ip4_addr_t mask = { .addr = ipi.netmask.addr }; + ip4_addr_t gw = { .addr = ipi.gw.addr }; + ESP_LOGI(TAG, + "IPv4 " IPSTR " mask " IPSTR " gw " IPSTR, + IP2STR(&ip), + IP2STR(&mask), + IP2STR(&gw)); + } + else { + ESP_LOGW(TAG, "tcpip_adapter_get_ip_info failed"); + ret = ESP_FAIL; + } + return ret; +} /* esp_sdk_wifi_show_ip */ + #elif ESP_IDF_VERSION_MAJOR < 4 /* event handler for wifi events */ static esp_err_t wifi_event_handler(void *ctx, system_event_t *event) @@ -281,6 +329,7 @@ static esp_err_t wifi_event_handler(void *ctx, system_event_t *event) } return ESP_OK; } + #else #ifdef CONFIG_ESP_MAXIMUM_RETRY @@ -308,7 +357,7 @@ static esp_err_t wifi_event_handler(void *ctx, system_event_t *event) #endif #ifndef ESP_WIFI_SCAN_AUTH_MODE_THRESHOLD - #define CONFIG_ESP_WIFI_AUTH_WPA2_PSK 1 + #define CONFIG_ESP_WIFI_AUTH_WPA2_PSK WIFI_AUTH_WPA2_PSK #define ESP_WIFI_SCAN_AUTH_MODE_THRESHOLD CONFIG_ESP_WIFI_AUTH_WPA2_PSK #endif @@ -355,8 +404,18 @@ static void event_handler(void* arg, } } -esp_err_t wc_wifi_init_sta(void) +esp_err_t esp_sdk_wifi_init_sta(void) { + wifi_country_t country = { + .cc = "US", + .schan = 1, + .nchan = 11, + .max_tx_power = 0, /* optional */ + .policy = WIFI_COUNTRY_POLICY_MANUAL, +#if CONFIG_SOC_WIFI_SUPPORT_5G + .wifi_5g_channel_mask = 0, +#endif + }; esp_err_t ret = ESP_OK; s_wifi_event_group = xEventGroupCreate(); @@ -368,6 +427,7 @@ esp_err_t wc_wifi_init_sta(void) wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); ESP_ERROR_CHECK(esp_wifi_init(&cfg)); + ESP_ERROR_CHECK(esp_wifi_set_country(&country)); esp_event_handler_instance_t instance_any_id; esp_event_handler_instance_t instance_got_ip; @@ -401,7 +461,11 @@ esp_err_t wc_wifi_init_sta(void) ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA) ); ESP_ERROR_CHECK(esp_wifi_set_config(WIFI_IF_STA, &wifi_config) ); -#ifdef CONFIG_EXAMPLE_WIFI_SSID +#if defined(CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG) && \ + CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG + /* Using local private config file, ignore myssid default warning */ +#else +#if defined(CONFIG_EXAMPLE_WIFI_SSID) if (XSTRCMP(CONFIG_EXAMPLE_WIFI_SSID, "myssid") == 0) { ESP_LOGW(TAG, "WARNING: CONFIG_EXAMPLE_WIFI_SSID is \"myssid\"."); ESP_LOGW(TAG, " Do you have a WiFi AP called \"myssid\", "); @@ -410,6 +474,7 @@ esp_err_t wc_wifi_init_sta(void) #else ESP_LOGW(TAG, "WARNING: CONFIG_EXAMPLE_WIFI_SSID not defined."); #endif +#endif /* CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG */ ESP_ERROR_CHECK(esp_wifi_start() ); @@ -457,12 +522,67 @@ esp_err_t wc_wifi_init_sta(void) return ret; } -esp_err_t wc_wifi_show_ip(void) +esp_err_t esp_sdk_wifi_show_ip(void) { - /* TODO Causes panic: ESP_LOGI(TAG, "got ip:" IPSTR, - * IP2STR(&event->ip_info.ip)); */ - return ESP_OK; -} + int ret = ESP_OK; +#if __has_include("esp_netif.h") + /* esp_netif path (modern IDF) */ + esp_netif_t *nif = NULL; + + if ((nif = esp_netif_get_handle_from_ifkey("WIFI_STA_DEF")) != NULL) { + /* found WIFI_STA_DEF */ + } + else if ((nif = esp_netif_get_handle_from_ifkey("WIFI_STA")) != NULL) { + /* found WIFI_STA */ + } + else if ((nif = esp_netif_get_handle_from_ifkey("ETH_DEF")) != NULL) { + /* found ETH_DEF */ + } + else { + nif = esp_netif_get_handle_from_ifkey("PPP_DEF"); + } + + if (!nif) { + ESP_LOGW(TAG, "No esp_netif handle found"); + ret = ESP_FAIL; + } + + esp_netif_ip_info_t ipi; + if (esp_netif_get_ip_info(nif, &ipi) == ESP_OK) { + /* Convert esp_ip4_addr_t to lwIP ip4_addr_t for IPSTR/IP2STR */ + ip4_addr_t ip = { .addr = ipi.ip.addr }; + ip4_addr_t mask = { .addr = ipi.netmask.addr }; + ip4_addr_t gw = { .addr = ipi.gw.addr }; + ESP_LOGI(TAG, + "IPv4 " IPSTR " mask " IPSTR " gw " IPSTR, + IP2STR(&ip), + IP2STR(&mask), + IP2STR(&gw)); + } + else { + ESP_LOGW(TAG, "esp_netif_get_ip_info failed"); + ret = ESP_FAIL; + } +#else + /* tcpip_adapter path (ESP8266 RTOS SDK 3.4 / old IDF) */ + tcpip_adapter_ip_info_t ipi; + if (tcpip_adapter_get_ip_info(TCPIP_ADAPTER_IF_STA, &ipi) == ESP_OK) { + ip4_addr_t ip = { .addr = ipi.ip.addr }; + ip4_addr_t mask = { .addr = ipi.netmask.addr }; + ip4_addr_t gw = { .addr = ipi.gw.addr }; + ESP_LOGI(TAG, + "IPv4 " IPSTR " mask " IPSTR " gw " IPSTR, + IP2STR(&ip), + IP2STR(&mask), + IP2STR(&gw)); + } + else { + ESP_LOGW(TAG, "tcpip_adapter_get_ip_info failed"); + ret = ESP_FAIL; + } +#endif /* Old SDK - ESP8266 */ + return ret; +} /* esp_sdk_wifi_show_ip */ #endif diff --git a/wolfcrypt/test/test.c b/wolfcrypt/test/test.c index 8bd98d813f..036505bec7 100644 --- a/wolfcrypt/test/test.c +++ b/wolfcrypt/test/test.c @@ -117,7 +117,7 @@ const byte const_byte_array[] = "A+Gd\0\0\0"; #define PRINT_HEAP_ADDRESS(p) WC_DO_NOTHING; #endif /* WOLFSSL_TRACK_MEMORY_VERBOSE && !WOLFSSL_STATIC_MEMORY */ -#ifdef WOLFSSL_ESPIDF +#if defined(WOLFSSL_ESPIDF) && defined(DEBUG_WOLFSSL_MALLOC) #undef PRINT_HEAP_CHECKPOINT #undef PRINT_HEAP_ADDRESS static int esp_start_heap = 0; @@ -158,7 +158,7 @@ const byte const_byte_array[] = "A+Gd\0\0\0"; #define PRINT_HEAP_ADDRESS(p) WC_DO_NOTHING; #endif -#endif /* WOLFSSL_ESPIDF */ +#endif /* WOLFSSL_ESPIDF && DEBUG_WOLFSSL_MALLOC */ #ifdef USE_FLAT_TEST_H diff --git a/wolfssl/wolfcrypt/hash.h b/wolfssl/wolfcrypt/hash.h index 99bcea00a0..5209b570dd 100644 --- a/wolfssl/wolfcrypt/hash.h +++ b/wolfssl/wolfcrypt/hash.h @@ -104,6 +104,7 @@ typedef union { wc_Sha3 sha3; #endif #ifdef WOLFSSL_SM3 + /* See install.sh in wolfssl/wolfsm repo */ wc_Sm3 sm3; #endif WOLF_AGG_DUMMY_MEMBER; diff --git a/wolfssl/wolfcrypt/port/Espressif/esp-sdk-lib.h b/wolfssl/wolfcrypt/port/Espressif/esp-sdk-lib.h index 977a959021..1180851d73 100644 --- a/wolfssl/wolfcrypt/port/Espressif/esp-sdk-lib.h +++ b/wolfssl/wolfcrypt/port/Espressif/esp-sdk-lib.h @@ -22,6 +22,17 @@ #define __ESP_SDK_LIB_H__ +/* When using a private config with plain text passwords, */ +/* file my_private_config.h should be excluded from git updates: */ +/* #define USE_MY_PRIVATE_CONFIG */ + +/* USE_MY_PRIVATE_CONFIG may also be set via idf.py menuconfig*/ +#if defined(CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG) \ + && CONFIG_WOLFSSL_USE_MY_PRIVATE_CONFIG + #define USE_MY_PRIVATE_CONFIG +#endif + + /* Always include wolfcrypt/settings.h before any other wolfSSL file. */ /* Reminder: settings.h pulls in user_settings.h; don't include it here. */ #include @@ -44,7 +55,9 @@ #include #include -#define ESP_SDK_MEM_LIB_VERSION 1 +#define ESP_SDK_MEM_LIB_VERSION 2 +#define ESP_SDK_WIFI_LIB_VERSION 2 +#define ESP_SDK_UTIL_LIB_VERSION 2 /** ****************************************************************************** @@ -54,10 +67,6 @@ ****************************************************************************** **/ -/* when using a private config with plain text passwords, - * file my_private_config.h should be excluded from git updates */ -/* #define USE_MY_PRIVATE_CONFIG */ - /* Note that IntelliSense may not work properly in the next section for the * Espressif SDK 3.4 on the ESP8266. Macros should still be defined. * See the project-level Makefile. Example found in: @@ -102,7 +111,7 @@ #elif defined(OS_WINDOWS) #include "/workspace/my_private_config.h" #else - /* Edit as needed for your private config: */ + /* Edit as needed for your private config, typically non-Cmake: */ #warning "default private config using /workspace/my_private_config.h" #include "/workspace/my_private_config.h" #endif @@ -148,6 +157,35 @@ WOLFSSL_LOCAL esp_err_t sdk_var_whereis(const char* v_name, void* v); WOLFSSL_LOCAL intptr_t esp_sdk_stack_pointer(void); +WOLFSSL_LOCAL esp_err_t esp_sdk_device_show_info(void); + + +#define HAVE_STACK_HEAP_INFO +typedef enum { + HEAP_TRACK_RESET_NONE = 0u, /* No reset */ + HEAP_TRACK_RESET_MANUAL = 1u << 0, /* Explicit API call */ + HEAP_TRACK_RESET_TIME_INTERVAL = 1u << 1, /* Periodic timer window roll */ + HEAP_TRACK_RESET_SAMPLE_INTERVAL = 1u << 2, /* After N samples */ + HEAP_TRACK_RESET_BOOT = 1u << 3, /* Cold boot or soft reboot */ + HEAP_TRACK_RESET_SLEEP_WAKE = 1u << 4, /* Deep sleep or suspend resume*/ + HEAP_TRACK_RESET_HEAP_REINIT = 1u << 5, /* Allocator reinit */ + HEAP_TRACK_RESET_REGION_CHANGE = 1u << 6, /* Heap regions added or remove*/ + HEAP_TRACK_RESET_DEFRAG = 1u << 7, /* Compaction, defragment event*/ + HEAP_TRACK_RESET_THRESHOLD = 1u << 8, /* Policy min trigger */ + HEAP_TRACK_RESET_OVERFLOW = 1u << 9, /* Counter or time wraparound */ + HEAP_TRACK_RESET_OOM_RECOVERY = 1u << 10, /* Out of memory recovered */ + HEAP_TRACK_RESET_CONTEXT_SWITCH = 1u << 11, /* Switched task */ + HEAP_TRACK_RESET_FIRMWARE_SWAP = 1u << 12, /* OTA or partition swap */ + HEAP_TRACK_RESET_DIAG_CLEAR = 1u << 13, /* Cleared by diagnostics */ +} heap_track_reset_t; +WOLFSSL_LOCAL esp_err_t esp_sdk_stack_heap_info(heap_track_reset_t reset); + +/* Check if USE_WOLFSSL_ESP_SDK_TIME set via idf.py menuconfig */ +#if defined(CONFIG_USE_WOLFSSL_ESP_SDK_TIME) && CONFIG_USE_WOLFSSL_ESP_SDK_TIME + #undef USE_WOLFSSL_ESP_SDK_TIME + #define USE_WOLFSSL_ESP_SDK_TIME +#endif + #if defined(USE_WOLFSSL_ESP_SDK_TIME) /****************************************************************************** @@ -174,6 +212,18 @@ WOLFSSL_LOCAL esp_err_t set_time(void); WOLFSSL_LOCAL esp_err_t set_time_wait_for_ntp(void); #endif +/* Check if USE_WOLFSSL_ESP_SDK_WIFI set via idf.py menuconfig */ +#if defined(CONFIG_USE_WOLFSSL_ESP_SDK_WIFI) && CONFIG_USE_WOLFSSL_ESP_SDK_WIFI + #if defined(CONFIG_IDF_TARGET_ESP32H2) + /* With no WiFi built-in to standard H2, don't enable by default.*/ + /* Can still be enabled via idf.py menuconfig */ + #else + #warning "There is typically no WiFi on ESP32H2, disabling SDK_WIFI" + #undef USE_WOLFSSL_ESP_SDK_WIFI + #define USE_WOLFSSL_ESP_SDK_WIFI + #endif +#endif + #if defined(USE_WOLFSSL_ESP_SDK_WIFI) /****************************************************************************** diff --git a/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h b/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h index 15c27bd7d9..5324662711 100644 --- a/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h +++ b/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h @@ -212,6 +212,10 @@ enum { ** Turns on development testing. Validates HW accelerated results to software ** - Automatically turns on WOLFSSL_HW_METRICS ** +** WOLFSSL_DEBUG_CERTS +** Enables Certificate Diagnostic messages. Provides intuitive descriptions of +** failures and suggestions for fixes. This is a subset of DEBUG_WOLFSSL +** ** DEBUG_WOLFSSL_SHA_MUTEX ** Turns on diagnostic messages for SHA mutex. Note that given verbosity, ** there may be TLS timing issues encountered. Use with caution. @@ -219,6 +223,12 @@ enum { ** DEBUG_WOLFSSL_ESP32_HEAP ** Prints heap memory usage ** +** DEBUG_WOLFSSL_MALLOC +** Basic malloc debug warnings and errors +** +** DEBUG_WOLFSSL_MALLOC_VERBOSE +** Prints memory pointer values and size allocated and freed +** ** DEBUG_WOLFSSL_ESP32_UNFINISHED_HW ** This may be interesting in that HW may have been unnecessarily locked ** for hash that was never completed. (typically encountered at `free1` time) @@ -432,7 +442,8 @@ enum { #define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /***** END CONFIG_IDF_TARGET_ESP32C3 *****/ -#elif defined(CONFIG_IDF_TARGET_ESP32C6) +#elif defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32C61) #include #include @@ -790,6 +801,9 @@ extern "C" #elif defined(CONFIG_IDF_TARGET_ESP32C6) #include "esp32c6/rom/sha.h" #define WC_ESP_SHA_TYPE SHA_TYPE + #elif defined(CONFIG_IDF_TARGET_ESP32C61) + #include "esp32c61/rom/sha.h" + #define WC_ESP_SHA_TYPE SHA_TYPE #elif defined(CONFIG_IDF_TARGET_ESP32H2) #include "esp32h2/rom/sha.h" #define WC_ESP_SHA_TYPE SHA_TYPE diff --git a/wolfssl/wolfcrypt/settings.h b/wolfssl/wolfcrypt/settings.h index e57d48b85e..2e9faff559 100644 --- a/wolfssl/wolfcrypt/settings.h +++ b/wolfssl/wolfcrypt/settings.h @@ -577,6 +577,9 @@ #if defined(WOLFSSL_ESPIDF) #define SIZEOF_LONG_LONG 8 + /* Avoid any "load/store address misaligned" for all Espressif devices */ + #define WOLFSSL_USE_ALIGN + #ifndef WOLFSSL_MAX_ERROR_SZ /* Espressif paths can be quite long. Ensure error prints full path. */ #define WOLFSSL_MAX_ERROR_SZ 200 @@ -795,27 +798,7 @@ defined(CONFIG_IDF_TARGET_ESP32H2) || \ defined(CONFIG_IDF_TARGET_ESP8266) - #if defined(CONFIG_IDF_TARGET_ESP8266) - #undef HAVE_ECC - #undef HAVE_ECC_CDH - #undef HAVE_CURVE25519 - - #ifdef HAVE_CHACHA - #error "HAVE_CHACHA not supported on ESP8266" - #endif - #ifdef HAVE_XCHACHA - #error "HAVE_XCHACHA not supported on ESP8266" - #endif - #else - #define HAVE_XCHACHA - #define HAVE_CHACHA - /* TODO Not enabled at this time, needs further testing: - * #define WC_SRTP_KDF - * #define HAVE_COMP_KEY - * #define WOLFSSL_HAVE_XMSS - */ - #endif - /* TODO AES-EAX needs stesting on this platform */ + /* TODO AES-EAX needs testing on this platform */ /* Optionally disable DH * #undef HAVE_DH