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Switching to non-blocking assignments in other primitives file
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vtr_flow/primitives.v

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -266,9 +266,9 @@ module single_port_ram #(
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always@(posedge clk) begin
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if(we) begin
269-
Mem[addr] = data;
269+
Mem[addr] <= data;
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end
271-
out = Mem[addr]; //New data read-during write behaviour (blocking assignments)
271+
out <= Mem[addr]; //New data read-during write behaviour (blocking assignments)
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end
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endmodule // single_port_RAM
@@ -321,9 +321,9 @@ module dual_port_ram #(
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always@(posedge clk) begin //Port 2
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if(we2) begin
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Mem[addr2] = data2;
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Mem[addr2] <= data2;
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end
326-
out2 = Mem[addr2]; //New data read-during write behaviour (blocking assignments)
326+
out2 <= Mem[addr2]; //New data read-during write behaviour (blocking assignments)
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end
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endmodule // dual_port_ram

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