Merge branch 'master' into stratix_10_arch_updates

Author: AlexandreSinger

doc/src/vpr/command_line_usage.rst

@@ -840,6 +840,18 @@ If any of init_t, exit_t or alpha_t is specified, the user schedule, with a fixe
 
     **Default:** ``1.0``
 
+.. option:: --anneal_auto_init_t_estimator {cost_variance, equilibrium}
+
+   Controls which estimation method is used when selecting the starting temperature
+   for the automatic annealing schedule.
+
+   The options for estimators are:
+
+   * ``cost_variance``: Estimates the initial temperature using the variance of cost after a set of trial swaps. The initial temperature is set to a value proportional to the variance.
+   * ``equilibrium``: Estimates the initial temperature by trying to predict the equilibrium temperature for the initial placement (i.e. the temperature that would result in no change in cost).
+
+    **Default** ``cost_variance``
+
 .. option:: --init_t <float>
 
     The starting temperature of the anneal for the manual annealing schedule.

doc/src/vtr/get_vtr.rst

@@ -9,7 +9,7 @@ How to Cite
 Citations are important in academia, as they ensure contributors receive credit for their efforts.
 Therefore please use the following paper as a general citation whenever you use VTR:
 
-    M. A. Elgammal, A. Mohaghegh, S. G. Shahrouz, F. Mahmoudi, F. Koşar, K. Talaei, J. Fife, D. Khadivi, K. E. Murray, A. Boutros, K.B. Kent, J. Goeders, V. Betz "VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration" ACM TRETS, 2024
+    M. A. Elgammal, A. Mohaghegh, S. G. Shahrouz, F. Mahmoudi, F. Koşar, K. Talaei, J. Fife, D. Khadivi, K. E. Murray, A. Boutros, K.B. Kent, J. Goeders, V. Betz "VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration" ACM TRETS, 2025
 
 Bibtex:
 

libs/libarchfpga/src/device_grid.h

@@ -32,10 +32,9 @@ class DeviceGrid {
     const std::string& name() const { return name_; }
 
     ///@brief Return the number of layers(number of dies)
-    inline int get_num_layers() const {
-        return (int)grid_.dim_size(0);
+    inline size_t get_num_layers() const {
+        return grid_.dim_size(0);
     }
-
     ///@brief Return the width of the grid at the specified layer
     size_t width() const { return grid_.dim_size(1); }
     ///@brief Return the height of the grid at the specified layer
@@ -54,7 +53,8 @@ class DeviceGrid {
     void clear();
 
     /**
-     * @brief Return the number of instances of the specified tile type on the specified layer. If the layer_num is -1, return the total number of instances of the specified tile type on all layers.
+     * @brief Return the number of instances of the specified tile type on the specified layer.
+     * If the layer_num is -1, return the total number of instances of the specified tile type on all layers.
      * @note This function should be used if count_instances() is called in the constructor.
      */
     size_t num_instances(t_physical_tile_type_ptr type, int layer_num) const;
@@ -84,6 +84,15 @@ class DeviceGrid {
         return get_width_offset(tile_loc) == 0 && get_height_offset(tile_loc) == 0;
     }
 
+    ///@brief Given a location, return the root location (bottom-left corner) of the tile instance
+    inline t_physical_tile_loc get_root_location(const t_physical_tile_loc& tile_loc) const {
+        t_physical_tile_loc root_loc;
+        root_loc.layer_num = tile_loc.layer_num;
+        root_loc.x = tile_loc.x - get_width_offset(tile_loc);
+        root_loc.y = tile_loc.y - get_height_offset(tile_loc);
+        return root_loc;
+    }
+
     ///@brief Returns a rectangle which represents the bounding box of the tile at the given location.
     inline vtr::Rect<int> get_tile_bb(const t_physical_tile_loc& tile_loc) const {
         t_physical_tile_type_ptr tile_type = get_physical_type(tile_loc);
@@ -96,6 +105,58 @@ class DeviceGrid {
         return {{tile_xlow, tile_ylow}, {tile_xhigh, tile_yhigh}};
     }
 
+    // Forward const-iterator over (layer, x, y)
+    class loc_const_iterator {
+      public:
+        using value_type = t_physical_tile_loc;
+        using difference_type = std::ptrdiff_t;
+        using iterator_category = std::forward_iterator_tag;
+
+        loc_const_iterator(const DeviceGrid* g, size_t layer, size_t x, size_t y)
+            : g_(g) {
+            loc_.layer_num = static_cast<int>(layer);
+            loc_.x = static_cast<int>(x);
+            loc_.y = static_cast<int>(y);
+        }
+
+        value_type operator*() const { return loc_; }
+
+        // pre-increment
+        loc_const_iterator& operator++() {
+            // advance y, then x, then layer
+            ++loc_.y;
+            if (loc_.y >= static_cast<int>(g_->height())) {
+                loc_.y = 0;
+                ++loc_.x;
+                if (loc_.x >= static_cast<int>(g_->width())) {
+                    loc_.x = 0;
+                    ++loc_.layer_num;
+                }
+            }
+            return *this;
+        }
+
+        bool operator==(const loc_const_iterator& o) const {
+            return loc_.x == o.loc_.x
+                   && loc_.y == o.loc_.y
+                   && loc_.layer_num == o.loc_.layer_num
+                   && g_ == o.g_;
+        }
+        bool operator!=(const loc_const_iterator& o) const { return !(*this == o); }
+
+      private:
+        const DeviceGrid* g_ = nullptr;
+        t_physical_tile_loc loc_{0, 0, 0};
+    };
+
+    /// Iterate every (layer, x, y) location
+    inline auto all_locations() const {
+        return vtr::make_range(
+            loc_const_iterator(this, /*layer*/ 0, /*x*/ 0, /*y*/ 0),
+            loc_const_iterator(this, /*layer*/ get_num_layers(), /*x*/ 0, /*y*/ 0) // end sentinel
+        );
+    }
+
     ///@brief Return the metadata of the tile at the specified location
     inline const t_metadata_dict* get_metadata(const t_physical_tile_loc& tile_loc) const {
         return grid_[tile_loc.layer_num][tile_loc.x][tile_loc.y].meta;

libs/libarchfpga/src/physical_types_util.cpp

@@ -78,7 +78,6 @@ static std::vector<int> get_pb_pin_src_pins(t_physical_tile_type_ptr physical_ty
                                             const t_pb_graph_pin* pin);
 
 /**
- *
  * @param physical_type physical tile which pin belongs to
  * @param sub_tile  sub_tile in which physical tile located
  * @param logical_block logical block mapped to the sub_tile
@@ -108,20 +107,12 @@ static t_pb_graph_pin* get_mutable_tile_pin_pb_pin(t_physical_tile_type* physica
                                                    int pin_physical_num);
 
 /**
- *
- * @param physical_tile
- * @param class_physical_num
  * @return A vector containing all of the parent pb_graph_nodes and the pb_graph_node of the class_physical_num itself
  */
 static std::vector<const t_pb_graph_node*> get_sink_hierarchical_parents(t_physical_tile_type_ptr physical_tile,
                                                                          int class_physical_num);
 
 /**
- *
- * @param physical_tile
- * @param pin_physcial_num
- * @param ref_sink_num
- * @param sink_grp
  * @return Return zero if the ref_sink_num is not reachable by pin_physical_num, otherwise return the number sinks in sink_grp
  * reachable by pin_physical_num
  */
@@ -618,21 +609,21 @@ bool is_opin(int ipin, t_physical_tile_type_ptr type) {
         return false;
 }
 
-bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, int num_of_avail_layer) {
-    if (type->is_empty()) { //if type is empty, there is no pins
+bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, unsigned num_of_avail_layer) {
+    // if type is empty, there is no pins
+    if (type->is_empty()) {
         return false;
     }
-    //ipin should be a valid pin in physical type
+
+    // ipin should be a valid pin in physical type
     VTR_ASSERT(ipin < type->num_pins);
-    int pin_layer = from_layer + type->pin_layer_offset[ipin];
-    //if pin_offset specifies a layer that doesn't exist in arch file, we do a wrap around
+    unsigned pin_layer = from_layer + type->pin_layer_offset[ipin];
+    // if pin_offset specifies a layer that doesn't exist in arch file, we do a wrap around
     pin_layer = (pin_layer < num_of_avail_layer) ? pin_layer : pin_layer % num_of_avail_layer;
-    if (from_layer == to_layer || pin_layer == to_layer) {
+    if (from_layer == to_layer || int(pin_layer) == to_layer) {
         return true;
-    } else {
-        return false;
     }
-    //not reachable
+
     return false;
 }
 
@@ -643,7 +634,7 @@ std::string block_type_pin_index_to_name(t_physical_tile_type_ptr type, int pin_
     std::string pin_name = type->name;
 
     int sub_tile_index, inst_num, logical_num, pb_type_idx;
-    std::tie<int, int, int, int, int>(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) = get_pin_index_for_inst(type, pin_physical_num, is_flat);
+    std::tie(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) = get_pin_index_for_inst(type, pin_physical_num, is_flat);
     if (type->sub_tiles[sub_tile_index].capacity.total() > 1) {
         pin_name += "[" + std::to_string(inst_num) + "]";
     }

libs/libarchfpga/src/physical_types_util.h

@@ -116,7 +116,7 @@
 bool is_opin(int ipin, t_physical_tile_type_ptr type);
 
 ///@brief Returns true if the specified pin is located at "from_layer" and it is connected to "to_layer"
-bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, int num_of_avail_layer);
+bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, unsigned num_of_avail_layer);
 
 /**
  * @brief Returns the corresponding physical pin based on the input parameters:

libs/libarchfpga/src/read_xml_arch_file_sg.cpp

@@ -4,6 +4,7 @@
 #include "pugixml_util.hpp"
 #include "arch_error.h"
 #include "switchblock_types.h"
+#include "vtr_util.h"
 
 /**
  * @brief Parses all <sg_link> tags under a <sg_link_list> tag.
@@ -26,32 +27,12 @@ static std::vector<t_sg_link> parse_sg_link_tags(pugi::xml_node sg_link_list_tag
         sg_link.seg_type = pugiutil::get_attribute(node, "seg_type", loc_data).as_string();
 
         // Since the offset attributes are optional and might not exist, the as_int method will return a value of zero if the attribute is empty
-        int x_offset = pugiutil::get_attribute(node, "x_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
-        int y_offset = pugiutil::get_attribute(node, "y_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
-        int z_offset = pugiutil::get_attribute(node, "z_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
+        sg_link.x_offset = pugiutil::get_attribute(node, "x_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
+        sg_link.y_offset = pugiutil::get_attribute(node, "y_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
+        sg_link.z_offset = pugiutil::get_attribute(node, "z_offset", loc_data, pugiutil::OPTIONAL).as_int(0);
 
-        if (x_offset == 0 && y_offset == 0 && z_offset == 0) {
-            archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "All offset fields in the <sg_link> are zero or missing.");
-        }
-
-        // We expect exactly one non-zero offset so the gather and scatter points are joined by a node that can be represented by a straight wire.
-        if (x_offset != 0) {
-            sg_link.x_offset = x_offset;
-            if (y_offset != 0 || z_offset != 0) {
-                archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "More than one of the offset fields in the <sg_link> are non-zero.");
-            }
-        }
-        if (y_offset != 0) {
-            sg_link.y_offset = y_offset;
-            if (x_offset != 0 || z_offset != 0) {
-                archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "More than one of the offset fields in the <sg_link> are non-zero.");
-            }
-        }
-        if (z_offset != 0) {
-            sg_link.z_offset = z_offset;
-            if (y_offset != 0 || x_offset != 0) {
-                archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "More than one of the offset fields in the <sg_link> are non-zero.");
-            }
+        if (!vtr::exactly_k_conditions(1, sg_link.x_offset != 0, sg_link.y_offset != 0, sg_link.z_offset != 0)) {
+            archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "One and only one of the offset fields in the <sg_link> should be non-zero.");
         }
 
         sg_link_list.push_back(sg_link);

libs/libarchfpga/src/switchblock_types.h

@@ -18,7 +18,8 @@ enum e_directionality {
 /**
  * @brief At the intersection of routing channels, left, right, top and bottom specify the x- and y-directed channels
  * while above and under specify the switch block wires one a layer above or below the current one. above and below
- * are only used for multi-layer FPGAs. 
+ * are only used for multi-layer FPGAs. Note that the order of 2D sides is important, as it corresponds to the bit 
+ * order in t_rr_node_data::dir_side_.sides.
  */
 enum e_side : unsigned char {
     TOP = 0,

libs/librrgraph/src/base/check_rr_graph.cpp

@@ -473,6 +473,8 @@ void check_rr_node(const RRGraphView& rr_graph,
 
     e_pin_type class_type = e_pin_type::OPEN;
     int class_num_pins = -1;
+    std::vector<e_side> rr_graph_sides;
+    std::vector<e_side> arch_side_vec;
     switch (rr_type) {
         case e_rr_type::SOURCE:
         case e_rr_type::SINK:
@@ -511,6 +513,19 @@ void check_rr_node(const RRGraphView& rr_graph,
                 VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
                                 "in check_rr_node: inode %d (type %d) has a capacity of %d.\n", inode, rr_type, capacity);
             }
+            rr_graph_sides = rr_graph.node_sides(rr_node);
+            std::tie(std::ignore, std::ignore, arch_side_vec) = get_pin_coordinates(type, ptc_num, std::vector<e_side>(TOTAL_2D_SIDES.begin(), TOTAL_2D_SIDES.end()));
+            // sides in the architecture are a superset of the sides for a pin in RR Graph. We iterate over the sides stored
+            // in the RR Graph to ensure that all of them also exist in the architecture.   
+            for (size_t i = 0; i < rr_graph_sides.size(); i++) {
+                if (std::find(arch_side_vec.begin(), arch_side_vec.end(), rr_graph_sides[i]) == arch_side_vec.end()) {
+                    VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
+                                "in check_rr_node: inode %d (type %d) has a different side '%s' in the RR graph and the architecture.\n", 
+                                inode, 
+                                rr_type, 
+                                TOTAL_2D_SIDE_STRINGS[rr_graph_sides[i]]);
+                }
+            }
             break;
 
         case e_rr_type::CHANX:

libs/librrgraph/src/base/rr_graph_storage.cpp

@@ -631,6 +631,17 @@ const std::string& t_rr_graph_storage::node_direction_string(RRNodeId id) const
     return CONST_DIRECTION_STRING[int_direction];
 }
 
+
+const std::vector<e_side> t_rr_graph_storage::node_sides(RRNodeId id) const {
+    std::vector<e_side> sides;
+    for (const e_side& side : TOTAL_2D_SIDES) {
+        if (is_node_on_specific_side(id, side)) {
+            sides.push_back(side);
+        }
+    }
+    return sides;
+}
+
 const char* t_rr_graph_storage::node_side_string(RRNodeId id) const {
     for (const e_side& side : TOTAL_2D_SIDES) {
         if (is_node_on_specific_side(id, side)) {
@@ -807,7 +818,7 @@ void t_rr_graph_storage::set_node_direction(RRNodeId id, Direction new_direction
 
 void t_rr_graph_storage::add_node_side(RRNodeId id, e_side new_side) {
     if (node_type(id) != e_rr_type::IPIN && node_type(id) != e_rr_type::OPIN) {
-        VTR_LOG_ERROR("Attempted to set RR node 'side' for non-channel type '%s'", node_type_string(id));
+        VTR_LOG_ERROR("Attempted to set RR node 'side' for non-pin type '%s'", node_type_string(id));
     }
     std::bitset<NUM_2D_SIDES> side_bits = node_storage_[id].dir_side_.sides;
     side_bits[size_t(new_side)] = true;

libs/librrgraph/src/base/rr_graph_storage.h

@@ -220,6 +220,9 @@ class t_rr_graph_storage {
             id, side);
     }
 
+    /** @brief Get the sides where the node locates on. */
+    const std::vector<e_side> node_sides(RRNodeId id) const;
+
     /* FIXME: This function should be DEPRECATED!
      * Developers can easily use the following codes with more flexibility
      *