make format

Author: soheilshahrouz

libs/libarchfpga/src/grid_types.h

@@ -131,4 +131,4 @@ struct t_grid_loc_def {
 enum class e_grid_def_type {
     AUTO,
     FIXED
-};
+};

libs/libarchfpga/src/interposer_types.h

@@ -33,8 +33,8 @@ inline const std::unordered_map<char, e_interposer_cut_dim> CHAR_INTERPOSER_DIM_
  * 
  */
 struct t_interdie_wire_inf {
-    std::string sg_name;  ///< Name of the scatter-gather pattern to be used for the interdie connection
-    std::string sg_link;  ///< Name of the scatter-gather link to be used for the interdie connection
+    std::string sg_name; ///< Name of the scatter-gather pattern to be used for the interdie connection
+    std::string sg_link; ///< Name of the scatter-gather link to be used for the interdie connection
     /**
      * @brief 
      * Contains starting and ending point (both inclusive) of scatter-gather instantiations and the increment/distance between the instantiations.
@@ -43,7 +43,7 @@ struct t_interdie_wire_inf {
      * Locations defined by this offset definition define the starting point or the gathering point of the SG pattern. The end or scatter point of the SG pattern is defined by the sg_link.
      */
     t_grid_loc_spec offset_definition;
-    int num;              ///< Number of scatter-gather instantiations per switchblock location
+    int num; ///< Number of scatter-gather instantiations per switchblock location
 };
 
 /**

libs/libarchfpga/src/read_xml_arch_file.cpp

@@ -2659,7 +2659,7 @@ static void process_block_type_locs(t_grid_def& grid_def,
             }
 
             t_interposer_cut_inf interposer_cut = parse_interposer_cut_tag(loc_spec_tag, loc_data);
-            
+
             if ((interposer_cut.dim == e_interposer_cut_dim::X && interposer_cut.loc >= grid_def.height) || (interposer_cut.dim == e_interposer_cut_dim::Y && interposer_cut.loc >= grid_def.width)) {
                 archfpga_throw(loc_data.filename_c_str(), loc_data.line(loc_spec_tag), "Interposer cut dimensions are outside of device bounds");
             }

libs/libarchfpga/src/read_xml_arch_file_interposer.cpp

@@ -36,7 +36,7 @@ t_interposer_cut_inf parse_interposer_cut_tag(pugi::xml_node interposer_cut_tag,
         interdie_wire.offset_definition.start_expr = pugiutil::get_attribute(interdie_wire_tag, "offset_start", loc_data).as_string();
         interdie_wire.offset_definition.end_expr = pugiutil::get_attribute(interdie_wire_tag, "offset_end", loc_data).as_string();
         interdie_wire.offset_definition.incr_expr = pugiutil::get_attribute(interdie_wire_tag, "offset_increment", loc_data).as_string();
-        
+
         interdie_wire.num = pugiutil::get_attribute(interdie_wire_tag, "num", loc_data).as_int();
 
         interposer.interdie_wires.push_back(interdie_wire);

vpr/src/analytical_place/full_legalizer.cpp

@@ -1317,4 +1317,4 @@ void FullLegalizer::update_drawing_data_structures() {
         get_draw_state_vars()->refresh_graphic_resources_after_cluster_change();
     }
 #endif
-}
+}

vpr/src/analytical_place/full_legalizer.h

@@ -59,7 +59,7 @@ class FullLegalizer {
      *                      device grid and fixed blocks are observed.
      */
     virtual void legalize(const PartialPlacement& p_placement) = 0;
-    
+
     /// @brief Update drawing data structure for current placement
     void update_drawing_data_structures();
 

vpr/src/base/vpr_types.h

@@ -972,8 +972,8 @@ enum class e_place_delta_delay_algorithm {
  *        for the placer.
  */
 enum class e_anneal_init_t_estimator {
-    COST_VARIANCE,      ///<Estimate the initial temperature using the variance in cost of a set of trial swaps.
-    EQUILIBRIUM,        ///<Estimate the initial temperature by predicting the equilibrium temperature for the initial placement.
+    COST_VARIANCE, ///<Estimate the initial temperature using the variance in cost of a set of trial swaps.
+    EQUILIBRIUM,   ///<Estimate the initial temperature by predicting the equilibrium temperature for the initial placement.
 };
 
 enum class e_move_type;

vpr/src/place/annealer.h

@@ -139,8 +139,8 @@ class t_annealing_state {
  * @brief Struct to hold the results of a swap.
  */
 struct t_swap_result {
-    e_move_result move_result;  ///< The result of the move (e.g. Accept, Reject, etc.)
-    double delta_c;             ///< The change in cost that resulted from the swap.
+    e_move_result move_result; ///< The result of the move (e.g. Accept, Reject, etc.)
+    double delta_c;            ///< The change in cost that resulted from the swap.
 };
 
 /**

vpr/src/route/overuse_report.cpp

@@ -241,7 +241,7 @@ static void report_overused_ipin_opin(std::ostream& os,
         os << "On Tile Pin"
            << "\n";
     } else {
-        const char* pb_type_name = get_pb_graph_node_from_pin_physical_num(physical_type, rr_graph.node_ptc_num(node_id)) ->pb_type->name;
+        const char* pb_type_name = get_pb_graph_node_from_pin_physical_num(physical_type, rr_graph.node_ptc_num(node_id))->pb_type->name;
         const t_pb_graph_pin* pb_pin = get_pb_pin_from_pin_physical_num(physical_type, rr_graph.node_ptc_num(node_id));
         os << "Intra-Tile Pin - Port : " << pb_pin->port->name << " - PB Type : " << std::string(pb_type_name) << "\n";
     }

vpr/test/test_undefined_value.cpp

@@ -5,4 +5,4 @@
 // Make sure the 'unknown value' constants in VPR, LibArchFPGA and LibRRGraph are all equal to the same value (-1)
 // Ideally these values should be independent of each other, but since they might be compared with each other in
 // the project we enforce that they all have the same value.
-static_assert(UNDEFINED == -1 && ARCH_FPGA_UNDEFINED_VAL == -1 && LIBRRGRAPH_UNDEFINED_VAL == -1, "The 'undefined value' constants in VPR, LibArchFPGA and LibRRGraph all must equal -1.");
+static_assert(UNDEFINED == -1 && ARCH_FPGA_UNDEFINED_VAL == -1 && LIBRRGRAPH_UNDEFINED_VAL == -1, "The 'undefined value' constants in VPR, LibArchFPGA and LibRRGraph all must equal -1.");