Merge #440

440: update embedded-dma r=therealprof a=burrbull

No more `generic-array` in dependency tree!!!

Co-authored-by: Andrey Zgarbul <[email protected]>

Author: bors[bot]

CHANGELOG.md

@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- Use `embedded-dma` v0.2 [#440]
 - Add LSI support for `Rtc` [#438]
 - Use `time` for `Rtc` instead of `rtcc`, add `rtc` example [#436]
 - Move `i2c` `embedded-hal` trait impls to `I2c` methods [#431]
@@ -44,6 +45,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#434]: https://github.com/stm32-rs/stm32f4xx-hal/pull/434
 [#436]: https://github.com/stm32-rs/stm32f4xx-hal/pull/436
 [#438]: https://github.com/stm32-rs/stm32f4xx-hal/pull/438
+[#440]: https://github.com/stm32-rs/stm32f4xx-hal/pull/440
 
 ### Changed
 

Cargo.toml

@@ -35,7 +35,7 @@ rand_core = "0.6"
 stm32f4 = "0.14.0"
 synopsys-usb-otg = { version = "0.2.0", features = ["cortex-m"], optional = true }
 sdio-host = { version = "0.5.0", optional = true }
-embedded-dma = "0.1.2"
+embedded-dma = "0.2.0"
 bare-metal = { version = "1" }
 cast = { default-features = false, version = "0.3.0" }
 void = { default-features = false, version = "1.0.2" }

src/dma/mod.rs

@@ -15,7 +15,7 @@ use core::{
     ptr,
     sync::atomic::{compiler_fence, Ordering},
 };
-use embedded_dma::{StaticReadBuffer, StaticWriteBuffer};
+use embedded_dma::{ReadBuffer, WriteBuffer};
 
 use crate::pac::RCC;
 use crate::{pac, rcc};
@@ -889,7 +889,7 @@ where
     STREAM: Stream,
     ChannelX<CHANNEL>: Channel,
     PERIPHERAL: PeriAddress + DMASet<STREAM, MemoryToPeripheral, CHANNEL>,
-    BUF: StaticReadBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
+    BUF: ReadBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
 {
     /// Configures the DMA stream to the correct channel for the peripheral, configures source and
     /// destination and applies supplied configuration. If double buffering is enabled, the
@@ -1020,7 +1020,7 @@ where
     STREAM: Stream,
     ChannelX<CHANNEL>: Channel,
     PERIPHERAL: PeriAddress + DMASet<STREAM, PeripheralToMemory, CHANNEL> + SafePeripheralRead,
-    BUF: StaticWriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
+    BUF: WriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
 {
     /// Access the owned peripheral for reading
     pub fn peripheral(&self) -> &PERIPHERAL {
@@ -1034,7 +1034,7 @@ where
     STREAM: Stream,
     ChannelX<CHANNEL>: Channel,
     PERIPHERAL: PeriAddress + DMASet<STREAM, PeripheralToMemory, CHANNEL>,
-    BUF: StaticWriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
+    BUF: WriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
 {
     /// Configures the DMA stream to the correct channel for the peripheral, configures source and
     /// destination and applies supplied configuration. If double buffering is enabled, the
@@ -1169,7 +1169,7 @@ where
     ChannelX<CHANNEL>: Channel,
     PERIPHERAL: PeriAddress + DMASet<STREAM, MemoryToMemory<S>, CHANNEL>,
     MemoryToMemory<S>: PeriAddress,
-    BUF: StaticWriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
+    BUF: WriteBuffer<Word = <PERIPHERAL as PeriAddress>::MemSize>,
 {
     /// Configures the DMA stream to the correct channel for the peripheral, configures source and
     /// destination and applies supplied configuration. In a memory to memory transfer,

src/rtc.rs

@@ -187,13 +187,11 @@ impl Rtc<Lsi> {
     }
 
     fn enable_lsi(&mut self, rcc: &RegisterBlock) {
-        unsafe {
-            // Force a reset of the backup domain.
-            self.backup_reset(rcc);
-            // Enable the LSI.
-            rcc.csr.modify(|_, w| w.lsion().on());
-            while rcc.csr.read().lsirdy().is_not_ready() {}
-        }
+        // Force a reset of the backup domain.
+        self.backup_reset(rcc);
+        // Enable the LSI.
+        rcc.csr.modify(|_, w| w.lsion().on());
+        while rcc.csr.read().lsirdy().is_not_ready() {}
     }
 }