Skip to content

Commit 03212a1

Browse files
committed
both embedded-hals for SPI
1 parent 3cf2c5b commit 03212a1

File tree

5 files changed

+406
-154
lines changed

5 files changed

+406
-154
lines changed

src/gpio/hal_02.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ use embedded_hal::digital::v2::{
88
};
99

1010
impl From<PinState> for super::PinState {
11-
fn from(state: PinState) -> super::PinState {
11+
fn from(state: PinState) -> Self {
1212
match state {
1313
PinState::Low => Self::Low,
1414
PinState::High => Self::High,

src/gpio/hal_1.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ use embedded_hal_one::digital::blocking::{
88
pub use embedded_hal_one::digital::PinState;
99

1010
impl From<PinState> for super::PinState {
11-
fn from(state: PinState) -> super::PinState {
11+
fn from(state: PinState) -> Self {
1212
match state {
1313
PinState::Low => Self::Low,
1414
PinState::High => Self::High,

src/spi.rs

+35-152
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,36 @@ use core::ptr;
44

55
use crate::dma::traits::PeriAddress;
66
use crate::gpio::{Const, NoPin, PushPull, SetAlternate};
7-
use embedded_hal::spi;
8-
pub use embedded_hal::spi::{Mode, Phase, Polarity};
7+
8+
/// Clock polarity
9+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10+
pub enum Polarity {
11+
/// Clock signal low when idle
12+
IdleLow,
13+
/// Clock signal high when idle
14+
IdleHigh,
15+
}
16+
17+
/// Clock phase
18+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
19+
pub enum Phase {
20+
/// Data in "captured" on the first clock transition
21+
CaptureOnFirstTransition,
22+
/// Data in "captured" on the second clock transition
23+
CaptureOnSecondTransition,
24+
}
25+
26+
/// SPI mode
27+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
28+
pub struct Mode {
29+
/// Clock polarity
30+
pub polarity: Polarity,
31+
/// Clock phase
32+
pub phase: Phase,
33+
}
34+
35+
mod hal_02;
36+
mod hal_1;
937

1038
#[allow(unused)]
1139
#[cfg(feature = "gpiod")]
@@ -438,7 +466,7 @@ where
438466
pub fn new(
439467
spi: SPI,
440468
mut pins: (SCK, MISO, MOSI),
441-
mode: Mode,
469+
mode: impl Into<Mode>,
442470
freq: impl Into<Hertz>,
443471
clocks: &Clocks,
444472
) -> Self {
@@ -458,7 +486,7 @@ where
458486
pins,
459487
transfer_mode: TransferModeNormal,
460488
}
461-
.pre_init(mode, freq.into(), SPI::clock(clocks))
489+
.pre_init(mode.into(), freq.into(), SPI::clock(clocks))
462490
.init()
463491
}
464492

@@ -480,7 +508,7 @@ where
480508
pub fn new_bidi(
481509
spi: SPI,
482510
mut pins: (SCK, MISO, MOSI),
483-
mode: Mode,
511+
mode: impl Into<Mode>,
484512
freq: impl Into<Hertz>,
485513
clocks: &Clocks,
486514
) -> Self {
@@ -500,7 +528,7 @@ where
500528
pins,
501529
transfer_mode: TransferModeBidi,
502530
}
503-
.pre_init(mode, freq.into(), SPI::clock(&clocks))
531+
.pre_init(mode.into(), freq.into(), SPI::clock(&clocks))
504532
.init()
505533
}
506534

@@ -593,7 +621,7 @@ where
593621
}
594622

595623
/// Pre initializing the SPI bus.
596-
pub fn pre_init(self, mode: Mode, freq: Hertz, clock: Hertz) -> Self {
624+
fn pre_init(self, mode: Mode, freq: Hertz, clock: Hertz) -> Self {
597625
// disable SS output
598626
self.spi.cr2.write(|w| w.ssoe().clear_bit());
599627

@@ -809,148 +837,3 @@ where
809837

810838
type MemSize = u8;
811839
}
812-
813-
impl<SPI, PINS> spi::FullDuplex<u8> for Spi<SPI, PINS, TransferModeNormal>
814-
where
815-
SPI: Instance,
816-
{
817-
type Error = Error;
818-
819-
fn read(&mut self) -> nb::Result<u8, Error> {
820-
self.check_read()
821-
}
822-
823-
fn send(&mut self, byte: u8) -> nb::Result<(), Error> {
824-
self.check_send(byte)
825-
}
826-
}
827-
828-
impl<SPI, PINS> spi::FullDuplex<u8> for Spi<SPI, PINS, TransferModeBidi>
829-
where
830-
SPI: Instance,
831-
{
832-
type Error = Error;
833-
834-
fn read(&mut self) -> nb::Result<u8, Error> {
835-
self.spi.cr1.modify(|_, w| w.bidioe().clear_bit());
836-
self.check_read()
837-
}
838-
839-
fn send(&mut self, byte: u8) -> nb::Result<(), Error> {
840-
self.spi.cr1.modify(|_, w| w.bidioe().set_bit());
841-
self.check_send(byte)
842-
}
843-
}
844-
845-
mod blocking {
846-
use super::{Error, Instance, Spi, TransferModeBidi, TransferModeNormal};
847-
use embedded_hal::blocking::spi::{Operation, Transactional, Transfer, Write, WriteIter};
848-
use embedded_hal::spi::FullDuplex;
849-
850-
impl<SPI, PINS, TRANSFER_MODE> Transfer<u8> for Spi<SPI, PINS, TRANSFER_MODE>
851-
where
852-
Self: FullDuplex<u8, Error = Error>,
853-
SPI: Instance,
854-
{
855-
type Error = Error;
856-
857-
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
858-
for word in words.iter_mut() {
859-
nb::block!(self.send(*word))?;
860-
*word = nb::block!(self.read())?;
861-
}
862-
863-
Ok(words)
864-
}
865-
}
866-
867-
impl<SPI, PINS> Write<u8> for Spi<SPI, PINS, TransferModeNormal>
868-
where
869-
Self: FullDuplex<u8, Error = Error>,
870-
SPI: Instance,
871-
{
872-
type Error = Error;
873-
874-
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
875-
for word in words {
876-
nb::block!(self.send(*word))?;
877-
nb::block!(self.read())?;
878-
}
879-
880-
Ok(())
881-
}
882-
}
883-
884-
impl<SPI, PINS> Write<u8> for Spi<SPI, PINS, TransferModeBidi>
885-
where
886-
Self: FullDuplex<u8, Error = Error>,
887-
SPI: Instance,
888-
{
889-
type Error = Error;
890-
891-
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
892-
for word in words {
893-
nb::block!(self.send(*word))?;
894-
}
895-
896-
Ok(())
897-
}
898-
}
899-
900-
impl<SPI, PINS> WriteIter<u8> for Spi<SPI, PINS, TransferModeNormal>
901-
where
902-
Self: FullDuplex<u8, Error = Error>,
903-
SPI: Instance,
904-
{
905-
type Error = Error;
906-
907-
fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
908-
where
909-
WI: IntoIterator<Item = u8>,
910-
{
911-
for word in words.into_iter() {
912-
nb::block!(self.send(word))?;
913-
nb::block!(self.read())?;
914-
}
915-
916-
Ok(())
917-
}
918-
}
919-
920-
impl<SPI, PINS> WriteIter<u8> for Spi<SPI, PINS, TransferModeBidi>
921-
where
922-
Self: FullDuplex<u8, Error = Error>,
923-
SPI: Instance,
924-
{
925-
type Error = Error;
926-
927-
fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
928-
where
929-
WI: IntoIterator<Item = u8>,
930-
{
931-
for word in words.into_iter() {
932-
nb::block!(self.send(word))?;
933-
}
934-
935-
Ok(())
936-
}
937-
}
938-
939-
impl<SPI, PINS, TRANSFER_MODE, W: 'static> Transactional<W> for Spi<SPI, PINS, TRANSFER_MODE>
940-
where
941-
Self: Write<W, Error = Error> + Transfer<W, Error = Error>,
942-
{
943-
type Error = Error;
944-
945-
fn exec<'a>(&mut self, operations: &mut [Operation<'a, W>]) -> Result<(), Error> {
946-
for op in operations {
947-
match op {
948-
Operation::Write(w) => self.write(w)?,
949-
Operation::Transfer(t) => self.transfer(t).map(|_| ())?,
950-
}
951-
}
952-
953-
Ok(())
954-
}
955-
}
956-
}

0 commit comments

Comments
 (0)