Fix spelling of ARM Cortex

It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn
or CortexXn. Further it's Cortex-M0+, not M0plus.

Cf. http://www.arm.com/products/processors/index.php

Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.

Found via:

  git grep -i "Cortex "
  git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu"
  git grep -i "CortexM"

Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3483
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

Author: afaerber

NEWTAPS

@@ -77,7 +77,7 @@ This is always a 32bit hex number.
 Examples:
     0x1f0f0f0f - is an old ARM7TDMI
     0x3f0f0f0f - is a newer ARM7TDMI
-    0x3ba00477 - is an ARM cortex M3
+    0x3ba00477 - is an ARM Cortex-M3
 
 Some chips have multiple JTAG taps - be sure to list
 each one individually - ORDER is important!

TODO

@@ -170,9 +170,9 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
   garabage.
   - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
 - Thumb2 single stepping: ARM1156T2 needs simulator support
-- Cortex A8 support (ML)
+- Cortex-A8 support (ML)
   - add target implementation (ML)
-- Cortex M3 support
+- Cortex-M3 support
   - when stepping, only write dirtied registers (be faster)
   - when connecting to halted core, fetch registers (startup is quirky)
 - Generic ARM run_algorithm() interface