diff --git a/Cargo.lock b/Cargo.lock index 02459afa90726..63c7d97bce43f 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -184,9 +184,9 @@ checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "askama" -version = "0.15.4" +version = "0.15.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "08e1676b346cadfec169374f949d7490fd80a24193d37d2afce0c047cf695e57" +checksum = "03341eae1125472b0672fbf35cc9aa7b74cd8e0c3d02f02c28a04678f12aaa7a" dependencies = [ "askama_macros", "itoa", @@ -197,9 +197,9 @@ dependencies = [ [[package]] name = "askama_derive" -version = "0.15.4" +version = "0.15.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7661ff56517787343f376f75db037426facd7c8d3049cef8911f1e75016f3a37" +checksum = "461bd78f3da90b5e44eee4272cfb1c4832aa3dcdb6c370aedd3eb253d2b9e3ca" dependencies = [ "askama_parser", "basic-toml", @@ -214,18 +214,18 @@ dependencies = [ [[package]] name = "askama_macros" -version = "0.15.4" +version = "0.15.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "713ee4dbfd1eb719c2dab859465b01fa1d21cb566684614a713a6b7a99a4e47b" +checksum = "ba49fb22ee3074574b8510abd9495d4f0bb9b8f87e8e45ee31e2cee508f7a8e5" dependencies = [ "askama_derive", ] [[package]] name = "askama_parser" -version = "0.15.4" +version = "0.15.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1d62d674238a526418b30c0def480d5beadb9d8964e7f38d635b03bf639c704c" +checksum = "7e33eb7484958aaa1f27e9adb556f5d557331cd891bdbb33781bc1f9550b6f6e" dependencies = [ "rustc-hash 2.1.1", "serde", @@ -580,9 +580,9 @@ dependencies = [ [[package]] name = "clap" -version = "4.5.54" +version = "4.5.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c6e6ff9dcd79cff5cd969a17a545d79e84ab086e444102a591e288a8aa3ce394" +checksum = "4c26d721170e0295f191a69bd9a1f93efcdb0aff38684b61ab5750468972e5f5" dependencies = [ "clap_builder", "clap_derive", @@ -600,9 +600,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.5.54" +version = "4.5.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fa42cf4d2b7a41bc8f663a7cab4031ebafa1bf3875705bfaf8466dc60ab52c00" +checksum = "75835f0c7bf681bfd05abe44e965760fea999a5286c6eb2d59883634fd02011a" dependencies = [ "anstream", "anstyle", @@ -4354,6 +4354,7 @@ name = "rustc_mir_transform" version = "0.0.0" dependencies = [ "either", + "hashbrown 0.16.1", "itertools", "rustc_abi", "rustc_arena", @@ -4564,6 +4565,7 @@ dependencies = [ name = "rustc_query_system" version = "0.0.0" dependencies = [ + "hashbrown 0.16.1", "parking_lot", "rustc_abi", "rustc_ast", @@ -5621,7 +5623,6 @@ version = "0.1.0" dependencies = [ "build_helper", "cargo_metadata 0.21.0", - "clap", "fluent-syntax", "globset", "ignore", diff --git a/compiler/rustc_arena/src/lib.rs b/compiler/rustc_arena/src/lib.rs index 6217bf46a942d..5e81ec28ee35f 100644 --- a/compiler/rustc_arena/src/lib.rs +++ b/compiler/rustc_arena/src/lib.rs @@ -172,22 +172,8 @@ impl TypedArena { available_bytes >= additional_bytes } - /// Allocates storage for `len >= 1` values in this arena, and returns a - /// raw pointer to the first value's storage. - /// - /// # Safety - /// - /// Caller must initialize each of the `len` slots to a droppable value - /// before the arena is dropped. - /// - /// In practice, this typically means that the caller must be able to - /// raw-copy `len` already-initialized values into the slice without any - /// possibility of panicking. - /// - /// FIXME(Zalathar): This is *very* fragile; perhaps we need a different - /// approach to arena-allocating slices of droppable values. #[inline] - unsafe fn alloc_raw_slice(&self, len: usize) -> *mut T { + fn alloc_raw_slice(&self, len: usize) -> *mut T { assert!(size_of::() != 0); assert!(len != 0); @@ -222,7 +208,7 @@ impl TypedArena { &self, iter: impl IntoIterator>, ) -> Result<&mut [T], E> { - // Despite the similarity with `DroplessArena`, we cannot reuse their fast case. The reason + // Despite the similarlty with `DroplessArena`, we cannot reuse their fast case. The reason // is subtle: these arenas are reentrant. In other words, `iter` may very well be holding a // reference to `self` and adding elements to the arena during iteration. // @@ -243,15 +229,9 @@ impl TypedArena { } // Move the content to the arena by copying and then forgetting it. let len = vec.len(); - - // SAFETY: After allocating raw storage for exactly `len` values, we - // must fully initialize the storage without panicking, and we must - // also prevent the stale values in the vec from being dropped. + let start_ptr = self.alloc_raw_slice(len); Ok(unsafe { - let start_ptr = self.alloc_raw_slice(len); - // Initialize the newly-allocated storage without panicking. vec.as_ptr().copy_to_nonoverlapping(start_ptr, len); - // Prevent the stale values in the vec from being dropped. vec.set_len(0); slice::from_raw_parts_mut(start_ptr, len) }) @@ -510,6 +490,19 @@ impl DroplessArena { } } + /// Used by `Lift` to check whether this slice is allocated + /// in this arena. + #[inline] + pub fn contains_slice(&self, slice: &[T]) -> bool { + for chunk in self.chunks.borrow_mut().iter_mut() { + let ptr = slice.as_ptr().cast::().cast_mut(); + if chunk.start() <= ptr && chunk.end() >= ptr { + return true; + } + } + false + } + /// Allocates a string slice that is copied into the `DroplessArena`, returning a /// reference to it. Will panic if passed an empty string. /// @@ -591,7 +584,7 @@ impl DroplessArena { &self, iter: impl IntoIterator>, ) -> Result<&mut [T], E> { - // Despite the similarity with `alloc_from_iter`, we cannot reuse their fast case, as we + // Despite the similarlty with `alloc_from_iter`, we cannot reuse their fast case, as we // cannot know the minimum length of the iterator in this case. assert!(size_of::() != 0); diff --git a/compiler/rustc_ast_pretty/src/pprust/state.rs b/compiler/rustc_ast_pretty/src/pprust/state.rs index c8874ed99dca9..e50e31c226fdb 100644 --- a/compiler/rustc_ast_pretty/src/pprust/state.rs +++ b/compiler/rustc_ast_pretty/src/pprust/state.rs @@ -1961,8 +1961,7 @@ impl<'a> State<'a> { } fn print_lifetime(&mut self, lifetime: ast::Lifetime) { - self.word(lifetime.ident.name.to_string()); - self.ann_post(lifetime.ident) + self.print_name(lifetime.ident.name) } fn print_lifetime_bounds(&mut self, bounds: &ast::GenericBounds) { diff --git a/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs b/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs index d825d770fa357..7323db06a8f1f 100644 --- a/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs +++ b/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs @@ -57,7 +57,7 @@ impl CombineAttributeParser for AllowConstFnUnstableParser { const PATH: &[Symbol] = &[sym::rustc_allow_const_fn_unstable]; type Item = Symbol; const CONVERT: ConvertFn = - |items, first_span| AttributeKind::RustcAllowConstFnUnstable(items, first_span); + |items, first_span| AttributeKind::AllowConstFnUnstable(items, first_span); const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[ Allow(Target::Fn), Allow(Target::Method(MethodKind::Inherent)), diff --git a/compiler/rustc_attr_parsing/src/attributes/codegen_attrs.rs b/compiler/rustc_attr_parsing/src/attributes/codegen_attrs.rs index 485307622291e..063fa12d38961 100644 --- a/compiler/rustc_attr_parsing/src/attributes/codegen_attrs.rs +++ b/compiler/rustc_attr_parsing/src/attributes/codegen_attrs.rs @@ -181,7 +181,7 @@ impl SingleAttributeParser for ObjcClassParser { cx.emit_err(NullOnObjcClass { span: nv.value_span }); return None; } - Some(AttributeKind::RustcObjcClass { classname, span: cx.attr_span }) + Some(AttributeKind::ObjcClass { classname, span: cx.attr_span }) } } @@ -213,7 +213,7 @@ impl SingleAttributeParser for ObjcSelectorParser { cx.emit_err(NullOnObjcSelector { span: nv.value_span }); return None; } - Some(AttributeKind::RustcObjcSelector { methname, span: cx.attr_span }) + Some(AttributeKind::ObjcSelector { methname, span: cx.attr_span }) } } diff --git a/compiler/rustc_attr_parsing/src/attributes/confusables.rs b/compiler/rustc_attr_parsing/src/attributes/confusables.rs index 1897fed1e250f..0b7ac989346a4 100644 --- a/compiler/rustc_attr_parsing/src/attributes/confusables.rs +++ b/compiler/rustc_attr_parsing/src/attributes/confusables.rs @@ -43,7 +43,7 @@ impl AttributeParser for ConfusablesParser { return None; } - Some(AttributeKind::RustcConfusables { + Some(AttributeKind::Confusables { symbols: self.confusables, first_span: self.first_span.unwrap(), }) diff --git a/compiler/rustc_attr_parsing/src/attributes/dummy.rs b/compiler/rustc_attr_parsing/src/attributes/dummy.rs index 9f97af48afa05..0a7d95f31799d 100644 --- a/compiler/rustc_attr_parsing/src/attributes/dummy.rs +++ b/compiler/rustc_attr_parsing/src/attributes/dummy.rs @@ -16,6 +16,6 @@ impl SingleAttributeParser for DummyParser { const TEMPLATE: AttributeTemplate = template!(Word); // Anything, really fn convert(_: &mut AcceptContext<'_, '_, S>, _: &ArgParser) -> Option { - Some(AttributeKind::RustcDummy) + Some(AttributeKind::Dummy) } } diff --git a/compiler/rustc_attr_parsing/src/attributes/link_attrs.rs b/compiler/rustc_attr_parsing/src/attributes/link_attrs.rs index 548f53a986b8f..a636b449ca569 100644 --- a/compiler/rustc_attr_parsing/src/attributes/link_attrs.rs +++ b/compiler/rustc_attr_parsing/src/attributes/link_attrs.rs @@ -529,7 +529,7 @@ impl NoArgsAttributeParser for StdInternalSymbolParser { Allow(Target::Static), Allow(Target::ForeignStatic), ]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcStdInternalSymbol; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::StdInternalSymbol; } pub(crate) struct LinkOrdinalParser; diff --git a/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs b/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs index 60e83a6083ede..8ca5f0f7228e3 100644 --- a/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs +++ b/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs @@ -11,7 +11,7 @@ impl NoArgsAttributeParser for AsPtrParser { Allow(Target::Method(MethodKind::Trait { body: true })), Allow(Target::Method(MethodKind::TraitImpl)), ]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcAsPtr; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::AsPtr; } pub(crate) struct PubTransparentParser; @@ -23,7 +23,7 @@ impl NoArgsAttributeParser for PubTransparentParser { Allow(Target::Enum), Allow(Target::Union), ]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcPubTransparent; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::PubTransparent; } pub(crate) struct PassByValueParser; @@ -35,7 +35,7 @@ impl NoArgsAttributeParser for PassByValueParser { Allow(Target::Enum), Allow(Target::TyAlias), ]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcPassByValue; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::PassByValue; } pub(crate) struct RustcShouldNotBeCalledOnConstItems; diff --git a/compiler/rustc_attr_parsing/src/attributes/rustc_internal.rs b/compiler/rustc_attr_parsing/src/attributes/rustc_internal.rs index 38f728fa9f559..365cd55bdc38b 100644 --- a/compiler/rustc_attr_parsing/src/attributes/rustc_internal.rs +++ b/compiler/rustc_attr_parsing/src/attributes/rustc_internal.rs @@ -1,5 +1,4 @@ use rustc_ast::{LitIntType, LitKind, MetaItemLit}; -use rustc_hir::attrs::RustcLayoutType; use rustc_session::errors; use super::prelude::*; @@ -330,73 +329,3 @@ impl NoArgsAttributeParser for RustcOffloadKernelParser { const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Fn)]); const CREATE: fn(Span) -> AttributeKind = |_| AttributeKind::RustcOffloadKernel; } - -pub(crate) struct RustcLayoutParser; - -impl CombineAttributeParser for RustcLayoutParser { - const PATH: &[rustc_span::Symbol] = &[sym::rustc_layout]; - - type Item = RustcLayoutType; - - const CONVERT: ConvertFn = |items, _| AttributeKind::RustcLayout(items); - - const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[ - Allow(Target::Struct), - Allow(Target::Enum), - Allow(Target::Union), - Allow(Target::TyAlias), - ]); - - const TEMPLATE: AttributeTemplate = - template!(List: &["abi", "align", "size", "homogenous_aggregate", "debug"]); - - fn extend( - cx: &mut AcceptContext<'_, '_, S>, - args: &ArgParser, - ) -> impl IntoIterator { - let ArgParser::List(items) = args else { - cx.expected_list(cx.attr_span, args); - return vec![]; - }; - - let mut result = Vec::new(); - for item in items.mixed() { - let Some(arg) = item.meta_item() else { - cx.unexpected_literal(item.span()); - continue; - }; - let Some(ident) = arg.ident() else { - cx.expected_identifier(arg.span()); - return vec![]; - }; - let ty = match ident.name { - sym::abi => RustcLayoutType::Abi, - sym::align => RustcLayoutType::Align, - sym::size => RustcLayoutType::Size, - sym::homogeneous_aggregate => RustcLayoutType::HomogenousAggregate, - sym::debug => RustcLayoutType::Debug, - _ => { - cx.expected_specific_argument( - ident.span, - &[sym::abi, sym::align, sym::size, sym::homogeneous_aggregate, sym::debug], - ); - continue; - } - }; - result.push(ty); - } - result - } -} - -pub(crate) struct RustcNonConstTraitMethodParser; - -impl NoArgsAttributeParser for RustcNonConstTraitMethodParser { - const PATH: &'static [Symbol] = &[sym::rustc_non_const_trait_method]; - const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; - const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[ - Allow(Target::Method(MethodKind::Trait { body: true })), - Allow(Target::Method(MethodKind::Trait { body: false })), - ]); - const CREATE: fn(Span) -> AttributeKind = |_| AttributeKind::RustcNonConstTraitMethod; -} diff --git a/compiler/rustc_attr_parsing/src/attributes/stability.rs b/compiler/rustc_attr_parsing/src/attributes/stability.rs index 1f01cadcb43ef..8d27e2e276dd1 100644 --- a/compiler/rustc_attr_parsing/src/attributes/stability.rs +++ b/compiler/rustc_attr_parsing/src/attributes/stability.rs @@ -173,7 +173,7 @@ impl AttributeParser for BodyStabilityParser { fn finalize(self, _cx: &FinalizeContext<'_, '_, S>) -> Option { let (stability, span) = self.stability?; - Some(AttributeKind::RustcBodyStability { stability, span }) + Some(AttributeKind::BodyStability { stability, span }) } } @@ -185,7 +185,7 @@ impl NoArgsAttributeParser for ConstStabilityIndirectParser { Allow(Target::Fn), Allow(Target::Method(MethodKind::Inherent)), ]); - const CREATE: fn(Span) -> AttributeKind = |_| AttributeKind::RustcConstStabilityIndirect; + const CREATE: fn(Span) -> AttributeKind = |_| AttributeKind::ConstStabilityIndirect; } #[derive(Default)] @@ -258,7 +258,7 @@ impl AttributeParser for ConstStabilityParser { let (stability, span) = self.stability?; - Some(AttributeKind::RustcConstStability { stability, span }) + Some(AttributeKind::ConstStability { stability, span }) } } diff --git a/compiler/rustc_attr_parsing/src/attributes/traits.rs b/compiler/rustc_attr_parsing/src/attributes/traits.rs index bfea02e789a03..c0db5b4d442a9 100644 --- a/compiler/rustc_attr_parsing/src/attributes/traits.rs +++ b/compiler/rustc_attr_parsing/src/attributes/traits.rs @@ -50,11 +50,7 @@ impl SingleAttributeParser for SkipDuringMethodDispatchParser { cx.duplicate_key(arg.span(), key); } } - Some(AttributeKind::RustcSkipDuringMethodDispatch { - array, - boxed_slice, - span: cx.attr_span, - }) + Some(AttributeKind::SkipDuringMethodDispatch { array, boxed_slice, span: cx.attr_span }) } } @@ -63,7 +59,7 @@ impl NoArgsAttributeParser for ParenSugarParser { const PATH: &[Symbol] = &[sym::rustc_paren_sugar]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcParenSugar; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::ParenSugar; } pub(crate) struct TypeConstParser; @@ -95,7 +91,7 @@ impl NoArgsAttributeParser for DenyExplicitImplParser { const PATH: &[Symbol] = &[sym::rustc_deny_explicit_impl]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcDenyExplicitImpl; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::DenyExplicitImpl; } pub(crate) struct DynIncompatibleTraitParser; @@ -103,7 +99,7 @@ impl NoArgsAttributeParser for DynIncompatibleTraitParser { const PATH: &[Symbol] = &[sym::rustc_dyn_incompatible_trait]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcDynIncompatibleTrait; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::DynIncompatibleTrait; } // Specialization @@ -113,7 +109,7 @@ impl NoArgsAttributeParser for SpecializationTraitParser { const PATH: &[Symbol] = &[sym::rustc_specialization_trait]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcSpecializationTrait; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::SpecializationTrait; } pub(crate) struct UnsafeSpecializationMarkerParser; @@ -121,7 +117,7 @@ impl NoArgsAttributeParser for UnsafeSpecializationMarkerParser { const PATH: &[Symbol] = &[sym::rustc_unsafe_specialization_marker]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcUnsafeSpecializationMarker; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::UnsafeSpecializationMarker; } // Coherence @@ -131,7 +127,7 @@ impl NoArgsAttributeParser for CoinductiveParser { const PATH: &[Symbol] = &[sym::rustc_coinductive]; const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Trait)]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcCoinductive; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::Coinductive; } pub(crate) struct AllowIncoherentImplParser; @@ -140,7 +136,7 @@ impl NoArgsAttributeParser for AllowIncoherentImplParser { const ON_DUPLICATE: OnDuplicate = OnDuplicate::Error; const ALLOWED_TARGETS: AllowedTargets = AllowedTargets::AllowList(&[Allow(Target::Method(MethodKind::Inherent))]); - const CREATE: fn(Span) -> AttributeKind = AttributeKind::RustcAllowIncoherentImpl; + const CREATE: fn(Span) -> AttributeKind = AttributeKind::AllowIncoherentImpl; } pub(crate) struct FundamentalParser; diff --git a/compiler/rustc_attr_parsing/src/attributes/transparency.rs b/compiler/rustc_attr_parsing/src/attributes/transparency.rs index 7fa4487b7c691..5b8b3cd151eb9 100644 --- a/compiler/rustc_attr_parsing/src/attributes/transparency.rs +++ b/compiler/rustc_attr_parsing/src/attributes/transparency.rs @@ -32,6 +32,6 @@ impl SingleAttributeParser for TransparencyParser { } None => None, } - .map(AttributeKind::RustcMacroTransparency) + .map(AttributeKind::MacroTransparency) } } diff --git a/compiler/rustc_attr_parsing/src/context.rs b/compiler/rustc_attr_parsing/src/context.rs index 0cabc0895053e..20bdfa45a013d 100644 --- a/compiler/rustc_attr_parsing/src/context.rs +++ b/compiler/rustc_attr_parsing/src/context.rs @@ -75,13 +75,13 @@ use crate::attributes::rustc_dump::{ RustcDumpVtable, }; use crate::attributes::rustc_internal::{ - RustcHasIncoherentInherentImplsParser, RustcLayoutParser, RustcLayoutScalarValidRangeEndParser, + RustcHasIncoherentInherentImplsParser, RustcLayoutScalarValidRangeEndParser, RustcLayoutScalarValidRangeStartParser, RustcLegacyConstGenericsParser, RustcLintOptDenyFieldAccessParser, RustcLintOptTyParser, RustcLintQueryInstabilityParser, RustcLintUntrackedQueryInformationParser, RustcMainParser, RustcMustImplementOneOfParser, - RustcNeverReturnsNullPointerParser, RustcNoImplicitAutorefsParser, - RustcNonConstTraitMethodParser, RustcNounwindParser, RustcObjectLifetimeDefaultParser, - RustcOffloadKernelParser, RustcScalableVectorParser, RustcSimdMonomorphizeLaneLimitParser, + RustcNeverReturnsNullPointerParser, RustcNoImplicitAutorefsParser, RustcNounwindParser, + RustcObjectLifetimeDefaultParser, RustcOffloadKernelParser, RustcScalableVectorParser, + RustcSimdMonomorphizeLaneLimitParser, }; use crate::attributes::semantics::MayDangleParser; use crate::attributes::stability::{ @@ -198,7 +198,6 @@ attribute_parsers!( Combine, Combine, Combine, - Combine, Combine, Combine, // tidy-alphabetical-end @@ -305,7 +304,6 @@ attribute_parsers!( Single>, Single>, Single>, - Single>, Single>, Single>, Single>, diff --git a/compiler/rustc_attr_parsing/src/target_checking.rs b/compiler/rustc_attr_parsing/src/target_checking.rs index fb005477f0fa1..79aa06e9475c1 100644 --- a/compiler/rustc_attr_parsing/src/target_checking.rs +++ b/compiler/rustc_attr_parsing/src/target_checking.rs @@ -205,7 +205,7 @@ pub(crate) fn allowed_targets_applied( ]; const IMPL_LIKE: &[Target] = &[Target::Impl { of_trait: false }, Target::Impl { of_trait: true }]; - const ADT_LIKE: &[Target] = &[Target::Struct, Target::Enum, Target::Union]; + const ADT_LIKE: &[Target] = &[Target::Struct, Target::Enum]; let mut added_fake_targets = Vec::new(); filter_targets( diff --git a/compiler/rustc_borrowck/src/diagnostics/bound_region_errors.rs b/compiler/rustc_borrowck/src/diagnostics/bound_region_errors.rs index 6ed07cf9b1c8c..254d28d243ff2 100644 --- a/compiler/rustc_borrowck/src/diagnostics/bound_region_errors.rs +++ b/compiler/rustc_borrowck/src/diagnostics/bound_region_errors.rs @@ -169,7 +169,7 @@ pub(crate) trait TypeOpInfo<'tcx> { let placeholder_region = ty::Region::new_placeholder( tcx, - ty::PlaceholderRegion::new(adjusted_universe.into(), placeholder.bound), + ty::Placeholder::new(adjusted_universe.into(), placeholder.bound), ); let error_region = @@ -179,7 +179,7 @@ pub(crate) trait TypeOpInfo<'tcx> { adjusted_universe.map(|adjusted| { ty::Region::new_placeholder( tcx, - ty::PlaceholderRegion::new(adjusted.into(), error_placeholder.bound), + ty::Placeholder::new(adjusted.into(), error_placeholder.bound), ) }) } else { diff --git a/compiler/rustc_borrowck/src/diagnostics/move_errors.rs b/compiler/rustc_borrowck/src/diagnostics/move_errors.rs index 986ade57fb31d..f83931d375996 100644 --- a/compiler/rustc_borrowck/src/diagnostics/move_errors.rs +++ b/compiler/rustc_borrowck/src/diagnostics/move_errors.rs @@ -1,4 +1,3 @@ -use rustc_abi::FieldIdx; use rustc_data_structures::fx::FxHashSet; use rustc_errors::{Applicability, Diag}; use rustc_hir::intravisit::Visitor; @@ -8,7 +7,7 @@ use rustc_middle::mir::*; use rustc_middle::ty::{self, Ty, TyCtxt}; use rustc_mir_dataflow::move_paths::{LookupResult, MovePathIndex}; use rustc_span::def_id::DefId; -use rustc_span::{BytePos, ExpnKind, MacroKind, Span}; +use rustc_span::{BytePos, DUMMY_SP, ExpnKind, MacroKind, Span}; use rustc_trait_selection::error_reporting::traits::FindExprBySpan; use rustc_trait_selection::infer::InferCtxtExt; use tracing::debug; @@ -473,30 +472,49 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> { if def_id.as_local() == Some(self.mir_def_id()) && let Some(upvar_field) = upvar_field => { - self.report_closure_move_error( - span, - move_place, - *def_id, - closure_args.as_closure().kind_ty(), - upvar_field, - ty::Asyncness::No, - ) - } - ty::CoroutineClosure(def_id, closure_args) - if def_id.as_local() == Some(self.mir_def_id()) - && let Some(upvar_field) = upvar_field - && self - .get_closure_bound_clause_span(*def_id, ty::Asyncness::Yes) - .is_some() => - { - self.report_closure_move_error( - span, - move_place, - *def_id, - closure_args.as_coroutine_closure().kind_ty(), - upvar_field, - ty::Asyncness::Yes, - ) + let closure_kind_ty = closure_args.as_closure().kind_ty(); + let closure_kind = match closure_kind_ty.to_opt_closure_kind() { + Some(kind @ (ty::ClosureKind::Fn | ty::ClosureKind::FnMut)) => kind, + Some(ty::ClosureKind::FnOnce) => { + bug!("closure kind does not match first argument type") + } + None => bug!("closure kind not inferred by borrowck"), + }; + let capture_description = + format!("captured variable in an `{closure_kind}` closure"); + + let upvar = &self.upvars[upvar_field.index()]; + let upvar_hir_id = upvar.get_root_variable(); + let upvar_name = upvar.to_string(tcx); + let upvar_span = tcx.hir_span(upvar_hir_id); + + let place_name = self.describe_any_place(move_place.as_ref()); + + let place_description = + if self.is_upvar_field_projection(move_place.as_ref()).is_some() { + format!("{place_name}, a {capture_description}") + } else { + format!("{place_name}, as `{upvar_name}` is a {capture_description}") + }; + + debug!( + "report: closure_kind_ty={:?} closure_kind={:?} place_description={:?}", + closure_kind_ty, closure_kind, place_description, + ); + + let closure_span = tcx.def_span(def_id); + + self.cannot_move_out_of(span, &place_description) + .with_span_label(upvar_span, "captured outer variable") + .with_span_label( + closure_span, + format!("captured by this `{closure_kind}` closure"), + ) + .with_span_help( + self.get_closure_bound_clause_span(*def_id), + "`Fn` and `FnMut` closures require captured values to be able to be \ + consumed multiple times, but `FnOnce` closures may consume them only once", + ) } _ => { let source = self.borrowed_content_source(deref_base); @@ -545,134 +563,45 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> { err } - fn report_closure_move_error( - &self, - span: Span, - move_place: Place<'tcx>, - def_id: DefId, - closure_kind_ty: Ty<'tcx>, - upvar_field: FieldIdx, - asyncness: ty::Asyncness, - ) -> Diag<'infcx> { - let tcx = self.infcx.tcx; - - let closure_kind = match closure_kind_ty.to_opt_closure_kind() { - Some(kind @ (ty::ClosureKind::Fn | ty::ClosureKind::FnMut)) => kind, - Some(ty::ClosureKind::FnOnce) => { - bug!("closure kind does not match first argument type") - } - None => bug!("closure kind not inferred by borrowck"), - }; - - let async_prefix = if asyncness.is_async() { "Async" } else { "" }; - let capture_description = - format!("captured variable in an `{async_prefix}{closure_kind}` closure"); - - let upvar = &self.upvars[upvar_field.index()]; - let upvar_hir_id = upvar.get_root_variable(); - let upvar_name = upvar.to_string(tcx); - let upvar_span = tcx.hir_span(upvar_hir_id); - - let place_name = self.describe_any_place(move_place.as_ref()); - - let place_description = if self.is_upvar_field_projection(move_place.as_ref()).is_some() { - format!("{place_name}, a {capture_description}") - } else { - format!("{place_name}, as `{upvar_name}` is a {capture_description}") - }; - - debug!(?closure_kind_ty, ?closure_kind, ?place_description); - - let closure_span = tcx.def_span(def_id); - - let help_msg = format!( - "`{async_prefix}Fn` and `{async_prefix}FnMut` closures require captured values to \ - be able to be consumed multiple times, but `{async_prefix}FnOnce` closures may \ - consume them only once" - ); - - let mut err = self - .cannot_move_out_of(span, &place_description) - .with_span_label(upvar_span, "captured outer variable") - .with_span_label( - closure_span, - format!("captured by this `{async_prefix}{closure_kind}` closure"), - ); - - if let Some(bound_span) = self.get_closure_bound_clause_span(def_id, asyncness) { - err.span_help(bound_span, help_msg); - } else if !asyncness.is_async() { - // For sync closures, always emit the help message even without a span. - // For async closures, we only enter this branch if we found a valid span - // (due to the match guard), so no fallback is needed. - err.help(help_msg); - } - - err - } - - fn get_closure_bound_clause_span( - &self, - def_id: DefId, - asyncness: ty::Asyncness, - ) -> Option { + fn get_closure_bound_clause_span(&self, def_id: DefId) -> Span { let tcx = self.infcx.tcx; let typeck_result = tcx.typeck(self.mir_def_id()); // Check whether the closure is an argument to a call, if so, // get the instantiated where-bounds of that call. let closure_hir_id = tcx.local_def_id_to_hir_id(def_id.expect_local()); - let hir::Node::Expr(parent) = tcx.parent_hir_node(closure_hir_id) else { return None }; + let hir::Node::Expr(parent) = tcx.parent_hir_node(closure_hir_id) else { return DUMMY_SP }; let predicates = match parent.kind { hir::ExprKind::Call(callee, _) => { - let ty = typeck_result.node_type_opt(callee.hir_id)?; - let ty::FnDef(fn_def_id, args) = ty.kind() else { return None }; + let Some(ty) = typeck_result.node_type_opt(callee.hir_id) else { return DUMMY_SP }; + let ty::FnDef(fn_def_id, args) = ty.kind() else { return DUMMY_SP }; tcx.predicates_of(fn_def_id).instantiate(tcx, args) } hir::ExprKind::MethodCall(..) => { - let (_, method) = typeck_result.type_dependent_def(parent.hir_id)?; + let Some((_, method)) = typeck_result.type_dependent_def(parent.hir_id) else { + return DUMMY_SP; + }; let args = typeck_result.node_args(parent.hir_id); tcx.predicates_of(method).instantiate(tcx, args) } - _ => return None, + _ => return DUMMY_SP, }; - // Check whether one of the where-bounds requires the closure to impl `Fn[Mut]` - // or `AsyncFn[Mut]`. + // Check whether one of the where-bounds requires the closure to impl `Fn[Mut]`. for (pred, span) in predicates.predicates.iter().zip(predicates.spans.iter()) { - let dominated_by_fn_trait = self - .closure_clause_kind(*pred, def_id, asyncness) - .is_some_and(|kind| matches!(kind, ty::ClosureKind::Fn | ty::ClosureKind::FnMut)); - if dominated_by_fn_trait { - // Found `` or - // ``. - // We point at the bound that coerced the closure, which could be changed - // to `FnOnce()` or `AsyncFnOnce()` to avoid the move error. - return Some(*span); + if let Some(clause) = pred.as_trait_clause() + && let ty::Closure(clause_closure_def_id, _) = clause.self_ty().skip_binder().kind() + && *clause_closure_def_id == def_id + && (tcx.lang_items().fn_mut_trait() == Some(clause.def_id()) + || tcx.lang_items().fn_trait() == Some(clause.def_id())) + { + // Found `` + // We point at the `Fn()` or `FnMut()` bound that coerced the closure, which + // could be changed to `FnOnce()` to avoid the move error. + return *span; } } - None - } - - /// If `pred` is a trait clause binding the closure `def_id` to `Fn`/`FnMut`/`FnOnce` - /// (or their async equivalents based on `asyncness`), returns the corresponding - /// `ClosureKind`. Otherwise returns `None`. - fn closure_clause_kind( - &self, - pred: ty::Clause<'tcx>, - def_id: DefId, - asyncness: ty::Asyncness, - ) -> Option { - let tcx = self.infcx.tcx; - let clause = pred.as_trait_clause()?; - let kind = match asyncness { - ty::Asyncness::Yes => tcx.async_fn_trait_kind_from_def_id(clause.def_id()), - ty::Asyncness::No => tcx.fn_trait_kind_from_def_id(clause.def_id()), - }?; - match clause.self_ty().skip_binder().kind() { - ty::Closure(id, _) | ty::CoroutineClosure(id, _) if *id == def_id => Some(kind), - _ => None, - } + DUMMY_SP } fn add_move_hints(&self, error: GroupedMoveError<'tcx>, err: &mut Diag<'_>, span: Span) { diff --git a/compiler/rustc_borrowck/src/handle_placeholders.rs b/compiler/rustc_borrowck/src/handle_placeholders.rs index 2a7dc8ba10162..60be521c29af0 100644 --- a/compiler/rustc_borrowck/src/handle_placeholders.rs +++ b/compiler/rustc_borrowck/src/handle_placeholders.rs @@ -62,23 +62,57 @@ impl scc::Annotations for SccAnnotations<'_, '_, RegionTracker> { } #[derive(Copy, Debug, Clone, PartialEq, Eq)] -struct PlaceholderReachability { - /// The largest-universed placeholder we can reach - max_universe: (UniverseIndex, RegionVid), - - /// The placeholder with the smallest ID - min_placeholder: RegionVid, - - /// The placeholder with the largest ID - max_placeholder: RegionVid, +enum PlaceholderReachability { + /// This SCC reaches no placeholders. + NoPlaceholders, + /// This SCC reaches at least one placeholder. + Placeholders { + /// The largest-universed placeholder we can reach + max_universe: (UniverseIndex, RegionVid), + + /// The placeholder with the smallest ID + min_placeholder: RegionVid, + + /// The placeholder with the largest ID + max_placeholder: RegionVid, + }, } impl PlaceholderReachability { /// Merge the reachable placeholders of two graph components. - fn merge(&mut self, other: &Self) { - self.max_universe = self.max_universe.max(other.max_universe); - self.min_placeholder = self.min_placeholder.min(other.min_placeholder); - self.max_placeholder = self.max_placeholder.max(other.max_placeholder); + fn merge(self, other: PlaceholderReachability) -> PlaceholderReachability { + use PlaceholderReachability::*; + match (self, other) { + (NoPlaceholders, NoPlaceholders) => NoPlaceholders, + (NoPlaceholders, p @ Placeholders { .. }) + | (p @ Placeholders { .. }, NoPlaceholders) => p, + ( + Placeholders { + min_placeholder: min_pl, + max_placeholder: max_pl, + max_universe: max_u, + }, + Placeholders { min_placeholder, max_placeholder, max_universe }, + ) => Placeholders { + min_placeholder: min_pl.min(min_placeholder), + max_placeholder: max_pl.max(max_placeholder), + max_universe: max_u.max(max_universe), + }, + } + } + + fn max_universe(&self) -> Option<(UniverseIndex, RegionVid)> { + match self { + Self::NoPlaceholders => None, + Self::Placeholders { max_universe, .. } => Some(*max_universe), + } + } + + /// If we have reached placeholders, determine if they can + /// be named from this universe. + fn can_be_named_by(&self, from: UniverseIndex) -> bool { + self.max_universe() + .is_none_or(|(max_placeholder_universe, _)| from.can_name(max_placeholder_universe)) } } @@ -86,7 +120,7 @@ impl PlaceholderReachability { /// the values of its elements. This annotates a single SCC. #[derive(Copy, Debug, Clone)] pub(crate) struct RegionTracker { - reachable_placeholders: Option, + reachable_placeholders: PlaceholderReachability, /// The largest universe nameable from this SCC. /// It is the smallest nameable universes of all @@ -101,13 +135,13 @@ impl RegionTracker { pub(crate) fn new(rvid: RegionVid, definition: &RegionDefinition<'_>) -> Self { let reachable_placeholders = if matches!(definition.origin, NllRegionVariableOrigin::Placeholder(_)) { - Some(PlaceholderReachability { + PlaceholderReachability::Placeholders { max_universe: (definition.universe, rvid), min_placeholder: rvid, max_placeholder: rvid, - }) + } } else { - None + PlaceholderReachability::NoPlaceholders }; Self { @@ -125,46 +159,43 @@ impl RegionTracker { } pub(crate) fn max_placeholder_universe_reached(self) -> UniverseIndex { - self.reachable_placeholders.map(|pls| pls.max_universe.0).unwrap_or(UniverseIndex::ROOT) - } - - /// Can all reachable placeholders be named from `from`? - /// True vacuously in case no placeholders were reached. - fn placeholders_can_be_named_by(&self, from: UniverseIndex) -> bool { - self.reachable_placeholders.is_none_or(|pls| from.can_name(pls.max_universe.0)) + if let Some((universe, _)) = self.reachable_placeholders.max_universe() { + universe + } else { + UniverseIndex::ROOT + } } /// Determine if we can name all the placeholders in `other`. pub(crate) fn can_name_all_placeholders(&self, other: Self) -> bool { - // HACK: We first check whether we can name the highest existential universe - // of `other`. This only exists to avoid errors in case that scc already - // depends on a placeholder it cannot name itself. - self.max_nameable_universe().can_name(other.max_nameable_universe()) - || other.placeholders_can_be_named_by(self.max_nameable_universe.0) + other.reachable_placeholders.can_be_named_by(self.max_nameable_universe.0) } /// If this SCC reaches a placeholder it can't name, return it. fn unnameable_placeholder(&self) -> Option<(UniverseIndex, RegionVid)> { - self.reachable_placeholders - .filter(|pls| !self.max_nameable_universe().can_name(pls.max_universe.0)) - .map(|pls| pls.max_universe) + self.reachable_placeholders.max_universe().filter(|&(placeholder_universe, _)| { + !self.max_nameable_universe().can_name(placeholder_universe) + }) } } impl scc::Annotation for RegionTracker { - fn update_scc(&mut self, other: &Self) { + fn merge_scc(self, other: Self) -> Self { trace!("{:?} << {:?}", self.representative, other.representative); - self.representative = self.representative.min(other.representative); - self.update_reachable(other); + + Self { + representative: self.representative.min(other.representative), + max_nameable_universe: self.max_nameable_universe.min(other.max_nameable_universe), + reachable_placeholders: self.reachable_placeholders.merge(other.reachable_placeholders), + } } - fn update_reachable(&mut self, other: &Self) { - self.max_nameable_universe = self.max_nameable_universe.min(other.max_nameable_universe); - match (self.reachable_placeholders.as_mut(), other.reachable_placeholders.as_ref()) { - (None, None) | (Some(_), None) => (), - (None, Some(theirs)) => self.reachable_placeholders = Some(*theirs), - (Some(ours), Some(theirs)) => ours.merge(theirs), - }; + fn merge_reached(self, other: Self) -> Self { + Self { + max_nameable_universe: self.max_nameable_universe.min(other.max_nameable_universe), + reachable_placeholders: self.reachable_placeholders.merge(other.reachable_placeholders), + representative: self.representative, + } } } diff --git a/compiler/rustc_borrowck/src/region_infer/graphviz.rs b/compiler/rustc_borrowck/src/region_infer/graphviz.rs index ceb33d82deba8..526e1850c2ef9 100644 --- a/compiler/rustc_borrowck/src/region_infer/graphviz.rs +++ b/compiler/rustc_borrowck/src/region_infer/graphviz.rs @@ -52,7 +52,7 @@ fn render_region_vid<'tcx>( format!(" (for<{}>)", tcx.item_name(def_id)) } ty::BoundRegionKind::ClosureEnv | ty::BoundRegionKind::Anon => " (for<'_>)".to_string(), - ty::BoundRegionKind::NamedForPrinting(_) => { + ty::BoundRegionKind::NamedAnon(_) => { bug!("only used for pretty printing") } }, diff --git a/compiler/rustc_borrowck/src/region_infer/values.rs b/compiler/rustc_borrowck/src/region_infer/values.rs index 1dd3bc831f45a..0063af25d781a 100644 --- a/compiler/rustc_borrowck/src/region_infer/values.rs +++ b/compiler/rustc_borrowck/src/region_infer/values.rs @@ -10,8 +10,8 @@ use rustc_middle::ty::{self, RegionVid}; use rustc_mir_dataflow::points::{DenseLocationMap, PointIndex}; use tracing::debug; -use crate::BorrowIndex; use crate::polonius::LiveLoans; +use crate::{BorrowIndex, TyCtxt}; rustc_index::newtype_index! { /// A single integer representing a `ty::Placeholder`. @@ -420,18 +420,18 @@ impl ToElementIndex<'_> for RegionVid { impl<'tcx> ToElementIndex<'tcx> for ty::PlaceholderRegion<'tcx> { fn add_to_row(self, values: &mut RegionValues<'tcx, N>, row: N) -> bool where - Self: Into>, + Self: Into, ty::BoundRegion>>, { - let placeholder: ty::PlaceholderRegion<'tcx> = self.into(); + let placeholder: ty::Placeholder, ty::BoundRegion> = self.into(); let index = values.placeholder_indices.lookup_index(placeholder); values.placeholders.insert(row, index) } fn contained_in_row(self, values: &RegionValues<'tcx, N>, row: N) -> bool where - Self: Into>, + Self: Into, ty::BoundRegion>>, { - let placeholder: ty::PlaceholderRegion<'tcx> = self.into(); + let placeholder: ty::Placeholder, ty::BoundRegion> = self.into(); let index = values.placeholder_indices.lookup_index(placeholder); values.placeholders.contains(row, index) } diff --git a/compiler/rustc_borrowck/src/type_check/mod.rs b/compiler/rustc_borrowck/src/type_check/mod.rs index 98b4e4d81b92b..676b45e9974cb 100644 --- a/compiler/rustc_borrowck/src/type_check/mod.rs +++ b/compiler/rustc_borrowck/src/type_check/mod.rs @@ -775,7 +775,7 @@ impl<'a, 'tcx> Visitor<'tcx> for TypeChecker<'a, 'tcx> { ty::BoundRegionKind::Anon => sym::anon, ty::BoundRegionKind::Named(def_id) => tcx.item_name(def_id), ty::BoundRegionKind::ClosureEnv => sym::env, - ty::BoundRegionKind::NamedForPrinting(_) => { + ty::BoundRegionKind::NamedAnon(_) => { bug!("only used for pretty printing") } }; diff --git a/compiler/rustc_borrowck/src/type_check/relate_tys.rs b/compiler/rustc_borrowck/src/type_check/relate_tys.rs index e2d684e12a816..045507ceb4b43 100644 --- a/compiler/rustc_borrowck/src/type_check/relate_tys.rs +++ b/compiler/rustc_borrowck/src/type_check/relate_tys.rs @@ -174,7 +174,7 @@ impl<'a, 'b, 'tcx> NllTypeRelating<'a, 'b, 'tcx> { let infcx = self.type_checker.infcx; let mut lazy_universe = None; let delegate = FnMutDelegate { - regions: &mut |br: ty::BoundRegion<'tcx>| { + regions: &mut |br: ty::BoundRegion| { // The first time this closure is called, create a // new universe for the placeholders we will make // from here out. @@ -191,10 +191,10 @@ impl<'a, 'b, 'tcx> NllTypeRelating<'a, 'b, 'tcx> { placeholder_reg }, - types: &mut |_bound_ty: ty::BoundTy<'tcx>| { + types: &mut |_bound_ty: ty::BoundTy| { unreachable!("we only replace regions in nll_relate, not types") }, - consts: &mut |_bound_const: ty::BoundConst<'tcx>| { + consts: &mut |_bound_const: ty::BoundConst| { unreachable!("we only replace regions in nll_relate, not consts") }, }; @@ -218,7 +218,7 @@ impl<'a, 'b, 'tcx> NllTypeRelating<'a, 'b, 'tcx> { let infcx = self.type_checker.infcx; let mut reg_map = FxHashMap::default(); let delegate = FnMutDelegate { - regions: &mut |br: ty::BoundRegion<'tcx>| { + regions: &mut |br: ty::BoundRegion| { if let Some(ex_reg_var) = reg_map.get(&br) { *ex_reg_var } else { @@ -230,10 +230,10 @@ impl<'a, 'b, 'tcx> NllTypeRelating<'a, 'b, 'tcx> { ex_reg_var } }, - types: &mut |_bound_ty: ty::BoundTy<'tcx>| { + types: &mut |_bound_ty: ty::BoundTy| { unreachable!("we only replace regions in nll_relate, not types") }, - consts: &mut |_bound_const: ty::BoundConst<'tcx>| { + consts: &mut |_bound_const: ty::BoundConst| { unreachable!("we only replace regions in nll_relate, not consts") }, }; @@ -268,7 +268,7 @@ impl<'a, 'b, 'tcx> NllTypeRelating<'a, 'b, 'tcx> { ty::BoundRegionKind::Anon => sym::anon, ty::BoundRegionKind::Named(def_id) => self.type_checker.tcx().item_name(def_id), ty::BoundRegionKind::ClosureEnv => sym::env, - ty::BoundRegionKind::NamedForPrinting(_) => bug!("only used for pretty printing"), + ty::BoundRegionKind::NamedAnon(_) => bug!("only used for pretty printing"), }; if cfg!(debug_assertions) { diff --git a/compiler/rustc_codegen_ssa/src/back/linker.rs b/compiler/rustc_codegen_ssa/src/back/linker.rs index db49f92e39acc..1b75db51140b8 100644 --- a/compiler/rustc_codegen_ssa/src/back/linker.rs +++ b/compiler/rustc_codegen_ssa/src/back/linker.rs @@ -1208,23 +1208,10 @@ impl<'a> Linker for EmLinker<'a> { fn set_output_kind( &mut self, - output_kind: LinkOutputKind, + _output_kind: LinkOutputKind, _crate_type: CrateType, _out_filename: &Path, ) { - match output_kind { - LinkOutputKind::DynamicNoPicExe | LinkOutputKind::DynamicPicExe => { - self.cmd.arg("-sMAIN_MODULE=2"); - } - LinkOutputKind::DynamicDylib | LinkOutputKind::StaticDylib => { - self.cmd.arg("-sSIDE_MODULE=2"); - } - // -fno-pie is the default on Emscripten. - LinkOutputKind::StaticNoPicExe | LinkOutputKind::StaticPicExe => {} - LinkOutputKind::WasiReactorExe => { - unreachable!(); - } - } } fn link_dylib_by_name(&mut self, name: &str, _verbatim: bool, _as_needed: bool) { diff --git a/compiler/rustc_codegen_ssa/src/codegen_attrs.rs b/compiler/rustc_codegen_ssa/src/codegen_attrs.rs index 9ecb7ab9fd457..4cb390e7d5699 100644 --- a/compiler/rustc_codegen_ssa/src/codegen_attrs.rs +++ b/compiler/rustc_codegen_ssa/src/codegen_attrs.rs @@ -189,7 +189,7 @@ fn process_builtin_attrs( }, AttributeKind::FfiConst(_) => codegen_fn_attrs.flags |= CodegenFnAttrFlags::FFI_CONST, AttributeKind::FfiPure(_) => codegen_fn_attrs.flags |= CodegenFnAttrFlags::FFI_PURE, - AttributeKind::RustcStdInternalSymbol(_) => { + AttributeKind::StdInternalSymbol(_) => { codegen_fn_attrs.flags |= CodegenFnAttrFlags::RUSTC_STD_INTERNAL_SYMBOL } AttributeKind::Linkage(linkage, span) => { @@ -217,10 +217,10 @@ fn process_builtin_attrs( AttributeKind::Sanitize { span, .. } => { interesting_spans.sanitize = Some(*span); } - AttributeKind::RustcObjcClass { classname, .. } => { + AttributeKind::ObjcClass { classname, .. } => { codegen_fn_attrs.objc_class = Some(*classname); } - AttributeKind::RustcObjcSelector { methname, .. } => { + AttributeKind::ObjcSelector { methname, .. } => { codegen_fn_attrs.objc_selector = Some(*methname); } AttributeKind::EiiForeignItem => { diff --git a/compiler/rustc_const_eval/src/check_consts/check.rs b/compiler/rustc_const_eval/src/check_consts/check.rs index 57396b657a3fa..95dbf42d4d441 100644 --- a/compiler/rustc_const_eval/src/check_consts/check.rs +++ b/compiler/rustc_const_eval/src/check_consts/check.rs @@ -774,16 +774,16 @@ impl<'tcx> Visitor<'tcx> for Checker<'_, 'tcx> { // Attempting to call a trait method? if let Some(trait_did) = tcx.trait_of_assoc(callee) { - // We can't determine the actual callee (the underlying impl of the trait) here, so we have - // to do different checks than usual. + // We can't determine the actual callee here, so we have to do different checks + // than usual. trace!("attempting to call a trait method"); - let is_const = tcx.constness(callee) == hir::Constness::Const; + let trait_is_const = tcx.is_const_trait(trait_did); // Only consider a trait to be const if the const conditions hold. // Otherwise, it's really misleading to call something "conditionally" // const when it's very obviously not conditionally const. - if is_const && has_const_conditions == Some(ConstConditionsHold::Yes) { + if trait_is_const && has_const_conditions == Some(ConstConditionsHold::Yes) { // Trait calls are always conditionally-const. self.check_op(ops::ConditionallyConstCall { callee, diff --git a/compiler/rustc_const_eval/src/check_consts/mod.rs b/compiler/rustc_const_eval/src/check_consts/mod.rs index 1adba200caaf2..e9824400ab7a1 100644 --- a/compiler/rustc_const_eval/src/check_consts/mod.rs +++ b/compiler/rustc_const_eval/src/check_consts/mod.rs @@ -83,7 +83,7 @@ pub fn rustc_allow_const_fn_unstable( ) -> bool { let attrs = tcx.hir_attrs(tcx.local_def_id_to_hir_id(def_id)); - find_attr!(attrs, AttributeKind::RustcAllowConstFnUnstable(syms, _) if syms.contains(&feature_gate)) + find_attr!(attrs, AttributeKind::AllowConstFnUnstable(syms, _) if syms.contains(&feature_gate)) } /// Returns `true` if the given `def_id` (trait or function) is "safe to expose on stable". diff --git a/compiler/rustc_const_eval/src/const_eval/fn_queries.rs b/compiler/rustc_const_eval/src/const_eval/fn_queries.rs index 46cdca53ba8cf..cdf0dcff381fc 100644 --- a/compiler/rustc_const_eval/src/const_eval/fn_queries.rs +++ b/compiler/rustc_const_eval/src/const_eval/fn_queries.rs @@ -1,8 +1,7 @@ -use rustc_hir::attrs::AttributeKind; use rustc_hir::def_id::{DefId, LocalDefId}; use rustc_hir::{ Constness, ExprKind, ForeignItemKind, ImplItem, ImplItemImplKind, ImplItemKind, Item, ItemKind, - Node, TraitItem, TraitItemKind, VariantData, find_attr, + Node, TraitItem, TraitItemKind, VariantData, }; use rustc_middle::query::Providers; use rustc_middle::ty::TyCtxt; @@ -37,13 +36,7 @@ fn constness(tcx: TyCtxt<'_>, def_id: LocalDefId) -> Constness { Constness::NotConst => tcx.constness(tcx.local_parent(def_id)), } } - Node::TraitItem(ti @ TraitItem { kind: TraitItemKind::Fn(..), .. }) => { - if find_attr!(tcx.hir_attrs(ti.hir_id()), AttributeKind::RustcNonConstTraitMethod) { - Constness::NotConst - } else { - tcx.trait_def(tcx.local_parent(def_id)).constness - } - } + Node::TraitItem(TraitItem { kind: TraitItemKind::Fn(..), .. }) => tcx.trait_def(tcx.local_parent(def_id)).constness, _ => { tcx.dcx().span_bug( tcx.def_span(def_id), diff --git a/compiler/rustc_const_eval/src/const_eval/machine.rs b/compiler/rustc_const_eval/src/const_eval/machine.rs index 719187b990122..89a9008becf2b 100644 --- a/compiler/rustc_const_eval/src/const_eval/machine.rs +++ b/compiler/rustc_const_eval/src/const_eval/machine.rs @@ -24,7 +24,7 @@ use crate::interpret::{ self, AllocId, AllocInit, AllocRange, ConstAllocation, CtfeProvenance, FnArg, Frame, GlobalAlloc, ImmTy, InterpCx, InterpResult, OpTy, PlaceTy, RangeSet, Scalar, compile_time_machine, err_inval, interp_ok, throw_exhaust, throw_inval, throw_ub, - throw_ub_custom, throw_unsup, throw_unsup_format, + throw_ub_custom, throw_unsup, throw_unsup_format, type_implements_dyn_trait, }; /// When hitting this many interpreted terminators we emit a deny by default lint @@ -586,6 +586,16 @@ impl<'tcx> interpret::Machine<'tcx> for CompileTimeMachine<'tcx> { } } + sym::type_id_implements_trait => { + let type_from_type_id = ecx.read_type_id(&args[0])?; + let trait_from_type_id = ecx.read_type_id(&args[1])?; + + let (implements, _) = + type_implements_dyn_trait(ecx, type_from_type_id, trait_from_type_id)?; + + ecx.write_scalar(Scalar::from_bool(implements), dest)?; + } + sym::type_of => { let ty = ecx.read_type_id(&args[0])?; ecx.write_type_info(ty, dest)?; diff --git a/compiler/rustc_const_eval/src/const_eval/type_info.rs b/compiler/rustc_const_eval/src/const_eval/type_info.rs index f8881f0968bb4..bbb20f8833470 100644 --- a/compiler/rustc_const_eval/src/const_eval/type_info.rs +++ b/compiler/rustc_const_eval/src/const_eval/type_info.rs @@ -172,6 +172,9 @@ impl<'tcx> InterpCx<'tcx, CompileTimeMachine<'tcx>> { }; self.write_discriminant(variant_index, &field_dest)?; } + sym::id => { + self.write_type_id(ty, &field_dest)?; + } other => span_bug!(self.tcx.span, "unknown `Type` field {other}"), } } diff --git a/compiler/rustc_const_eval/src/interpret/intrinsics.rs b/compiler/rustc_const_eval/src/interpret/intrinsics.rs index e526f6120689a..d9f210b960771 100644 --- a/compiler/rustc_const_eval/src/interpret/intrinsics.rs +++ b/compiler/rustc_const_eval/src/interpret/intrinsics.rs @@ -7,15 +7,12 @@ mod simd; use rustc_abi::{FIRST_VARIANT, FieldIdx, HasDataLayout, Size, VariantIdx}; use rustc_apfloat::ieee::{Double, Half, Quad, Single}; use rustc_data_structures::assert_matches; -use rustc_hir::def_id::CRATE_DEF_ID; -use rustc_infer::infer::TyCtxtInferExt; use rustc_middle::mir::interpret::{CTFE_ALLOC_SALT, read_target_uint, write_target_uint}; use rustc_middle::mir::{self, BinOp, ConstValue, NonDivergingIntrinsic}; use rustc_middle::ty::layout::TyAndLayout; -use rustc_middle::ty::{FloatTy, PolyExistentialPredicate, Ty, TyCtxt}; +use rustc_middle::ty::{FloatTy, Ty, TyCtxt}; use rustc_middle::{bug, span_bug, ty}; use rustc_span::{Symbol, sym}; -use rustc_trait_selection::traits::{Obligation, ObligationCause, ObligationCtxt}; use tracing::trace; use super::memory::MemoryKind; @@ -27,6 +24,7 @@ use super::{ }; use crate::fluent_generated as fluent; use crate::interpret::Writeable; +use crate::interpret::util::type_implements_dyn_trait; #[derive(Copy, Clone, Debug, PartialEq, Eq)] enum MulAddType { @@ -226,32 +224,9 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> { let tp_ty = instance.args.type_at(0); let result_ty = instance.args.type_at(1); - ensure_monomorphic_enough(tcx, tp_ty)?; - ensure_monomorphic_enough(tcx, result_ty)?; - let ty::Dynamic(preds, _) = result_ty.kind() else { - span_bug!( - self.find_closest_untracked_caller_location(), - "Invalid type provided to vtable_for::. U must be dyn Trait, got {result_ty}." - ); - }; + let (implements_trait, preds) = type_implements_dyn_trait(self, tp_ty, result_ty)?; - let (infcx, param_env) = - self.tcx.infer_ctxt().build_with_typing_env(self.typing_env); - - let ocx = ObligationCtxt::new(&infcx); - ocx.register_obligations(preds.iter().map(|pred: PolyExistentialPredicate<'_>| { - let pred = pred.with_self_ty(tcx, tp_ty); - // Lifetimes can only be 'static because of the bound on T - let pred = ty::fold_regions(tcx, pred, |r, _| { - if r == tcx.lifetimes.re_erased { tcx.lifetimes.re_static } else { r } - }); - Obligation::new(tcx, ObligationCause::dummy(), param_env, pred) - })); - let type_impls_trait = ocx.evaluate_obligations_error_on_ambiguity().is_empty(); - // Since `assumed_wf_tys=[]` the choice of LocalDefId is irrelevant, so using the "default" - let regions_are_valid = ocx.resolve_regions(CRATE_DEF_ID, param_env, []).is_empty(); - - if regions_are_valid && type_impls_trait { + if implements_trait { let vtable_ptr = self.get_vtable_ptr(tp_ty, preds)?; // Writing a non-null pointer into an `Option` will automatically make it `Some`. self.write_pointer(vtable_ptr, dest)?; diff --git a/compiler/rustc_const_eval/src/interpret/mod.rs b/compiler/rustc_const_eval/src/interpret/mod.rs index 2f365ec77b33e..22554b064ebf0 100644 --- a/compiler/rustc_const_eval/src/interpret/mod.rs +++ b/compiler/rustc_const_eval/src/interpret/mod.rs @@ -38,6 +38,6 @@ use self::place::{MemPlace, Place}; pub use self::projection::{OffsetMode, Projectable}; pub use self::stack::{Frame, FrameInfo, LocalState, ReturnContinuation, StackPopInfo}; pub use self::util::EnteredTraceSpan; -pub(crate) use self::util::create_static_alloc; +pub(crate) use self::util::{create_static_alloc, type_implements_dyn_trait}; pub use self::validity::{CtfeValidationMode, RangeSet, RefTracking}; pub use self::visitor::ValueVisitor; diff --git a/compiler/rustc_const_eval/src/interpret/util.rs b/compiler/rustc_const_eval/src/interpret/util.rs index 1e18a22be81c2..57a02769643b7 100644 --- a/compiler/rustc_const_eval/src/interpret/util.rs +++ b/compiler/rustc_const_eval/src/interpret/util.rs @@ -1,12 +1,51 @@ -use rustc_hir::def_id::LocalDefId; -use rustc_middle::mir; +use rustc_hir::def_id::{CRATE_DEF_ID, LocalDefId}; +use rustc_infer::infer::TyCtxtInferExt; +use rustc_infer::traits::{Obligation, ObligationCause}; use rustc_middle::mir::interpret::{AllocInit, Allocation, GlobalAlloc, InterpResult, Pointer}; use rustc_middle::ty::layout::TyAndLayout; -use rustc_middle::ty::{TyCtxt, TypeVisitable, TypeVisitableExt}; +use rustc_middle::ty::{PolyExistentialPredicate, Ty, TyCtxt, TypeVisitable, TypeVisitableExt}; +use rustc_middle::{mir, span_bug, ty}; +use rustc_trait_selection::traits::ObligationCtxt; use tracing::debug; use super::{InterpCx, MPlaceTy, MemoryKind, interp_ok, throw_inval}; use crate::const_eval::{CompileTimeInterpCx, CompileTimeMachine, InterpretationResult}; +use crate::interpret::Machine; + +/// Checks if a type implements predicates. +/// Calls `ensure_monomorphic_enough` on `ty` and `trait_ty` for you. +pub(crate) fn type_implements_dyn_trait<'tcx, M: Machine<'tcx>>( + ecx: &mut InterpCx<'tcx, M>, + ty: Ty<'tcx>, + trait_ty: Ty<'tcx>, +) -> InterpResult<'tcx, (bool, &'tcx ty::List>)> { + ensure_monomorphic_enough(ecx.tcx.tcx, ty)?; + ensure_monomorphic_enough(ecx.tcx.tcx, trait_ty)?; + + let ty::Dynamic(preds, _) = trait_ty.kind() else { + span_bug!( + ecx.find_closest_untracked_caller_location(), + "Invalid type provided to type_implements_predicates. U must be dyn Trait, got {trait_ty}." + ); + }; + + let (infcx, param_env) = ecx.tcx.infer_ctxt().build_with_typing_env(ecx.typing_env); + + let ocx = ObligationCtxt::new(&infcx); + ocx.register_obligations(preds.iter().map(|pred: PolyExistentialPredicate<'_>| { + let pred = pred.with_self_ty(ecx.tcx.tcx, ty); + // Lifetimes can only be 'static because of the bound on T + let pred = rustc_middle::ty::fold_regions(ecx.tcx.tcx, pred, |r, _| { + if r == ecx.tcx.tcx.lifetimes.re_erased { ecx.tcx.tcx.lifetimes.re_static } else { r } + }); + Obligation::new(ecx.tcx.tcx, ObligationCause::dummy(), param_env, pred) + })); + let type_impls_trait = ocx.evaluate_obligations_error_on_ambiguity().is_empty(); + // Since `assumed_wf_tys=[]` the choice of LocalDefId is irrelevant, so using the "default" + let regions_are_valid = ocx.resolve_regions(CRATE_DEF_ID, param_env, []).is_empty(); + + interp_ok((regions_are_valid && type_impls_trait, preds)) +} /// Checks whether a type contains generic parameters which must be instantiated. /// diff --git a/compiler/rustc_data_structures/src/graph/scc/mod.rs b/compiler/rustc_data_structures/src/graph/scc/mod.rs index 954e4116fb55f..91cbe3c533bbc 100644 --- a/compiler/rustc_data_structures/src/graph/scc/mod.rs +++ b/compiler/rustc_data_structures/src/graph/scc/mod.rs @@ -27,18 +27,26 @@ mod tests; /// the max/min element of the SCC, or all of the above. /// /// Concretely, the both merge operations must commute, e.g. where `merge` -/// is `update_scc` and `update_reached`: `a.merge(b) == b.merge(a)` +/// is `merge_scc` and `merge_reached`: `a.merge(b) == b.merge(a)` /// /// In general, what you want is probably always min/max according /// to some ordering, potentially with side constraints (min x such /// that P holds). pub trait Annotation: Debug + Copy { /// Merge two existing annotations into one during - /// path compression. - fn update_scc(&mut self, other: &Self); + /// path compression.o + fn merge_scc(self, other: Self) -> Self; /// Merge a successor into this annotation. - fn update_reachable(&mut self, other: &Self); + fn merge_reached(self, other: Self) -> Self; + + fn update_scc(&mut self, other: Self) { + *self = self.merge_scc(other) + } + + fn update_reachable(&mut self, other: Self) { + *self = self.merge_reached(other) + } } /// An accumulator for annotations. @@ -62,8 +70,12 @@ impl Annotations for NoAnnotations { /// The empty annotation, which does nothing. impl Annotation for () { - fn update_reachable(&mut self, _other: &Self) {} - fn update_scc(&mut self, _other: &Self) {} + fn merge_reached(self, _other: Self) -> Self { + () + } + fn merge_scc(self, _other: Self) -> Self { + () + } } /// Strongly connected components (SCC) of a graph. The type `N` is @@ -602,7 +614,7 @@ where *min_depth = successor_min_depth; *min_cycle_root = successor_node; } - current_component_annotation.update_scc(&successor_annotation); + current_component_annotation.update_scc(successor_annotation); } // The starting node `node` is succeeded by a fully identified SCC // which is now added to the set under `scc_index`. @@ -617,7 +629,7 @@ where // the `successors_stack` for later. trace!(?node, ?successor_scc_index); successors_stack.push(successor_scc_index); - current_component_annotation.update_reachable(&successor_annotation); + current_component_annotation.update_reachable(successor_annotation); } // `node` has no more (direct) successors; search recursively. None => { diff --git a/compiler/rustc_data_structures/src/graph/scc/tests.rs b/compiler/rustc_data_structures/src/graph/scc/tests.rs index 4626861c3e00b..8f04baf51f355 100644 --- a/compiler/rustc_data_structures/src/graph/scc/tests.rs +++ b/compiler/rustc_data_structures/src/graph/scc/tests.rs @@ -32,12 +32,12 @@ impl Maxes { } impl Annotation for MaxReached { - fn update_scc(&mut self, other: &Self) { - self.0 = self.0.max(other.0); + fn merge_scc(self, other: Self) -> Self { + Self(std::cmp::max(other.0, self.0)) } - fn update_reachable(&mut self, other: &Self) { - self.0 = self.0.max(other.0); + fn merge_reached(self, other: Self) -> Self { + Self(std::cmp::max(other.0, self.0)) } } @@ -75,12 +75,13 @@ impl Annotations for MinMaxes { } impl Annotation for MinMaxIn { - fn update_scc(&mut self, other: &Self) { - self.min = self.min.min(other.min); - self.max = self.max.max(other.max); + fn merge_scc(self, other: Self) -> Self { + Self { min: std::cmp::min(self.min, other.min), max: std::cmp::max(self.max, other.max) } } - fn update_reachable(&mut self, _other: &Self) {} + fn merge_reached(self, _other: Self) -> Self { + self + } } #[test] diff --git a/compiler/rustc_data_structures/src/lib.rs b/compiler/rustc_data_structures/src/lib.rs index 4467a28111815..85877d73519a5 100644 --- a/compiler/rustc_data_structures/src/lib.rs +++ b/compiler/rustc_data_structures/src/lib.rs @@ -49,10 +49,6 @@ pub use std::{assert_matches, debug_assert_matches}; pub use atomic_ref::AtomicRef; pub use ena::{snapshot_vec, undo_log, unify}; -// Re-export `hashbrown::hash_table`, because it's part of our API -// (via `ShardedHashMap`), and because it lets other compiler crates use the -// lower-level `HashTable` API without a tricky `hashbrown` dependency. -pub use hashbrown::hash_table; pub use rustc_index::static_assert_size; // Re-export some data-structure crates which are part of our public API. pub use {either, indexmap, smallvec, thin_vec}; diff --git a/compiler/rustc_data_structures/src/sharded.rs b/compiler/rustc_data_structures/src/sharded.rs index e10ccccad5bb4..5de9413cf15df 100644 --- a/compiler/rustc_data_structures/src/sharded.rs +++ b/compiler/rustc_data_structures/src/sharded.rs @@ -3,7 +3,7 @@ use std::hash::{Hash, Hasher}; use std::{iter, mem}; use either::Either; -use hashbrown::hash_table::{self, Entry, HashTable}; +use hashbrown::hash_table::{Entry, HashTable}; use crate::fx::FxHasher; use crate::sync::{CacheAligned, Lock, LockGuard, Mode, is_dyn_thread_safe}; @@ -140,7 +140,7 @@ pub fn shards() -> usize { 1 } -pub type ShardedHashMap = Sharded>; +pub type ShardedHashMap = Sharded>; impl ShardedHashMap { pub fn with_capacity(cap: usize) -> Self { diff --git a/compiler/rustc_data_structures/src/vec_cache.rs b/compiler/rustc_data_structures/src/vec_cache.rs index 70524bae624ae..599970663db88 100644 --- a/compiler/rustc_data_structures/src/vec_cache.rs +++ b/compiler/rustc_data_structures/src/vec_cache.rs @@ -29,6 +29,8 @@ struct Slot { struct SlotIndex { // the index of the bucket in VecCache (0 to 20) bucket_idx: usize, + // number of entries in that bucket + entries: usize, // the index of the slot within the bucket index_in_bucket: usize, } @@ -37,12 +39,12 @@ struct SlotIndex { // compile-time. Visiting all powers of two is enough to hit all the buckets. // // We confirm counts are accurate in the slot_index_exhaustive test. -const ENTRIES_BY_BUCKET: [usize; BUCKETS] = { - let mut entries = [0; BUCKETS]; +const ENTRIES_BY_BUCKET: [usize; 21] = { + let mut entries = [0; 21]; let mut key = 0; loop { let si = SlotIndex::from_index(key); - entries[si.bucket_idx] = si.entries(); + entries[si.bucket_idx] = si.entries; if key == 0 { key = 1; } else if key == (1 << 31) { @@ -54,14 +56,7 @@ const ENTRIES_BY_BUCKET: [usize; BUCKETS] = { entries }; -const BUCKETS: usize = 21; - impl SlotIndex { - /// The total possible number of entries in the bucket - const fn entries(&self) -> usize { - if self.bucket_idx == 0 { 1 << 12 } else { 1 << (self.bucket_idx + 11) } - } - // This unpacks a flat u32 index into identifying which bucket it belongs to and the offset // within that bucket. As noted in the VecCache docs, buckets double in size with each index. // Typically that would mean 31 buckets (2^0 + 2^1 ... + 2^31 = u32::MAX - 1), but to reduce @@ -75,13 +70,18 @@ impl SlotIndex { const fn from_index(idx: u32) -> Self { const FIRST_BUCKET_SHIFT: usize = 12; if idx < (1 << FIRST_BUCKET_SHIFT) { - return SlotIndex { bucket_idx: 0, index_in_bucket: idx as usize }; + return SlotIndex { + bucket_idx: 0, + entries: 1 << FIRST_BUCKET_SHIFT, + index_in_bucket: idx as usize, + }; } // We already ruled out idx 0, so this `ilog2` never panics (and the check optimizes away) let bucket = idx.ilog2() as usize; let entries = 1 << bucket; SlotIndex { bucket_idx: bucket - FIRST_BUCKET_SHIFT + 1, + entries, index_in_bucket: idx as usize - entries, } } @@ -98,7 +98,7 @@ impl SlotIndex { if ptr.is_null() { return None; } - debug_assert!(self.index_in_bucket < self.entries()); + assert!(self.index_in_bucket < self.entries); // SAFETY: `bucket` was allocated (so <= isize in total bytes) to hold `entries`, so this // must be inbounds. let slot = unsafe { ptr.add(self.index_in_bucket) }; @@ -126,12 +126,11 @@ impl SlotIndex { fn bucket_ptr(&self, bucket: &AtomicPtr>) -> *mut Slot { let ptr = bucket.load(Ordering::Acquire); - if ptr.is_null() { Self::initialize_bucket(bucket, self.bucket_idx) } else { ptr } + if ptr.is_null() { self.initialize_bucket(bucket) } else { ptr } } #[cold] - #[inline(never)] - fn initialize_bucket(bucket: &AtomicPtr>, bucket_idx: usize) -> *mut Slot { + fn initialize_bucket(&self, bucket: &AtomicPtr>) -> *mut Slot { static LOCK: std::sync::Mutex<()> = std::sync::Mutex::new(()); // If we are initializing the bucket, then acquire a global lock. @@ -145,8 +144,8 @@ impl SlotIndex { // OK, now under the allocator lock, if we're still null then it's definitely us that will // initialize this bucket. if ptr.is_null() { - let bucket_len = SlotIndex { bucket_idx, index_in_bucket: 0 }.entries(); - let bucket_layout = std::alloc::Layout::array::>(bucket_len).unwrap(); + let bucket_layout = + std::alloc::Layout::array::>(self.entries as usize).unwrap(); // This is more of a sanity check -- this code is very cold, so it's safe to pay a // little extra cost here. assert!(bucket_layout.size() > 0); @@ -172,7 +171,7 @@ impl SlotIndex { let bucket = unsafe { buckets.get_unchecked(self.bucket_idx) }; let ptr = self.bucket_ptr(bucket); - debug_assert!(self.index_in_bucket < self.entries()); + assert!(self.index_in_bucket < self.entries); // SAFETY: `bucket` was allocated (so <= isize in total bytes) to hold `entries`, so this // must be inbounds. let slot = unsafe { ptr.add(self.index_in_bucket) }; @@ -205,31 +204,6 @@ impl SlotIndex { Err(_) => false, } } - - /// Inserts into the map, given that the slot is unique, so it won't race with other threads. - #[inline] - unsafe fn put_unique(&self, buckets: &[AtomicPtr>; 21], value: V, extra: u32) { - // SAFETY: `bucket_idx` is ilog2(u32).saturating_sub(11), which is at most 21, i.e., - // in-bounds of buckets. - let bucket = unsafe { buckets.get_unchecked(self.bucket_idx) }; - let ptr = self.bucket_ptr(bucket); - - debug_assert!(self.index_in_bucket < self.entries()); - // SAFETY: `bucket` was allocated (so <= isize in total bytes) to hold `entries`, so this - // must be inbounds. - let slot = unsafe { ptr.add(self.index_in_bucket) }; - - // SAFETY: We known our slot is unique as a precondition of this function, so this can't race. - unsafe { - (&raw mut (*slot).value).write(value); - } - - // SAFETY: initialized bucket has zeroed all memory within the bucket, so we are valid for - // AtomicU32 access. - let index_and_lock = unsafe { &(*slot).index_and_lock }; - - index_and_lock.store(extra.checked_add(2).unwrap(), Ordering::Release); - } } /// In-memory cache for queries whose keys are densely-numbered IDs @@ -255,11 +229,11 @@ pub struct VecCache { // Bucket 19: 1073741824 // Bucket 20: 2147483648 // The total number of entries if all buckets are initialized is u32::MAX-1. - buckets: [AtomicPtr>; BUCKETS], + buckets: [AtomicPtr>; 21], // In the compiler's current usage these are only *read* during incremental and self-profiling. // They are an optimization over iterating the full buckets array. - present: [AtomicPtr>; BUCKETS], + present: [AtomicPtr>; 21], len: AtomicUsize, key: PhantomData<(K, I)>, @@ -333,11 +307,9 @@ where let slot_idx = SlotIndex::from_index(key); if slot_idx.put(&self.buckets, value, index.index() as u32) { let present_idx = self.len.fetch_add(1, Ordering::Relaxed); - let slot = SlotIndex::from_index(u32::try_from(present_idx).unwrap()); - // SAFETY: We should always be uniquely putting due to `len` fetch_add returning unique values. - // We can't get here if `len` overflows because `put` will not succeed u32::MAX + 1 times - // as it will run out of slots. - unsafe { slot.put_unique(&self.present, (), key) }; + let slot = SlotIndex::from_index(present_idx as u32); + // We should always be uniquely putting due to `len` fetch_add returning unique values. + assert!(slot.put(&self.present, (), key)); } } diff --git a/compiler/rustc_data_structures/src/vec_cache/tests.rs b/compiler/rustc_data_structures/src/vec_cache/tests.rs index f588442eee62a..9b60913ec922d 100644 --- a/compiler/rustc_data_structures/src/vec_cache/tests.rs +++ b/compiler/rustc_data_structures/src/vec_cache/tests.rs @@ -68,13 +68,6 @@ fn slot_entries_table() { ); } -#[test] -fn bucket_entries_matches() { - for i in 0..BUCKETS { - assert_eq!(SlotIndex { bucket_idx: i, index_in_bucket: 0 }.entries(), ENTRIES_BY_BUCKET[i]); - } -} - #[test] #[cfg(not(miri))] fn slot_index_exhaustive() { @@ -88,18 +81,14 @@ fn slot_index_exhaustive() { let mut prev = slot_idx; for idx in 1..=u32::MAX { let slot_idx = SlotIndex::from_index(idx); - - // SAFETY: Ensure indices don't go out of bounds of buckets. - assert!(slot_idx.index_in_bucket < slot_idx.entries()); - if prev.bucket_idx == slot_idx.bucket_idx { assert_eq!(prev.index_in_bucket + 1, slot_idx.index_in_bucket); } else { assert_eq!(slot_idx.index_in_bucket, 0); } - assert_eq!(buckets[slot_idx.bucket_idx], slot_idx.entries() as u32); - assert_eq!(ENTRIES_BY_BUCKET[slot_idx.bucket_idx], slot_idx.entries(), "{}", idx); + assert_eq!(buckets[slot_idx.bucket_idx], slot_idx.entries as u32); + assert_eq!(ENTRIES_BY_BUCKET[slot_idx.bucket_idx], slot_idx.entries, "{}", idx); prev = slot_idx; } diff --git a/compiler/rustc_error_codes/src/error_codes/E0423.md b/compiler/rustc_error_codes/src/error_codes/E0423.md index 4af17b1221b9c..a98ada17a469c 100644 --- a/compiler/rustc_error_codes/src/error_codes/E0423.md +++ b/compiler/rustc_error_codes/src/error_codes/E0423.md @@ -44,14 +44,3 @@ fn h1() -> i32 { // did you mean `a::I`? } ``` - -### Enum types used as values - -Enums are types and cannot be used directly as values. - -```compile_fail,E0423 -fn main(){ - let x = Option::; - //~^ ERROR expected value,found enum `Option` -} -``` diff --git a/compiler/rustc_expand/src/base.rs b/compiler/rustc_expand/src/base.rs index 6b3c7fe979327..653f2071d8988 100644 --- a/compiler/rustc_expand/src/base.rs +++ b/compiler/rustc_expand/src/base.rs @@ -963,16 +963,13 @@ impl SyntaxExtension { let stability = find_attr!(attrs, AttributeKind::Stability { stability, .. } => *stability); // FIXME(jdonszelmann): make it impossible to miss the or_else in the typesystem - if let Some(sp) = - find_attr!(attrs, AttributeKind::RustcConstStability { span, .. } => *span) - { + if let Some(sp) = find_attr!(attrs, AttributeKind::ConstStability { span, .. } => *span) { sess.dcx().emit_err(errors::MacroConstStability { span: sp, head_span: sess.source_map().guess_head_span(span), }); } - if let Some(sp) = find_attr!(attrs, AttributeKind::RustcBodyStability{ span, .. } => *span) - { + if let Some(sp) = find_attr!(attrs, AttributeKind::BodyStability{ span, .. } => *span) { sess.dcx().emit_err(errors::MacroBodyStability { span: sp, head_span: sess.source_map().guess_head_span(span), diff --git a/compiler/rustc_expand/src/mbe/macro_rules.rs b/compiler/rustc_expand/src/mbe/macro_rules.rs index 7cd96211de508..8d2cc23f97639 100644 --- a/compiler/rustc_expand/src/mbe/macro_rules.rs +++ b/compiler/rustc_expand/src/mbe/macro_rules.rs @@ -819,7 +819,7 @@ pub fn compile_declarative_macro( } assert!(!kinds.is_empty()); - let transparency = find_attr!(attrs, AttributeKind::RustcMacroTransparency(x) => *x) + let transparency = find_attr!(attrs, AttributeKind::MacroTransparency(x) => *x) .unwrap_or(Transparency::fallback(macro_rules)); if let Some(guar) = guar { diff --git a/compiler/rustc_feature/src/builtin_attrs.rs b/compiler/rustc_feature/src/builtin_attrs.rs index 182ef6816337f..ded8a5a4ae51c 100644 --- a/compiler/rustc_feature/src/builtin_attrs.rs +++ b/compiler/rustc_feature/src/builtin_attrs.rs @@ -1329,12 +1329,6 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[ "`#[rustc_has_incoherent_inherent_impls]` allows the addition of incoherent inherent impls for \ the given type by annotating all impl items with `#[rustc_allow_incoherent_impl]`" ), - rustc_attr!( - rustc_non_const_trait_method, AttributeType::Normal, template!(Word), - ErrorFollowing, EncodeCrossCrate::No, - "`#[rustc_non_const_trait_method]` should only used by the standard library to mark trait methods \ - as non-const to allow large traits an easier transition to const" - ), BuiltinAttribute { name: sym::rustc_diagnostic_item, diff --git a/compiler/rustc_hir/src/attrs/data_structures.rs b/compiler/rustc_hir/src/attrs/data_structures.rs index 92dda79b09203..8a7dee15d4f48 100644 --- a/compiler/rustc_hir/src/attrs/data_structures.rs +++ b/compiler/rustc_hir/src/attrs/data_structures.rs @@ -690,15 +690,6 @@ impl IntoDiagArg for CrateType { } } -#[derive(Clone, Debug, HashStable_Generic, Encodable, Decodable, PrintAttribute)] -pub enum RustcLayoutType { - Abi, - Align, - Size, - HomogenousAggregate, - Debug, -} - /// Represents parsed *built-in* inert attributes. /// /// ## Overview @@ -755,15 +746,31 @@ pub enum AttributeKind { // FIXME(#82232, #143834): temporarily renamed to mitigate `#[align]` nameres ambiguity Align { align: Align, span: Span }, + /// Represents `#[rustc_allow_const_fn_unstable]`. + AllowConstFnUnstable(ThinVec, Span), + + /// Represents `#[rustc_allow_incoherent_impl]`. + AllowIncoherentImpl(Span), + /// Represents `#[allow_internal_unsafe]`. AllowInternalUnsafe(Span), /// Represents `#[allow_internal_unstable]`. AllowInternalUnstable(ThinVec<(Symbol, Span)>, Span), + /// Represents `#[rustc_as_ptr]` (used by the `dangling_pointers_from_temporaries` lint). + AsPtr(Span), + /// Represents `#[automatically_derived]` AutomaticallyDerived(Span), + /// Represents `#[rustc_default_body_unstable]`. + BodyStability { + stability: DefaultBodyStability, + /// Span of the `#[rustc_default_body_unstable(...)]` attribute + span: Span, + }, + /// Represents the trace attribute of `#[cfg_attr]` CfgAttrTrace, @@ -773,6 +780,9 @@ pub enum AttributeKind { /// Represents `#[cfi_encoding]` CfiEncoding { encoding: Symbol }, + /// Represents `#[rustc_coinductive]`. + Coinductive(Span), + /// Represents `#[cold]`. Cold(Span), @@ -782,9 +792,26 @@ pub enum AttributeKind { /// Represents `#[compiler_builtins]`. CompilerBuiltins, + /// Represents `#[rustc_confusables]`. + Confusables { + symbols: ThinVec, + // FIXME(jdonszelmann): remove when target validation code is moved + first_span: Span, + }, + /// Represents `#[const_continue]`. ConstContinue(Span), + /// Represents `#[rustc_const_stable]` and `#[rustc_const_unstable]`. + ConstStability { + stability: PartialConstStability, + /// Span of the `#[rustc_const_stable(...)]` or `#[rustc_const_unstable(...)]` attribute + span: Span, + }, + + /// Represents `#[rustc_const_stable_indirect]`. + ConstStabilityIndirect, + /// Represents `#[coroutine]`. Coroutine(Span), @@ -803,6 +830,9 @@ pub enum AttributeKind { /// Represents `#[debugger_visualizer]`. DebuggerVisualizer(ThinVec), + /// Represents `#[rustc_deny_explicit_impl]`. + DenyExplicitImpl(Span), + /// Represents [`#[deprecated]`](https://doc.rust-lang.org/stable/reference/attributes/diagnostics.html#the-deprecated-attribute). Deprecation { deprecation: Deprecation, span: Span }, @@ -818,6 +848,12 @@ pub enum AttributeKind { /// i.e. doc comments. DocComment { style: AttrStyle, kind: DocFragmentKind, span: Span, comment: Symbol }, + /// Represents `#[rustc_dummy]`. + Dummy, + + /// Represents `#[rustc_dyn_incompatible_trait]`. + DynIncompatibleTrait(Span), + /// Implementation detail of `#[eii]` EiiDeclaration(EiiDecl), @@ -884,6 +920,9 @@ pub enum AttributeKind { /// Represents [`#[macro_export]`](https://doc.rust-lang.org/reference/macros-by-example.html#r-macro.decl.scope.path). MacroExport { span: Span, local_inner_macros: bool }, + /// Represents `#[rustc_macro_transparency]`. + MacroTransparency(Transparency), + /// Represents `#[macro_use]`. MacroUse { span: Span, arguments: MacroUseArgs }, @@ -939,12 +978,24 @@ pub enum AttributeKind { /// Represents `#[non_exhaustive]` NonExhaustive(Span), + /// Represents `#[rustc_objc_class]` + ObjcClass { classname: Symbol, span: Span }, + + /// Represents `#[rustc_objc_selector]` + ObjcSelector { methname: Symbol, span: Span }, + /// Represents `#[optimize(size|speed)]` Optimize(OptimizeAttr, Span), /// Represents `#[panic_runtime]` PanicRuntime, + /// Represents `#[rustc_paren_sugar]`. + ParenSugar(Span), + + /// Represents `#[rustc_pass_by_value]` (used by the `rustc_pass_by_value` lint). + PassByValue(Span), + /// Represents `#[patchable_function_entry]` PatchableFunctionEntry { prefix: u8, entry: u8 }, @@ -972,6 +1023,9 @@ pub enum AttributeKind { /// Represents `#[profiler_runtime]` ProfilerRuntime, + /// Represents `#[rustc_pub_transparent]` (used by the `repr_transparent_external_private_fields` lint). + PubTransparent(Span), + /// Represents [`#[recursion_limit]`](https://doc.rust-lang.org/reference/attributes/limits.html#the-recursion_limit-attribute) RecursionLimit { attr_span: Span, limit_span: Span, limit: Limit }, @@ -987,55 +1041,15 @@ pub enum AttributeKind { /// Represents `#[rustc_allocator_zeroed_variant]` RustcAllocatorZeroedVariant { name: Symbol }, - /// Represents `#[rustc_allow_const_fn_unstable]`. - RustcAllowConstFnUnstable(ThinVec, Span), - - /// Represents `#[rustc_allow_incoherent_impl]`. - RustcAllowIncoherentImpl(Span), - - /// Represents `#[rustc_as_ptr]` (used by the `dangling_pointers_from_temporaries` lint). - RustcAsPtr(Span), - - /// Represents `#[rustc_default_body_unstable]`. - RustcBodyStability { - stability: DefaultBodyStability, - /// Span of the `#[rustc_default_body_unstable(...)]` attribute - span: Span, - }, /// Represents `#[rustc_builtin_macro]`. RustcBuiltinMacro { builtin_name: Option, helper_attrs: ThinVec, span: Span }, /// Represents `#[rustc_coherence_is_core]` RustcCoherenceIsCore(Span), - /// Represents `#[rustc_coinductive]`. - RustcCoinductive(Span), - - /// Represents `#[rustc_confusables]`. - RustcConfusables { - symbols: ThinVec, - // FIXME(jdonszelmann): remove when target validation code is moved - first_span: Span, - }, - /// Represents `#[rustc_const_stable]` and `#[rustc_const_unstable]`. - RustcConstStability { - stability: PartialConstStability, - /// Span of the `#[rustc_const_stable(...)]` or `#[rustc_const_unstable(...)]` attribute - span: Span, - }, - - /// Represents `#[rustc_const_stable_indirect]`. - RustcConstStabilityIndirect, - /// Represents `#[rustc_deallocator]` RustcDeallocator, - /// Represents `#[rustc_deny_explicit_impl]`. - RustcDenyExplicitImpl(Span), - - /// Represents `#[rustc_dummy]`. - RustcDummy, - /// Represents `#[rustc_dump_def_parents]` RustcDumpDefParents, @@ -1051,15 +1065,9 @@ pub enum AttributeKind { /// Represents `#[rustc_dump_vtable]` RustcDumpVtable(Span), - /// Represents `#[rustc_dyn_incompatible_trait]`. - RustcDynIncompatibleTrait(Span), - /// Represents `#[rustc_has_incoherent_inherent_impls]` RustcHasIncoherentInherentImpls, - /// Represents `#[rustc_layout]` - RustcLayout(ThinVec), - /// Represents `#[rustc_layout_scalar_valid_range_end]`. RustcLayoutScalarValidRangeEnd(Box, Span), @@ -1081,9 +1089,6 @@ pub enum AttributeKind { /// Represents `#[rustc_lint_untracked_query_information]` RustcLintUntrackedQueryInformation, - /// Represents `#[rustc_macro_transparency]`. - RustcMacroTransparency(Transparency), - /// Represents `#[rustc_main]`. RustcMain, @@ -1096,36 +1101,18 @@ pub enum AttributeKind { /// Represents `#[rustc_no_implicit_autorefs]` RustcNoImplicitAutorefs, - /// Represents `#[rustc_non_const_trait_method]`. - RustcNonConstTraitMethod, - /// Represents `#[rustc_nounwind]` RustcNounwind, - /// Represents `#[rustc_objc_class]` - RustcObjcClass { classname: Symbol, span: Span }, - - /// Represents `#[rustc_objc_selector]` - RustcObjcSelector { methname: Symbol, span: Span }, - /// Represents `#[rustc_object_lifetime_default]`. RustcObjectLifetimeDefault, /// Represents `#[rustc_offload_kernel]` RustcOffloadKernel, - /// Represents `#[rustc_paren_sugar]`. - RustcParenSugar(Span), - - /// Represents `#[rustc_pass_by_value]` (used by the `rustc_pass_by_value` lint). - RustcPassByValue(Span), - /// Represents `#[rustc_pass_indirectly_in_non_rustic_abis]` RustcPassIndirectlyInNonRusticAbis(Span), - /// Represents `#[rustc_pub_transparent]` (used by the `repr_transparent_external_private_fields` lint). - RustcPubTransparent(Span), - /// Represents `#[rustc_reallocator]` RustcReallocator, @@ -1143,18 +1130,6 @@ pub enum AttributeKind { /// Represents `#[rustc_simd_monomorphize_lane_limit = "N"]`. RustcSimdMonomorphizeLaneLimit(Limit), - /// Represents `#[rustc_skip_during_method_dispatch]`. - RustcSkipDuringMethodDispatch { array: bool, boxed_slice: bool, span: Span }, - - /// Represents `#[rustc_specialization_trait]`. - RustcSpecializationTrait(Span), - - /// Represents `#[rustc_std_internal_symbol]`. - RustcStdInternalSymbol(Span), - - /// Represents `#[rustc_unsafe_specialization_marker]`. - RustcUnsafeSpecializationMarker(Span), - /// Represents `#[rustc_variance]` RustcVariance, @@ -1176,12 +1151,22 @@ pub enum AttributeKind { /// Represents `#[should_panic]` ShouldPanic { reason: Option, span: Span }, + /// Represents `#[rustc_skip_during_method_dispatch]`. + SkipDuringMethodDispatch { array: bool, boxed_slice: bool, span: Span }, + + /// Represents `#[rustc_specialization_trait]`. + SpecializationTrait(Span), + /// Represents `#[stable]`, `#[unstable]` and `#[rustc_allowed_through_unstable_modules]`. Stability { stability: Stability, /// Span of the attribute. span: Span, }, + + /// Represents `#[rustc_std_internal_symbol]`. + StdInternalSymbol(Span), + /// Represents `#[target_feature(enable = "...")]` and /// `#[unsafe(force_target_feature(enable = "...")]`. TargetFeature { features: ThinVec<(Symbol, Span)>, attr_span: Span, was_forced: bool }, @@ -1198,6 +1183,9 @@ pub enum AttributeKind { /// Represents `#[type_length_limit]` TypeLengthLimit { attr_span: Span, limit_span: Span, limit: Limit }, + /// Represents `#[rustc_unsafe_specialization_marker]`. + UnsafeSpecializationMarker(Span), + /// Represents `#[unstable_feature_bound]`. UnstableFeatureBound(ThinVec<(Symbol, Span)>), diff --git a/compiler/rustc_hir/src/attrs/encode_cross_crate.rs b/compiler/rustc_hir/src/attrs/encode_cross_crate.rs index 816ed07c1dc4c..356575416aded 100644 --- a/compiler/rustc_hir/src/attrs/encode_cross_crate.rs +++ b/compiler/rustc_hir/src/attrs/encode_cross_crate.rs @@ -19,26 +19,37 @@ impl AttributeKind { match self { // tidy-alphabetical-start Align { .. } => No, + AllowConstFnUnstable(..) => No, + AllowIncoherentImpl(..) => No, AllowInternalUnsafe(..) => Yes, AllowInternalUnstable(..) => Yes, + AsPtr(..) => Yes, AutomaticallyDerived(..) => Yes, + BodyStability { .. } => No, CfgAttrTrace => Yes, CfgTrace(..) => Yes, CfiEncoding { .. } => Yes, + Coinductive(..) => No, Cold(..) => No, CollapseDebugInfo(..) => Yes, CompilerBuiltins => No, + Confusables { .. } => Yes, ConstContinue(..) => No, + ConstStability { .. } => Yes, + ConstStabilityIndirect => No, Coroutine(..) => No, Coverage(..) => No, CrateName { .. } => No, CrateType(_) => No, CustomMir(_, _, _) => Yes, DebuggerVisualizer(..) => No, + DenyExplicitImpl(..) => No, Deprecation { .. } => Yes, DoNotRecommend { .. } => Yes, Doc(_) => Yes, DocComment { .. } => Yes, + Dummy => No, + DynIncompatibleTrait(..) => No, EiiDeclaration(_) => Yes, EiiForeignItem => No, EiiImpls(..) => No, @@ -58,6 +69,7 @@ impl AttributeKind { LoopMatch(..) => No, MacroEscape(..) => No, MacroExport { .. } => Yes, + MacroTransparency(..) => Yes, MacroUse { .. } => No, Marker(..) => No, MayDangle(..) => No, @@ -75,8 +87,12 @@ impl AttributeKind { NoMangle(..) => Yes, // Needed for rustdoc NoStd(..) => No, NonExhaustive(..) => Yes, // Needed for rustdoc + ObjcClass { .. } => No, + ObjcSelector { .. } => No, Optimize(..) => No, PanicRuntime => No, + ParenSugar(..) => No, + PassByValue(..) => Yes, PatchableFunctionEntry { .. } => Yes, Path(..) => No, PatternComplexityLimit { .. } => No, @@ -86,32 +102,21 @@ impl AttributeKind { ProcMacroAttribute(..) => No, ProcMacroDerive { .. } => No, ProfilerRuntime => No, + PubTransparent(..) => Yes, RecursionLimit { .. } => No, Repr { .. } => No, RustcAllocator => No, RustcAllocatorZeroed => No, RustcAllocatorZeroedVariant { .. } => Yes, - RustcAllowConstFnUnstable(..) => No, - RustcAllowIncoherentImpl(..) => No, - RustcAsPtr(..) => Yes, - RustcBodyStability { .. } => No, RustcBuiltinMacro { .. } => Yes, RustcCoherenceIsCore(..) => No, - RustcCoinductive(..) => No, - RustcConfusables { .. } => Yes, - RustcConstStability { .. } => Yes, - RustcConstStabilityIndirect => No, RustcDeallocator => No, - RustcDenyExplicitImpl(..) => No, - RustcDummy => No, RustcDumpDefParents => No, RustcDumpItemBounds => No, RustcDumpPredicates => No, RustcDumpUserArgs => No, RustcDumpVtable(..) => No, - RustcDynIncompatibleTrait(..) => No, RustcHasIncoherentInherentImpls => Yes, - RustcLayout(..) => No, RustcLayoutScalarValidRangeEnd(..) => Yes, RustcLayoutScalarValidRangeStart(..) => Yes, RustcLegacyConstGenerics { .. } => Yes, @@ -119,39 +124,32 @@ impl AttributeKind { RustcLintOptTy => Yes, RustcLintQueryInstability => Yes, RustcLintUntrackedQueryInformation => Yes, - RustcMacroTransparency(..) => Yes, RustcMain => No, RustcMustImplementOneOf { .. } => No, RustcNeverReturnsNullPointer => Yes, RustcNoImplicitAutorefs => Yes, - RustcNonConstTraitMethod => No, // should be reported via other queries like `constness` RustcNounwind => No, - RustcObjcClass { .. } => No, - RustcObjcSelector { .. } => No, RustcObjectLifetimeDefault => No, RustcOffloadKernel => Yes, - RustcParenSugar(..) => No, - RustcPassByValue(..) => Yes, RustcPassIndirectlyInNonRusticAbis(..) => No, - RustcPubTransparent(..) => Yes, RustcReallocator => No, RustcScalableVector { .. } => Yes, RustcShouldNotBeCalledOnConstItems(..) => Yes, RustcSimdMonomorphizeLaneLimit(..) => Yes, // Affects layout computation, which needs to work cross-crate - RustcSkipDuringMethodDispatch { .. } => No, - RustcSpecializationTrait(..) => No, - RustcStdInternalSymbol(..) => No, - RustcUnsafeSpecializationMarker(..) => No, RustcVariance => No, RustcVarianceOfOpaques => No, Sanitize { .. } => No, ShouldPanic { .. } => No, + SkipDuringMethodDispatch { .. } => No, + SpecializationTrait(..) => No, Stability { .. } => Yes, + StdInternalSymbol(..) => No, TargetFeature { .. } => No, ThreadLocal => No, TrackCaller(..) => Yes, TypeConst(..) => Yes, TypeLengthLimit { .. } => No, + UnsafeSpecializationMarker(..) => No, UnstableFeatureBound(..) => No, Used { .. } => No, WindowsSubsystem(..) => No, diff --git a/compiler/rustc_hir_analysis/src/check/check.rs b/compiler/rustc_hir_analysis/src/check/check.rs index c00122bce559a..f2b06e1cde713 100644 --- a/compiler/rustc_hir_analysis/src/check/check.rs +++ b/compiler/rustc_hir_analysis/src/check/check.rs @@ -1701,10 +1701,7 @@ pub(super) fn check_transparent<'tcx>(tcx: TyCtxt<'tcx>, adt: ty::AdtDef<'tcx>) ty::Array(ty, _) => check_unsuited(tcx, typing_env, *ty), ty::Adt(def, args) => { if !def.did().is_local() - && !find_attr!( - tcx.get_all_attrs(def.did()), - AttributeKind::RustcPubTransparent(_) - ) + && !find_attr!(tcx.get_all_attrs(def.did()), AttributeKind::PubTransparent(_)) { let non_exhaustive = def.is_variant_list_non_exhaustive() || def.variants().iter().any(ty::VariantDef::is_field_list_non_exhaustive); diff --git a/compiler/rustc_hir_analysis/src/check/compare_impl_item.rs b/compiler/rustc_hir_analysis/src/check/compare_impl_item.rs index 9e07d5260d20e..4534cfcf962e8 100644 --- a/compiler/rustc_hir_analysis/src/check/compare_impl_item.rs +++ b/compiler/rustc_hir_analysis/src/check/compare_impl_item.rs @@ -218,7 +218,7 @@ fn compare_method_predicate_entailment<'tcx>( trait_m_predicates.instantiate_own(tcx, trait_to_impl_args).map(|(predicate, _)| predicate), ); - let is_conditionally_const = tcx.is_conditionally_const(impl_m.def_id); + let is_conditionally_const = tcx.is_conditionally_const(impl_def_id); if is_conditionally_const { // Augment the hybrid param-env with the const conditions // of the impl header and the trait method. @@ -592,7 +592,7 @@ pub(super) fn collect_return_position_impl_trait_in_trait_tys<'tcx>( ty, Ty::new_placeholder( tcx, - ty::PlaceholderType::new( + ty::Placeholder::new( universe, ty::BoundTy { var: idx, kind: ty::BoundTyKind::Anon }, ), @@ -2551,7 +2551,7 @@ fn param_env_with_gat_bounds<'tcx>( } }; - let mut bound_vars: smallvec::SmallVec<[ty::BoundVariableKind<'tcx>; 8]> = + let mut bound_vars: smallvec::SmallVec<[ty::BoundVariableKind; 8]> = smallvec::SmallVec::with_capacity(tcx.generics_of(impl_ty.def_id).own_params.len()); // Extend the impl's identity args with late-bound GAT vars let normalize_impl_ty_args = ty::GenericArgs::identity_for_item(tcx, container_id) @@ -2587,7 +2587,7 @@ fn param_env_with_gat_bounds<'tcx>( ty::Const::new_bound( tcx, ty::INNERMOST, - ty::BoundConst::new(ty::BoundVar::from_usize(bound_vars.len() - 1)), + ty::BoundConst { var: ty::BoundVar::from_usize(bound_vars.len() - 1) }, ) .into() } diff --git a/compiler/rustc_hir_analysis/src/check/intrinsic.rs b/compiler/rustc_hir_analysis/src/check/intrinsic.rs index 22ee490b81a7b..e4364a645ba3c 100644 --- a/compiler/rustc_hir_analysis/src/check/intrinsic.rs +++ b/compiler/rustc_hir_analysis/src/check/intrinsic.rs @@ -213,6 +213,7 @@ fn intrinsic_operation_unsafety(tcx: TyCtxt<'_>, intrinsic_id: LocalDefId) -> hi | sym::truncf128 | sym::type_id | sym::type_id_eq + | sym::type_id_implements_trait | sym::type_name | sym::type_of | sym::ub_checks @@ -322,6 +323,12 @@ pub(crate) fn check_intrinsic_type( let type_id = tcx.type_of(tcx.lang_items().type_id().unwrap()).no_bound_vars().unwrap(); (0, 0, vec![type_id, type_id], tcx.types.bool) } + sym::type_id_implements_trait => ( + 0, + 0, + vec![tcx.type_of(tcx.lang_items().type_id().unwrap()).no_bound_vars().unwrap(); 2], + tcx.types.bool, + ), sym::type_of => ( 0, 0, diff --git a/compiler/rustc_hir_analysis/src/coherence/inherent_impls.rs b/compiler/rustc_hir_analysis/src/coherence/inherent_impls.rs index edaf33e493c04..fe47f3258846d 100644 --- a/compiler/rustc_hir_analysis/src/coherence/inherent_impls.rs +++ b/compiler/rustc_hir_analysis/src/coherence/inherent_impls.rs @@ -91,7 +91,7 @@ impl<'tcx> InherentCollect<'tcx> { for &impl_item in items { if !find_attr!( self.tcx.get_all_attrs(impl_item), - AttributeKind::RustcAllowIncoherentImpl(_) + AttributeKind::AllowIncoherentImpl(_) ) { let impl_span = self.tcx.def_span(impl_def_id); return Err(self.tcx.dcx().emit_err(errors::InherentTyOutsideRelevant { @@ -125,7 +125,7 @@ impl<'tcx> InherentCollect<'tcx> { for &impl_item in items { if !find_attr!( self.tcx.get_all_attrs(impl_item), - AttributeKind::RustcAllowIncoherentImpl(_) + AttributeKind::AllowIncoherentImpl(_) ) { let span = self.tcx.def_span(impl_def_id); return Err(self.tcx.dcx().emit_err(errors::InherentTyOutsidePrimitive { diff --git a/compiler/rustc_hir_analysis/src/collect.rs b/compiler/rustc_hir_analysis/src/collect.rs index f50aff187f252..dd399f9d90def 100644 --- a/compiler/rustc_hir_analysis/src/collect.rs +++ b/compiler/rustc_hir_analysis/src/collect.rs @@ -889,7 +889,7 @@ fn trait_def(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::TraitDef { let attrs = tcx.get_all_attrs(def_id); - let paren_sugar = find_attr!(attrs, AttributeKind::RustcParenSugar(_)); + let paren_sugar = find_attr!(attrs, AttributeKind::ParenSugar(_)); if paren_sugar && !tcx.features().unboxed_closures() { tcx.dcx().emit_err(errors::ParenSugarAttribute { span: item.span }); } @@ -897,23 +897,22 @@ fn trait_def(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::TraitDef { // Only regular traits can be marker. let is_marker = !is_alias && find_attr!(attrs, AttributeKind::Marker(_)); - let rustc_coinductive = find_attr!(attrs, AttributeKind::RustcCoinductive(_)); + let rustc_coinductive = find_attr!(attrs, AttributeKind::Coinductive(_)); let is_fundamental = find_attr!(attrs, AttributeKind::Fundamental); let [skip_array_during_method_dispatch, skip_boxed_slice_during_method_dispatch] = find_attr!( attrs, - AttributeKind::RustcSkipDuringMethodDispatch { array, boxed_slice, span: _ } => [*array, *boxed_slice] + AttributeKind::SkipDuringMethodDispatch { array, boxed_slice, span: _ } => [*array, *boxed_slice] ) .unwrap_or([false; 2]); - let specialization_kind = - if find_attr!(attrs, AttributeKind::RustcUnsafeSpecializationMarker(_)) { - ty::trait_def::TraitSpecializationKind::Marker - } else if find_attr!(attrs, AttributeKind::RustcSpecializationTrait(_)) { - ty::trait_def::TraitSpecializationKind::AlwaysApplicable - } else { - ty::trait_def::TraitSpecializationKind::None - }; + let specialization_kind = if find_attr!(attrs, AttributeKind::UnsafeSpecializationMarker(_)) { + ty::trait_def::TraitSpecializationKind::Marker + } else if find_attr!(attrs, AttributeKind::SpecializationTrait(_)) { + ty::trait_def::TraitSpecializationKind::AlwaysApplicable + } else { + ty::trait_def::TraitSpecializationKind::None + }; let must_implement_one_of = find_attr!( attrs, @@ -924,9 +923,9 @@ fn trait_def(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::TraitDef { .collect::>() ); - let deny_explicit_impl = find_attr!(attrs, AttributeKind::RustcDenyExplicitImpl(_)); + let deny_explicit_impl = find_attr!(attrs, AttributeKind::DenyExplicitImpl(_)); let force_dyn_incompatible = - find_attr!(attrs, AttributeKind::RustcDynIncompatibleTrait(span) => *span); + find_attr!(attrs, AttributeKind::DynIncompatibleTrait(span) => *span); ty::TraitDef { def_id: def_id.to_def_id(), diff --git a/compiler/rustc_hir_analysis/src/collect/item_bounds.rs b/compiler/rustc_hir_analysis/src/collect/item_bounds.rs index a01ee2d31a3de..7025f7ac84b02 100644 --- a/compiler/rustc_hir_analysis/src/collect/item_bounds.rs +++ b/compiler/rustc_hir_analysis/src/collect/item_bounds.rs @@ -241,7 +241,7 @@ struct MapAndCompressBoundVars<'tcx> { binder: ty::DebruijnIndex, /// List of bound vars that remain unsubstituted because they were not /// mentioned in the GAT's args. - still_bound_vars: Vec>, + still_bound_vars: Vec, /// Subtle invariant: If the `GenericArg` is bound, then it should be /// stored with the debruijn index of `INNERMOST` so it can be shifted /// correctly during substitution. @@ -330,8 +330,7 @@ impl<'tcx> TypeFolder> for MapAndCompressBoundVars<'tcx> { } else { let var = ty::BoundVar::from_usize(self.still_bound_vars.len()); self.still_bound_vars.push(ty::BoundVariableKind::Const); - let mapped = - ty::Const::new_bound(self.tcx, ty::INNERMOST, ty::BoundConst::new(var)); + let mapped = ty::Const::new_bound(self.tcx, ty::INNERMOST, ty::BoundConst { var }); self.mapping.insert(old_bound.var, mapped.into()); mapped }; diff --git a/compiler/rustc_hir_analysis/src/collect/resolve_bound_vars.rs b/compiler/rustc_hir_analysis/src/collect/resolve_bound_vars.rs index 26f79d374075b..02443b577d385 100644 --- a/compiler/rustc_hir_analysis/src/collect/resolve_bound_vars.rs +++ b/compiler/rustc_hir_analysis/src/collect/resolve_bound_vars.rs @@ -63,9 +63,9 @@ impl ResolvedArg { struct BoundVarContext<'a, 'tcx> { tcx: TyCtxt<'tcx>, - rbv: &'a mut ResolveBoundVars<'tcx>, + rbv: &'a mut ResolveBoundVars, disambiguator: &'a mut DisambiguatorState, - scope: ScopeRef<'a, 'tcx>, + scope: ScopeRef<'a>, opaque_capture_errors: RefCell>, } @@ -76,7 +76,7 @@ struct OpaqueHigherRankedLifetimeCaptureErrors { } #[derive(Debug)] -enum Scope<'a, 'tcx> { +enum Scope<'a> { /// Declares lifetimes, and each can be early-bound or late-bound. /// The `DebruijnIndex` of late-bound lifetimes starts at `1` and /// it should be shifted by the number of `Binder`s in between the @@ -94,7 +94,7 @@ enum Scope<'a, 'tcx> { /// to append to. hir_id: HirId, - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, /// If this binder comes from a where clause, specify how it was created. /// This is used to diagnose inaccessible lifetimes in APIT: @@ -110,7 +110,7 @@ enum Scope<'a, 'tcx> { /// e.g., `(&T, fn(&T) -> &T);` becomes `(&'_ T, for<'a> fn(&'a T) -> &'a T)`. Body { id: hir::BodyId, - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, }, /// Use a specific lifetime (if `Some`) or leave it unset (to be @@ -118,7 +118,7 @@ enum Scope<'a, 'tcx> { /// for the default choice of lifetime in a trait object type. ObjectLifetimeDefault { lifetime: Option, - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, }, /// When we have nested trait refs, we concatenate late bound vars for inner @@ -126,12 +126,12 @@ enum Scope<'a, 'tcx> { /// lifetimes encountered when identifying the trait that an associated type /// is declared on. Supertrait { - bound_vars: Vec>, - s: ScopeRef<'a, 'tcx>, + bound_vars: Vec, + s: ScopeRef<'a>, }, TraitRefBoundary { - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, }, /// Remap lifetimes that appear in opaque types to fresh lifetime parameters. Given: @@ -148,7 +148,7 @@ enum Scope<'a, 'tcx> { /// Mapping from each captured lifetime `'a` to the duplicate generic parameter `'b`. captures: &'a RefCell>, - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, }, /// Disallows capturing late-bound vars from parent scopes. @@ -157,7 +157,7 @@ enum Scope<'a, 'tcx> { /// since we don't do something more correct like replacing any captured /// late-bound vars with early-bound params in the const's own generics. LateBoundary { - s: ScopeRef<'a, 'tcx>, + s: ScopeRef<'a>, what: &'static str, deny_late_regions: bool, }, @@ -167,7 +167,7 @@ enum Scope<'a, 'tcx> { }, } -impl<'a, 'tcx> Scope<'a, 'tcx> { +impl<'a> Scope<'a> { // A helper for debugging scopes without printing parent scopes fn debug_truncated(&self) -> impl fmt::Debug { fmt::from_fn(move |f| match self { @@ -227,7 +227,7 @@ enum BinderScopeType { Concatenating, } -type ScopeRef<'a, 'tcx> = &'a Scope<'a, 'tcx>; +type ScopeRef<'a> = &'a Scope<'a>; /// Adds query implementations to the [Providers] vtable, see [`rustc_middle::query`] pub(crate) fn provide(providers: &mut Providers) { @@ -253,7 +253,7 @@ pub(crate) fn provide(providers: &mut Providers) { /// You should not read the result of this query directly, but rather use /// `named_variable_map`, `late_bound_vars_map`, etc. #[instrument(level = "debug", skip(tcx))] -fn resolve_bound_vars(tcx: TyCtxt<'_>, local_def_id: hir::OwnerId) -> ResolveBoundVars<'_> { +fn resolve_bound_vars(tcx: TyCtxt<'_>, local_def_id: hir::OwnerId) -> ResolveBoundVars { let mut rbv = ResolveBoundVars::default(); let mut visitor = BoundVarContext { tcx, @@ -287,7 +287,7 @@ fn resolve_bound_vars(tcx: TyCtxt<'_>, local_def_id: hir::OwnerId) -> ResolveBou rbv } -fn late_arg_as_bound_arg<'tcx>(param: &GenericParam<'tcx>) -> ty::BoundVariableKind<'tcx> { +fn late_arg_as_bound_arg<'tcx>(param: &GenericParam<'tcx>) -> ty::BoundVariableKind { let def_id = param.def_id.to_def_id(); match param.kind { GenericParamKind::Lifetime { .. } => { @@ -301,9 +301,7 @@ fn late_arg_as_bound_arg<'tcx>(param: &GenericParam<'tcx>) -> ty::BoundVariableK /// Turn a [`ty::GenericParamDef`] into a bound arg. Generally, this should only /// be used when turning early-bound vars into late-bound vars when lowering /// return type notation. -fn generic_param_def_as_bound_arg<'tcx>( - param: &ty::GenericParamDef, -) -> ty::BoundVariableKind<'tcx> { +fn generic_param_def_as_bound_arg(param: &ty::GenericParamDef) -> ty::BoundVariableKind { match param.kind { ty::GenericParamDefKind::Lifetime => { ty::BoundVariableKind::Region(ty::BoundRegionKind::Named(param.def_id)) @@ -331,9 +329,7 @@ fn opaque_captures_all_in_scope_lifetimes<'tcx>(opaque: &'tcx hir::OpaqueTy<'tcx impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { /// Returns the binders in scope and the type of `Binder` that should be created for a poly trait ref. - fn poly_trait_ref_binder_info( - &mut self, - ) -> (Vec>, BinderScopeType) { + fn poly_trait_ref_binder_info(&mut self) -> (Vec, BinderScopeType) { let mut scope = self.scope; let mut supertrait_bound_vars = vec![]; loop { @@ -368,7 +364,7 @@ impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { Scope::Binder { hir_id, .. } => { // Nested poly trait refs have the binders concatenated - let mut full_binders: Vec> = + let mut full_binders = self.rbv.late_bound_vars.get_mut_or_insert_default(hir_id.local_id).clone(); full_binders.extend(supertrait_bound_vars); break (full_binders, BinderScopeType::Concatenating); @@ -1098,7 +1094,7 @@ fn object_lifetime_default(tcx: TyCtxt<'_>, param_def_id: LocalDefId) -> ObjectL } impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { - fn with(&mut self, wrap_scope: Scope<'_, 'tcx>, f: F) + fn with(&mut self, wrap_scope: Scope<'_>, f: F) where F: for<'b> FnOnce(&mut BoundVarContext<'b, 'tcx>), { @@ -1119,7 +1115,7 @@ impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { *self.opaque_capture_errors.borrow_mut() = this.opaque_capture_errors.into_inner(); } - fn record_late_bound_vars(&mut self, hir_id: HirId, binder: Vec>) { + fn record_late_bound_vars(&mut self, hir_id: HirId, binder: Vec) { if let Some(old) = self.rbv.late_bound_vars.insert(hir_id.local_id, binder) { bug!( "overwrote bound vars for {hir_id:?}:\nold={old:?}\nnew={:?}", @@ -1935,7 +1931,7 @@ impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { def_id: DefId, assoc_ident: Ident, assoc_tag: ty::AssocTag, - ) -> Option<(Vec>, &'tcx ty::AssocItem)> { + ) -> Option<(Vec, &'tcx ty::AssocItem)> { let trait_defines_associated_item_named = |trait_def_id: DefId| { tcx.associated_items(trait_def_id).find_by_ident_and_kind( tcx, @@ -1946,7 +1942,7 @@ impl<'a, 'tcx> BoundVarContext<'a, 'tcx> { }; use smallvec::{SmallVec, smallvec}; - let mut stack: SmallVec<[(DefId, SmallVec<[ty::BoundVariableKind<'tcx>; 8]>); 8]> = + let mut stack: SmallVec<[(DefId, SmallVec<[ty::BoundVariableKind; 8]>); 8]> = smallvec![(def_id, smallvec![])]; let mut visited: FxHashSet = FxHashSet::default(); loop { diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs index 3515ce4ea9399..d6441702b268c 100644 --- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs +++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs @@ -362,7 +362,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ { param_ty: Ty<'tcx>, hir_bounds: I, bounds: &mut Vec<(ty::Clause<'tcx>, Span)>, - bound_vars: &'tcx ty::List>, + bound_vars: &'tcx ty::List, predicate_filter: PredicateFilter, overlapping_assoc_constraints: OverlappingAsssocItemConstraints, ) where @@ -1000,9 +1000,7 @@ impl<'tcx> TypeVisitor> for GenericParamAndBoundVarCollector<'_, 't .delayed_bug(format!("unexpected bound region kind: {:?}", br.kind)); return ControlFlow::Break(guar); } - ty::BoundRegionKind::NamedForPrinting(_) => { - bug!("only used for pretty printing") - } + ty::BoundRegionKind::NamedAnon(_) => bug!("only used for pretty printing"), }); } _ => {} diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs index 9f84f652698b4..867c588e302d3 100644 --- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs +++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs @@ -2310,7 +2310,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ { Some(rbv::ResolvedArg::LateBound(debruijn, index, _)) => ty::Const::new_bound( tcx, debruijn, - ty::BoundConst::new(ty::BoundVar::from_u32(index)), + ty::BoundConst { var: ty::BoundVar::from_u32(index) }, ), Some(rbv::ResolvedArg::Error(guar)) => ty::Const::new_error(tcx, guar), arg => bug!("unexpected bound var resolution for {:?}: {arg:?}", path_hir_id), @@ -3196,8 +3196,8 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ { #[instrument(level = "trace", skip(self, generate_err))] fn validate_late_bound_regions<'cx>( &'cx self, - constrained_regions: FxIndexSet>, - referenced_regions: FxIndexSet>, + constrained_regions: FxIndexSet, + referenced_regions: FxIndexSet, generate_err: impl Fn(&str) -> Diag<'cx>, ) { for br in referenced_regions.difference(&constrained_regions) { diff --git a/compiler/rustc_hir_typeck/src/autoderef.rs b/compiler/rustc_hir_typeck/src/autoderef.rs index f7700179d2a3a..4fe77278706ec 100644 --- a/compiler/rustc_hir_typeck/src/autoderef.rs +++ b/compiler/rustc_hir_typeck/src/autoderef.rs @@ -6,7 +6,7 @@ use itertools::Itertools; use rustc_hir_analysis::autoderef::{Autoderef, AutoderefKind}; use rustc_infer::infer::InferOk; use rustc_infer::traits::PredicateObligations; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind, OverloadedDeref}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, OverloadedDeref}; use rustc_middle::ty::{self, Ty}; use rustc_span::Span; @@ -45,24 +45,22 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { steps.iter().skip(1).map(|&(ty, _)| ty).chain(iter::once(autoderef.final_ty())); let steps: Vec<_> = steps .iter() - .map(|&(source, kind)| match kind { - AutoderefKind::Overloaded => { - self.try_overloaded_deref(autoderef.span(), source) - .and_then(|InferOk { value: method, obligations: o }| { + .map(|&(source, kind)| { + if let AutoderefKind::Overloaded = kind { + self.try_overloaded_deref(autoderef.span(), source).and_then( + |InferOk { value: method, obligations: o }| { obligations.extend(o); // FIXME: we should assert the sig is &T here... there's no reason for this to be fallible. if let ty::Ref(_, _, mutbl) = *method.sig.output().kind() { - Some(DerefAdjustKind::Overloaded(OverloadedDeref { - mutbl, - span: autoderef.span(), - })) + Some(OverloadedDeref { mutbl, span: autoderef.span() }) } else { None } - }) - .unwrap_or(DerefAdjustKind::Builtin) + }, + ) + } else { + None } - AutoderefKind::Builtin => DerefAdjustKind::Builtin, }) .zip_eq(targets) .map(|(autoderef, target)| Adjustment { kind: Adjust::Deref(autoderef), target }) diff --git a/compiler/rustc_hir_typeck/src/coercion.rs b/compiler/rustc_hir_typeck/src/coercion.rs index 36a07b361d9de..52ea6cdeaa0eb 100644 --- a/compiler/rustc_hir_typeck/src/coercion.rs +++ b/compiler/rustc_hir_typeck/src/coercion.rs @@ -50,8 +50,7 @@ use rustc_infer::traits::{ }; use rustc_middle::span_bug; use rustc_middle::ty::adjustment::{ - Adjust, Adjustment, AllowTwoPhase, AutoBorrow, AutoBorrowMutability, DerefAdjustKind, - PointerCoercion, + Adjust, Adjustment, AllowTwoPhase, AutoBorrow, AutoBorrowMutability, PointerCoercion, }; use rustc_middle::ty::error::TypeError; use rustc_middle::ty::{self, Ty, TyCtxt, TypeVisitableExt}; @@ -596,7 +595,7 @@ impl<'f, 'tcx> Coerce<'f, 'tcx> { let mutbl = AutoBorrowMutability::new(mutbl_b, AllowTwoPhase::No); Some(( - Adjustment { kind: Adjust::Deref(DerefAdjustKind::Builtin), target: ty_a }, + Adjustment { kind: Adjust::Deref(None), target: ty_a }, Adjustment { kind: Adjust::Borrow(AutoBorrow::Ref(mutbl)), target: Ty::new_ref(self.tcx, r_borrow, ty_a, mutbl_b), @@ -607,7 +606,7 @@ impl<'f, 'tcx> Coerce<'f, 'tcx> { coerce_mutbls(mt_a, mt_b)?; Some(( - Adjustment { kind: Adjust::Deref(DerefAdjustKind::Builtin), target: ty_a }, + Adjustment { kind: Adjust::Deref(None), target: ty_a }, Adjustment { kind: Adjust::Borrow(AutoBorrow::RawPtr(mt_b)), target: Ty::new_ptr(self.tcx, ty_a, mt_b), @@ -937,7 +936,7 @@ impl<'f, 'tcx> Coerce<'f, 'tcx> { self.unify_and( a_raw, b, - [Adjustment { kind: Adjust::Deref(DerefAdjustKind::Builtin), target: mt_a.ty }], + [Adjustment { kind: Adjust::Deref(None), target: mt_a.ty }], Adjust::Borrow(AutoBorrow::RawPtr(mutbl_b)), ForceLeakCheck::No, ) @@ -1366,7 +1365,6 @@ pub fn can_coerce<'tcx>( /// - WARNING: I don't believe this final type is guaranteed to be /// related to your initial `expected_ty` in any particular way, /// although it will typically be a subtype, so you should check it. -/// Check the note below for more details. /// - Invoking `complete()` may cause us to go and adjust the "adjustments" on /// previously coerced expressions. /// @@ -1380,28 +1378,6 @@ pub fn can_coerce<'tcx>( /// } /// let final_ty = coerce.complete(fcx); /// ``` -/// -/// NOTE: Why does the `expected_ty` participate in the LUB? -/// When coercing, each branch should use the following expectations for type inference: -/// - The branch can be coerced to the expected type of the match/if/whatever. -/// - The branch can be coercion lub'd with the types of the previous branches. -/// Ideally we'd have some sort of `Expectation::ParticipatesInCoerceLub(ongoing_lub_ty, final_ty)`, -/// but adding and using this feels very challenging. -/// What we instead do is to use the expected type of the match/if/whatever as -/// the initial coercion lub. This allows us to use the lub of "expected type of match" with -/// "types from previous branches" as the coercion target, which can contains both expectations. -/// -/// Two concerns with this approach: -/// - We may have incompatible `final_ty` if that lub is different from the expected -/// type of the match. However, in this case coercing the final type of the -/// `CoerceMany` to its expected type would have error'd anyways, so we don't care. -/// - We may constrain the `expected_ty` too early. For some branches with -/// type `a` and `b`, we end up with `(a lub expected_ty) lub b` instead of -/// `(a lub b) lub expected_ty`. They should be the same type. However, -/// `a lub expected_ty` may constrain inference variables in `expected_ty`. -/// In this case the difference does matter and we get actually incorrect results. -/// FIXME: Ideally we'd compute the final type without unnecessarily constraining -/// the expected type of the match when computing the types of its branches. pub(crate) struct CoerceMany<'tcx> { expected_ty: Ty<'tcx>, final_ty: Option>, diff --git a/compiler/rustc_hir_typeck/src/demand.rs b/compiler/rustc_hir_typeck/src/demand.rs index 84663ff884b4a..3f214b4d2fccb 100644 --- a/compiler/rustc_hir_typeck/src/demand.rs +++ b/compiler/rustc_hir_typeck/src/demand.rs @@ -605,14 +605,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { parent_id = self.tcx.parent_hir_id(*hir_id); parent } - hir::Node::Stmt(hir::Stmt { hir_id, kind: hir::StmtKind::Let(_), .. }) => { - parent_id = self.tcx.parent_hir_id(*hir_id); - parent - } - hir::Node::LetStmt(hir::LetStmt { hir_id, .. }) => { - parent_id = self.tcx.parent_hir_id(*hir_id); - parent - } hir::Node::Block(_) => { parent_id = self.tcx.parent_hir_id(parent_id); parent diff --git a/compiler/rustc_hir_typeck/src/expr.rs b/compiler/rustc_hir_typeck/src/expr.rs index 5b40531f94627..885af3b909b8f 100644 --- a/compiler/rustc_hir_typeck/src/expr.rs +++ b/compiler/rustc_hir_typeck/src/expr.rs @@ -1670,22 +1670,11 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { let coerce_to = expected .to_option(self) - .and_then(|uty| { - self.try_structurally_resolve_type(expr.span, uty) - .builtin_index() - // Avoid using the original type variable as the coerce_to type, as it may resolve - // during the first coercion instead of being the LUB type. - .filter(|t| !self.try_structurally_resolve_type(expr.span, *t).is_ty_var()) - }) + .and_then(|uty| self.try_structurally_resolve_type(expr.span, uty).builtin_index()) .unwrap_or_else(|| self.next_ty_var(expr.span)); let mut coerce = CoerceMany::with_capacity(coerce_to, args.len()); for e in args { - // FIXME: the element expectation should use - // `try_structurally_resolve_and_adjust_for_branches` just like in `if` and `match`. - // While that fixes nested coercion, it will break [some - // code like this](https://github.com/rust-lang/rust/pull/140283#issuecomment-2958776528). - // If we find a way to support recursive tuple coercion, this break can be avoided. let e_ty = self.check_expr_with_hint(e, coerce_to); let cause = self.misc(e.span); coerce.coerce(self, &cause, e, e_ty); diff --git a/compiler/rustc_hir_typeck/src/expr_use_visitor.rs b/compiler/rustc_hir_typeck/src/expr_use_visitor.rs index 171184d3a562b..ad34994526ed9 100644 --- a/compiler/rustc_hir_typeck/src/expr_use_visitor.rs +++ b/compiler/rustc_hir_typeck/src/expr_use_visitor.rs @@ -22,7 +22,6 @@ use rustc_middle::hir::place::ProjectionKind; pub use rustc_middle::hir::place::{Place, PlaceBase, PlaceWithHirId, Projection}; use rustc_middle::mir::FakeReadCause; use rustc_middle::thir::DerefPatBorrowMode; -use rustc_middle::ty::adjustment::DerefAdjustKind; use rustc_middle::ty::{ self, BorrowKind, Ty, TyCtxt, TypeFoldable, TypeVisitableExt as _, adjustment, }; @@ -734,14 +733,14 @@ impl<'tcx, Cx: TypeInformationCtxt<'tcx>, D: Delegate<'tcx>> ExprUseVisitor<'tcx self.consume_or_copy(&place_with_id, place_with_id.hir_id); } - adjustment::Adjust::Deref(DerefAdjustKind::Builtin) => {} + adjustment::Adjust::Deref(None) => {} // Autoderefs for overloaded Deref calls in fact reference // their receiver. That is, if we have `(*x)` where `x` // is of type `Rc`, then this in fact is equivalent to // `x.deref()`. Since `deref()` is declared with `&self`, // this is an autoref of `x`. - adjustment::Adjust::Deref(DerefAdjustKind::Overloaded(deref)) => { + adjustment::Adjust::Deref(Some(ref deref)) => { let bk = ty::BorrowKind::from_mutbl(deref.mutbl); self.delegate.borrow_mut().borrow(&place_with_id, place_with_id.hir_id, bk); } @@ -1273,9 +1272,9 @@ impl<'tcx, Cx: TypeInformationCtxt<'tcx>, D: Delegate<'tcx>> ExprUseVisitor<'tcx { let target = self.cx.resolve_vars_if_possible(adjustment.target); match adjustment.kind { - adjustment::Adjust::Deref(deref_kind) => { + adjustment::Adjust::Deref(overloaded) => { // Equivalent to *expr or something similar. - let base = if let DerefAdjustKind::Overloaded(deref) = deref_kind { + let base = if let Some(deref) = overloaded { let ref_ty = Ty::new_ref( self.cx.tcx(), self.cx.tcx().lifetimes.re_erased, diff --git a/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs b/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs index 67007523a0671..91f91d9114449 100644 --- a/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs +++ b/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs @@ -20,9 +20,7 @@ use rustc_hir_analysis::hir_ty_lowering::{ use rustc_infer::infer::canonical::{Canonical, OriginalQueryValues, QueryResponse}; use rustc_infer::infer::{DefineOpaqueTypes, InferResult}; use rustc_lint::builtin::SELF_CONSTRUCTOR_FROM_OUTER_ITEM; -use rustc_middle::ty::adjustment::{ - Adjust, Adjustment, AutoBorrow, AutoBorrowMutability, DerefAdjustKind, -}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, AutoBorrowMutability}; use rustc_middle::ty::{ self, AdtKind, CanonicalUserType, GenericArgsRef, GenericParamDefKind, IsIdentity, SizedTraitKind, Ty, TyCtxt, TypeFoldable, TypeVisitable, TypeVisitableExt, UserArgs, @@ -268,7 +266,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { debug!("apply_adjustments: adding `{:?}` as diverging type var", a.target); } } - Adjust::Deref(DerefAdjustKind::Overloaded(overloaded_deref)) => { + Adjust::Deref(Some(overloaded_deref)) => { self.enforce_context_effects( None, expr.span, @@ -276,7 +274,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { self.tcx.mk_args(&[expr_ty.into()]), ); } - Adjust::Deref(DerefAdjustKind::Builtin) => { + Adjust::Deref(None) => { // FIXME(const_trait_impl): We *could* enforce `&T: [const] Deref` here. } Adjust::Pointer(_pointer_coercion) => { diff --git a/compiler/rustc_hir_typeck/src/method/suggest.rs b/compiler/rustc_hir_typeck/src/method/suggest.rs index cd25b866b0983..b2803f4347e37 100644 --- a/compiler/rustc_hir_typeck/src/method/suggest.rs +++ b/compiler/rustc_hir_typeck/src/method/suggest.rs @@ -13,9 +13,7 @@ use rustc_data_structures::fx::{FxIndexMap, FxIndexSet}; use rustc_data_structures::sorted_map::SortedMap; use rustc_data_structures::unord::UnordSet; use rustc_errors::codes::*; -use rustc_errors::{ - Applicability, Diag, MultiSpan, StashKey, listify, pluralize, struct_span_code_err, -}; +use rustc_errors::{Applicability, Diag, MultiSpan, StashKey, pluralize, struct_span_code_err}; use rustc_hir::attrs::AttributeKind; use rustc_hir::def::{CtorKind, DefKind, Res}; use rustc_hir::def_id::DefId; @@ -52,51 +50,6 @@ use crate::errors::{self, CandidateTraitNote, NoAssociatedItem}; use crate::method::probe::UnsatisfiedPredicates; use crate::{Expectation, FnCtxt}; -/// Tracks trait bounds and detects duplicates between ref and non-ref versions of self types. -/// This is used to condense error messages when the same trait bound appears for both -/// `T` and `&T` (or `&mut T`). -struct TraitBoundDuplicateTracker { - trait_def_ids: FxIndexSet, - seen_ref: FxIndexSet, - seen_non_ref: FxIndexSet, - has_ref_dupes: bool, -} - -impl TraitBoundDuplicateTracker { - fn new() -> Self { - Self { - trait_def_ids: FxIndexSet::default(), - seen_ref: FxIndexSet::default(), - seen_non_ref: FxIndexSet::default(), - has_ref_dupes: false, - } - } - - /// Track a trait bound. `is_ref` indicates whether the self type is a reference. - fn track(&mut self, def_id: DefId, is_ref: bool) { - self.trait_def_ids.insert(def_id); - if is_ref { - if self.seen_non_ref.contains(&def_id) { - self.has_ref_dupes = true; - } - self.seen_ref.insert(def_id); - } else { - if self.seen_ref.contains(&def_id) { - self.has_ref_dupes = true; - } - self.seen_non_ref.insert(def_id); - } - } - - fn has_ref_dupes(&self) -> bool { - self.has_ref_dupes - } - - fn into_trait_def_ids(self) -> FxIndexSet { - self.trait_def_ids - } -} - impl<'a, 'tcx> FnCtxt<'a, 'tcx> { fn is_slice_ty(&self, ty: Ty<'tcx>, span: Span) -> bool { self.autoderef(span, ty) @@ -1051,7 +1004,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { item_ident: Ident, item_kind: &str, bound_spans: SortedMap>, - unsatisfied_predicates: &UnsatisfiedPredicates<'tcx>, ) { let mut ty_span = match rcvr_ty.kind() { ty::Param(param_type) => { @@ -1060,61 +1012,13 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { ty::Adt(def, _) if def.did().is_local() => Some(self.tcx.def_span(def.did())), _ => None, }; - let rcvr_ty_str = self.tcx.short_string(rcvr_ty, err.long_ty_path()); - let mut tracker = TraitBoundDuplicateTracker::new(); - for (predicate, _parent_pred, _cause) in unsatisfied_predicates { - if let ty::PredicateKind::Clause(ty::ClauseKind::Trait(pred)) = - predicate.kind().skip_binder() - && let self_ty = pred.trait_ref.self_ty() - && self_ty.peel_refs() == rcvr_ty - { - let is_ref = matches!(self_ty.kind(), ty::Ref(..)); - tracker.track(pred.trait_ref.def_id, is_ref); - } - } - let has_ref_dupes = tracker.has_ref_dupes(); - let mut missing_trait_names = tracker - .into_trait_def_ids() - .into_iter() - .map(|def_id| format!("`{}`", self.tcx.def_path_str(def_id))) - .collect::>(); - missing_trait_names.sort(); - let should_condense = - has_ref_dupes && missing_trait_names.len() > 1 && matches!(rcvr_ty.kind(), ty::Adt(..)); - let missing_trait_list = if should_condense { - Some(match missing_trait_names.as_slice() { - [only] => only.clone(), - [first, second] => format!("{first} or {second}"), - [rest @ .., last] => format!("{} or {last}", rest.join(", ")), - [] => String::new(), - }) - } else { - None - }; for (span, mut bounds) in bound_spans { if !self.tcx.sess.source_map().is_span_accessible(span) { continue; } bounds.sort(); bounds.dedup(); - let is_ty_span = Some(span) == ty_span; - if is_ty_span && should_condense { - ty_span.take(); - let label = if let Some(missing_trait_list) = &missing_trait_list { - format!( - "{item_kind} `{item_ident}` not found for this {} because `{rcvr_ty_str}` doesn't implement {missing_trait_list}", - rcvr_ty.prefix_string(self.tcx) - ) - } else { - format!( - "{item_kind} `{item_ident}` not found for this {}", - rcvr_ty.prefix_string(self.tcx) - ) - }; - err.span_label(span, label); - continue; - } - let pre = if is_ty_span { + let pre = if Some(span) == ty_span { ty_span.take(); format!( "{item_kind} `{item_ident}` not found for this {} because it ", @@ -1344,7 +1248,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { item_ident, item_kind, bound_spans, - unsatisfied_predicates, ); self.note_derefed_ty_has_method(&mut err, source, rcvr_ty, item_ident, expected); @@ -1604,7 +1507,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { bound_spans: &mut SortedMap>, ) { let tcx = self.tcx; - let rcvr_ty_str = self.tcx.short_string(rcvr_ty, err.long_ty_path()); let mut type_params = FxIndexMap::default(); // Pick out the list of unimplemented traits on the receiver. @@ -1896,27 +1798,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { let mut spanned_predicates: Vec<_> = spanned_predicates.into_iter().collect(); spanned_predicates.sort_by_key(|(span, _)| *span); for (_, (primary_spans, span_labels, predicates)) in spanned_predicates { - let mut tracker = TraitBoundDuplicateTracker::new(); - let mut all_trait_bounds_for_rcvr = true; - for pred in &predicates { - match pred.kind().skip_binder() { - ty::PredicateKind::Clause(ty::ClauseKind::Trait(pred)) => { - let self_ty = pred.trait_ref.self_ty(); - if self_ty.peel_refs() != rcvr_ty { - all_trait_bounds_for_rcvr = false; - break; - } - let is_ref = matches!(self_ty.kind(), ty::Ref(..)); - tracker.track(pred.trait_ref.def_id, is_ref); - } - _ => { - all_trait_bounds_for_rcvr = false; - break; - } - } - } - let has_ref_dupes = tracker.has_ref_dupes(); - let trait_def_ids = tracker.into_trait_def_ids(); let mut preds: Vec<_> = predicates .iter() .filter_map(|pred| format_pred(**pred)) @@ -1924,27 +1805,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { .collect(); preds.sort(); preds.dedup(); - let availability_note = if all_trait_bounds_for_rcvr - && has_ref_dupes - && trait_def_ids.len() > 1 - && matches!(rcvr_ty.kind(), ty::Adt(..)) - { - let mut trait_names = trait_def_ids - .into_iter() - .map(|def_id| format!("`{}`", tcx.def_path_str(def_id))) - .collect::>(); - trait_names.sort(); - listify(&trait_names, |name| name.to_string()).map(|traits| { - format!( - "for `{item_ident}` to be available, `{rcvr_ty_str}` must implement {traits}" - ) - }) - } else { - None - }; - let msg = if let Some(availability_note) = availability_note { - availability_note - } else if let [pred] = &preds[..] { + let msg = if let [pred] = &preds[..] { format!("trait bound {pred} was not satisfied") } else { format!("the following trait bounds were not satisfied:\n{}", preds.join("\n"),) @@ -2242,7 +2103,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { for inherent_method in self.tcx.associated_items(inherent_impl_did).in_definition_order() { - if let Some(candidates) = find_attr!(self.tcx.get_all_attrs(inherent_method.def_id), AttributeKind::RustcConfusables{symbols, ..} => symbols) + if let Some(candidates) = find_attr!(self.tcx.get_all_attrs(inherent_method.def_id), AttributeKind::Confusables{symbols, ..} => symbols) && candidates.contains(&item_name.name) && inherent_method.is_fn() { @@ -3420,63 +3281,6 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { } } - /// Checks if we can suggest a derive macro for the unmet trait bound. - /// Returns Some(list_of_derives) if possible, or None if not. - fn consider_suggesting_derives_for_ty( - &self, - trait_pred: ty::TraitPredicate<'tcx>, - adt: ty::AdtDef<'tcx>, - ) -> Option> { - let diagnostic_name = self.tcx.get_diagnostic_name(trait_pred.def_id())?; - - let can_derive = match diagnostic_name { - sym::Default - | sym::Eq - | sym::PartialEq - | sym::Ord - | sym::PartialOrd - | sym::Clone - | sym::Copy - | sym::Hash - | sym::Debug => true, - _ => false, - }; - - if !can_derive { - return None; - } - - let trait_def_id = trait_pred.def_id(); - let self_ty = trait_pred.self_ty(); - - // We need to check if there is already a manual implementation of the trait - // for this specific ADT to avoid suggesting `#[derive(..)]` that would conflict. - if self.tcx.non_blanket_impls_for_ty(trait_def_id, self_ty).any(|impl_def_id| { - self.tcx - .type_of(impl_def_id) - .instantiate_identity() - .ty_adt_def() - .is_some_and(|def| def.did() == adt.did()) - }) { - return None; - } - - let mut derives = Vec::new(); - let self_name = self_ty.to_string(); - let self_span = self.tcx.def_span(adt.did()); - - for super_trait in supertraits(self.tcx, ty::Binder::dummy(trait_pred.trait_ref)) { - if let Some(parent_diagnostic_name) = self.tcx.get_diagnostic_name(super_trait.def_id()) - { - derives.push((self_name.clone(), self_span, parent_diagnostic_name)); - } - } - - derives.push((self_name, self_span, diagnostic_name)); - - Some(derives) - } - fn note_predicate_source_and_get_derives( &self, err: &mut Diag<'_>, @@ -3494,8 +3298,35 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { Some(adt) if adt.did().is_local() => adt, _ => continue, }; - if let Some(new_derives) = self.consider_suggesting_derives_for_ty(trait_pred, adt) { - derives.extend(new_derives); + if let Some(diagnostic_name) = self.tcx.get_diagnostic_name(trait_pred.def_id()) { + let can_derive = match diagnostic_name { + sym::Default + | sym::Eq + | sym::PartialEq + | sym::Ord + | sym::PartialOrd + | sym::Clone + | sym::Copy + | sym::Hash + | sym::Debug => true, + _ => false, + }; + if can_derive { + let self_name = trait_pred.self_ty().to_string(); + let self_span = self.tcx.def_span(adt.did()); + for super_trait in + supertraits(self.tcx, ty::Binder::dummy(trait_pred.trait_ref)) + { + if let Some(parent_diagnostic_name) = + self.tcx.get_diagnostic_name(super_trait.def_id()) + { + derives.push((self_name.clone(), self_span, parent_diagnostic_name)); + } + } + derives.push((self_name, self_span, diagnostic_name)); + } else { + traits.push(trait_pred.def_id()); + } } else { traits.push(trait_pred.def_id()); } diff --git a/compiler/rustc_hir_typeck/src/pat.rs b/compiler/rustc_hir_typeck/src/pat.rs index f054145dc7e9a..b56ab6dcb4ab2 100644 --- a/compiler/rustc_hir_typeck/src/pat.rs +++ b/compiler/rustc_hir_typeck/src/pat.rs @@ -2841,7 +2841,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { // the bad interactions of the given hack detailed in (note_1). debug!("check_pat_ref: expected={:?}", expected); match expected.maybe_pinned_ref() { - Some((r_ty, r_pinned, r_mutbl, _)) + Some((r_ty, r_pinned, r_mutbl)) if ((ref_pat_matches_mut_ref && r_mutbl >= pat_mutbl) || r_mutbl == pat_mutbl) && pat_pinned == r_pinned => diff --git a/compiler/rustc_hir_typeck/src/place_op.rs b/compiler/rustc_hir_typeck/src/place_op.rs index c33f8bdaffe27..a48db2cc855c0 100644 --- a/compiler/rustc_hir_typeck/src/place_op.rs +++ b/compiler/rustc_hir_typeck/src/place_op.rs @@ -4,8 +4,8 @@ use rustc_infer::infer::InferOk; use rustc_infer::traits::{Obligation, ObligationCauseCode}; use rustc_middle::span_bug; use rustc_middle::ty::adjustment::{ - Adjust, Adjustment, AllowTwoPhase, AutoBorrow, AutoBorrowMutability, DerefAdjustKind, - OverloadedDeref, PointerCoercion, + Adjust, Adjustment, AllowTwoPhase, AutoBorrow, AutoBorrowMutability, OverloadedDeref, + PointerCoercion, }; use rustc_middle::ty::{self, Ty}; use rustc_span::{Span, sym}; @@ -298,8 +298,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> { self.typeck_results.borrow_mut().adjustments_mut().remove(expr.hir_id); if let Some(mut adjustments) = previous_adjustments { for adjustment in &mut adjustments { - if let Adjust::Deref(DerefAdjustKind::Overloaded(ref mut deref)) = - adjustment.kind + if let Adjust::Deref(Some(ref mut deref)) = adjustment.kind && let Some(ok) = self.try_mutable_overloaded_place_op( expr.span, source, diff --git a/compiler/rustc_infer/src/infer/canonical/canonicalizer.rs b/compiler/rustc_infer/src/infer/canonical/canonicalizer.rs index 89ea6324d8543..23f6fee406a55 100644 --- a/compiler/rustc_infer/src/infer/canonical/canonicalizer.rs +++ b/compiler/rustc_infer/src/infer/canonical/canonicalizer.rs @@ -684,19 +684,19 @@ impl<'cx, 'tcx> Canonicalizer<'cx, 'tcx> { CanonicalVarKind::Region(u) => CanonicalVarKind::Region(reverse_universe_map[&u]), CanonicalVarKind::Const(u) => CanonicalVarKind::Const(reverse_universe_map[&u]), CanonicalVarKind::PlaceholderTy(placeholder) => { - CanonicalVarKind::PlaceholderTy(ty::PlaceholderType::new( + CanonicalVarKind::PlaceholderTy(ty::Placeholder::new( reverse_universe_map[&placeholder.universe], placeholder.bound, )) } CanonicalVarKind::PlaceholderRegion(placeholder) => { - CanonicalVarKind::PlaceholderRegion(ty::PlaceholderRegion::new( + CanonicalVarKind::PlaceholderRegion(ty::Placeholder::new( reverse_universe_map[&placeholder.universe], placeholder.bound, )) } CanonicalVarKind::PlaceholderConst(placeholder) => { - CanonicalVarKind::PlaceholderConst(ty::PlaceholderConst::new( + CanonicalVarKind::PlaceholderConst(ty::Placeholder::new( reverse_universe_map[&placeholder.universe], placeholder.bound, )) diff --git a/compiler/rustc_infer/src/infer/mod.rs b/compiler/rustc_infer/src/infer/mod.rs index e15b25500bb57..c9ea420944e23 100644 --- a/compiler/rustc_infer/src/infer/mod.rs +++ b/compiler/rustc_infer/src/infer/mod.rs @@ -447,7 +447,7 @@ pub enum RegionVariableOrigin<'tcx> { /// Region variables created when instantiating a binder with /// existential variables, e.g. when calling a function or method. - BoundRegion(Span, ty::BoundRegionKind<'tcx>, BoundRegionConversionTime), + BoundRegion(Span, ty::BoundRegionKind, BoundRegionConversionTime), UpvarRegion(ty::UpvarId, Span), @@ -1300,13 +1300,13 @@ impl<'tcx> InferCtxt<'tcx> { } impl<'tcx> BoundVarReplacerDelegate<'tcx> for ToFreshVars<'tcx> { - fn replace_region(&mut self, br: ty::BoundRegion<'tcx>) -> ty::Region<'tcx> { + fn replace_region(&mut self, br: ty::BoundRegion) -> ty::Region<'tcx> { self.args[br.var.index()].expect_region() } - fn replace_ty(&mut self, bt: ty::BoundTy<'tcx>) -> Ty<'tcx> { + fn replace_ty(&mut self, bt: ty::BoundTy) -> Ty<'tcx> { self.args[bt.var.index()].expect_ty() } - fn replace_const(&mut self, bc: ty::BoundConst<'tcx>) -> ty::Const<'tcx> { + fn replace_const(&mut self, bc: ty::BoundConst) -> ty::Const<'tcx> { self.args[bc.var.index()].expect_const() } } diff --git a/compiler/rustc_infer/src/infer/outlives/test_type_match.rs b/compiler/rustc_infer/src/infer/outlives/test_type_match.rs index 479daf67a8ba3..7be5daf610565 100644 --- a/compiler/rustc_infer/src/infer/outlives/test_type_match.rs +++ b/compiler/rustc_infer/src/infer/outlives/test_type_match.rs @@ -91,7 +91,7 @@ pub(super) fn can_match_erased_ty<'tcx>( struct MatchAgainstHigherRankedOutlives<'tcx> { tcx: TyCtxt<'tcx>, pattern_depth: ty::DebruijnIndex, - map: FxHashMap, ty::Region<'tcx>>, + map: FxHashMap>, } impl<'tcx> MatchAgainstHigherRankedOutlives<'tcx> { @@ -115,7 +115,7 @@ impl<'tcx> MatchAgainstHigherRankedOutlives<'tcx> { #[instrument(level = "trace", skip(self))] fn bind( &mut self, - br: ty::BoundRegion<'tcx>, + br: ty::BoundRegion, value: ty::Region<'tcx>, ) -> RelateResult<'tcx, ty::Region<'tcx>> { match self.map.entry(br) { diff --git a/compiler/rustc_infer/src/infer/relate/higher_ranked.rs b/compiler/rustc_infer/src/infer/relate/higher_ranked.rs index 324725a079bbe..7a0f70e979b83 100644 --- a/compiler/rustc_infer/src/infer/relate/higher_ranked.rs +++ b/compiler/rustc_infer/src/infer/relate/higher_ranked.rs @@ -33,13 +33,13 @@ impl<'tcx> InferCtxt<'tcx> { let next_universe = self.create_next_universe(); let delegate = FnMutDelegate { - regions: &mut |br: ty::BoundRegion<'tcx>| { + regions: &mut |br: ty::BoundRegion| { ty::Region::new_placeholder(self.tcx, ty::PlaceholderRegion::new(next_universe, br)) }, - types: &mut |bound_ty: ty::BoundTy<'tcx>| { + types: &mut |bound_ty: ty::BoundTy| { Ty::new_placeholder(self.tcx, ty::PlaceholderType::new(next_universe, bound_ty)) }, - consts: &mut |bound_const: ty::BoundConst<'tcx>| { + consts: &mut |bound_const: ty::BoundConst| { ty::Const::new_placeholder( self.tcx, ty::PlaceholderConst::new(next_universe, bound_const), diff --git a/compiler/rustc_lint/src/autorefs.rs b/compiler/rustc_lint/src/autorefs.rs index 5bb7df80ffb36..ed7ac0e33244b 100644 --- a/compiler/rustc_lint/src/autorefs.rs +++ b/compiler/rustc_lint/src/autorefs.rs @@ -1,9 +1,7 @@ use rustc_ast::{BorrowKind, UnOp}; use rustc_hir::attrs::AttributeKind; use rustc_hir::{Expr, ExprKind, Mutability, find_attr}; -use rustc_middle::ty::adjustment::{ - Adjust, Adjustment, AutoBorrow, DerefAdjustKind, OverloadedDeref, -}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, OverloadedDeref}; use rustc_session::{declare_lint, declare_lint_pass}; use crate::lints::{ @@ -167,14 +165,12 @@ fn peel_derefs_adjustments<'a>(mut adjs: &'a [Adjustment<'a>]) -> &'a [Adjustmen /// an implicit borrow (or has an implicit borrow via an overloaded deref). fn has_implicit_borrow(Adjustment { kind, .. }: &Adjustment<'_>) -> Option<(Mutability, bool)> { match kind { - &Adjust::Deref(DerefAdjustKind::Overloaded(OverloadedDeref { mutbl, .. })) => { - Some((mutbl, true)) - } + &Adjust::Deref(Some(OverloadedDeref { mutbl, .. })) => Some((mutbl, true)), &Adjust::Borrow(AutoBorrow::Ref(mutbl)) => Some((mutbl.into(), false)), Adjust::NeverToAny | Adjust::Pointer(..) | Adjust::ReborrowPin(..) - | Adjust::Deref(DerefAdjustKind::Builtin) + | Adjust::Deref(None) | Adjust::Borrow(AutoBorrow::RawPtr(..)) => None, } } diff --git a/compiler/rustc_lint/src/dangling.rs b/compiler/rustc_lint/src/dangling.rs index 71ea801a408ed..af4457f4314b9 100644 --- a/compiler/rustc_lint/src/dangling.rs +++ b/compiler/rustc_lint/src/dangling.rs @@ -268,7 +268,7 @@ fn lint_expr(cx: &LateContext<'_>, expr: &Expr<'_>) { && let ty = cx.typeck_results().expr_ty(receiver) && owns_allocation(cx.tcx, ty) && let Some(fn_id) = cx.typeck_results().type_dependent_def_id(expr.hir_id) - && find_attr!(cx.tcx.get_all_attrs(fn_id), AttributeKind::RustcAsPtr(_)) + && find_attr!(cx.tcx.get_all_attrs(fn_id), AttributeKind::AsPtr(_)) { // FIXME: use `emit_node_lint` when `#[primary_span]` is added. cx.tcx.emit_node_span_lint( diff --git a/compiler/rustc_lint/src/impl_trait_overcaptures.rs b/compiler/rustc_lint/src/impl_trait_overcaptures.rs index 1cdc5e4a1b36b..f6c2e5946079b 100644 --- a/compiler/rustc_lint/src/impl_trait_overcaptures.rs +++ b/compiler/rustc_lint/src/impl_trait_overcaptures.rs @@ -211,7 +211,7 @@ where // When we get into a binder, we need to add its own bound vars to the scope. let mut added = vec![]; for arg in t.bound_vars() { - let arg: ty::BoundVariableKind<'tcx> = arg; + let arg: ty::BoundVariableKind = arg; match arg { ty::BoundVariableKind::Region(ty::BoundRegionKind::Named(def_id)) | ty::BoundVariableKind::Ty(ty::BoundTyKind::Param(def_id)) => { diff --git a/compiler/rustc_lint/src/noop_method_call.rs b/compiler/rustc_lint/src/noop_method_call.rs index 66b4e3c16e936..24682c4562a03 100644 --- a/compiler/rustc_lint/src/noop_method_call.rs +++ b/compiler/rustc_lint/src/noop_method_call.rs @@ -1,7 +1,7 @@ use rustc_hir::def::DefKind; use rustc_hir::{Expr, ExprKind}; use rustc_middle::ty; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_session::{declare_lint, declare_lint_pass}; use rustc_span::sym; @@ -114,10 +114,7 @@ impl<'tcx> LateLintPass<'tcx> for NoopMethodCall { // If there is any user defined auto-deref step, then we don't want to warn. // https://github.com/rust-lang/rust-clippy/issues/9272 - if arg_adjustments - .iter() - .any(|adj| matches!(adj.kind, Adjust::Deref(DerefAdjustKind::Overloaded(_)))) - { + if arg_adjustments.iter().any(|adj| matches!(adj.kind, Adjust::Deref(Some(_)))) { return; } diff --git a/compiler/rustc_lint/src/pass_by_value.rs b/compiler/rustc_lint/src/pass_by_value.rs index 3823c9aa1861e..f4a506d50a41b 100644 --- a/compiler/rustc_lint/src/pass_by_value.rs +++ b/compiler/rustc_lint/src/pass_by_value.rs @@ -44,7 +44,7 @@ fn path_for_pass_by_value(cx: &LateContext<'_>, ty: &hir::Ty<'_>) -> Option + if find_attr!(cx.tcx.get_all_attrs(def_id), AttributeKind::PassByValue(_)) => { let name = cx.tcx.item_ident(def_id); let path_segment = path.segments.last().unwrap(); @@ -52,10 +52,7 @@ fn path_for_pass_by_value(cx: &LateContext<'_>, ty: &hir::Ty<'_>) -> Option { if let ty::Adt(adt, args) = cx.tcx.type_of(did).instantiate_identity().kind() { - if find_attr!( - cx.tcx.get_all_attrs(adt.did()), - AttributeKind::RustcPassByValue(_) - ) { + if find_attr!(cx.tcx.get_all_attrs(adt.did()), AttributeKind::PassByValue(_)) { return Some(cx.tcx.def_path_str_with_args(adt.did(), args)); } } diff --git a/compiler/rustc_lint/src/unused.rs b/compiler/rustc_lint/src/unused.rs index 51d9a4641cd52..506a16355e226 100644 --- a/compiler/rustc_lint/src/unused.rs +++ b/compiler/rustc_lint/src/unused.rs @@ -539,19 +539,10 @@ impl<'tcx> LateLintPass<'tcx> for UnusedResults { ); } MustUsePath::Def(span, def_id, reason) => { - let ancenstor_span = span.find_ancestor_not_from_macro().unwrap_or(*span); - let is_redundant_let_ignore = cx - .sess() - .source_map() - .span_to_prev_source(ancenstor_span) - .ok() - .map(|prev| prev.trim_end().ends_with("let _ =")) - .unwrap_or(false); - let suggestion_span = - if is_redundant_let_ignore { *span } else { ancenstor_span }; + let span = span.find_ancestor_not_from_macro().unwrap_or(*span); cx.emit_span_lint( UNUSED_MUST_USE, - ancenstor_span, + span, UnusedDef { pre: descr_pre, post: descr_post, @@ -560,13 +551,11 @@ impl<'tcx> LateLintPass<'tcx> for UnusedResults { note: *reason, suggestion: (!is_inner).then_some(if expr_is_from_block { UnusedDefSuggestion::BlockTailExpr { - before_span: suggestion_span.shrink_to_lo(), - after_span: suggestion_span.shrink_to_hi(), + before_span: span.shrink_to_lo(), + after_span: span.shrink_to_hi(), } } else { - UnusedDefSuggestion::NormalExpr { - span: suggestion_span.shrink_to_lo(), - } + UnusedDefSuggestion::NormalExpr { span: span.shrink_to_lo() } }), }, ); @@ -805,10 +794,7 @@ trait UnusedDelimLint { ExprKind::Break(_label, None) => return false, ExprKind::Break(_label, Some(break_expr)) => { - // `if (break 'label i) { ... }` removing parens would make `i { ... }` - // be parsed as a struct literal, so keep parentheses if the break value - // ends with a path (which could be mistaken for a struct name). - return matches!(break_expr.kind, ExprKind::Block(..) | ExprKind::Path(..)); + return matches!(break_expr.kind, ExprKind::Block(..)); } ExprKind::Range(_lhs, Some(rhs), _limits) => { @@ -1785,7 +1771,7 @@ declare_lint! { declare_lint_pass!(UnusedAllocation => [UNUSED_ALLOCATION]); impl<'tcx> LateLintPass<'tcx> for UnusedAllocation { - fn check_expr(&mut self, cx: &LateContext<'tcx>, e: &hir::Expr<'_>) { + fn check_expr(&mut self, cx: &LateContext<'_>, e: &hir::Expr<'_>) { match e.kind { hir::ExprKind::Call(path_expr, [_]) if let hir::ExprKind::Path(qpath) = &path_expr.kind @@ -1796,12 +1782,6 @@ impl<'tcx> LateLintPass<'tcx> for UnusedAllocation { for adj in cx.typeck_results().expr_adjustments(e) { if let adjustment::Adjust::Borrow(adjustment::AutoBorrow::Ref(m)) = adj.kind { - if let ty::Ref(_, inner_ty, _) = adj.target.kind() - && inner_ty.is_box() - { - // If the target type is `&Box` or `&mut Box`, the allocation is necessary - continue; - } match m { adjustment::AutoBorrowMutability::Not => { cx.emit_span_lint(UNUSED_ALLOCATION, e.span, UnusedAllocationDiag); diff --git a/compiler/rustc_macros/src/diagnostics/diagnostic_builder.rs b/compiler/rustc_macros/src/diagnostics/diagnostic_builder.rs index 25110fd4f908e..cbc70b55d7ee2 100644 --- a/compiler/rustc_macros/src/diagnostics/diagnostic_builder.rs +++ b/compiler/rustc_macros/src/diagnostics/diagnostic_builder.rs @@ -2,7 +2,6 @@ use proc_macro2::{Ident, Span, TokenStream}; use quote::{format_ident, quote, quote_spanned}; -use syn::parse::ParseStream; use syn::spanned::Spanned; use syn::{Attribute, Meta, Path, Token, Type, parse_quote}; use synstructure::{BindingInfo, Structure, VariantInfo}; @@ -12,7 +11,7 @@ use crate::diagnostics::error::{ DiagnosticDeriveError, span_err, throw_invalid_attr, throw_span_err, }; use crate::diagnostics::utils::{ - FieldInfo, FieldInnerTy, FieldMap, SetOnce, SpannedOption, SubdiagnosticKind, + FieldInfo, FieldInnerTy, FieldMap, HasFieldMap, SetOnce, SpannedOption, SubdiagnosticKind, build_field_mapping, is_doc_comment, report_error_if_not_applied_to_span, report_type_error, should_generate_arg, type_is_bool, type_is_unit, type_matches_path, }; @@ -43,13 +42,19 @@ pub(crate) struct DiagnosticDeriveVariantBuilder { /// Slug is a mandatory part of the struct attribute as corresponds to the Fluent message that /// has the actual diagnostic message. - pub slug: Option, + pub slug: SpannedOption, /// Error codes are a optional part of the struct attribute - this is only set to detect /// multiple specifications. pub code: SpannedOption<()>, } +impl HasFieldMap for DiagnosticDeriveVariantBuilder { + fn get_field_binding(&self, field: &String) -> Option<&TokenStream> { + self.field_map.get(field) + } +} + impl DiagnosticDeriveKind { /// Call `f` for the struct or for each variant of the enum, returning a `TokenStream` with the /// tokens from `f` wrapped in an `match` expression. Emits errors for use of derive on unions @@ -106,7 +111,7 @@ impl DiagnosticDeriveKind { impl DiagnosticDeriveVariantBuilder { pub(crate) fn primary_message(&self) -> Option<&Path> { - match self.slug.as_ref() { + match self.slug.value_ref() { None => { span_err(self.span, "diagnostic slug not specified") .help( @@ -164,7 +169,7 @@ impl DiagnosticDeriveVariantBuilder { &self, attr: &Attribute, ) -> Result, DiagnosticDeriveError> { - let Some(subdiag) = SubdiagnosticVariant::from_attr(attr, &self.field_map)? else { + let Some(subdiag) = SubdiagnosticVariant::from_attr(attr, self)? else { // Some attributes aren't errors - like documentation comments - but also aren't // subdiagnostics. return Ok(None); @@ -186,7 +191,7 @@ impl DiagnosticDeriveVariantBuilder { SubdiagnosticKind::MultipartSuggestion { .. } => unreachable!(), }); - Ok(Some((subdiag.kind, slug, false))) + Ok(Some((subdiag.kind, slug, subdiag.no_span))) } /// Establishes state in the `DiagnosticDeriveBuilder` resulting from the struct @@ -204,54 +209,47 @@ impl DiagnosticDeriveVariantBuilder { let name = attr.path().segments.last().unwrap().ident.to_string(); let name = name.as_str(); + let mut first = true; + if name == "diag" { let mut tokens = TokenStream::new(); - attr.parse_args_with(|input: ParseStream<'_>| { - let mut input = &*input; - let slug_recovery_point = input.fork(); + attr.parse_nested_meta(|nested| { + let path = &nested.path; - let slug = input.parse::()?; - if input.is_empty() || input.peek(Token![,]) { - self.slug = Some(slug); - } else { - input = &slug_recovery_point; + if first && (nested.input.is_empty() || nested.input.peek(Token![,])) { + self.slug.set_once(path.clone(), path.span().unwrap()); + first = false; + return Ok(()); } - while !input.is_empty() { - input.parse::()?; - // Allow trailing comma - if input.is_empty() { - break; - } - let arg_name: Path = input.parse::()?; - if input.peek(Token![,]) { - span_err( - arg_name.span().unwrap(), - "diagnostic slug must be the first argument", - ) + first = false; + + let Ok(nested) = nested.value() else { + span_err( + nested.input.span().unwrap(), + "diagnostic slug must be the first argument", + ) + .emit(); + return Ok(()); + }; + + if path.is_ident("code") { + self.code.set_once((), path.span().unwrap()); + + let code = nested.parse::()?; + tokens.extend(quote! { + diag.code(#code); + }); + } else { + span_err(path.span().unwrap(), "unknown argument") + .note("only the `code` parameter is valid after the slug") .emit(); - continue; - } - let arg_name = arg_name.require_ident()?; - input.parse::()?; - let arg_value = input.parse::()?; - match arg_name.to_string().as_str() { - "code" => { - self.code.set_once((), arg_name.span().unwrap()); - tokens.extend(quote! { - diag.code(#arg_value); - }); - } - _ => { - span_err(arg_name.span().unwrap(), "unknown argument") - .note("only the `code` parameter is valid after the slug") - .emit(); - } - } + + // consume the buffer so we don't have syntax errors from syn + let _ = nested.parse::(); } Ok(()) })?; - return Ok(tokens); } diff --git a/compiler/rustc_macros/src/diagnostics/subdiagnostic.rs b/compiler/rustc_macros/src/diagnostics/subdiagnostic.rs index db2a19ab85ba4..dcd0116d804d3 100644 --- a/compiler/rustc_macros/src/diagnostics/subdiagnostic.rs +++ b/compiler/rustc_macros/src/diagnostics/subdiagnostic.rs @@ -1,10 +1,9 @@ #![deny(unused_must_use)] -use proc_macro2::{Ident, TokenStream}; +use proc_macro2::TokenStream; use quote::{format_ident, quote}; -use syn::parse::ParseStream; use syn::spanned::Spanned; -use syn::{Attribute, Meta, MetaList, Path, Token}; +use syn::{Attribute, Meta, MetaList, Path}; use synstructure::{BindingInfo, Structure, VariantInfo}; use super::utils::SubdiagnosticVariant; @@ -12,10 +11,10 @@ use crate::diagnostics::error::{ DiagnosticDeriveError, invalid_attr, span_err, throw_invalid_attr, throw_span_err, }; use crate::diagnostics::utils::{ - AllowMultipleAlternatives, FieldInfo, FieldInnerTy, FieldMap, SetOnce, SpannedOption, - SubdiagnosticKind, build_field_mapping, build_suggestion_code, is_doc_comment, new_code_ident, - report_error_if_not_applied_to_applicability, report_error_if_not_applied_to_span, - should_generate_arg, + AllowMultipleAlternatives, FieldInfo, FieldInnerTy, FieldMap, HasFieldMap, SetOnce, + SpannedOption, SubdiagnosticKind, build_field_mapping, build_suggestion_code, is_doc_comment, + new_code_ident, report_error_if_not_applied_to_applicability, + report_error_if_not_applied_to_span, should_generate_arg, }; /// The central struct for constructing the `add_to_diag` method from an annotated struct. @@ -143,6 +142,12 @@ struct SubdiagnosticDeriveVariantBuilder<'parent, 'a> { is_enum: bool, } +impl<'parent, 'a> HasFieldMap for SubdiagnosticDeriveVariantBuilder<'parent, 'a> { + fn get_field_binding(&self, field: &String) -> Option<&TokenStream> { + self.fields.get(field) + } +} + /// Provides frequently-needed information about the diagnostic kinds being derived for this type. #[derive(Clone, Copy, Debug)] struct KindsStatistics { @@ -182,12 +187,14 @@ impl<'a> FromIterator<&'a SubdiagnosticKind> for KindsStatistics { } impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { - fn identify_kind(&mut self) -> Result, DiagnosticDeriveError> { + fn identify_kind( + &mut self, + ) -> Result, DiagnosticDeriveError> { let mut kind_slugs = vec![]; for attr in self.variant.ast().attrs { - let Some(SubdiagnosticVariant { kind, slug }) = - SubdiagnosticVariant::from_attr(attr, &self.fields)? + let Some(SubdiagnosticVariant { kind, slug, no_span }) = + SubdiagnosticVariant::from_attr(attr, self)? else { // Some attributes aren't errors - like documentation comments - but also aren't // subdiagnostics. @@ -206,7 +213,7 @@ impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { ); }; - kind_slugs.push((kind, slug)); + kind_slugs.push((kind, slug, no_span)); } Ok(kind_slugs) @@ -430,35 +437,23 @@ impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { let mut code = None; - list.parse_args_with(|input: ParseStream<'_>| { - while !input.is_empty() { - let arg_name = input.parse::()?; - match arg_name.to_string().as_str() { - "code" => { - let code_field = new_code_ident(); - let formatting_init = build_suggestion_code( - &code_field, - input, - &self.fields, - AllowMultipleAlternatives::No, - )?; - code.set_once( - (code_field, formatting_init), - arg_name.span().unwrap(), - ); - } - _ => { - span_err( - arg_name.span().unwrap(), - "`code` is the only valid nested attribute", - ) - .emit(); - } - } - if input.is_empty() { - break; - } - input.parse::()?; + list.parse_nested_meta(|nested| { + if nested.path.is_ident("code") { + let code_field = new_code_ident(); + let span = nested.path.span().unwrap(); + let formatting_init = build_suggestion_code( + &code_field, + nested, + self, + AllowMultipleAlternatives::No, + ); + code.set_once((code_field, formatting_init), span); + } else { + span_err( + nested.path.span().unwrap(), + "`code` is the only valid nested attribute", + ) + .emit(); } Ok(()) })?; @@ -497,7 +492,8 @@ impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { pub(crate) fn into_tokens(&mut self) -> Result { let kind_slugs = self.identify_kind()?; - let kind_stats: KindsStatistics = kind_slugs.iter().map(|(kind, _slug)| kind).collect(); + let kind_stats: KindsStatistics = + kind_slugs.iter().map(|(kind, _slug, _no_span)| kind).collect(); let init = if kind_stats.has_multipart_suggestion { quote! { let mut suggestions = Vec::new(); } @@ -530,13 +526,17 @@ impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { let diag = &self.parent.diag; let mut calls = TokenStream::new(); - for (kind, slug) in kind_slugs { + for (kind, slug, no_span) in kind_slugs { let message = format_ident!("__message"); calls.extend( quote! { let #message = #diag.eagerly_translate(crate::fluent_generated::#slug); }, ); - let name = format_ident!("{}{}", if span_field.is_some() { "span_" } else { "" }, kind); + let name = format_ident!( + "{}{}", + if span_field.is_some() && !no_span { "span_" } else { "" }, + kind + ); let call = match kind { SubdiagnosticKind::Suggestion { suggestion_kind, @@ -588,7 +588,9 @@ impl<'parent, 'a> SubdiagnosticDeriveVariantBuilder<'parent, 'a> { } } _ => { - if let Some(span) = span_field { + if let Some(span) = span_field + && !no_span + { quote! { #diag.#name(#span, #message); } } else { quote! { #diag.#name(#message); } diff --git a/compiler/rustc_macros/src/diagnostics/utils.rs b/compiler/rustc_macros/src/diagnostics/utils.rs index f084ba60ae3f4..c310b99d53513 100644 --- a/compiler/rustc_macros/src/diagnostics/utils.rs +++ b/compiler/rustc_macros/src/diagnostics/utils.rs @@ -6,7 +6,7 @@ use std::str::FromStr; use proc_macro::Span; use proc_macro2::{Ident, TokenStream}; use quote::{ToTokens, format_ident, quote}; -use syn::parse::ParseStream; +use syn::meta::ParseNestedMeta; use syn::punctuated::Punctuated; use syn::spanned::Spanned; use syn::{Attribute, Field, LitStr, Meta, Path, Token, Type, TypeTuple, parenthesized}; @@ -261,104 +261,108 @@ impl SetOnce for SpannedOption { pub(super) type FieldMap = HashMap; -/// In the strings in the attributes supplied to this macro, we want callers to be able to -/// reference fields in the format string. For example: -/// -/// ```ignore (not-usage-example) -/// /// Suggest `==` when users wrote `===`. -/// #[suggestion(slug = "parser-not-javascript-eq", code = "{lhs} == {rhs}")] -/// struct NotJavaScriptEq { -/// #[primary_span] -/// span: Span, -/// lhs: Ident, -/// rhs: Ident, -/// } -/// ``` -/// -/// We want to automatically pick up that `{lhs}` refers `self.lhs` and `{rhs}` refers to -/// `self.rhs`, then generate this call to `format!`: -/// -/// ```ignore (not-usage-example) -/// format!("{lhs} == {rhs}", lhs = self.lhs, rhs = self.rhs) -/// ``` -/// -/// This function builds the entire call to `format!`. -pub(super) fn build_format( - field_map: &FieldMap, - input: &str, - span: proc_macro2::Span, -) -> TokenStream { - // This set is used later to generate the final format string. To keep builds reproducible, - // the iteration order needs to be deterministic, hence why we use a `BTreeSet` here - // instead of a `HashSet`. - let mut referenced_fields: BTreeSet = BTreeSet::new(); - - // At this point, we can start parsing the format string. - let mut it = input.chars().peekable(); - - // Once the start of a format string has been found, process the format string and spit out - // the referenced fields. Leaves `it` sitting on the closing brace of the format string, so - // the next call to `it.next()` retrieves the next character. - while let Some(c) = it.next() { - if c != '{' { - continue; - } - if *it.peek().unwrap_or(&'\0') == '{' { - assert_eq!(it.next().unwrap(), '{'); - continue; - } - let mut eat_argument = || -> Option { - let mut result = String::new(); - // Format specifiers look like: - // - // format := '{' [ argument ] [ ':' format_spec ] '}' . - // - // Therefore, we only need to eat until ':' or '}' to find the argument. - while let Some(c) = it.next() { - result.push(c); - let next = *it.peek().unwrap_or(&'\0'); - if next == '}' { - break; - } else if next == ':' { - // Eat the ':' character. - assert_eq!(it.next().unwrap(), ':'); - break; - } +pub(crate) trait HasFieldMap { + /// Returns the binding for the field with the given name, if it exists on the type. + fn get_field_binding(&self, field: &String) -> Option<&TokenStream>; + + /// In the strings in the attributes supplied to this macro, we want callers to be able to + /// reference fields in the format string. For example: + /// + /// ```ignore (not-usage-example) + /// /// Suggest `==` when users wrote `===`. + /// #[suggestion(slug = "parser-not-javascript-eq", code = "{lhs} == {rhs}")] + /// struct NotJavaScriptEq { + /// #[primary_span] + /// span: Span, + /// lhs: Ident, + /// rhs: Ident, + /// } + /// ``` + /// + /// We want to automatically pick up that `{lhs}` refers `self.lhs` and `{rhs}` refers to + /// `self.rhs`, then generate this call to `format!`: + /// + /// ```ignore (not-usage-example) + /// format!("{lhs} == {rhs}", lhs = self.lhs, rhs = self.rhs) + /// ``` + /// + /// This function builds the entire call to `format!`. + fn build_format(&self, input: &str, span: proc_macro2::Span) -> TokenStream { + // This set is used later to generate the final format string. To keep builds reproducible, + // the iteration order needs to be deterministic, hence why we use a `BTreeSet` here + // instead of a `HashSet`. + let mut referenced_fields: BTreeSet = BTreeSet::new(); + + // At this point, we can start parsing the format string. + let mut it = input.chars().peekable(); + + // Once the start of a format string has been found, process the format string and spit out + // the referenced fields. Leaves `it` sitting on the closing brace of the format string, so + // the next call to `it.next()` retrieves the next character. + while let Some(c) = it.next() { + if c != '{' { + continue; } - // Eat until (and including) the matching '}' - while it.next()? != '}' { + if *it.peek().unwrap_or(&'\0') == '{' { + assert_eq!(it.next().unwrap(), '{'); continue; } - Some(result) - }; + let mut eat_argument = || -> Option { + let mut result = String::new(); + // Format specifiers look like: + // + // format := '{' [ argument ] [ ':' format_spec ] '}' . + // + // Therefore, we only need to eat until ':' or '}' to find the argument. + while let Some(c) = it.next() { + result.push(c); + let next = *it.peek().unwrap_or(&'\0'); + if next == '}' { + break; + } else if next == ':' { + // Eat the ':' character. + assert_eq!(it.next().unwrap(), ':'); + break; + } + } + // Eat until (and including) the matching '}' + while it.next()? != '}' { + continue; + } + Some(result) + }; - if let Some(referenced_field) = eat_argument() { - referenced_fields.insert(referenced_field); + if let Some(referenced_field) = eat_argument() { + referenced_fields.insert(referenced_field); + } } - } - // At this point, `referenced_fields` contains a set of the unique fields that were - // referenced in the format string. Generate the corresponding "x = self.x" format - // string parameters: - let args = referenced_fields.into_iter().map(|field: String| { - let field_ident = format_ident!("{}", field); - let value = match field_map.get(&field) { - Some(value) => value.clone(), - // This field doesn't exist. Emit a diagnostic. - None => { - span_err(span.unwrap(), format!("`{field}` doesn't refer to a field on this type")) + // At this point, `referenced_fields` contains a set of the unique fields that were + // referenced in the format string. Generate the corresponding "x = self.x" format + // string parameters: + let args = referenced_fields.into_iter().map(|field: String| { + let field_ident = format_ident!("{}", field); + let value = match self.get_field_binding(&field) { + Some(value) => value.clone(), + // This field doesn't exist. Emit a diagnostic. + None => { + span_err( + span.unwrap(), + format!("`{field}` doesn't refer to a field on this type"), + ) .emit(); - quote! { - "{#field}" + quote! { + "{#field}" + } } + }; + quote! { + #field_ident = #value } - }; + }); quote! { - #field_ident = #value + format!(#input #(,#args)*) } - }); - quote! { - format!(#input #(,#args)*) } } @@ -424,63 +428,76 @@ pub(super) enum AllowMultipleAlternatives { } fn parse_suggestion_values( - nested: ParseStream<'_>, + nested: ParseNestedMeta<'_>, allow_multiple: AllowMultipleAlternatives, ) -> syn::Result> { - if nested.parse::().is_ok() { - return Ok(vec![nested.parse::()?]); - } - - let content; - parenthesized!(content in nested); - if let AllowMultipleAlternatives::No = allow_multiple { - span_err(content.span().unwrap(), "expected exactly one string literal for `code = ...`") - .emit(); - return Ok(vec![]); - } + let values = if let Ok(val) = nested.value() { + vec![val.parse()?] + } else { + let content; + parenthesized!(content in nested.input); - let literals = Punctuated::::parse_terminated(&content); - Ok(match literals { - Ok(p) if p.is_empty() => { + if let AllowMultipleAlternatives::No = allow_multiple { span_err( - content.span().unwrap(), - "expected at least one string literal for `code(...)`", + nested.input.span().unwrap(), + "expected exactly one string literal for `code = ...`", ) .emit(); vec![] + } else { + let literals = Punctuated::::parse_terminated(&content); + + match literals { + Ok(p) if p.is_empty() => { + span_err( + content.span().unwrap(), + "expected at least one string literal for `code(...)`", + ) + .emit(); + vec![] + } + Ok(p) => p.into_iter().collect(), + Err(_) => { + span_err( + content.span().unwrap(), + "`code(...)` must contain only string literals", + ) + .emit(); + vec![] + } + } } - Ok(p) => p.into_iter().collect(), - Err(_) => { - span_err(content.span().unwrap(), "`code(...)` must contain only string literals") - .emit(); - vec![] - } - }) + }; + + Ok(values) } /// Constructs the `format!()` invocation(s) necessary for a `#[suggestion*(code = "foo")]` or /// `#[suggestion*(code("foo", "bar"))]` attribute field pub(super) fn build_suggestion_code( code_field: &Ident, - nested: ParseStream<'_>, - fields: &FieldMap, + nested: ParseNestedMeta<'_>, + fields: &impl HasFieldMap, allow_multiple: AllowMultipleAlternatives, -) -> Result { - let values = parse_suggestion_values(nested, allow_multiple)?; +) -> TokenStream { + let values = match parse_suggestion_values(nested, allow_multiple) { + Ok(x) => x, + Err(e) => return e.into_compile_error(), + }; - Ok(if let AllowMultipleAlternatives::Yes = allow_multiple { + if let AllowMultipleAlternatives::Yes = allow_multiple { let formatted_strings: Vec<_> = values .into_iter() - .map(|value| build_format(fields, &value.value(), value.span())) + .map(|value| fields.build_format(&value.value(), value.span())) .collect(); quote! { let #code_field = [#(#formatted_strings),*].into_iter(); } } else if let [value] = values.as_slice() { - let formatted_str = build_format(fields, &value.value(), value.span()); + let formatted_str = fields.build_format(&value.value(), value.span()); quote! { let #code_field = #formatted_str; } } else { // error handled previously quote! { let #code_field = String::new(); } - }) + } } /// Possible styles for suggestion subdiagnostics. @@ -588,15 +605,16 @@ pub(super) enum SubdiagnosticKind { pub(super) struct SubdiagnosticVariant { pub(super) kind: SubdiagnosticKind, pub(super) slug: Option, + pub(super) no_span: bool, } impl SubdiagnosticVariant { /// Constructs a `SubdiagnosticVariant` from a field or type attribute such as `#[note]`, - /// `#[error(parser::add_paren)]` or `#[suggestion(code = "...")]`. Returns the + /// `#[error(parser::add_paren, no_span)]` or `#[suggestion(code = "...")]`. Returns the /// `SubdiagnosticKind` and the diagnostic slug, if specified. pub(super) fn from_attr( attr: &Attribute, - fields: &FieldMap, + fields: &impl HasFieldMap, ) -> Result, DiagnosticDeriveError> { // Always allow documentation comments. if is_doc_comment(attr) { @@ -676,7 +694,7 @@ impl SubdiagnosticVariant { | SubdiagnosticKind::HelpOnce | SubdiagnosticKind::Warn | SubdiagnosticKind::MultipartSuggestion { .. } => { - return Ok(Some(SubdiagnosticVariant { kind, slug: None })); + return Ok(Some(SubdiagnosticVariant { kind, slug: None, no_span: false })); } SubdiagnosticKind::Suggestion { .. } => { throw_span_err!(span, "suggestion without `code = \"...\"`") @@ -691,93 +709,112 @@ impl SubdiagnosticVariant { let mut code = None; let mut suggestion_kind = None; + let mut first = true; let mut slug = None; - - list.parse_args_with(|input: ParseStream<'_>| { - let mut is_first = true; - while !input.is_empty() { - let arg_name: Path = input.parse::()?; - let arg_name_span = arg_name.span().unwrap(); - if input.is_empty() || input.parse::().is_ok() { - if is_first { - slug = Some(arg_name); - is_first = false; - } else { - span_err(arg_name_span, "a diagnostic slug must be the first argument to the attribute").emit(); - } - continue + let mut no_span = false; + + list.parse_nested_meta(|nested| { + if nested.input.is_empty() || nested.input.peek(Token![,]) { + if first { + slug = Some(nested.path); + } else if nested.path.is_ident("no_span") { + no_span = true; + } else { + span_err(nested.input.span().unwrap(), "a diagnostic slug must be the first argument to the attribute").emit(); } - is_first = false; - - match (arg_name.require_ident()?.to_string().as_str(), &mut kind) { - ("code", SubdiagnosticKind::Suggestion { code_field, .. }) => { - let code_init = build_suggestion_code( - &code_field, - &input, - fields, - AllowMultipleAlternatives::Yes, - )?; - code.set_once(code_init, arg_name_span); - } - ( - "applicability", - SubdiagnosticKind::Suggestion { applicability, .. } - | SubdiagnosticKind::MultipartSuggestion { applicability, .. }, - ) => { - input.parse::()?; - let value = input.parse::()?; - let value = Applicability::from_str(&value.value()).unwrap_or_else(|()| { - span_err(value.span().unwrap(), "invalid applicability").emit(); - Applicability::Unspecified - }); - applicability.set_once(value, span); - } - ( - "style", - SubdiagnosticKind::Suggestion { .. } - | SubdiagnosticKind::MultipartSuggestion { .. }, - ) => { - input.parse::()?; - let value = input.parse::()?; - - let value = value.value().parse().unwrap_or_else(|()| { - span_err(value.span().unwrap(), "invalid suggestion style") - .help("valid styles are `normal`, `short`, `hidden`, `verbose` and `tool-only`") - .emit(); - SuggestionKind::Normal - }); - - suggestion_kind.set_once(value, span); - } + first = false; + return Ok(()); + } - // Invalid nested attribute - (_, SubdiagnosticKind::Suggestion { .. }) => { - span_err(arg_name_span, "invalid nested attribute") - .help( - "only `style`, `code` and `applicability` are valid nested attributes", - ) - .emit(); - // Consume the rest of the input to avoid spamming errors - let _ = input.parse::(); - } - (_, SubdiagnosticKind::MultipartSuggestion { .. }) => { - span_err(arg_name_span, "invalid nested attribute") - .help("only `style` and `applicability` are valid nested attributes") + first = false; + + let nested_name = nested.path.segments.last().unwrap().ident.to_string(); + let nested_name = nested_name.as_str(); + + let path_span = nested.path.span().unwrap(); + let val_span = nested.input.span().unwrap(); + + macro_rules! get_string { + () => {{ + let Ok(value) = nested.value().and_then(|x| x.parse::()) else { + span_err(val_span, "expected `= \"xxx\"`").emit(); + return Ok(()); + }; + value + }}; + } + + let mut has_errors = false; + let input = nested.input; + + match (nested_name, &mut kind) { + ("code", SubdiagnosticKind::Suggestion { code_field, .. }) => { + let code_init = build_suggestion_code( + code_field, + nested, + fields, + AllowMultipleAlternatives::Yes, + ); + code.set_once(code_init, path_span); + } + ( + "applicability", + SubdiagnosticKind::Suggestion { applicability, .. } + | SubdiagnosticKind::MultipartSuggestion { applicability, .. }, + ) => { + let value = get_string!(); + let value = Applicability::from_str(&value.value()).unwrap_or_else(|()| { + span_err(value.span().unwrap(), "invalid applicability").emit(); + has_errors = true; + Applicability::Unspecified + }); + applicability.set_once(value, span); + } + ( + "style", + SubdiagnosticKind::Suggestion { .. } + | SubdiagnosticKind::MultipartSuggestion { .. }, + ) => { + let value = get_string!(); + + let value = value.value().parse().unwrap_or_else(|()| { + span_err(value.span().unwrap(), "invalid suggestion style") + .help("valid styles are `normal`, `short`, `hidden`, `verbose` and `tool-only`") .emit(); - // Consume the rest of the input to avoid spamming errors - let _ = input.parse::(); - } - _ => { - span_err(arg_name_span, "no nested attribute expected here").emit(); - // Consume the rest of the input to avoid spamming errors - let _ = input.parse::(); - } + has_errors = true; + SuggestionKind::Normal + }); + + suggestion_kind.set_once(value, span); + } + + // Invalid nested attribute + (_, SubdiagnosticKind::Suggestion { .. }) => { + span_err(path_span, "invalid nested attribute") + .help( + "only `no_span`, `style`, `code` and `applicability` are valid nested attributes", + ) + .emit(); + has_errors = true; } + (_, SubdiagnosticKind::MultipartSuggestion { .. }) => { + span_err(path_span, "invalid nested attribute") + .help("only `no_span`, `style` and `applicability` are valid nested attributes") + .emit(); + has_errors = true; + } + _ => { + span_err(path_span, "only `no_span` is a valid nested attribute").emit(); + has_errors = true; + } + } - if input.is_empty() { break } - input.parse::()?; + if has_errors { + // Consume the rest of the input to avoid spamming errors + let _ = input.parse::(); } + Ok(()) })?; @@ -814,7 +851,7 @@ impl SubdiagnosticVariant { | SubdiagnosticKind::Warn => {} } - Ok(Some(SubdiagnosticVariant { kind, slug })) + Ok(Some(SubdiagnosticVariant { kind, slug, no_span })) } } diff --git a/compiler/rustc_macros/src/query.rs b/compiler/rustc_macros/src/query.rs index 0cac699e5b626..1ad9bbc3b4b30 100644 --- a/compiler/rustc_macros/src/query.rs +++ b/compiler/rustc_macros/src/query.rs @@ -280,21 +280,31 @@ fn add_query_desc_cached_impl( let crate::query::Providers { #name: _, .. }; }; - // Generate a function to check whether we should cache the query to disk, for some key. - if let Some((args, expr)) = modifiers.cache.as_ref() { + // Find out if we should cache the query on disk + let cache = if let Some((args, expr)) = modifiers.cache.as_ref() { let tcx = args.as_ref().map(|t| quote! { #t }).unwrap_or_else(|| quote! { _ }); // expr is a `Block`, meaning that `{ #expr }` gets expanded // to `{ { stmts... } }`, which triggers the `unused_braces` lint. // we're taking `key` by reference, but some rustc types usually prefer being passed by value - cached.extend(quote! { + quote! { #[allow(unused_variables, unused_braces, rustc::pass_by_value)] #[inline] pub fn #name<'tcx>(#tcx: TyCtxt<'tcx>, #key: &crate::query::queries::#name::Key<'tcx>) -> bool { #ra_hint #expr } - }); - } + } + } else { + quote! { + // we're taking `key` by reference, but some rustc types usually prefer being passed by value + #[allow(rustc::pass_by_value)] + #[inline] + pub fn #name<'tcx>(_: TyCtxt<'tcx>, _: &crate::query::queries::#name::Key<'tcx>) -> bool { + #ra_hint + false + } + } + }; let (tcx, desc) = &modifiers.desc; let tcx = tcx.as_ref().map_or_else(|| quote! { _ }, |t| quote! { #t }); @@ -312,6 +322,10 @@ fn add_query_desc_cached_impl( descs.extend(quote! { #desc }); + + cached.extend(quote! { + #cache + }); } pub(super) fn rustc_queries(input: TokenStream) -> TokenStream { diff --git a/compiler/rustc_middle/src/hir/mod.rs b/compiler/rustc_middle/src/hir/mod.rs index 82f8eb4bbc4a1..ba2d8febad7c5 100644 --- a/compiler/rustc_middle/src/hir/mod.rs +++ b/compiler/rustc_middle/src/hir/mod.rs @@ -365,33 +365,6 @@ impl<'tcx> TyCtxt<'tcx> { } } } - - #[inline] - fn hir_owner_parent_impl(self, owner_id: OwnerId) -> HirId { - self.opt_local_parent(owner_id.def_id).map_or(CRATE_HIR_ID, |parent_def_id| { - let parent_owner_id = self.local_def_id_to_hir_id(parent_def_id).owner; - HirId { - owner: parent_owner_id, - local_id: self.hir_crate(()).owners[parent_owner_id.def_id] - .unwrap() - .parenting - .get(&owner_id.def_id) - .copied() - .unwrap_or(ItemLocalId::ZERO), - } - }) - } - - /// Optimization of `hir_owner_parent` query as an inlined function - /// in case of non-incremental build. The query itself renamed to `hir_owner_parent_q`. - #[inline] - pub fn hir_owner_parent(self, owner_id: OwnerId) -> HirId { - if self.dep_graph.is_fully_enabled() { - self.hir_owner_parent_q(owner_id) - } else { - self.hir_owner_parent_impl(owner_id) - } - } } /// Hashes computed by [`TyCtxt::hash_owner_nodes`] if necessary. @@ -413,7 +386,20 @@ pub fn provide(providers: &mut Providers) { }; providers.opt_hir_owner_nodes = |tcx, id| tcx.hir_crate(()).owners.get(id)?.as_owner().map(|i| &i.nodes); - providers.hir_owner_parent_q = |tcx, owner_id| tcx.hir_owner_parent_impl(owner_id); + providers.hir_owner_parent = |tcx, owner_id| { + tcx.opt_local_parent(owner_id.def_id).map_or(CRATE_HIR_ID, |parent_def_id| { + let parent_owner_id = tcx.local_def_id_to_hir_id(parent_def_id).owner; + HirId { + owner: parent_owner_id, + local_id: tcx.hir_crate(()).owners[parent_owner_id.def_id] + .unwrap() + .parenting + .get(&owner_id.def_id) + .copied() + .unwrap_or(ItemLocalId::ZERO), + } + }) + }; providers.hir_attr_map = |tcx, id| { tcx.hir_crate(()).owners[id.def_id].as_owner().map_or(AttributeMap::EMPTY, |o| &o.attrs) }; diff --git a/compiler/rustc_middle/src/middle/resolve_bound_vars.rs b/compiler/rustc_middle/src/middle/resolve_bound_vars.rs index d625e9ea08cc5..51a079e8bc122 100644 --- a/compiler/rustc_middle/src/middle/resolve_bound_vars.rs +++ b/compiler/rustc_middle/src/middle/resolve_bound_vars.rs @@ -48,7 +48,7 @@ pub enum ObjectLifetimeDefault { /// Maps the id of each bound variable reference to the variable decl /// that it corresponds to. #[derive(Debug, Default, HashStable)] -pub struct ResolveBoundVars<'tcx> { +pub struct ResolveBoundVars { // Maps from every use of a named (not anonymous) bound var to a // `ResolvedArg` describing how that variable is bound. pub defs: SortedMap, @@ -59,7 +59,7 @@ pub struct ResolveBoundVars<'tcx> { // - closures // - trait refs // - bound types (like `T` in `for<'a> T<'a>: Foo`) - pub late_bound_vars: SortedMap>>, + pub late_bound_vars: SortedMap>, // List captured variables for each opaque type. pub opaque_captured_lifetimes: LocalDefIdMap>, diff --git a/compiler/rustc_middle/src/query/erase.rs b/compiler/rustc_middle/src/query/erase.rs index 32071595ec28f..940cc30c17e6e 100644 --- a/compiler/rustc_middle/src/query/erase.rs +++ b/compiler/rustc_middle/src/query/erase.rs @@ -1,10 +1,3 @@ -//! To improve compile times and code size for the compiler itself, query -//! values are "erased" in some contexts (e.g. inside in-memory cache types), -//! to reduce the number of generic instantiations created during codegen. -//! -//! See for some bootstrap-time -//! and performance benchmarks. - use std::ffi::OsStr; use std::intrinsics::transmute_unchecked; use std::mem::MaybeUninit; @@ -21,169 +14,138 @@ use crate::ty::adjustment::CoerceUnsizedInfo; use crate::ty::{self, Ty, TyCtxt}; use crate::{mir, traits}; -/// Internal implementation detail of [`Erased`]. #[derive(Copy, Clone)] -pub struct ErasedData { - /// We use `MaybeUninit` here to make sure it's legal to store a transmuted - /// value that isn't actually of type `Storage`. - data: MaybeUninit, -} - -/// Trait for types that can be erased into [`Erased`]. -/// -/// Erasing and unerasing values is performed by [`erase_val`] and [`restore_val`]. -/// -/// FIXME: This whole trait could potentially be replaced by `T: Copy` and the -/// storage type `[u8; size_of::()]` when support for that is more mature. -pub trait Erasable: Copy { - /// Storage type to used for erased values of this type. - /// Should be `[u8; N]`, where N is equal to `size_of::`. - /// - /// [`ErasedData`] wraps this storage type in `MaybeUninit` to ensure that - /// transmutes to/from erased storage are well-defined. - type Storage: Copy; -} - -/// A value of `T` that has been "erased" into some opaque storage type. -/// -/// This is helpful for reducing the number of concrete instantiations needed -/// during codegen when building the compiler. -/// -/// Using an opaque type alias allows the type checker to enforce that -/// `Erased` and `Erased` are still distinct types, while allowing -/// monomorphization to see that they might actually use the same storage type. -pub type Erased = ErasedData; - -/// Erases a value of type `T` into `Erased`. -/// -/// `Erased` and `Erased` are type-checked as distinct types, but codegen -/// can see whether they actually have the same storage type. -/// -/// FIXME: This might have soundness issues with erasable types that don't -/// implement the same auto-traits as `[u8; _]`; see -/// +pub struct Erased { + // We use `MaybeUninit` here so we can store any value + // in `data` since we aren't actually storing a `T`. + data: MaybeUninit, +} + +pub trait EraseType: Copy { + type Result: Copy; +} + +// Allow `type_alias_bounds` since compilation will fail without `EraseType`. +#[allow(type_alias_bounds)] +pub type Erase = Erased; + #[inline(always)] -#[define_opaque(Erased)] -pub fn erase_val(value: T) -> Erased { +#[define_opaque(Erase)] +pub fn erase(src: T) -> Erase { // Ensure the sizes match const { - if size_of::() != size_of::() { - panic!("size of T must match erased type ::Storage") + if size_of::() != size_of::() { + panic!("size of T must match erased type T::Result") } }; - ErasedData::<::Storage> { + Erased::<::Result> { // `transmute_unchecked` is needed here because it does not have `transmute`'s size check - // (and thus allows to transmute between `T` and `MaybeUninit`) (we do the size + // (and thus allows to transmute between `T` and `MaybeUninit`) (we do the size // check ourselves in the `const` block above). // // `transmute_copy` is also commonly used for this (and it would work here since - // `Erasable: Copy`), but `transmute_unchecked` better explains the intent. + // `EraseType: Copy`), but `transmute_unchecked` better explains the intent. // // SAFETY: It is safe to transmute to MaybeUninit for types with the same sizes. - data: unsafe { transmute_unchecked::>(value) }, + data: unsafe { transmute_unchecked::>(src) }, } } -/// Restores an erased value to its real type. -/// -/// This relies on the fact that `Erased` and `Erased` are type-checked -/// as distinct types, even if they use the same storage type. +/// Restores an erased value. #[inline(always)] -#[define_opaque(Erased)] -pub fn restore_val(erased_value: Erased) -> T { - let ErasedData { data }: ErasedData<::Storage> = erased_value; - // See comment in `erase_val` for why we use `transmute_unchecked`. +#[define_opaque(Erase)] +pub fn restore(value: Erase) -> T { + let value: Erased<::Result> = value; + // See comment in `erase` for why we use `transmute_unchecked`. // - // SAFETY: Due to the use of impl Trait in `Erased` the only way to safely create an instance - // of `Erased` is to call `erase_val`, so we know that `erased_value.data` is a valid instance - // of `T` of the right size. - unsafe { transmute_unchecked::, T>(data) } + // SAFETY: Due to the use of impl Trait in `Erase` the only way to safely create an instance + // of `Erase` is to call `erase`, so we know that `value.data` is a valid instance of `T` of + // the right size. + unsafe { transmute_unchecked::, T>(value.data) } } -// FIXME(#151565): Using `T: ?Sized` here should let us remove the separate -// impls for fat reference types. -impl Erasable for &'_ T { - type Storage = [u8; size_of::<&'static ()>()]; +impl EraseType for &'_ T { + type Result = [u8; size_of::<&'static ()>()]; } -impl Erasable for &'_ [T] { - type Storage = [u8; size_of::<&'static [()]>()]; +impl EraseType for &'_ [T] { + type Result = [u8; size_of::<&'static [()]>()]; } -impl Erasable for &'_ OsStr { - type Storage = [u8; size_of::<&'static OsStr>()]; +impl EraseType for &'_ OsStr { + type Result = [u8; size_of::<&'static OsStr>()]; } -impl Erasable for &'_ ty::List { - type Storage = [u8; size_of::<&'static ty::List<()>>()]; +impl EraseType for &'_ ty::List { + type Result = [u8; size_of::<&'static ty::List<()>>()]; } -impl Erasable for &'_ ty::ListWithCachedTypeInfo { - type Storage = [u8; size_of::<&'static ty::ListWithCachedTypeInfo<()>>()]; +impl EraseType for &'_ ty::ListWithCachedTypeInfo { + type Result = [u8; size_of::<&'static ty::ListWithCachedTypeInfo<()>>()]; } -impl Erasable for &'_ rustc_index::IndexSlice { - type Storage = [u8; size_of::<&'static rustc_index::IndexSlice>()]; +impl EraseType for &'_ rustc_index::IndexSlice { + type Result = [u8; size_of::<&'static rustc_index::IndexSlice>()]; } -impl Erasable for Result<&'_ T, traits::query::NoSolution> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ T, traits::query::NoSolution> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ [T], traits::query::NoSolution> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ [T], traits::query::NoSolution> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ T, rustc_errors::ErrorGuaranteed> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ T, rustc_errors::ErrorGuaranteed> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ [T], rustc_errors::ErrorGuaranteed> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ [T], rustc_errors::ErrorGuaranteed> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ T, traits::CodegenObligationError> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ T, traits::CodegenObligationError> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ T, &'_ ty::layout::FnAbiError<'_>> { - type Storage = [u8; size_of::>>()]; +impl EraseType for Result<&'_ T, &'_ ty::layout::FnAbiError<'_>> { + type Result = [u8; size_of::>>()]; } -impl Erasable for Result<(&'_ T, crate::thir::ExprId), rustc_errors::ErrorGuaranteed> { - type Storage = [u8; size_of::< +impl EraseType for Result<(&'_ T, crate::thir::ExprId), rustc_errors::ErrorGuaranteed> { + type Result = [u8; size_of::< Result<(&'static (), crate::thir::ExprId), rustc_errors::ErrorGuaranteed>, >()]; } -impl Erasable for Result>, rustc_errors::ErrorGuaranteed> { - type Storage = +impl EraseType for Result>, rustc_errors::ErrorGuaranteed> { + type Result = [u8; size_of::>, rustc_errors::ErrorGuaranteed>>()]; } -impl Erasable for Result { - type Storage = [u8; size_of::>()]; +impl EraseType for Result { + type Result = [u8; size_of::>()]; } -impl Erasable +impl EraseType for Result>>, rustc_errors::ErrorGuaranteed> { - type Storage = [u8; size_of::< + type Result = [u8; size_of::< Result>>, rustc_errors::ErrorGuaranteed>, >()]; } -impl Erasable for Result, traits::query::NoSolution> { - type Storage = [u8; size_of::, traits::query::NoSolution>>()]; +impl EraseType for Result, traits::query::NoSolution> { + type Result = [u8; size_of::, traits::query::NoSolution>>()]; } -impl Erasable for Result> { - type Storage = [u8; size_of::>>()]; +impl EraseType for Result> { + type Result = [u8; size_of::>>()]; } -impl Erasable for Result>, &ty::layout::LayoutError<'_>> { - type Storage = [u8; size_of::< +impl EraseType for Result>, &ty::layout::LayoutError<'_>> { + type Result = [u8; size_of::< Result< rustc_abi::TyAndLayout<'static, Ty<'static>>, &'static ty::layout::LayoutError<'static>, @@ -191,36 +153,35 @@ impl Erasable for Result>, &ty::layout::Layout >()]; } -impl Erasable for Result, mir::interpret::ErrorHandled> { - type Storage = - [u8; size_of::, mir::interpret::ErrorHandled>>()]; +impl EraseType for Result, mir::interpret::ErrorHandled> { + type Result = [u8; size_of::, mir::interpret::ErrorHandled>>()]; } -impl Erasable for Result { - type Storage = [u8; size_of::>()]; +impl EraseType for Result { + type Result = [u8; size_of::>()]; } -impl Erasable for Option<(mir::ConstValue, Ty<'_>)> { - type Storage = [u8; size_of::)>>()]; +impl EraseType for Option<(mir::ConstValue, Ty<'_>)> { + type Result = [u8; size_of::)>>()]; } -impl Erasable for EvalToValTreeResult<'_> { - type Storage = [u8; size_of::>()]; +impl EraseType for EvalToValTreeResult<'_> { + type Result = [u8; size_of::>()]; } -impl Erasable for Result<&'_ ty::List>, ty::util::AlwaysRequiresDrop> { - type Storage = +impl EraseType for Result<&'_ ty::List>, ty::util::AlwaysRequiresDrop> { + type Result = [u8; size_of::>, ty::util::AlwaysRequiresDrop>>()]; } -impl Erasable for Result>, CyclePlaceholder> { - type Storage = [u8; size_of::>, CyclePlaceholder>>()]; +impl EraseType for Result>, CyclePlaceholder> { + type Result = [u8; size_of::>, CyclePlaceholder>>()]; } -impl Erasable +impl EraseType for Result<(&'_ [Spanned>], &'_ [Spanned>]), NormalizationErrorInMono> { - type Storage = [u8; size_of::< + type Result = [u8; size_of::< Result< (&'static [Spanned>], &'static [Spanned>]), NormalizationErrorInMono, @@ -228,89 +189,86 @@ impl Erasable >()]; } -impl Erasable for Result<&'_ TokenStream, ()> { - type Storage = [u8; size_of::>()]; +impl EraseType for Result<&'_ TokenStream, ()> { + type Result = [u8; size_of::>()]; } -impl Erasable for Option<&'_ T> { - type Storage = [u8; size_of::>()]; +impl EraseType for Option<&'_ T> { + type Result = [u8; size_of::>()]; } -impl Erasable for Option<&'_ [T]> { - type Storage = [u8; size_of::>()]; +impl EraseType for Option<&'_ [T]> { + type Result = [u8; size_of::>()]; } -impl Erasable for Option<&'_ OsStr> { - type Storage = [u8; size_of::>()]; +impl EraseType for Option<&'_ OsStr> { + type Result = [u8; size_of::>()]; } -impl Erasable for Option> { - type Storage = [u8; size_of::>>()]; +impl EraseType for Option> { + type Result = [u8; size_of::>>()]; } -impl Erasable for ty::ImplTraitHeader<'_> { - type Storage = [u8; size_of::>()]; +impl EraseType for ty::ImplTraitHeader<'_> { + type Result = [u8; size_of::>()]; } -impl Erasable for Option>> { - type Storage = [u8; size_of::>>>()]; +impl EraseType for Option>> { + type Result = [u8; size_of::>>>()]; } -impl Erasable for rustc_hir::MaybeOwner<'_> { - type Storage = [u8; size_of::>()]; +impl EraseType for rustc_hir::MaybeOwner<'_> { + type Result = [u8; size_of::>()]; } -impl Erasable for ty::EarlyBinder<'_, T> { - type Storage = T::Storage; +impl EraseType for ty::EarlyBinder<'_, T> { + type Result = T::Result; } -impl Erasable for ty::Binder<'_, ty::FnSig<'_>> { - type Storage = [u8; size_of::>>()]; +impl EraseType for ty::Binder<'_, ty::FnSig<'_>> { + type Result = [u8; size_of::>>()]; } -impl Erasable for ty::Binder<'_, ty::CoroutineWitnessTypes>> { - type Storage = +impl EraseType for ty::Binder<'_, ty::CoroutineWitnessTypes>> { + type Result = [u8; size_of::>>>()]; } -impl Erasable for ty::Binder<'_, &'_ ty::List>> { - type Storage = [u8; size_of::>>>()]; +impl EraseType for ty::Binder<'_, &'_ ty::List>> { + type Result = [u8; size_of::>>>()]; } -impl Erasable for (&'_ T0, &'_ T1) { - type Storage = [u8; size_of::<(&'static (), &'static ())>()]; +impl EraseType for (&'_ T0, &'_ T1) { + type Result = [u8; size_of::<(&'static (), &'static ())>()]; } -impl Erasable for (solve::QueryResult<'_>, &'_ T0) { - type Storage = [u8; size_of::<(solve::QueryResult<'static>, &'static ())>()]; +impl EraseType for (solve::QueryResult<'_>, &'_ T0) { + type Result = [u8; size_of::<(solve::QueryResult<'static>, &'static ())>()]; } -impl Erasable for (&'_ T0, &'_ [T1]) { - type Storage = [u8; size_of::<(&'static (), &'static [()])>()]; +impl EraseType for (&'_ T0, &'_ [T1]) { + type Result = [u8; size_of::<(&'static (), &'static [()])>()]; } -impl Erasable for (&'_ [T0], &'_ [T1]) { - type Storage = [u8; size_of::<(&'static [()], &'static [()])>()]; +impl EraseType for (&'_ [T0], &'_ [T1]) { + type Result = [u8; size_of::<(&'static [()], &'static [()])>()]; } -impl Erasable for (&'_ T0, Result<(), ErrorGuaranteed>) { - type Storage = [u8; size_of::<(&'static (), Result<(), ErrorGuaranteed>)>()]; +impl EraseType for (&'_ T0, Result<(), ErrorGuaranteed>) { + type Result = [u8; size_of::<(&'static (), Result<(), ErrorGuaranteed>)>()]; } -macro_rules! impl_erasable_for_simple_types { +macro_rules! trivial { ($($ty:ty),+ $(,)?) => { $( - impl Erasable for $ty { - type Storage = [u8; size_of::<$ty>()]; + impl EraseType for $ty { + type Result = [u8; size_of::<$ty>()]; } )* } } -// For concrete types with no lifetimes, the erased storage for `Foo` is -// `[u8; size_of::()]`. -impl_erasable_for_simple_types! { - // FIXME(#151565): Add `tidy-alphabetical-{start,end}` and sort this. +trivial! { (), bool, Option<(rustc_span::def_id::DefId, rustc_session::config::EntryFnType)>, @@ -388,6 +346,7 @@ impl_erasable_for_simple_types! { rustc_middle::ty::AssocContainer, rustc_middle::ty::Asyncness, rustc_middle::ty::AsyncDestructor, + rustc_middle::ty::BoundVariableKind, rustc_middle::ty::AnonConstKind, rustc_middle::ty::Destructor, rustc_middle::ty::fast_reject::SimplifiedType, @@ -419,23 +378,17 @@ impl_erasable_for_simple_types! { usize, } -macro_rules! impl_erasable_for_single_lifetime_types { +macro_rules! tcx_lifetime { ($($($fake_path:ident)::+),+ $(,)?) => { $( - impl<'tcx> Erasable for $($fake_path)::+<'tcx> { - type Storage = [u8; size_of::<$($fake_path)::+<'static>>()]; + impl<'tcx> EraseType for $($fake_path)::+<'tcx> { + type Result = [u8; size_of::<$($fake_path)::+<'static>>()]; } )* } } -// For types containing a single lifetime and no other generics, e.g. -// `Foo<'tcx>`, the erased storage is `[u8; size_of::>()]`. -// -// FIXME(#151565): Some of the hand-written impls above that only use one -// lifetime can probably be migrated here. -impl_erasable_for_single_lifetime_types! { - // FIXME(#151565): Add `tidy-alphabetical-{start,end}` and sort this. +tcx_lifetime! { rustc_middle::middle::exported_symbols::ExportedSymbol, rustc_middle::mir::Const, rustc_middle::mir::DestructuredConstant, @@ -462,7 +415,6 @@ impl_erasable_for_single_lifetime_types! { rustc_middle::ty::ConstConditions, rustc_middle::ty::inhabitedness::InhabitedPredicate, rustc_middle::ty::Instance, - rustc_middle::ty::BoundVariableKind, rustc_middle::ty::InstanceKind, rustc_middle::ty::layout::FnAbiError, rustc_middle::ty::layout::LayoutError, diff --git a/compiler/rustc_middle/src/query/inner.rs b/compiler/rustc_middle/src/query/inner.rs index 80e64e6a78ede..ee828ae55f7a3 100644 --- a/compiler/rustc_middle/src/query/inner.rs +++ b/compiler/rustc_middle/src/query/inner.rs @@ -10,7 +10,8 @@ use rustc_query_system::query::{QueryCache, QueryMode, try_get_cached}; use rustc_span::{DUMMY_SP, ErrorGuaranteed, Span}; use crate::dep_graph; -use crate::query::erase::{self, Erasable, Erased}; +use crate::query::IntoQueryParam; +use crate::query::erase::{self, Erase, EraseType}; use crate::ty::TyCtxt; /// Shared implementation of `tcx.$query(..)` and `tcx.at(span).$query(..)` @@ -26,6 +27,7 @@ pub(crate) fn query_get_at<'tcx, Cache>( where Cache: QueryCache, { + let key = key.into_query_param(); match try_get_cached(tcx, query_cache, &key) { Some(value) => value, None => execute_query(tcx, span, key, QueryMode::Get).unwrap(), @@ -44,6 +46,7 @@ pub(crate) fn query_ensure<'tcx, Cache>( ) where Cache: QueryCache, { + let key = key.into_query_param(); if try_get_cached(tcx, query_cache, &key).is_none() { execute_query(tcx, DUMMY_SP, key, QueryMode::Ensure { check_cache }); } @@ -60,14 +63,15 @@ pub(crate) fn query_ensure_error_guaranteed<'tcx, Cache, T>( check_cache: bool, ) -> Result<(), ErrorGuaranteed> where - Cache: QueryCache>>, - Result: Erasable, + Cache: QueryCache>>, + Result: EraseType, { + let key = key.into_query_param(); if let Some(res) = try_get_cached(tcx, query_cache, &key) { - erase::restore_val(res).map(drop) + erase::restore(res).map(drop) } else { execute_query(tcx, DUMMY_SP, key, QueryMode::Ensure { check_cache }) - .map(erase::restore_val) + .map(erase::restore) .map(|res| res.map(drop)) // Either we actually executed the query, which means we got a full `Result`, // or we can just assume the query succeeded, because it was green in the @@ -86,17 +90,17 @@ pub(crate) fn query_feed<'tcx, Cache, Value>( hasher: Option, &Value) -> Fingerprint>, cache: &Cache, key: Cache::Key, - erased: Erased, + erased: Erase, ) where - Cache: QueryCache>, + Cache: QueryCache>, Cache::Key: DepNodeParams>, - Value: Erasable + Debug, + Value: EraseType + Debug, { - let value = erase::restore_val::(erased); + let value = erase::restore::(erased); match try_get_cached(tcx, cache, &key) { Some(old) => { - let old = erase::restore_val::(old); + let old = erase::restore::(old); if let Some(hasher) = hasher { let (value_hash, old_hash): (Fingerprint, Fingerprint) = tcx .with_stable_hashing_context(|mut hcx| { diff --git a/compiler/rustc_middle/src/query/mod.rs b/compiler/rustc_middle/src/query/mod.rs index cea50f95df4b4..901a023c4f308 100644 --- a/compiler/rustc_middle/src/query/mod.rs +++ b/compiler/rustc_middle/src/query/mod.rs @@ -88,7 +88,7 @@ use rustc_index::IndexVec; use rustc_lint_defs::LintId; use rustc_macros::rustc_queries; use rustc_query_system::ich::StableHashingContext; -use rustc_query_system::query::{QueryMode, QueryState}; +use rustc_query_system::query::{QueryMode, QueryStackDeferred, QueryState}; use rustc_session::Limits; use rustc_session::config::{EntryFnType, OptLevel, OutputFilenames, SymbolManglingVersion}; use rustc_session::cstore::{ @@ -121,6 +121,7 @@ use crate::mir::interpret::{ use crate::mir::mono::{ CodegenUnit, CollectionMode, MonoItem, MonoItemPartitions, NormalizationErrorInMono, }; +use crate::query::erase::{Erase, erase, restore}; use crate::query::plumbing::CyclePlaceholder; use crate::traits::query::{ CanonicalAliasGoal, CanonicalDropckOutlivesGoal, CanonicalImpliedOutlivesBoundsGoal, @@ -265,7 +266,7 @@ rustc_queries! { /// /// This can be conveniently accessed by `tcx.hir_*` methods. /// Avoid calling this query directly. - query hir_owner_parent_q(key: hir::OwnerId) -> hir::HirId { + query hir_owner_parent(key: hir::OwnerId) -> hir::HirId { desc { |tcx| "getting HIR parent of `{}`", tcx.def_path_str(key) } } @@ -2115,7 +2116,7 @@ rustc_queries! { /// Does lifetime resolution on items. Importantly, we can't resolve /// lifetimes directly on things like trait methods, because of trait params. /// See `rustc_resolve::late::lifetimes` for details. - query resolve_bound_vars(owner_id: hir::OwnerId) -> &'tcx ResolveBoundVars<'tcx> { + query resolve_bound_vars(owner_id: hir::OwnerId) -> &'tcx ResolveBoundVars { arena_cache desc { |tcx| "resolving lifetimes for `{}`", tcx.def_path_str(owner_id) } } @@ -2144,7 +2145,7 @@ rustc_queries! { separate_provide_extern } query late_bound_vars_map(owner_id: hir::OwnerId) - -> &'tcx SortedMap>> { + -> &'tcx SortedMap> { desc { |tcx| "looking up late bound vars inside `{}`", tcx.def_path_str(owner_id) } } /// For an opaque type, return the list of (captured lifetime, inner generic param). diff --git a/compiler/rustc_middle/src/query/plumbing.rs b/compiler/rustc_middle/src/query/plumbing.rs index b21db6eeeea07..0e536352563f4 100644 --- a/compiler/rustc_middle/src/query/plumbing.rs +++ b/compiler/rustc_middle/src/query/plumbing.rs @@ -18,18 +18,6 @@ use crate::query::{ }; use crate::ty::TyCtxt; -pub type WillCacheOnDiskForKeyFn<'tcx, Key> = fn(tcx: TyCtxt<'tcx>, key: &Key) -> bool; - -pub type TryLoadFromDiskFn<'tcx, Key, Value> = fn( - tcx: TyCtxt<'tcx>, - key: &Key, - prev_index: SerializedDepNodeIndex, - index: DepNodeIndex, -) -> Option; - -pub type IsLoadableFromDiskFn<'tcx, Key> = - fn(tcx: TyCtxt<'tcx>, key: &Key, index: SerializedDepNodeIndex) -> bool; - /// Stores function pointers and other metadata for a particular query. /// /// Used indirectly by query plumbing in `rustc_query_system`, via a trait. @@ -43,11 +31,18 @@ pub struct QueryVTable<'tcx, C: QueryCache> { pub query_state: usize, // Offset of this query's cache field in the QueryCaches struct pub query_cache: usize, - pub will_cache_on_disk_for_key_fn: Option>, + pub cache_on_disk: fn(tcx: TyCtxt<'tcx>, key: &C::Key) -> bool, pub execute_query: fn(tcx: TyCtxt<'tcx>, k: C::Key) -> C::Value, pub compute: fn(tcx: TyCtxt<'tcx>, key: C::Key) -> C::Value, - pub try_load_from_disk_fn: Option>, - pub is_loadable_from_disk_fn: Option>, + pub can_load_from_disk: bool, + pub try_load_from_disk: fn( + tcx: TyCtxt<'tcx>, + key: &C::Key, + prev_index: SerializedDepNodeIndex, + index: DepNodeIndex, + ) -> Option, + pub loadable_from_disk: + fn(tcx: TyCtxt<'tcx>, key: &C::Key, index: SerializedDepNodeIndex) -> bool, pub hash_result: HashResult, pub value_from_cycle_error: fn(tcx: TyCtxt<'tcx>, cycle_error: &CycleError, guar: ErrorGuaranteed) -> C::Value, @@ -271,7 +266,6 @@ macro_rules! define_callbacks { pub mod queries { $(pub mod $name { use super::super::*; - use $crate::query::erase::{self, Erased}; pub type Key<'tcx> = $($K)*; pub type Value<'tcx> = $V; @@ -294,33 +288,29 @@ macro_rules! define_callbacks { #[inline(always)] pub fn provided_to_erased<'tcx>( _tcx: TyCtxt<'tcx>, - provided_value: ProvidedValue<'tcx>, - ) -> Erased> { - // Store the provided value in an arena and get a reference - // to it, for queries with `arena_cache`. - let value: Value<'tcx> = query_if_arena!([$($modifiers)*] + value: ProvidedValue<'tcx>, + ) -> Erase> { + erase(query_if_arena!([$($modifiers)*] { use $crate::query::arena_cached::ArenaCached; if mem::needs_drop::<<$V as ArenaCached<'tcx>>::Allocated>() { <$V as ArenaCached>::alloc_in_arena( |v| _tcx.query_system.arenas.$name.alloc(v), - provided_value, + value, ) } else { <$V as ArenaCached>::alloc_in_arena( |v| _tcx.arena.dropless.alloc(v), - provided_value, + value, ) } } - // Otherwise, the provided value is the value. - (provided_value) - ); - erase::erase_val(value) + (value) + )) } - pub type Storage<'tcx> = <$($K)* as keys::Key>::Cache>; + pub type Storage<'tcx> = <$($K)* as keys::Key>::Cache>; // Ensure that keys grow no larger than 88 bytes by accident. // Increase this limit if necessary, but do try to keep the size low if possible @@ -421,9 +411,7 @@ macro_rules! define_callbacks { #[inline(always)] pub fn $name(self, key: query_helper_param_ty!($($K)*)) -> $V { - use $crate::query::{erase, inner}; - - erase::restore_val::<$V>(inner::query_get_at( + restore::<$V>(crate::query::inner::query_get_at( self.tcx, self.tcx.query_system.fns.engine.$name, &self.tcx.query_system.caches.$name, @@ -445,7 +433,7 @@ macro_rules! define_callbacks { #[derive(Default)] pub struct QueryStates<'tcx> { $( - pub $name: QueryState<'tcx, $($K)*>, + pub $name: QueryState<$($K)*, QueryStackDeferred<'tcx>>, )* } @@ -492,7 +480,7 @@ macro_rules! define_callbacks { Span, queries::$name::Key<'tcx>, QueryMode, - ) -> Option<$crate::query::erase::Erased<$V>>,)* + ) -> Option>,)* } }; } diff --git a/compiler/rustc_middle/src/ty/adjustment.rs b/compiler/rustc_middle/src/ty/adjustment.rs index 6d546aede4cf4..c806366b518ae 100644 --- a/compiler/rustc_middle/src/ty/adjustment.rs +++ b/compiler/rustc_middle/src/ty/adjustment.rs @@ -97,7 +97,7 @@ pub enum Adjust { NeverToAny, /// Dereference once, producing a place. - Deref(DerefAdjustKind), + Deref(Option), /// Take the address and produce either a `&` or `*` pointer. Borrow(AutoBorrow), @@ -108,12 +108,6 @@ pub enum Adjust { ReborrowPin(hir::Mutability), } -#[derive(Copy, Clone, Debug, TyEncodable, TyDecodable, HashStable, TypeFoldable, TypeVisitable)] -pub enum DerefAdjustKind { - Builtin, - Overloaded(OverloadedDeref), -} - /// An overloaded autoderef step, representing a `Deref(Mut)::deref(_mut)` /// call, with the signature `&'a T -> &'a U` or `&'a mut T -> &'a mut U`. /// The target type is `U` in both cases, with the region and mutability diff --git a/compiler/rustc_middle/src/ty/codec.rs b/compiler/rustc_middle/src/ty/codec.rs index 4856df3a6222a..75b1317e022bd 100644 --- a/compiler/rustc_middle/src/ty/codec.rs +++ b/compiler/rustc_middle/src/ty/codec.rs @@ -427,11 +427,11 @@ impl<'tcx, D: TyDecoder<'tcx>> RefDecodable<'tcx, D> for [Spanned } } -impl<'tcx, D: TyDecoder<'tcx>> RefDecodable<'tcx, D> for ty::List> { +impl<'tcx, D: TyDecoder<'tcx>> RefDecodable<'tcx, D> for ty::List { fn decode(decoder: &mut D) -> &'tcx Self { let len = decoder.read_usize(); decoder.interner().mk_bound_variable_kinds_from_iter( - (0..len).map::, _>(|_| Decodable::decode(decoder)), + (0..len).map::(|_| Decodable::decode(decoder)), ) } } @@ -495,7 +495,7 @@ impl_decodable_via_ref! { &'tcx ty::List>, &'tcx traits::ImplSource<'tcx, ()>, &'tcx mir::Body<'tcx>, - &'tcx ty::List>, + &'tcx ty::List, &'tcx ty::List>, &'tcx ty::ListWithCachedTypeInfo>, } diff --git a/compiler/rustc_middle/src/ty/consts.rs b/compiler/rustc_middle/src/ty/consts.rs index 5581ad5669aa9..da3caf0bb2103 100644 --- a/compiler/rustc_middle/src/ty/consts.rs +++ b/compiler/rustc_middle/src/ty/consts.rs @@ -94,7 +94,7 @@ impl<'tcx> Const<'tcx> { pub fn new_bound( tcx: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, - bound_const: ty::BoundConst<'tcx>, + bound_const: ty::BoundConst, ) -> Const<'tcx> { Const::new(tcx, ty::ConstKind::Bound(ty::BoundVarIndexKind::Bound(debruijn), bound_const)) } @@ -103,7 +103,7 @@ impl<'tcx> Const<'tcx> { pub fn new_canonical_bound(tcx: TyCtxt<'tcx>, var: ty::BoundVar) -> Const<'tcx> { Const::new( tcx, - ty::ConstKind::Bound(ty::BoundVarIndexKind::Canonical, ty::BoundConst::new(var)), + ty::ConstKind::Bound(ty::BoundVarIndexKind::Canonical, ty::BoundConst { var }), ) } @@ -183,13 +183,13 @@ impl<'tcx> rustc_type_ir::inherent::Const> for Const<'tcx> { fn new_bound( interner: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, - bound_const: ty::BoundConst<'tcx>, + bound_const: ty::BoundConst, ) -> Self { Const::new_bound(interner, debruijn, bound_const) } fn new_anon_bound(tcx: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, var: ty::BoundVar) -> Self { - Const::new_bound(tcx, debruijn, ty::BoundConst::new(var)) + Const::new_bound(tcx, debruijn, ty::BoundConst { var }) } fn new_canonical_bound(tcx: TyCtxt<'tcx>, var: rustc_type_ir::BoundVar) -> Self { diff --git a/compiler/rustc_middle/src/ty/context.rs b/compiler/rustc_middle/src/ty/context.rs index 41e1388e31464..f015d0edc56c8 100644 --- a/compiler/rustc_middle/src/ty/context.rs +++ b/compiler/rustc_middle/src/ty/context.rs @@ -108,8 +108,9 @@ impl<'tcx> Interner for TyCtxt<'tcx> { type GenericArgsSlice = &'tcx [ty::GenericArg<'tcx>]; type GenericArg = ty::GenericArg<'tcx>; type Term = ty::Term<'tcx>; - type BoundVarKinds = &'tcx List>; + type BoundVarKinds = &'tcx List; + type BoundVarKind = ty::BoundVariableKind; type PredefinedOpaques = solve::PredefinedOpaques<'tcx>; fn mk_predefined_opaques_in_body( @@ -143,8 +144,10 @@ impl<'tcx> Interner for TyCtxt<'tcx> { type FnInputTys = &'tcx [Ty<'tcx>]; type ParamTy = ParamTy; + type BoundTy = ty::BoundTy; type Symbol = Symbol; + type PlaceholderTy = ty::PlaceholderType<'tcx>; type ErrorGuaranteed = ErrorGuaranteed; type BoundExistentialPredicates = &'tcx List>; @@ -154,8 +157,10 @@ impl<'tcx> Interner for TyCtxt<'tcx> { type Safety = hir::Safety; type Abi = ExternAbi; type Const = ty::Const<'tcx>; + type PlaceholderConst = ty::PlaceholderConst<'tcx>; type ParamConst = ty::ParamConst; + type BoundConst = ty::BoundConst; type ValueConst = ty::Value<'tcx>; type ExprConst = ty::Expr<'tcx>; type ValTree = ty::ValTree<'tcx>; @@ -164,6 +169,8 @@ impl<'tcx> Interner for TyCtxt<'tcx> { type Region = Region<'tcx>; type EarlyParamRegion = ty::EarlyParamRegion; type LateParamRegion = ty::LateParamRegion; + type BoundRegion = ty::BoundRegion; + type PlaceholderRegion = ty::PlaceholderRegion<'tcx>; type RegionAssumptions = &'tcx ty::List>; @@ -769,13 +776,6 @@ impl<'tcx> Interner for TyCtxt<'tcx> { ) -> (QueryResult<'tcx>, &'tcx inspect::Probe>) { self.evaluate_root_goal_for_proof_tree_raw(canonical_goal) } - - fn item_name(self, id: DefId) -> Symbol { - let id = id.into_query_param(); - self.opt_item_name(id).unwrap_or_else(|| { - bug!("item_name: no name for {:?}", self.def_path(id)); - }) - } } macro_rules! bidirectional_lang_item_map { @@ -938,7 +938,7 @@ pub struct CtxtInterners<'tcx> { const_: InternedSet<'tcx, WithCachedTypeInfo>>, pat: InternedSet<'tcx, PatternKind<'tcx>>, const_allocation: InternedSet<'tcx, Allocation>, - bound_variable_kinds: InternedSet<'tcx, List>>, + bound_variable_kinds: InternedSet<'tcx, List>, layout: InternedSet<'tcx, LayoutData>, adt_def: InternedSet<'tcx, AdtDefData>, external_constraints: InternedSet<'tcx, ExternalConstraintsData>>, @@ -2530,7 +2530,7 @@ nop_list_lift! { type_lists; Ty<'a> => Ty<'tcx> } nop_list_lift! { poly_existential_predicates; PolyExistentialPredicate<'a> => PolyExistentialPredicate<'tcx> } -nop_list_lift! { bound_variable_kinds; ty::BoundVariableKind<'a> => ty::BoundVariableKind<'tcx> } +nop_list_lift! { bound_variable_kinds; ty::BoundVariableKind => ty::BoundVariableKind } // This is the impl for `&'a GenericArgs<'a>`. nop_list_lift! { args; GenericArg<'a> => GenericArg<'tcx> } @@ -2817,7 +2817,7 @@ slice_interners!( poly_existential_predicates: intern_poly_existential_predicates(PolyExistentialPredicate<'tcx>), projs: pub mk_projs(ProjectionKind), place_elems: pub mk_place_elems(PlaceElem<'tcx>), - bound_variable_kinds: pub mk_bound_variable_kinds(ty::BoundVariableKind<'tcx>), + bound_variable_kinds: pub mk_bound_variable_kinds(ty::BoundVariableKind), fields: pub mk_fields(FieldIdx), local_def_ids: intern_local_def_ids(LocalDefId), captures: intern_captures(&'tcx ty::CapturedPlace<'tcx>), @@ -3242,7 +3242,7 @@ impl<'tcx> TyCtxt<'tcx> { pub fn mk_bound_variable_kinds_from_iter(self, iter: I) -> T::Output where I: Iterator, - T: CollectAndApply, &'tcx List>>, + T: CollectAndApply>, { T::collect_and_apply(iter, |xs| self.mk_bound_variable_kinds(xs)) } @@ -3362,7 +3362,7 @@ impl<'tcx> TyCtxt<'tcx> { self.is_late_bound_map(id.owner).is_some_and(|set| set.contains(&id.local_id)) } - pub fn late_bound_vars(self, id: HirId) -> &'tcx List> { + pub fn late_bound_vars(self, id: HirId) -> &'tcx List { self.mk_bound_variable_kinds( &self .late_bound_vars_map(id.owner) @@ -3470,9 +3470,10 @@ impl<'tcx> TyCtxt<'tcx> { pub fn intrinsic(self, def_id: impl IntoQueryParam + Copy) -> Option { match self.def_kind(def_id) { - DefKind::Fn | DefKind::AssocFn => self.intrinsic_raw(def_id), - _ => None, + DefKind::Fn | DefKind::AssocFn => {} + _ => return None, } + self.intrinsic_raw(def_id) } pub fn next_trait_solver_globally(self) -> bool { diff --git a/compiler/rustc_middle/src/ty/fold.rs b/compiler/rustc_middle/src/ty/fold.rs index 3d9148d6ed7ba..ee29afcff638d 100644 --- a/compiler/rustc_middle/src/ty/fold.rs +++ b/compiler/rustc_middle/src/ty/fold.rs @@ -3,7 +3,7 @@ use rustc_hir::def_id::DefId; use rustc_type_ir::data_structures::DelayedMap; use crate::ty::{ - self, Binder, BoundTy, Ty, TyCtxt, TypeFoldable, TypeFolder, TypeSuperFoldable, + self, Binder, BoundConst, BoundTy, Ty, TyCtxt, TypeFoldable, TypeFolder, TypeSuperFoldable, TypeVisitableExt, }; @@ -58,28 +58,28 @@ where /// gets mapped to the same result. `BoundVarReplacer` caches by using /// a `DelayedMap` which does not cache the first few types it encounters. pub trait BoundVarReplacerDelegate<'tcx> { - fn replace_region(&mut self, br: ty::BoundRegion<'tcx>) -> ty::Region<'tcx>; - fn replace_ty(&mut self, bt: ty::BoundTy<'tcx>) -> Ty<'tcx>; - fn replace_const(&mut self, bc: ty::BoundConst<'tcx>) -> ty::Const<'tcx>; + fn replace_region(&mut self, br: ty::BoundRegion) -> ty::Region<'tcx>; + fn replace_ty(&mut self, bt: ty::BoundTy) -> Ty<'tcx>; + fn replace_const(&mut self, bc: ty::BoundConst) -> ty::Const<'tcx>; } /// A simple delegate taking 3 mutable functions. The used functions must /// always return the same result for each bound variable, no matter how /// frequently they are called. pub struct FnMutDelegate<'a, 'tcx> { - pub regions: &'a mut (dyn FnMut(ty::BoundRegion<'tcx>) -> ty::Region<'tcx> + 'a), - pub types: &'a mut (dyn FnMut(ty::BoundTy<'tcx>) -> Ty<'tcx> + 'a), - pub consts: &'a mut (dyn FnMut(ty::BoundConst<'tcx>) -> ty::Const<'tcx> + 'a), + pub regions: &'a mut (dyn FnMut(ty::BoundRegion) -> ty::Region<'tcx> + 'a), + pub types: &'a mut (dyn FnMut(ty::BoundTy) -> Ty<'tcx> + 'a), + pub consts: &'a mut (dyn FnMut(ty::BoundConst) -> ty::Const<'tcx> + 'a), } impl<'a, 'tcx> BoundVarReplacerDelegate<'tcx> for FnMutDelegate<'a, 'tcx> { - fn replace_region(&mut self, br: ty::BoundRegion<'tcx>) -> ty::Region<'tcx> { + fn replace_region(&mut self, br: ty::BoundRegion) -> ty::Region<'tcx> { (self.regions)(br) } - fn replace_ty(&mut self, bt: ty::BoundTy<'tcx>) -> Ty<'tcx> { + fn replace_ty(&mut self, bt: ty::BoundTy) -> Ty<'tcx> { (self.types)(bt) } - fn replace_const(&mut self, bc: ty::BoundConst<'tcx>) -> ty::Const<'tcx> { + fn replace_const(&mut self, bc: ty::BoundConst) -> ty::Const<'tcx> { (self.consts)(bc) } } @@ -207,14 +207,13 @@ impl<'tcx> TyCtxt<'tcx> { self, value: Binder<'tcx, T>, mut fld_r: F, - ) -> (T, FxIndexMap, ty::Region<'tcx>>) + ) -> (T, FxIndexMap>) where - F: FnMut(ty::BoundRegion<'tcx>) -> ty::Region<'tcx>, + F: FnMut(ty::BoundRegion) -> ty::Region<'tcx>, T: TypeFoldable>, { let mut region_map = FxIndexMap::default(); - let real_fld_r = - |br: ty::BoundRegion<'tcx>| *region_map.entry(br).or_insert_with(|| fld_r(br)); + let real_fld_r = |br: ty::BoundRegion| *region_map.entry(br).or_insert_with(|| fld_r(br)); let value = self.instantiate_bound_regions_uncached(value, real_fld_r); (value, region_map) } @@ -225,7 +224,7 @@ impl<'tcx> TyCtxt<'tcx> { mut replace_regions: F, ) -> T where - F: FnMut(ty::BoundRegion<'tcx>) -> ty::Region<'tcx>, + F: FnMut(ty::BoundRegion) -> ty::Region<'tcx>, T: TypeFoldable>, { let value = value.skip_binder(); @@ -293,14 +292,14 @@ impl<'tcx> TyCtxt<'tcx> { self.replace_escaping_bound_vars_uncached( value, FnMutDelegate { - regions: &mut |r: ty::BoundRegion<'tcx>| { + regions: &mut |r: ty::BoundRegion| { ty::Region::new_bound( self, ty::INNERMOST, ty::BoundRegion { var: shift_bv(r.var), kind: r.kind }, ) }, - types: &mut |t: ty::BoundTy<'tcx>| { + types: &mut |t: ty::BoundTy| { Ty::new_bound( self, ty::INNERMOST, @@ -308,7 +307,11 @@ impl<'tcx> TyCtxt<'tcx> { ) }, consts: &mut |c| { - ty::Const::new_bound(self, ty::INNERMOST, ty::BoundConst::new(shift_bv(c.var))) + ty::Const::new_bound( + self, + ty::INNERMOST, + ty::BoundConst { var: shift_bv(c.var) }, + ) }, }, ) @@ -330,10 +333,10 @@ impl<'tcx> TyCtxt<'tcx> { { struct Anonymize<'a, 'tcx> { tcx: TyCtxt<'tcx>, - map: &'a mut FxIndexMap>, + map: &'a mut FxIndexMap, } impl<'tcx> BoundVarReplacerDelegate<'tcx> for Anonymize<'_, 'tcx> { - fn replace_region(&mut self, br: ty::BoundRegion<'tcx>) -> ty::Region<'tcx> { + fn replace_region(&mut self, br: ty::BoundRegion) -> ty::Region<'tcx> { let entry = self.map.entry(br.var); let index = entry.index(); let var = ty::BoundVar::from_usize(index); @@ -343,7 +346,7 @@ impl<'tcx> TyCtxt<'tcx> { let br = ty::BoundRegion { var, kind }; ty::Region::new_bound(self.tcx, ty::INNERMOST, br) } - fn replace_ty(&mut self, bt: ty::BoundTy<'tcx>) -> Ty<'tcx> { + fn replace_ty(&mut self, bt: ty::BoundTy) -> Ty<'tcx> { let entry = self.map.entry(bt.var); let index = entry.index(); let var = ty::BoundVar::from_usize(index); @@ -352,12 +355,12 @@ impl<'tcx> TyCtxt<'tcx> { .expect_ty(); Ty::new_bound(self.tcx, ty::INNERMOST, BoundTy { var, kind }) } - fn replace_const(&mut self, bc: ty::BoundConst<'tcx>) -> ty::Const<'tcx> { + fn replace_const(&mut self, bc: ty::BoundConst) -> ty::Const<'tcx> { let entry = self.map.entry(bc.var); let index = entry.index(); let var = ty::BoundVar::from_usize(index); let () = entry.or_insert_with(|| ty::BoundVariableKind::Const).expect_const(); - ty::Const::new_bound(self.tcx, ty::INNERMOST, ty::BoundConst::new(var)) + ty::Const::new_bound(self.tcx, ty::INNERMOST, BoundConst { var }) } } diff --git a/compiler/rustc_middle/src/ty/mod.rs b/compiler/rustc_middle/src/ty/mod.rs index 4e33b8ebb6dee..ce713dcf42f54 100644 --- a/compiler/rustc_middle/src/ty/mod.rs +++ b/compiler/rustc_middle/src/ty/mod.rs @@ -97,13 +97,13 @@ pub use self::predicate::{ RegionOutlivesPredicate, SubtypePredicate, TraitPredicate, TraitRef, TypeOutlivesPredicate, }; pub use self::region::{ - EarlyParamRegion, LateParamRegion, LateParamRegionKind, Region, RegionKind, RegionVid, + BoundRegion, BoundRegionKind, EarlyParamRegion, LateParamRegion, LateParamRegionKind, Region, + RegionKind, RegionVid, }; pub use self::sty::{ - AliasTy, Article, Binder, BoundConst, BoundRegion, BoundRegionKind, BoundTy, BoundTyKind, - BoundVariableKind, CanonicalPolyFnSig, CoroutineArgsExt, EarlyBinder, FnSig, InlineConstArgs, - InlineConstArgsParts, ParamConst, ParamTy, PlaceholderConst, PlaceholderRegion, - PlaceholderType, PolyFnSig, TyKind, TypeAndMut, TypingMode, UpvarArgs, + AliasTy, Article, Binder, BoundTy, BoundTyKind, BoundVariableKind, CanonicalPolyFnSig, + CoroutineArgsExt, EarlyBinder, FnSig, InlineConstArgs, InlineConstArgsParts, ParamConst, + ParamTy, PolyFnSig, TyKind, TypeAndMut, TypingMode, UpvarArgs, }; pub use self::trait_def::TraitDef; pub use self::typeck_results::{ @@ -914,6 +914,100 @@ impl<'tcx> DefinitionSiteHiddenType<'tcx> { } } +pub type PlaceholderRegion<'tcx> = ty::Placeholder, BoundRegion>; + +impl<'tcx> rustc_type_ir::inherent::PlaceholderLike> for PlaceholderRegion<'tcx> { + type Bound = BoundRegion; + + fn universe(self) -> UniverseIndex { + self.universe + } + + fn var(self) -> BoundVar { + self.bound.var + } + + fn with_updated_universe(self, ui: UniverseIndex) -> Self { + ty::Placeholder::new(ui, self.bound) + } + + fn new(ui: UniverseIndex, bound: BoundRegion) -> Self { + ty::Placeholder::new(ui, bound) + } + + fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self { + ty::Placeholder::new(ui, BoundRegion { var, kind: BoundRegionKind::Anon }) + } +} + +pub type PlaceholderType<'tcx> = ty::Placeholder, BoundTy>; + +impl<'tcx> rustc_type_ir::inherent::PlaceholderLike> for PlaceholderType<'tcx> { + type Bound = BoundTy; + + fn universe(self) -> UniverseIndex { + self.universe + } + + fn var(self) -> BoundVar { + self.bound.var + } + + fn with_updated_universe(self, ui: UniverseIndex) -> Self { + ty::Placeholder::new(ui, self.bound) + } + + fn new(ui: UniverseIndex, bound: BoundTy) -> Self { + ty::Placeholder::new(ui, bound) + } + + fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self { + ty::Placeholder::new(ui, BoundTy { var, kind: BoundTyKind::Anon }) + } +} + +#[derive(Copy, Clone, Debug, PartialEq, Eq, Hash, HashStable)] +#[derive(TyEncodable, TyDecodable)] +pub struct BoundConst { + pub var: BoundVar, +} + +impl<'tcx> rustc_type_ir::inherent::BoundVarLike> for BoundConst { + fn var(self) -> BoundVar { + self.var + } + + fn assert_eq(self, var: ty::BoundVariableKind) { + var.expect_const() + } +} + +pub type PlaceholderConst<'tcx> = ty::Placeholder, BoundConst>; + +impl<'tcx> rustc_type_ir::inherent::PlaceholderLike> for PlaceholderConst<'tcx> { + type Bound = BoundConst; + + fn universe(self) -> UniverseIndex { + self.universe + } + + fn var(self) -> BoundVar { + self.bound.var + } + + fn with_updated_universe(self, ui: UniverseIndex) -> Self { + ty::Placeholder::new(ui, self.bound) + } + + fn new(ui: UniverseIndex, bound: BoundConst) -> Self { + ty::Placeholder::new(ui, bound) + } + + fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self { + ty::Placeholder::new(ui, BoundConst { var }) + } +} + pub type Clauses<'tcx> = &'tcx ListWithCachedTypeInfo>; impl<'tcx> rustc_type_ir::Flags for Clauses<'tcx> { @@ -2086,16 +2180,8 @@ impl<'tcx> TyCtxt<'tcx> { DefKind::Impl { of_trait: false } => { self.constness(def_id) == hir::Constness::Const } - DefKind::Impl { of_trait: true } => { - let Some(trait_method_did) = self.trait_item_of(def_id) else { - return false; - }; - self.constness(trait_method_did) == hir::Constness::Const - && self.is_conditionally_const(parent_def_id) - } - DefKind::Trait => { - self.constness(def_id) == hir::Constness::Const - && self.is_conditionally_const(parent_def_id) + DefKind::Impl { of_trait: true } | DefKind::Trait => { + self.is_conditionally_const(parent_def_id) } _ => bug!("unexpected parent item of associated fn: {parent_def_id:?}"), } diff --git a/compiler/rustc_middle/src/ty/print/pretty.rs b/compiler/rustc_middle/src/ty/print/pretty.rs index 02b804c1ab29c..76a4f61e67148 100644 --- a/compiler/rustc_middle/src/ty/print/pretty.rs +++ b/compiler/rustc_middle/src/ty/print/pretty.rs @@ -197,7 +197,7 @@ pub struct RegionHighlightMode<'tcx> { /// This is used when you have a signature like `fn foo(x: &u32, /// y: &'a u32)` and we want to give a name to the region of the /// reference `x`. - highlight_bound_region: Option<(ty::BoundRegionKind<'tcx>, usize)>, + highlight_bound_region: Option<(ty::BoundRegionKind, usize)>, } impl<'tcx> RegionHighlightMode<'tcx> { @@ -246,7 +246,7 @@ impl<'tcx> RegionHighlightMode<'tcx> { /// Highlight the given bound region. /// We can only highlight one bound region at a time. See /// the field `highlight_bound_region` for more detailed notes. - pub fn highlighting_bound_region(&mut self, br: ty::BoundRegionKind<'tcx>, number: usize) { + pub fn highlighting_bound_region(&mut self, br: ty::BoundRegionKind, number: usize) { assert!(self.highlight_bound_region.is_none()); self.highlight_bound_region = Some((br, number)); } @@ -2639,12 +2639,12 @@ impl<'tcx> FmtPrinter<'_, 'tcx> { struct RegionFolder<'a, 'tcx> { tcx: TyCtxt<'tcx>, current_index: ty::DebruijnIndex, - region_map: UnordMap, ty::Region<'tcx>>, + region_map: UnordMap>, name: &'a mut ( dyn FnMut( Option, // Debruijn index of the folded late-bound region ty::DebruijnIndex, // Index corresponding to binder level - ty::BoundRegion<'tcx>, + ty::BoundRegion, ) -> ty::Region<'tcx> + 'a ), @@ -2717,7 +2717,7 @@ impl<'tcx> FmtPrinter<'_, 'tcx> { &mut self, value: &ty::Binder<'tcx, T>, mode: WrapBinderMode, - ) -> Result<(T, UnordMap, ty::Region<'tcx>>), fmt::Error> + ) -> Result<(T, UnordMap>), fmt::Error> where T: TypeFoldable>, { @@ -2810,12 +2810,12 @@ impl<'tcx> FmtPrinter<'_, 'tcx> { // see issue #102392. let mut name = |lifetime_idx: Option, binder_level_idx: ty::DebruijnIndex, - br: ty::BoundRegion<'tcx>| { + br: ty::BoundRegion| { let (name, kind) = if let Some(name) = br.kind.get_name(tcx) { (name, br.kind) } else { let name = next_name(self); - (name, ty::BoundRegionKind::NamedForPrinting(name)) + (name, ty::BoundRegionKind::NamedAnon(name)) }; if let Some(lt_idx) = lifetime_idx { diff --git a/compiler/rustc_middle/src/ty/region.rs b/compiler/rustc_middle/src/ty/region.rs index a497501ef19d5..61994d928decd 100644 --- a/compiler/rustc_middle/src/ty/region.rs +++ b/compiler/rustc_middle/src/ty/region.rs @@ -50,7 +50,7 @@ impl<'tcx> Region<'tcx> { pub fn new_bound( tcx: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, - bound_region: ty::BoundRegion<'tcx>, + bound_region: ty::BoundRegion, ) -> Region<'tcx> { // Use a pre-interned one when possible. if let ty::BoundRegion { var, kind: ty::BoundRegionKind::Anon } = bound_region @@ -160,7 +160,7 @@ impl<'tcx> rustc_type_ir::inherent::Region> for Region<'tcx> { fn new_bound( interner: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, - var: ty::BoundRegion<'tcx>, + var: ty::BoundRegion, ) -> Self { Region::new_bound(interner, debruijn, var) } @@ -388,7 +388,7 @@ pub struct LateParamRegion { pub kind: LateParamRegionKind, } -/// When liberating bound regions, we map their [`ty::BoundRegionKind`] +/// When liberating bound regions, we map their [`BoundRegionKind`] /// to this as we need to track the index of anonymous regions. We /// otherwise end up liberating multiple bound regions to the same /// late-bound region. @@ -397,7 +397,7 @@ pub struct LateParamRegion { pub enum LateParamRegionKind { /// An anonymous region parameter for a given fn (&T) /// - /// Unlike [`ty::BoundRegionKind::Anon`], this tracks the index of the + /// Unlike [`BoundRegionKind::Anon`], this tracks the index of the /// liberated bound region. /// /// We should ideally never liberate anonymous regions, but do so for the @@ -418,14 +418,12 @@ pub enum LateParamRegionKind { } impl LateParamRegionKind { - pub fn from_bound(var: BoundVar, br: ty::BoundRegionKind<'_>) -> LateParamRegionKind { + pub fn from_bound(var: BoundVar, br: BoundRegionKind) -> LateParamRegionKind { match br { - ty::BoundRegionKind::Anon => LateParamRegionKind::Anon(var.as_u32()), - ty::BoundRegionKind::Named(def_id) => LateParamRegionKind::Named(def_id), - ty::BoundRegionKind::ClosureEnv => LateParamRegionKind::ClosureEnv, - ty::BoundRegionKind::NamedForPrinting(name) => { - LateParamRegionKind::NamedAnon(var.as_u32(), name) - } + BoundRegionKind::Anon => LateParamRegionKind::Anon(var.as_u32()), + BoundRegionKind::Named(def_id) => LateParamRegionKind::Named(def_id), + BoundRegionKind::ClosureEnv => LateParamRegionKind::ClosureEnv, + BoundRegionKind::NamedAnon(name) => LateParamRegionKind::NamedAnon(var.as_u32(), name), } } @@ -452,6 +450,81 @@ impl LateParamRegionKind { } } +#[derive(Clone, PartialEq, Eq, Hash, TyEncodable, TyDecodable, Copy)] +#[derive(HashStable)] +pub enum BoundRegionKind { + /// An anonymous region parameter for a given fn (&T) + Anon, + + /// An anonymous region parameter with a `Symbol` name. + /// + /// Used to give late-bound regions names for things like pretty printing. + NamedAnon(Symbol), + + /// Late-bound regions that appear in the AST. + Named(DefId), + + /// Anonymous region for the implicit env pointer parameter + /// to a closure + ClosureEnv, +} + +#[derive(Copy, Clone, PartialEq, Eq, Hash, TyEncodable, TyDecodable)] +#[derive(HashStable)] +pub struct BoundRegion { + pub var: BoundVar, + pub kind: BoundRegionKind, +} + +impl<'tcx> rustc_type_ir::inherent::BoundVarLike> for BoundRegion { + fn var(self) -> BoundVar { + self.var + } + + fn assert_eq(self, var: ty::BoundVariableKind) { + assert_eq!(self.kind, var.expect_region()) + } +} + +impl core::fmt::Debug for BoundRegion { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + match self.kind { + BoundRegionKind::Anon => write!(f, "{:?}", self.var), + BoundRegionKind::ClosureEnv => write!(f, "{:?}.Env", self.var), + BoundRegionKind::Named(def) => { + write!(f, "{:?}.Named({:?})", self.var, def) + } + BoundRegionKind::NamedAnon(symbol) => { + write!(f, "{:?}.NamedAnon({:?})", self.var, symbol) + } + } + } +} + +impl BoundRegionKind { + pub fn is_named(&self, tcx: TyCtxt<'_>) -> bool { + self.get_name(tcx).is_some() + } + + pub fn get_name(&self, tcx: TyCtxt<'_>) -> Option { + match *self { + BoundRegionKind::Named(def_id) => { + let name = tcx.item_name(def_id); + if name != kw::UnderscoreLifetime { Some(name) } else { None } + } + BoundRegionKind::NamedAnon(name) => Some(name), + _ => None, + } + } + + pub fn get_id(&self) -> Option { + match *self { + BoundRegionKind::Named(id) => Some(id), + _ => None, + } + } +} + // Some types are used a lot. Make sure they don't unintentionally get bigger. #[cfg(target_pointer_width = "64")] mod size_asserts { diff --git a/compiler/rustc_middle/src/ty/structural_impls.rs b/compiler/rustc_middle/src/ty/structural_impls.rs index 8707b03e4b8f2..314d2ba396327 100644 --- a/compiler/rustc_middle/src/ty/structural_impls.rs +++ b/compiler/rustc_middle/src/ty/structural_impls.rs @@ -65,6 +65,21 @@ impl<'tcx> fmt::Debug for ty::adjustment::PatAdjustment<'tcx> { } } +impl fmt::Debug for ty::BoundRegionKind { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match *self { + ty::BoundRegionKind::Anon => write!(f, "BrAnon"), + ty::BoundRegionKind::NamedAnon(name) => { + write!(f, "BrNamedAnon({name})") + } + ty::BoundRegionKind::Named(did) => { + write!(f, "BrNamed({did:?})") + } + ty::BoundRegionKind::ClosureEnv => write!(f, "BrEnv"), + } + } +} + impl fmt::Debug for ty::LateParamRegion { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "ReLateParam({:?}, {:?})", self.scope, self.kind) @@ -160,6 +175,15 @@ impl<'tcx> fmt::Debug for ty::Const<'tcx> { } } +impl fmt::Debug for ty::BoundTy { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match self.kind { + ty::BoundTyKind::Anon => write!(f, "{:?}", self.var), + ty::BoundTyKind::Param(def_id) => write!(f, "{def_id:?}"), + } + } +} + impl<'tcx> fmt::Debug for GenericArg<'tcx> { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { match self.kind() { @@ -231,8 +255,7 @@ TrivialTypeTraversalImpls! { crate::ty::AdtKind, crate::ty::AssocItem, crate::ty::AssocKind, - crate::ty::BoundRegion<'tcx>, - crate::ty::BoundTy<'tcx>, + crate::ty::BoundRegion, crate::ty::ScalarInt, crate::ty::UserTypeAnnotationIndex, crate::ty::abstract_const::NotConstEvaluatable, @@ -261,6 +284,7 @@ TrivialTypeTraversalImpls! { TrivialTypeTraversalAndLiftImpls! { // tidy-alphabetical-start crate::mir::RuntimeChecks, + crate::ty::BoundTy, crate::ty::ParamTy, crate::ty::instance::ReifyReason, rustc_hir::def_id::DefId, diff --git a/compiler/rustc_middle/src/ty/sty.rs b/compiler/rustc_middle/src/ty/sty.rs index 4be30d8b6c918..b0b5a783b00e6 100644 --- a/compiler/rustc_middle/src/ty/sty.rs +++ b/compiler/rustc_middle/src/ty/sty.rs @@ -13,7 +13,7 @@ use rustc_hir as hir; use rustc_hir::LangItem; use rustc_hir::def_id::DefId; use rustc_macros::{HashStable, TyDecodable, TyEncodable, TypeFoldable, extension}; -use rustc_span::{DUMMY_SP, Span, Symbol, kw, sym}; +use rustc_span::{DUMMY_SP, Span, Symbol, sym}; use rustc_type_ir::TyKind::*; use rustc_type_ir::solve::SizedTraitKind; use rustc_type_ir::walk::TypeWalker; @@ -26,8 +26,8 @@ use crate::infer::canonical::Canonical; use crate::traits::ObligationCause; use crate::ty::InferTy::*; use crate::ty::{ - self, AdtDef, Discr, GenericArg, GenericArgs, GenericArgsRef, List, ParamEnv, Region, Ty, - TyCtxt, TypeFlags, TypeSuperVisitable, TypeVisitable, TypeVisitor, UintTy, + self, AdtDef, BoundRegionKind, Discr, GenericArg, GenericArgs, GenericArgsRef, List, ParamEnv, + Region, Ty, TyCtxt, TypeFlags, TypeSuperVisitable, TypeVisitable, TypeVisitor, UintTy, }; // Re-export and re-parameterize some `I = TyCtxt<'tcx>` types here @@ -40,15 +40,6 @@ pub type Binder<'tcx, T> = ir::Binder, T>; pub type EarlyBinder<'tcx, T> = ir::EarlyBinder, T>; pub type TypingMode<'tcx> = ir::TypingMode>; pub type Placeholder<'tcx, T> = ir::Placeholder, T>; -pub type PlaceholderRegion<'tcx> = ir::PlaceholderRegion>; -pub type PlaceholderType<'tcx> = ir::PlaceholderType>; -pub type PlaceholderConst<'tcx> = ir::PlaceholderConst>; -pub type BoundTy<'tcx> = ir::BoundTy>; -pub type BoundConst<'tcx> = ir::BoundConst>; -pub type BoundRegion<'tcx> = ir::BoundRegion>; -pub type BoundVariableKind<'tcx> = ir::BoundVariableKind>; -pub type BoundRegionKind<'tcx> = ir::BoundRegionKind>; -pub type BoundTyKind<'tcx> = ir::BoundTyKind>; pub trait Article { fn article(&self) -> &'static str; @@ -266,6 +257,37 @@ impl<'tcx> InlineConstArgs<'tcx> { } } +#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug, TyEncodable, TyDecodable)] +#[derive(HashStable)] +pub enum BoundVariableKind { + Ty(BoundTyKind), + Region(BoundRegionKind), + Const, +} + +impl BoundVariableKind { + pub fn expect_region(self) -> BoundRegionKind { + match self { + BoundVariableKind::Region(lt) => lt, + _ => bug!("expected a region, but found another kind"), + } + } + + pub fn expect_ty(self) -> BoundTyKind { + match self { + BoundVariableKind::Ty(ty) => ty, + _ => bug!("expected a type, but found another kind"), + } + } + + pub fn expect_const(self) { + match self { + BoundVariableKind::Const => (), + _ => bug!("expected a const, but found another kind"), + } + } +} + pub type PolyFnSig<'tcx> = Binder<'tcx, FnSig<'tcx>>; pub type CanonicalPolyFnSig<'tcx> = Canonical<'tcx, Binder<'tcx, FnSig<'tcx>>>; @@ -359,6 +381,30 @@ impl ParamConst { } } +#[derive(Clone, Copy, PartialEq, Eq, Hash, TyEncodable, TyDecodable)] +#[derive(HashStable)] +pub struct BoundTy { + pub var: BoundVar, + pub kind: BoundTyKind, +} + +impl<'tcx> rustc_type_ir::inherent::BoundVarLike> for BoundTy { + fn var(self) -> BoundVar { + self.var + } + + fn assert_eq(self, var: ty::BoundVariableKind) { + assert_eq!(self.kind, var.expect_ty()) + } +} + +#[derive(Clone, Copy, PartialEq, Eq, Hash, Debug, TyEncodable, TyDecodable)] +#[derive(HashStable)] +pub enum BoundTyKind { + Anon, + Param(DefId), +} + /// Constructors for `Ty` impl<'tcx> Ty<'tcx> { /// Avoid using this in favour of more specific `new_*` methods, where possible. @@ -433,7 +479,7 @@ impl<'tcx> Ty<'tcx> { pub fn new_bound( tcx: TyCtxt<'tcx>, index: ty::DebruijnIndex, - bound_ty: ty::BoundTy<'tcx>, + bound_ty: ty::BoundTy, ) -> Ty<'tcx> { // Use a pre-interned one when possible. if let ty::BoundTy { var, kind: ty::BoundTyKind::Anon } = bound_ty @@ -915,11 +961,7 @@ impl<'tcx> rustc_type_ir::inherent::Ty> for Ty<'tcx> { Ty::new_placeholder(tcx, placeholder) } - fn new_bound( - interner: TyCtxt<'tcx>, - debruijn: ty::DebruijnIndex, - var: ty::BoundTy<'tcx>, - ) -> Self { + fn new_bound(interner: TyCtxt<'tcx>, debruijn: ty::DebruijnIndex, var: ty::BoundTy) -> Self { Ty::new_bound(interner, debruijn, var) } @@ -1336,17 +1378,25 @@ impl<'tcx> Ty<'tcx> { } } - pub fn maybe_pinned_ref( - self, - ) -> Option<(Ty<'tcx>, ty::Pinnedness, ty::Mutability, Region<'tcx>)> { - match self.kind() { + pub fn pinned_ref(self) -> Option<(Ty<'tcx>, ty::Mutability)> { + if let Adt(def, args) = self.kind() + && def.is_pin() + && let &ty::Ref(_, ty, mutbl) = args.type_at(0).kind() + { + return Some((ty, mutbl)); + } + None + } + + pub fn maybe_pinned_ref(self) -> Option<(Ty<'tcx>, ty::Pinnedness, ty::Mutability)> { + match *self.kind() { Adt(def, args) if def.is_pin() - && let &ty::Ref(region, ty, mutbl) = args.type_at(0).kind() => + && let ty::Ref(_, ty, mutbl) = *args.type_at(0).kind() => { - Some((ty, ty::Pinnedness::Pinned, mutbl, region)) + Some((ty, ty::Pinnedness::Pinned, mutbl)) } - &Ref(region, ty, mutbl) => Some((ty, ty::Pinnedness::Not, mutbl, region)), + ty::Ref(_, ty, mutbl) => Some((ty, ty::Pinnedness::Not, mutbl)), _ => None, } } @@ -2085,12 +2135,6 @@ impl<'tcx> rustc_type_ir::inherent::Tys> for &'tcx ty::List rustc_type_ir::inherent::Symbol> for Symbol { - fn is_kw_underscore_lifetime(self) -> bool { - self == kw::UnderscoreLifetime - } -} - // Some types are used a lot. Make sure they don't unintentionally get bigger. #[cfg(target_pointer_width = "64")] mod size_asserts { diff --git a/compiler/rustc_middle/src/ty/util.rs b/compiler/rustc_middle/src/ty/util.rs index d6e6ffae7300d..c4212eee8e40b 100644 --- a/compiler/rustc_middle/src/ty/util.rs +++ b/compiler/rustc_middle/src/ty/util.rs @@ -642,8 +642,12 @@ impl<'tcx> TyCtxt<'tcx> { /// has its own type-checking context or "inference environment". /// /// For example, a closure has its own `DefId`, but it is type-checked - /// with the containing item. Therefore, when we fetch the `typeck` of the closure, - /// for example, we really wind up fetching the `typeck` of the enclosing fn item. + /// with the containing item. Similarly, an inline const block has its + /// own `DefId` but it is type-checked together with the containing item. + /// + /// Therefore, when we fetch the + /// `typeck` the closure, for example, we really wind up + /// fetching the `typeck` the enclosing fn item. pub fn typeck_root_def_id(self, def_id: DefId) -> DefId { let mut def_id = def_id; while self.is_typeck_child(def_id) { diff --git a/compiler/rustc_middle/src/ty/visit.rs b/compiler/rustc_middle/src/ty/visit.rs index 8f79f8e3564e7..e84ac56b31dfd 100644 --- a/compiler/rustc_middle/src/ty/visit.rs +++ b/compiler/rustc_middle/src/ty/visit.rs @@ -113,7 +113,7 @@ impl<'tcx> TyCtxt<'tcx> { pub fn collect_constrained_late_bound_regions( self, value: Binder<'tcx, T>, - ) -> FxIndexSet> + ) -> FxIndexSet where T: TypeFoldable>, { @@ -124,7 +124,7 @@ impl<'tcx> TyCtxt<'tcx> { pub fn collect_referenced_late_bound_regions( self, value: Binder<'tcx, T>, - ) -> FxIndexSet> + ) -> FxIndexSet where T: TypeFoldable>, { @@ -135,7 +135,7 @@ impl<'tcx> TyCtxt<'tcx> { self, value: Binder<'tcx, T>, just_constrained: bool, - ) -> FxIndexSet> + ) -> FxIndexSet where T: TypeFoldable>, { @@ -149,9 +149,9 @@ impl<'tcx> TyCtxt<'tcx> { /// Collects all the late-bound regions at the innermost binding level /// into a hash set. -struct LateBoundRegionsCollector<'tcx> { +struct LateBoundRegionsCollector { current_index: ty::DebruijnIndex, - regions: FxIndexSet>, + regions: FxIndexSet, /// `true` if we only want regions that are known to be /// "constrained" when you equate this type with another type. In @@ -163,13 +163,13 @@ struct LateBoundRegionsCollector<'tcx> { just_constrained: bool, } -impl LateBoundRegionsCollector<'_> { +impl LateBoundRegionsCollector { fn new(just_constrained: bool) -> Self { Self { current_index: ty::INNERMOST, regions: Default::default(), just_constrained } } } -impl<'tcx> TypeVisitor> for LateBoundRegionsCollector<'tcx> { +impl<'tcx> TypeVisitor> for LateBoundRegionsCollector { fn visit_binder>>(&mut self, t: &Binder<'tcx, T>) { self.current_index.shift_in(1); t.super_visit_with(self); diff --git a/compiler/rustc_mir_build/src/thir/cx/expr.rs b/compiler/rustc_mir_build/src/thir/cx/expr.rs index 0117a10e3a8c6..8e02424706eec 100644 --- a/compiler/rustc_mir_build/src/thir/cx/expr.rs +++ b/compiler/rustc_mir_build/src/thir/cx/expr.rs @@ -14,7 +14,7 @@ use rustc_middle::middle::region; use rustc_middle::mir::{self, AssignOp, BinOp, BorrowKind, UnOp}; use rustc_middle::thir::*; use rustc_middle::ty::adjustment::{ - Adjust, Adjustment, AutoBorrow, AutoBorrowMutability, DerefAdjustKind, PointerCoercion, + Adjust, Adjustment, AutoBorrow, AutoBorrowMutability, PointerCoercion, }; use rustc_middle::ty::{ self, AdtKind, GenericArgs, InlineConstArgs, InlineConstArgsParts, ScalarInt, Ty, UpvarArgs, @@ -140,11 +140,11 @@ impl<'tcx> ThirBuildCx<'tcx> { } Adjust::NeverToAny if adjustment.target.is_never() => return expr, Adjust::NeverToAny => ExprKind::NeverToAny { source: self.thir.exprs.push(expr) }, - Adjust::Deref(DerefAdjustKind::Builtin) => { + Adjust::Deref(None) => { adjust_span(&mut expr); ExprKind::Deref { arg: self.thir.exprs.push(expr) } } - Adjust::Deref(DerefAdjustKind::Overloaded(deref)) => { + Adjust::Deref(Some(deref)) => { // We don't need to do call adjust_span here since // deref coercions always start with a built-in deref. let call_def_id = deref.method_call(self.tcx); diff --git a/compiler/rustc_mir_transform/Cargo.toml b/compiler/rustc_mir_transform/Cargo.toml index 404531eb3c91f..22de197d374a9 100644 --- a/compiler/rustc_mir_transform/Cargo.toml +++ b/compiler/rustc_mir_transform/Cargo.toml @@ -6,6 +6,7 @@ edition = "2024" [dependencies] # tidy-alphabetical-start either = "1" +hashbrown = { version = "0.16.1", default-features = false } itertools = "0.12" rustc_abi = { path = "../rustc_abi" } rustc_arena = { path = "../rustc_arena" } diff --git a/compiler/rustc_mir_transform/src/gvn.rs b/compiler/rustc_mir_transform/src/gvn.rs index db38c271aaf91..820998eed1005 100644 --- a/compiler/rustc_mir_transform/src/gvn.rs +++ b/compiler/rustc_mir_transform/src/gvn.rs @@ -88,6 +88,7 @@ use std::borrow::Cow; use std::hash::{Hash, Hasher}; use either::Either; +use hashbrown::hash_table::{Entry, HashTable}; use itertools::Itertools as _; use rustc_abi::{self as abi, BackendRepr, FIRST_VARIANT, FieldIdx, Primitive, Size, VariantIdx}; use rustc_arena::DroplessArena; @@ -98,7 +99,6 @@ use rustc_const_eval::interpret::{ }; use rustc_data_structures::fx::FxHasher; use rustc_data_structures::graph::dominators::Dominators; -use rustc_data_structures::hash_table::{Entry, HashTable}; use rustc_hir::def::DefKind; use rustc_index::bit_set::DenseBitSet; use rustc_index::{IndexVec, newtype_index}; @@ -1591,12 +1591,10 @@ impl<'body, 'a, 'tcx> VnState<'body, 'a, 'tcx> { (Transmute, PtrToPtr) if self.pointers_have_same_metadata(from, to) => { Some(Transmute) } - // It would be legal to always do this, but we don't want to hide information + // If would be legal to always do this, but we don't want to hide information // from the backend that it'd otherwise be able to use for optimizations. (Transmute, Transmute) - if !self.transmute_may_have_niche_of_interest_to_backend( - inner_from, from, to, - ) => + if !self.type_may_have_niche_of_interest_to_backend(from) => { Some(Transmute) } @@ -1644,65 +1642,24 @@ impl<'body, 'a, 'tcx> VnState<'body, 'a, 'tcx> { } } - /// Returns `false` if we're confident that the middle type doesn't have an - /// interesting niche so we can skip that step when transmuting. + /// Returns `false` if we know for sure that this type has no interesting niche, + /// and thus we can skip transmuting through it without worrying. /// /// The backend will emit `assume`s when transmuting between types with niches, /// so we want to preserve `i32 -> char -> u32` so that that data is around, /// but it's fine to skip whole-range-is-value steps like `A -> u32 -> B`. - fn transmute_may_have_niche_of_interest_to_backend( - &self, - from_ty: Ty<'tcx>, - middle_ty: Ty<'tcx>, - to_ty: Ty<'tcx>, - ) -> bool { - let Ok(middle_layout) = self.ecx.layout_of(middle_ty) else { + fn type_may_have_niche_of_interest_to_backend(&self, ty: Ty<'tcx>) -> bool { + let Ok(layout) = self.ecx.layout_of(ty) else { // If it's too generic or something, then assume it might be interesting later. return true; }; - if middle_layout.uninhabited { + if layout.uninhabited { return true; } - match middle_layout.backend_repr { - BackendRepr::Scalar(mid) => { - if mid.is_always_valid(&self.ecx) { - // With no niche it's never interesting, so don't bother - // looking at the layout of the other two types. - false - } else if let Ok(from_layout) = self.ecx.layout_of(from_ty) - && !from_layout.uninhabited - && from_layout.size == middle_layout.size - && let BackendRepr::Scalar(from_a) = from_layout.backend_repr - && let mid_range = mid.valid_range(&self.ecx) - && let from_range = from_a.valid_range(&self.ecx) - && mid_range.contains_range(from_range, middle_layout.size) - { - // The `from_range` is a (non-strict) subset of `mid_range` - // such as if we're doing `bool` -> `ascii::Char` -> `_`, - // where `from_range: 0..=1` and `mid_range: 0..=127`, - // and thus the middle doesn't tell us anything we don't - // already know from the initial type. - false - } else if let Ok(to_layout) = self.ecx.layout_of(to_ty) - && !to_layout.uninhabited - && to_layout.size == middle_layout.size - && let BackendRepr::Scalar(to_a) = to_layout.backend_repr - && let mid_range = mid.valid_range(&self.ecx) - && let to_range = to_a.valid_range(&self.ecx) - && mid_range.contains_range(to_range, middle_layout.size) - { - // The `to_range` is a (non-strict) subset of `mid_range` - // such as if we're doing `_` -> `ascii::Char` -> `bool`, - // where `mid_range: 0..=127` and `to_range: 0..=1`, - // and thus the middle doesn't tell us anything we don't - // already know from the final type. - false - } else { - true - } - } + match layout.backend_repr { + BackendRepr::Scalar(a) => !a.is_always_valid(&self.ecx), BackendRepr::ScalarPair(a, b) => { !a.is_always_valid(&self.ecx) || !b.is_always_valid(&self.ecx) } diff --git a/compiler/rustc_mir_transform/src/lib.rs b/compiler/rustc_mir_transform/src/lib.rs index 0e6a1a414e45f..2f8c6b8763987 100644 --- a/compiler/rustc_mir_transform/src/lib.rs +++ b/compiler/rustc_mir_transform/src/lib.rs @@ -91,32 +91,20 @@ macro_rules! declare_passes { )+ )* - static PASS_NAMES: LazyLock> = LazyLock::new(|| { - let mut set = FxIndexSet::default(); + static PASS_NAMES: LazyLock> = LazyLock::new(|| [ // Fake marker pass - set.insert("PreCodegen"); + "PreCodegen", $( $( - set.extend(pass_names!($mod_name : $pass_name $( { $($ident),* } )? )); + stringify!($pass_name), + $( + $( + $mod_name::$pass_name::$ident.name(), + )* + )? )+ )* - set - }); - }; -} - -macro_rules! pass_names { - // pass groups: only pass names inside are considered pass_names - ($mod_name:ident : $pass_group:ident { $($pass_name:ident),* $(,)? }) => { - [ - $( - $mod_name::$pass_group::$pass_name.name(), - )* - ] - }; - // lone pass names: stringify the struct or enum name - ($mod_name:ident : $pass_name:ident) => { - [stringify!($pass_name)] + ].into_iter().collect()); }; } diff --git a/compiler/rustc_mir_transform/src/liveness.rs b/compiler/rustc_mir_transform/src/liveness.rs index cf977be4c3df9..98dc054918eb7 100644 --- a/compiler/rustc_mir_transform/src/liveness.rs +++ b/compiler/rustc_mir_transform/src/liveness.rs @@ -1086,6 +1086,11 @@ impl<'a, 'tcx> AssignmentResult<'a, 'tcx> { let Some((name, decl_span)) = self.checked_places.names[index] else { continue }; + // By convention, underscore-prefixed bindings are explicitly allowed to be unused. + if name.as_str().starts_with('_') { + continue; + } + let is_maybe_drop_guard = maybe_drop_guard( tcx, self.typing_env, @@ -1113,11 +1118,6 @@ impl<'a, 'tcx> AssignmentResult<'a, 'tcx> { continue; }; - // By convention, underscore-prefixed bindings are allowed to be unused explicitly - if name.as_str().starts_with('_') { - break; - } - match kind { AccessKind::Assign => { let suggestion = annotate_mut_binding_to_immutable_binding( diff --git a/compiler/rustc_mir_transform/src/promote_consts.rs b/compiler/rustc_mir_transform/src/promote_consts.rs index 3d1537b95efa9..6e7b93a5e719f 100644 --- a/compiler/rustc_mir_transform/src/promote_consts.rs +++ b/compiler/rustc_mir_transform/src/promote_consts.rs @@ -485,33 +485,47 @@ impl<'tcx> Validator<'_, 'tcx> { if lhs_ty.is_integral() { let sz = lhs_ty.primitive_size(self.tcx); // Integer division: the RHS must be a non-zero const. - let rhs_val = if let Operand::Constant(rhs_c) = rhs - && self.should_evaluate_for_promotion_checks(rhs_c.const_) - && let Some(rhs_val) = - rhs_c.const_.try_eval_scalar_int(self.tcx, self.typing_env) - // for the zero test, int vs uint does not matter - && rhs_val.to_uint(sz) != 0 - { - rhs_val - } else { - // value not known or 0 -- not okay - return Err(Unpromotable); + let rhs_val = match rhs { + Operand::Constant(c) + if self.should_evaluate_for_promotion_checks(c.const_) => + { + c.const_.try_eval_scalar_int(self.tcx, self.typing_env) + } + _ => None, }; + match rhs_val.map(|x| x.to_uint(sz)) { + // for the zero test, int vs uint does not matter + Some(x) if x != 0 => {} // okay + _ => return Err(Unpromotable), // value not known or 0 -- not okay + } // Furthermore, for signed division, we also have to exclude `int::MIN / // -1`. - if lhs_ty.is_signed() && rhs_val.to_int(sz) == -1 { - // The RHS is -1, so we have to be careful. But is the LHS int::MIN? - if let Operand::Constant(lhs_c) = lhs - && self.should_evaluate_for_promotion_checks(lhs_c.const_) - && let Some(lhs_val) = - lhs_c.const_.try_eval_scalar_int(self.tcx, self.typing_env) - && let lhs_min = sz.signed_int_min() - && lhs_val.to_int(sz) != lhs_min - { - // okay - } else { - // value not known or int::MIN -- not okay - return Err(Unpromotable); + if lhs_ty.is_signed() { + match rhs_val.map(|x| x.to_int(sz)) { + Some(-1) | None => { + // The RHS is -1 or unknown, so we have to be careful. + // But is the LHS int::MIN? + let lhs_val = match lhs { + Operand::Constant(c) + if self.should_evaluate_for_promotion_checks( + c.const_, + ) => + { + c.const_ + .try_eval_scalar_int(self.tcx, self.typing_env) + } + _ => None, + }; + let lhs_min = sz.signed_int_min(); + match lhs_val.map(|x| x.to_int(sz)) { + // okay + Some(x) if x != lhs_min => {} + + // value not known or int::MIN -- not okay + _ => return Err(Unpromotable), + } + } + _ => {} } } } diff --git a/compiler/rustc_next_trait_solver/src/canonical/canonicalizer.rs b/compiler/rustc_next_trait_solver/src/canonical/canonicalizer.rs index ce2be24adc586..61a2dcd226b7b 100644 --- a/compiler/rustc_next_trait_solver/src/canonical/canonicalizer.rs +++ b/compiler/rustc_next_trait_solver/src/canonical/canonicalizer.rs @@ -3,8 +3,7 @@ use rustc_type_ir::inherent::*; use rustc_type_ir::solve::{Goal, QueryInput}; use rustc_type_ir::{ self as ty, Canonical, CanonicalParamEnvCacheEntry, CanonicalVarKind, Flags, InferCtxtLike, - Interner, PlaceholderConst, PlaceholderType, TypeFlags, TypeFoldable, TypeFolder, - TypeSuperFoldable, TypeVisitableExt, + Interner, TypeFlags, TypeFoldable, TypeFolder, TypeSuperFoldable, TypeVisitableExt, }; use crate::delegate::SolverDelegate; @@ -358,13 +357,13 @@ impl<'a, D: SolverDelegate, I: Interner> Canonicalizer<'a, D, I> { }, ty::Placeholder(placeholder) => match self.canonicalize_mode { CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderTy( - PlaceholderType::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), + PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), ), CanonicalizeMode::Response { .. } => CanonicalVarKind::PlaceholderTy(placeholder), }, ty::Param(_) => match self.canonicalize_mode { CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderTy( - PlaceholderType::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), + PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), ), CanonicalizeMode::Response { .. } => panic!("param ty in response: {t:?}"), }, @@ -514,23 +513,17 @@ impl, I: Interner> TypeFolder for Canonicaliz ty::InferConst::Fresh(_) => todo!(), }, ty::ConstKind::Placeholder(placeholder) => match self.canonicalize_mode { - CanonicalizeMode::Input { .. } => { - CanonicalVarKind::PlaceholderConst(PlaceholderConst::new_anon( - ty::UniverseIndex::ROOT, - self.variables.len().into(), - )) - } + CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderConst( + PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), + ), CanonicalizeMode::Response { .. } => { CanonicalVarKind::PlaceholderConst(placeholder) } }, ty::ConstKind::Param(_) => match self.canonicalize_mode { - CanonicalizeMode::Input { .. } => { - CanonicalVarKind::PlaceholderConst(PlaceholderConst::new_anon( - ty::UniverseIndex::ROOT, - self.variables.len().into(), - )) - } + CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderConst( + PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()), + ), CanonicalizeMode::Response { .. } => panic!("param ty in response: {c:?}"), }, // FIXME: See comment above -- we could fold the region separately or something. diff --git a/compiler/rustc_next_trait_solver/src/canonical/mod.rs b/compiler/rustc_next_trait_solver/src/canonical/mod.rs index 1f64f09fe787f..96fea09013a1e 100644 --- a/compiler/rustc_next_trait_solver/src/canonical/mod.rs +++ b/compiler/rustc_next_trait_solver/src/canonical/mod.rs @@ -177,9 +177,9 @@ where } } ty::GenericArgKind::Const(c) => { - if let ty::ConstKind::Bound(index_kind, bc) = c.kind() { + if let ty::ConstKind::Bound(index_kind, bv) = c.kind() { assert!(matches!(index_kind, ty::BoundVarIndexKind::Canonical)); - opt_values[bc.var()] = Some(*original_value); + opt_values[bv.var()] = Some(*original_value); } } } diff --git a/compiler/rustc_next_trait_solver/src/placeholder.rs b/compiler/rustc_next_trait_solver/src/placeholder.rs index 31fce0601697b..c8016759f239a 100644 --- a/compiler/rustc_next_trait_solver/src/placeholder.rs +++ b/compiler/rustc_next_trait_solver/src/placeholder.rs @@ -3,8 +3,8 @@ use core::panic; use rustc_type_ir::data_structures::IndexMap; use rustc_type_ir::inherent::*; use rustc_type_ir::{ - self as ty, InferCtxtLike, Interner, PlaceholderConst, PlaceholderRegion, PlaceholderType, - TypeFoldable, TypeFolder, TypeSuperFoldable, TypeVisitableExt, + self as ty, InferCtxtLike, Interner, TypeFoldable, TypeFolder, TypeSuperFoldable, + TypeVisitableExt, }; pub struct BoundVarReplacer<'a, Infcx, I = ::Interner> @@ -16,9 +16,9 @@ where // These three maps track the bound variable that were replaced by placeholders. It might be // nice to remove these since we already have the `kind` in the placeholder; we really just need // the `var` (but we *could* bring that into scope if we were to track them as we pass them). - mapped_regions: IndexMap, ty::BoundRegion>, - mapped_types: IndexMap, ty::BoundTy>, - mapped_consts: IndexMap, ty::BoundConst>, + mapped_regions: IndexMap, + mapped_types: IndexMap, + mapped_consts: IndexMap, // The current depth relative to *this* folding, *not* the entire normalization. In other words, // the depth of binders we've passed here. current_index: ty::DebruijnIndex, @@ -40,9 +40,9 @@ where value: T, ) -> ( T, - IndexMap, ty::BoundRegion>, - IndexMap, ty::BoundTy>, - IndexMap, ty::BoundConst>, + IndexMap, + IndexMap, + IndexMap, ) { let mut replacer = BoundVarReplacer { infcx, @@ -103,7 +103,7 @@ where if debruijn >= self.current_index => { let universe = self.universe_for(debruijn); - let p = PlaceholderRegion::new(universe, br); + let p = PlaceholderLike::new(universe, br); self.mapped_regions.insert(p, br); Region::new_placeholder(self.cx(), p) } @@ -126,7 +126,7 @@ where if debruijn >= self.current_index => { let universe = self.universe_for(debruijn); - let p = PlaceholderType::new(universe, bound_ty); + let p = PlaceholderLike::new(universe, bound_ty); self.mapped_types.insert(p, bound_ty); Ty::new_placeholder(self.cx(), p) } @@ -150,7 +150,7 @@ where if debruijn >= self.current_index => { let universe = self.universe_for(debruijn); - let p = PlaceholderConst::new(universe, bound_const); + let p = PlaceholderLike::new(universe, bound_const); self.mapped_consts.insert(p, bound_const); Const::new_placeholder(self.cx(), p) } diff --git a/compiler/rustc_parse/messages.ftl b/compiler/rustc_parse/messages.ftl index 3f33001174602..449d0b964fd48 100644 --- a/compiler/rustc_parse/messages.ftl +++ b/compiler/rustc_parse/messages.ftl @@ -98,8 +98,6 @@ parse_bare_cr = {$double_quotes -> } .escape = escape the character -parse_bare_cr_in_frontmatter = bare CR not allowed in frontmatter - parse_bare_cr_in_raw_string = bare CR not allowed in raw string parse_binder_and_polarity = `for<...>` binder not allowed with `{$polarity}` trait polarity modifier @@ -354,6 +352,7 @@ parse_frontmatter_length_mismatch = frontmatter close does not match the opening parse_frontmatter_too_many_dashes = too many `-` symbols: frontmatter openings may be delimited by up to 255 `-` symbols, but found {$len_opening} parse_frontmatter_unclosed = unclosed frontmatter .note = frontmatter opening here was not closed + parse_function_body_equals_expr = function body cannot be `= expression;` .suggestion = surround the expression with `{"{"}` and `{"}"}` instead of `=` and `;` diff --git a/compiler/rustc_parse/src/errors.rs b/compiler/rustc_parse/src/errors.rs index 4e789a321649e..42327c7e343d1 100644 --- a/compiler/rustc_parse/src/errors.rs +++ b/compiler/rustc_parse/src/errors.rs @@ -829,13 +829,6 @@ pub(crate) struct FrontmatterTooManyDashes { pub len_opening: usize, } -#[derive(Diagnostic)] -#[diag(parse_bare_cr_in_frontmatter)] -pub(crate) struct BareCrFrontmatter { - #[primary_span] - pub span: Span, -} - #[derive(Diagnostic)] #[diag(parse_leading_plus_not_supported)] pub(crate) struct LeadingPlusNotSupported { diff --git a/compiler/rustc_parse/src/lexer/mod.rs b/compiler/rustc_parse/src/lexer/mod.rs index 76f610df1eb09..7c969dd7f9f48 100644 --- a/compiler/rustc_parse/src/lexer/mod.rs +++ b/compiler/rustc_parse/src/lexer/mod.rs @@ -598,9 +598,9 @@ impl<'psess, 'src> Lexer<'psess, 'src> { let s = self.str_from(start); let real_start = s.find("---").unwrap(); let frontmatter_opening_pos = BytePos(real_start as u32) + start; - let real_s = &s[real_start..]; - let within = real_s.trim_start_matches('-'); - let len_opening = real_s.len() - within.len(); + let s_new = &s[real_start..]; + let within = s_new.trim_start_matches('-'); + let len_opening = s_new.len() - within.len(); let frontmatter_opening_end_pos = frontmatter_opening_pos + BytePos(len_opening as u32); if has_invalid_preceding_whitespace { @@ -614,8 +614,8 @@ impl<'psess, 'src> Lexer<'psess, 'src> { }); } - let line_end = real_s.find('\n').unwrap_or(real_s.len()); if invalid_infostring { + let line_end = s[real_start..].find('\n').unwrap_or(s[real_start..].len()); let span = self.mk_sp( frontmatter_opening_end_pos, frontmatter_opening_pos + BytePos(line_end as u32), @@ -623,18 +623,10 @@ impl<'psess, 'src> Lexer<'psess, 'src> { self.dcx().emit_err(errors::FrontmatterInvalidInfostring { span }); } - let last_line_start = real_s.rfind('\n').map_or(line_end, |i| i + 1); - - let content = &real_s[line_end..last_line_start]; - if let Some(cr_offset) = content.find('\r') { - let cr_pos = start + BytePos((real_start + line_end + cr_offset) as u32); - let span = self.mk_sp(cr_pos, cr_pos + BytePos(1 as u32)); - self.dcx().emit_err(errors::BareCrFrontmatter { span }); - } - - let last_line = &real_s[last_line_start..]; + let last_line_start = within.rfind('\n').map_or(0, |i| i + 1); + let last_line = &within[last_line_start..]; let last_line_trimmed = last_line.trim_start_matches(is_horizontal_whitespace); - let last_line_start_pos = frontmatter_opening_pos + BytePos(last_line_start as u32); + let last_line_start_pos = frontmatter_opening_end_pos + BytePos(last_line_start as u32); let frontmatter_span = self.mk_sp(frontmatter_opening_pos, self.pos); self.psess.gated_spans.gate(sym::frontmatter, frontmatter_span); diff --git a/compiler/rustc_parse/src/parser/expr.rs b/compiler/rustc_parse/src/parser/expr.rs index 44c6acec88660..c31a4798b471e 100644 --- a/compiler/rustc_parse/src/parser/expr.rs +++ b/compiler/rustc_parse/src/parser/expr.rs @@ -2760,13 +2760,9 @@ impl<'a> Parser<'a> { let (mut cond, _) = self.parse_expr_res(Restrictions::NO_STRUCT_LITERAL | Restrictions::ALLOW_LET, attrs)?; - let mut checker = CondChecker::new(self, let_chains_policy); - checker.visit_expr(&mut cond); - Ok(if let Some(guar) = checker.found_incorrect_let_chain { - self.mk_expr_err(cond.span, guar) - } else { - cond - }) + CondChecker::new(self, let_chains_policy).visit_expr(&mut cond); + + Ok(cond) } /// Parses a `let $pat = $expr` pseudo-expression. @@ -3488,19 +3484,13 @@ impl<'a> Parser<'a> { let if_span = self.prev_token.span; let mut cond = self.parse_match_guard_condition()?; - let mut checker = CondChecker::new(self, LetChainsPolicy::AlwaysAllowed); - checker.visit_expr(&mut cond); + CondChecker::new(self, LetChainsPolicy::AlwaysAllowed).visit_expr(&mut cond); if has_let_expr(&cond) { let span = if_span.to(cond.span); self.psess.gated_spans.gate(sym::if_let_guard, span); } - - Ok(Some(if let Some(guar) = checker.found_incorrect_let_chain { - self.mk_expr_err(cond.span, guar) - } else { - cond - })) + Ok(Some(cond)) } fn parse_match_arm_pat_and_guard(&mut self) -> PResult<'a, (Pat, Option>)> { @@ -3521,23 +3511,13 @@ impl<'a> Parser<'a> { let ast::PatKind::Paren(subpat) = pat.kind else { unreachable!() }; let ast::PatKind::Guard(_, mut cond) = subpat.kind else { unreachable!() }; self.psess.gated_spans.ungate_last(sym::guard_patterns, cond.span); - let mut checker = CondChecker::new(self, LetChainsPolicy::AlwaysAllowed); - checker.visit_expr(&mut cond); - + CondChecker::new(self, LetChainsPolicy::AlwaysAllowed).visit_expr(&mut cond); let right = self.prev_token.span; self.dcx().emit_err(errors::ParenthesesInMatchPat { span: vec![left, right], sugg: errors::ParenthesesInMatchPatSugg { left, right }, }); - - Ok(( - self.mk_pat(span, ast::PatKind::Wild), - (if let Some(guar) = checker.found_incorrect_let_chain { - Some(self.mk_expr_err(cond.span, guar)) - } else { - Some(cond) - }), - )) + Ok((self.mk_pat(span, ast::PatKind::Wild), Some(cond))) } else { Ok((pat, self.parse_match_arm_guard()?)) } @@ -4228,7 +4208,6 @@ struct CondChecker<'a> { forbid_let_reason: Option, missing_let: Option, comparison: Option, - found_incorrect_let_chain: Option, } impl<'a> CondChecker<'a> { @@ -4239,7 +4218,6 @@ impl<'a> CondChecker<'a> { missing_let: None, comparison: None, let_chains_policy, - found_incorrect_let_chain: None, depth: 0, } } @@ -4258,19 +4236,12 @@ impl MutVisitor for CondChecker<'_> { NotSupportedOr(or_span) => { self.parser.dcx().emit_err(errors::OrInLetChain { span: or_span }) } - _ => { - let guar = - self.parser.dcx().emit_err(errors::ExpectedExpressionFoundLet { - span, - reason, - missing_let: self.missing_let, - comparison: self.comparison, - }); - if let Some(_) = self.missing_let { - self.found_incorrect_let_chain = Some(guar); - } - guar - } + _ => self.parser.dcx().emit_err(errors::ExpectedExpressionFoundLet { + span, + reason, + missing_let: self.missing_let, + comparison: self.comparison, + }), }; *recovered = Recovered::Yes(error); } else if self.depth > 1 { diff --git a/compiler/rustc_parse/src/parser/pat.rs b/compiler/rustc_parse/src/parser/pat.rs index c1e864985e190..b6608779787b5 100644 --- a/compiler/rustc_parse/src/parser/pat.rs +++ b/compiler/rustc_parse/src/parser/pat.rs @@ -1749,12 +1749,6 @@ impl<'a> Parser<'a> { hi = self.prev_token.span; let ann = BindingMode(by_ref, mutability); let fieldpat = self.mk_pat_ident(boxed_span.to(hi), ann, fieldname); - if matches!( - fieldpat.kind, - PatKind::Ident(BindingMode(ByRef::Yes(..), Mutability::Mut), ..) - ) { - self.psess.gated_spans.gate(sym::mut_ref, fieldpat.span); - } let subpat = if is_box { self.mk_pat(lo.to(hi), PatKind::Box(Box::new(fieldpat))) } else { diff --git a/compiler/rustc_passes/messages.ftl b/compiler/rustc_passes/messages.ftl index f8ff46189c052..395d940ddae62 100644 --- a/compiler/rustc_passes/messages.ftl +++ b/compiler/rustc_passes/messages.ftl @@ -302,6 +302,8 @@ passes_layout_align = align: {$align} passes_layout_homogeneous_aggregate = homogeneous_aggregate: {$homogeneous_aggregate} +passes_layout_invalid_attribute = + `#[rustc_layout]` can only be applied to `struct`/`enum`/`union` declarations and type aliases passes_layout_of = layout_of({$normalized_ty}) = {$ty_layout} passes_layout_size = diff --git a/compiler/rustc_passes/src/check_attr.rs b/compiler/rustc_passes/src/check_attr.rs index 8cf68b280850e..cdd141f9233e8 100644 --- a/compiler/rustc_passes/src/check_attr.rs +++ b/compiler/rustc_passes/src/check_attr.rs @@ -150,7 +150,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> { span: attr_span, stability: Stability { level, feature }, } - | AttributeKind::RustcConstStability { + | AttributeKind::ConstStability { span: attr_span, stability: PartialConstStability { level, feature, .. }, }, @@ -168,7 +168,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> { Attribute::Parsed(AttributeKind::AllowInternalUnsafe(attr_span) | AttributeKind::AllowInternalUnstable(.., attr_span)) => { self.check_macro_only_attr(*attr_span, span, target, attrs) } - Attribute::Parsed(AttributeKind::RustcAllowConstFnUnstable(_, first_span)) => { + Attribute::Parsed(AttributeKind::AllowConstFnUnstable(_, first_span)) => { self.check_rustc_allow_const_fn_unstable(hir_id, *first_span, span, target) } Attribute::Parsed(AttributeKind::Deprecation {span: attr_span, .. }) => { @@ -180,7 +180,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> { Attribute::Parsed(AttributeKind::RustcObjectLifetimeDefault) => { self.check_object_lifetime_default(hir_id); } - &Attribute::Parsed(AttributeKind::RustcPubTransparent(attr_span)) => { + &Attribute::Parsed(AttributeKind::PubTransparent(attr_span)) => { self.check_rustc_pub_transparent(attr_span, span, attrs) } Attribute::Parsed(AttributeKind::Align { align, span: attr_span }) => { @@ -226,21 +226,29 @@ impl<'tcx> CheckAttrVisitor<'tcx> { Attribute::Parsed(AttributeKind::DoNotRecommend{attr_span}) => {self.check_do_not_recommend(*attr_span, hir_id, target, item)}, Attribute::Parsed( // tidy-alphabetical-start - AttributeKind::RustcAllowIncoherentImpl(..) + AttributeKind::AllowIncoherentImpl(..) + | AttributeKind::AsPtr(..) | AttributeKind::AutomaticallyDerived(..) + | AttributeKind::BodyStability { .. } | AttributeKind::CfgAttrTrace | AttributeKind::CfgTrace(..) | AttributeKind::CfiEncoding { .. } + | AttributeKind::Coinductive(..) | AttributeKind::Cold(..) | AttributeKind::CollapseDebugInfo(..) | AttributeKind::CompilerBuiltins + | AttributeKind::Confusables { .. } + | AttributeKind::ConstStabilityIndirect | AttributeKind::Coroutine(..) | AttributeKind::Coverage (..) | AttributeKind::CrateName { .. } | AttributeKind::CrateType(..) | AttributeKind::DebuggerVisualizer(..) + | AttributeKind::DenyExplicitImpl(..) // `#[doc]` is actually a lot more than just doc comments, so is checked below | AttributeKind::DocComment {..} + | AttributeKind::Dummy + | AttributeKind::DynIncompatibleTrait(..) | AttributeKind::EiiDeclaration { .. } | AttributeKind::EiiForeignItem | AttributeKind::ExportName { .. } @@ -254,6 +262,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> { | AttributeKind::LinkSection { .. } | AttributeKind::Linkage(..) | AttributeKind::MacroEscape( .. ) + | AttributeKind::MacroTransparency(_) | AttributeKind::MacroUse { .. } | AttributeKind::Marker(..) | AttributeKind::MoveSizeLimit { .. } @@ -268,8 +277,12 @@ impl<'tcx> CheckAttrVisitor<'tcx> { | AttributeKind::NoMain | AttributeKind::NoMangle(..) | AttributeKind::NoStd { .. } + | AttributeKind::ObjcClass { .. } + | AttributeKind::ObjcSelector { .. } | AttributeKind::Optimize(..) | AttributeKind::PanicRuntime + | AttributeKind::ParenSugar(..) + | AttributeKind::PassByValue (..) | AttributeKind::PatchableFunctionEntry { .. } | AttributeKind::Path(..) | AttributeKind::PatternComplexityLimit { .. } @@ -282,60 +295,46 @@ impl<'tcx> CheckAttrVisitor<'tcx> { | AttributeKind::RustcAllocator | AttributeKind::RustcAllocatorZeroed | AttributeKind::RustcAllocatorZeroedVariant { .. } - | AttributeKind::RustcAsPtr(..) - | AttributeKind::RustcBodyStability { .. } | AttributeKind::RustcBuiltinMacro { .. } | AttributeKind::RustcCoherenceIsCore(..) - | AttributeKind::RustcCoinductive(..) - | AttributeKind::RustcConfusables { .. } - | AttributeKind::RustcConstStabilityIndirect | AttributeKind::RustcDeallocator - | AttributeKind::RustcDenyExplicitImpl(..) - | AttributeKind::RustcDummy | AttributeKind::RustcDumpDefParents | AttributeKind::RustcDumpItemBounds | AttributeKind::RustcDumpPredicates | AttributeKind::RustcDumpUserArgs | AttributeKind::RustcDumpVtable(..) - | AttributeKind::RustcDynIncompatibleTrait(..) | AttributeKind::RustcHasIncoherentInherentImpls - | AttributeKind::RustcLayout(..) | AttributeKind::RustcLayoutScalarValidRangeEnd(..) | AttributeKind::RustcLayoutScalarValidRangeStart(..) | AttributeKind::RustcLintOptDenyFieldAccess { .. } | AttributeKind::RustcLintOptTy | AttributeKind::RustcLintQueryInstability | AttributeKind::RustcLintUntrackedQueryInformation - | AttributeKind::RustcMacroTransparency(_) | AttributeKind::RustcMain | AttributeKind::RustcNeverReturnsNullPointer | AttributeKind::RustcNoImplicitAutorefs - | AttributeKind::RustcNonConstTraitMethod | AttributeKind::RustcNounwind - | AttributeKind::RustcObjcClass { .. } - | AttributeKind::RustcObjcSelector { .. } | AttributeKind::RustcOffloadKernel - | AttributeKind::RustcParenSugar(..) - | AttributeKind::RustcPassByValue (..) | AttributeKind::RustcPassIndirectlyInNonRusticAbis(..) | AttributeKind::RustcReallocator | AttributeKind::RustcScalableVector { .. } | AttributeKind::RustcShouldNotBeCalledOnConstItems(..) | AttributeKind::RustcSimdMonomorphizeLaneLimit(..) - | AttributeKind::RustcSkipDuringMethodDispatch { .. } - | AttributeKind::RustcSpecializationTrait(..) - | AttributeKind::RustcStdInternalSymbol (..) - | AttributeKind::RustcUnsafeSpecializationMarker(..) | AttributeKind::RustcVariance | AttributeKind::RustcVarianceOfOpaques | AttributeKind::ShouldPanic { .. } + | AttributeKind::SkipDuringMethodDispatch { .. } + | AttributeKind::SpecializationTrait(..) + | AttributeKind::StdInternalSymbol (..) | AttributeKind::ThreadLocal | AttributeKind::TypeConst{..} | AttributeKind::TypeLengthLimit { .. } + | AttributeKind::UnsafeSpecializationMarker(..) | AttributeKind::UnstableFeatureBound(..) | AttributeKind::Used { .. } | AttributeKind::WindowsSubsystem(..) // tidy-alphabetical-end + ) => { /* do nothing */ } Attribute::Unparsed(attr_item) => { style = Some(attr_item.style); diff --git a/compiler/rustc_passes/src/errors.rs b/compiler/rustc_passes/src/errors.rs index 29688dd4d5377..bf9b615546d89 100644 --- a/compiler/rustc_passes/src/errors.rs +++ b/compiler/rustc_passes/src/errors.rs @@ -519,6 +519,13 @@ pub(crate) struct LayoutOf<'tcx> { pub ty_layout: String, } +#[derive(Diagnostic)] +#[diag(passes_layout_invalid_attribute)] +pub(crate) struct LayoutInvalidAttribute { + #[primary_span] + pub span: Span, +} + #[derive(Diagnostic)] #[diag(passes_abi_of)] pub(crate) struct AbiOf { diff --git a/compiler/rustc_passes/src/layout_test.rs b/compiler/rustc_passes/src/layout_test.rs index 354a98d6d0dc7..4054cfa56330e 100644 --- a/compiler/rustc_passes/src/layout_test.rs +++ b/compiler/rustc_passes/src/layout_test.rs @@ -1,18 +1,20 @@ use rustc_abi::{HasDataLayout, TargetDataLayout}; -use rustc_hir::attrs::{AttributeKind, RustcLayoutType}; +use rustc_hir::Attribute; use rustc_hir::def::DefKind; use rustc_hir::def_id::LocalDefId; -use rustc_hir::find_attr; use rustc_middle::span_bug; use rustc_middle::ty::layout::{HasTyCtxt, HasTypingEnv, LayoutError, LayoutOfHelpers}; use rustc_middle::ty::{self, Ty, TyCtxt}; -use rustc_span::Span; use rustc_span::source_map::Spanned; +use rustc_span::{Span, sym}; use rustc_trait_selection::error_reporting::InferCtxtErrorExt; use rustc_trait_selection::infer::TyCtxtInferExt; use rustc_trait_selection::traits; -use crate::errors::{LayoutAbi, LayoutAlign, LayoutHomogeneousAggregate, LayoutOf, LayoutSize}; +use crate::errors::{ + LayoutAbi, LayoutAlign, LayoutHomogeneousAggregate, LayoutInvalidAttribute, LayoutOf, + LayoutSize, UnrecognizedArgument, +}; pub fn test_layout(tcx: TyCtxt<'_>) { if !tcx.features().rustc_attrs() { @@ -20,14 +22,14 @@ pub fn test_layout(tcx: TyCtxt<'_>) { return; } for id in tcx.hir_crate_items(()).definitions() { - let attrs = tcx.get_all_attrs(id); - if let Some(attrs) = find_attr!(attrs, AttributeKind::RustcLayout(attrs) => attrs) { - // Attribute parsing handles error reporting - if matches!( - tcx.def_kind(id), - DefKind::TyAlias | DefKind::Enum | DefKind::Struct | DefKind::Union - ) { - dump_layout_of(tcx, id, attrs); + for attr in tcx.get_attrs(id, sym::rustc_layout) { + match tcx.def_kind(id) { + DefKind::TyAlias | DefKind::Enum | DefKind::Struct | DefKind::Union => { + dump_layout_of(tcx, id, attr); + } + _ => { + tcx.dcx().emit_err(LayoutInvalidAttribute { span: tcx.def_span(id) }); + } } } } @@ -64,7 +66,7 @@ pub fn ensure_wf<'tcx>( } } -fn dump_layout_of(tcx: TyCtxt<'_>, item_def_id: LocalDefId, attrs: &[RustcLayoutType]) { +fn dump_layout_of(tcx: TyCtxt<'_>, item_def_id: LocalDefId, attr: &Attribute) { let typing_env = ty::TypingEnv::post_analysis(tcx, item_def_id); let ty = tcx.type_of(item_def_id).instantiate_identity(); let span = tcx.def_span(item_def_id.to_def_id()); @@ -73,29 +75,32 @@ fn dump_layout_of(tcx: TyCtxt<'_>, item_def_id: LocalDefId, attrs: &[RustcLayout } match tcx.layout_of(typing_env.as_query_input(ty)) { Ok(ty_layout) => { - for attr in attrs { - match attr { + // Check out the `#[rustc_layout(..)]` attribute to tell what to dump. + // The `..` are the names of fields to dump. + let meta_items = attr.meta_item_list().unwrap_or_default(); + for meta_item in meta_items { + match meta_item.name() { // FIXME: this never was about ABI and now this dump arg is confusing - RustcLayoutType::Abi => { + Some(sym::abi) => { tcx.dcx().emit_err(LayoutAbi { span, abi: format!("{:?}", ty_layout.backend_repr), }); } - RustcLayoutType::Align => { + Some(sym::align) => { tcx.dcx().emit_err(LayoutAlign { span, align: format!("{:?}", ty_layout.align), }); } - RustcLayoutType::Size => { + Some(sym::size) => { tcx.dcx() .emit_err(LayoutSize { span, size: format!("{:?}", ty_layout.size) }); } - RustcLayoutType::HomogenousAggregate => { + Some(sym::homogeneous_aggregate) => { tcx.dcx().emit_err(LayoutHomogeneousAggregate { span, homogeneous_aggregate: format!( @@ -106,12 +111,16 @@ fn dump_layout_of(tcx: TyCtxt<'_>, item_def_id: LocalDefId, attrs: &[RustcLayout }); } - RustcLayoutType::Debug => { + Some(sym::debug) => { let normalized_ty = tcx.normalize_erasing_regions(typing_env, ty); // FIXME: using the `Debug` impl here isn't ideal. let ty_layout = format!("{:#?}", *ty_layout); tcx.dcx().emit_err(LayoutOf { span, normalized_ty, ty_layout }); } + + _ => { + tcx.dcx().emit_err(UnrecognizedArgument { span: meta_item.span() }); + } } } } diff --git a/compiler/rustc_passes/src/lib_features.rs b/compiler/rustc_passes/src/lib_features.rs index 1f92643815fd9..8d0ef88610af8 100644 --- a/compiler/rustc_passes/src/lib_features.rs +++ b/compiler/rustc_passes/src/lib_features.rs @@ -30,10 +30,10 @@ impl<'tcx> LibFeatureCollector<'tcx> { Attribute::Parsed(AttributeKind::Stability { stability, span }) => { (stability.feature, stability.level, *span) } - Attribute::Parsed(AttributeKind::RustcConstStability { stability, span }) => { + Attribute::Parsed(AttributeKind::ConstStability { stability, span }) => { (stability.feature, stability.level, *span) } - Attribute::Parsed(AttributeKind::RustcBodyStability { stability, span }) => { + Attribute::Parsed(AttributeKind::BodyStability { stability, span }) => { (stability.feature, stability.level, *span) } _ => return None, diff --git a/compiler/rustc_passes/src/stability.rs b/compiler/rustc_passes/src/stability.rs index 657b362d5ca14..9d94c4cc62256 100644 --- a/compiler/rustc_passes/src/stability.rs +++ b/compiler/rustc_passes/src/stability.rs @@ -197,7 +197,7 @@ fn lookup_default_body_stability( let attrs = tcx.hir_attrs(tcx.local_def_id_to_hir_id(def_id)); // FIXME: check that this item can have body stability - find_attr!(attrs, AttributeKind::RustcBodyStability { stability, .. } => *stability) + find_attr!(attrs, AttributeKind::BodyStability { stability, .. } => *stability) } #[instrument(level = "debug", skip(tcx))] @@ -214,7 +214,7 @@ fn lookup_const_stability(tcx: TyCtxt<'_>, def_id: LocalDefId) -> Option, def_id: LocalDefId) -> Option *stability); + find_attr!(attrs, AttributeKind::ConstStability { stability, span: _ } => *stability); // After checking the immediate attributes, get rid of the span and compute implied // const stability: inherit feature gate from regular stability. @@ -393,7 +393,7 @@ impl<'tcx> MissingStabilityAnnotations<'tcx> { if let Some(fn_sig) = fn_sig && !fn_sig.header.is_const() && const_stab.is_some() - && find_attr_span!(RustcConstStability).is_some() + && find_attr_span!(ConstStability).is_some() { self.tcx.dcx().emit_err(errors::MissingConstErr { fn_sig_span: fn_sig.span }); } @@ -403,7 +403,7 @@ impl<'tcx> MissingStabilityAnnotations<'tcx> { && let Some(fn_sig) = fn_sig && const_stab.is_const_stable() && !stab.is_some_and(|s| s.is_stable()) - && let Some(const_span) = find_attr_span!(RustcConstStability) + && let Some(const_span) = find_attr_span!(ConstStability) { self.tcx .dcx() @@ -413,7 +413,7 @@ impl<'tcx> MissingStabilityAnnotations<'tcx> { if let Some(stab) = &const_stab && stab.is_const_stable() && stab.const_stable_indirect - && let Some(span) = find_attr_span!(RustcConstStability) + && let Some(span) = find_attr_span!(ConstStability) { self.tcx.dcx().emit_err(errors::RustcConstStableIndirectPairing { span }); } @@ -602,7 +602,7 @@ impl<'tcx> Visitor<'tcx> for Checker<'tcx> { let stab = find_attr!(attrs, AttributeKind::Stability{stability, span} => (*stability, *span)); // FIXME(jdonszelmann): make it impossible to miss the or_else in the typesystem - let const_stab = find_attr!(attrs, AttributeKind::RustcConstStability{stability, ..} => *stability); + let const_stab = find_attr!(attrs, AttributeKind::ConstStability{stability, ..} => *stability); let unstable_feature_stab = find_attr!(attrs, AttributeKind::UnstableFeatureBound(i) => i) diff --git a/compiler/rustc_pattern_analysis/src/rustc.rs b/compiler/rustc_pattern_analysis/src/rustc.rs index dc38f2d8bc70f..3e97842b7f395 100644 --- a/compiler/rustc_pattern_analysis/src/rustc.rs +++ b/compiler/rustc_pattern_analysis/src/rustc.rs @@ -4,8 +4,8 @@ use std::iter::once; use rustc_abi::{FIRST_VARIANT, FieldIdx, Integer, VariantIdx}; use rustc_arena::DroplessArena; -use rustc_hir::HirId; use rustc_hir::def_id::DefId; +use rustc_hir::{self as hir, HirId}; use rustc_index::{Idx, IndexVec}; use rustc_middle::middle::stability::EvalResult; use rustc_middle::thir::{self, Pat, PatKind, PatRange, PatRangeBoundary}; @@ -471,9 +471,9 @@ impl<'p, 'tcx: 'p> RustcPatCtxt<'p, 'tcx> { PatKind::Deref { pin, subpattern } => { fields = vec![self.lower_pat(subpattern).at_index(0)]; arity = 1; - ctor = match (pin, ty.maybe_pinned_ref()) { - (ty::Pinnedness::Not, Some((_, ty::Pinnedness::Not, _, _))) => Ref, - (ty::Pinnedness::Pinned, Some((inner_ty, ty::Pinnedness::Pinned, _, _))) => { + ctor = match pin { + hir::Pinnedness::Not if ty.is_ref() => Ref, + hir::Pinnedness::Pinned if let Some((inner_ty, _)) = ty.pinned_ref() => { self.internal_state.has_lowered_deref_pat.set(true); DerefPattern(RevealedTy(inner_ty)) } diff --git a/compiler/rustc_privacy/src/lib.rs b/compiler/rustc_privacy/src/lib.rs index 3336775210233..8656ec6e39aed 100644 --- a/compiler/rustc_privacy/src/lib.rs +++ b/compiler/rustc_privacy/src/lib.rs @@ -1,6 +1,5 @@ // tidy-alphabetical-start #![feature(associated_type_defaults)] -#![feature(default_field_values)] #![feature(try_blocks)] // tidy-alphabetical-end @@ -30,8 +29,8 @@ use rustc_middle::middle::privacy::{EffectiveVisibilities, EffectiveVisibility, use rustc_middle::query::Providers; use rustc_middle::ty::print::PrintTraitRefExt as _; use rustc_middle::ty::{ - self, AssocContainer, Const, GenericParamDefKind, TraitRef, Ty, TyCtxt, TypeSuperVisitable, - TypeVisitable, TypeVisitor, + self, Const, GenericParamDefKind, TraitRef, Ty, TyCtxt, TypeSuperVisitable, TypeVisitable, + TypeVisitor, }; use rustc_middle::{bug, span_bug}; use rustc_session::lint; @@ -312,18 +311,6 @@ where } } -fn assoc_has_type_of(tcx: TyCtxt<'_>, item: &ty::AssocItem) -> bool { - if let ty::AssocKind::Type { data: ty::AssocTypeData::Normal(..) } = item.kind - && let hir::Node::TraitItem(item) = - tcx.hir_node(tcx.local_def_id_to_hir_id(item.def_id.expect_local())) - && let hir::TraitItemKind::Type(_, None) = item.kind - { - false - } else { - true - } -} - fn min(vis1: ty::Visibility, vis2: ty::Visibility, tcx: TyCtxt<'_>) -> ty::Visibility { if vis1.is_at_least(vis2, tcx) { vis2 } else { vis1 } } @@ -510,7 +497,7 @@ impl<'tcx> EmbargoVisitor<'tcx> { let hir_id = self.tcx.local_def_id_to_hir_id(local_def_id); let attrs = self.tcx.hir_attrs(hir_id); - if find_attr!(attrs, AttributeKind::RustcMacroTransparency(x) => *x) + if find_attr!(attrs, AttributeKind::MacroTransparency(x) => *x) .unwrap_or(Transparency::fallback(md.macro_rules)) != Transparency::Opaque { @@ -652,19 +639,6 @@ impl<'tcx> EmbargoVisitor<'tcx> { } impl<'tcx> EmbargoVisitor<'tcx> { - fn check_assoc_item(&mut self, item: &ty::AssocItem, item_ev: EffectiveVisibility) { - let def_id = item.def_id.expect_local(); - let tcx = self.tcx; - let mut reach = self.reach(def_id, item_ev); - reach.generics().predicates(); - if assoc_has_type_of(tcx, item) { - reach.ty(); - } - if item.is_type() && item.container == AssocContainer::Trait { - reach.bounds(); - } - } - fn check_def_id(&mut self, owner_id: OwnerId) { // Update levels of nested things and mark all items // in interfaces of reachable items as reachable. @@ -695,10 +669,22 @@ impl<'tcx> EmbargoVisitor<'tcx> { self.reach(owner_id.def_id, item_ev).generics().predicates(); for assoc_item in self.tcx.associated_items(owner_id).in_definition_order() { + if assoc_item.is_impl_trait_in_trait() { + continue; + } + let def_id = assoc_item.def_id.expect_local(); self.update(def_id, item_ev, Level::Reachable); - self.check_assoc_item(assoc_item, item_ev); + let tcx = self.tcx; + let mut reach = self.reach(def_id, item_ev); + reach.generics().predicates(); + + if assoc_item.is_type() && !assoc_item.defaultness(tcx).has_value() { + // No type to visit. + } else { + reach.ty(); + } } } } @@ -736,13 +722,17 @@ impl<'tcx> EmbargoVisitor<'tcx> { } for assoc_item in self.tcx.associated_items(owner_id).in_definition_order() { + if assoc_item.is_impl_trait_in_trait() { + continue; + } + let def_id = assoc_item.def_id.expect_local(); let max_vis = if of_trait { None } else { Some(self.tcx.local_visibility(def_id)) }; self.update_eff_vis(def_id, item_ev, max_vis, Level::Direct); if let Some(impl_item_ev) = self.get(def_id) { - self.check_assoc_item(assoc_item, impl_item_ev); + self.reach(def_id, impl_item_ev).generics().predicates().ty(); } } } @@ -834,12 +824,7 @@ impl ReachEverythingInTheInterfaceVisitor<'_, '_> { } fn predicates(&mut self) -> &mut Self { - self.visit_predicates(self.ev.tcx.explicit_predicates_of(self.item_def_id)); - self - } - - fn bounds(&mut self) -> &mut Self { - self.visit_clauses(self.ev.tcx.explicit_item_bounds(self.item_def_id).skip_binder()); + self.visit_predicates(self.ev.tcx.predicates_of(self.item_def_id)); self } @@ -1368,20 +1353,26 @@ struct SearchInterfaceForPrivateItemsVisitor<'tcx> { /// The visitor checks that each component type is at least this visible. required_visibility: ty::Visibility, required_effective_vis: Option, - hard_error: bool = false, - in_primary_interface: bool = true, - skip_assoc_tys: bool = false, + in_assoc_ty: bool, + in_primary_interface: bool, + skip_assoc_tys: bool, } impl SearchInterfaceForPrivateItemsVisitor<'_> { fn generics(&mut self) -> &mut Self { self.in_primary_interface = true; for param in &self.tcx.generics_of(self.item_def_id).own_params { - if let GenericParamDefKind::Const { .. } = param.kind { - let _ = self.visit(self.tcx.type_of(param.def_id).instantiate_identity()); - } - if let Some(default) = param.default_value(self.tcx) { - let _ = self.visit(default.instantiate_identity()); + match param.kind { + GenericParamDefKind::Lifetime => {} + GenericParamDefKind::Type { has_default, .. } => { + if has_default { + let _ = self.visit(self.tcx.type_of(param.def_id).instantiate_identity()); + } + } + // FIXME(generic_const_exprs): May want to look inside const here + GenericParamDefKind::Const { .. } => { + let _ = self.visit(self.tcx.type_of(param.def_id).instantiate_identity()); + } } } self @@ -1436,7 +1427,7 @@ impl SearchInterfaceForPrivateItemsVisitor<'_> { }; let vis = self.tcx.local_visibility(local_def_id); - if self.hard_error && !vis.is_at_least(self.required_visibility, self.tcx) { + if self.in_assoc_ty && !vis.is_at_least(self.required_visibility, self.tcx) { let vis_descr = match vis { ty::Visibility::Public => "public", ty::Visibility::Restricted(vis_def_id) => { @@ -1553,7 +1544,9 @@ impl<'tcx> PrivateItemsInPublicInterfacesChecker<'_, 'tcx> { item_def_id: def_id, required_visibility, required_effective_vis, - .. + in_assoc_ty: false, + in_primary_interface: true, + skip_assoc_tys: false, } } @@ -1591,17 +1584,16 @@ impl<'tcx> PrivateItemsInPublicInterfacesChecker<'_, 'tcx> { ) { let mut check = self.check(item.def_id.expect_local(), vis, effective_vis); - let is_assoc_ty = item.is_type(); - check.hard_error = is_assoc_ty && !item.is_impl_trait_in_trait(); + let (check_ty, is_assoc_ty) = match item.kind { + ty::AssocKind::Const { .. } | ty::AssocKind::Fn { .. } => (true, false), + ty::AssocKind::Type { .. } => (item.defaultness(self.tcx).has_value(), true), + }; + + check.in_assoc_ty = is_assoc_ty; check.generics().predicates(); - if assoc_has_type_of(self.tcx, item) { - check.hard_error = check.hard_error && item.defaultness(self.tcx).has_value(); + if check_ty { check.ty(); } - if is_assoc_ty && item.container == AssocContainer::Trait { - check.hard_error = false; - check.bounds(); - } } fn get(&self, def_id: LocalDefId) -> Option { @@ -1633,7 +1625,20 @@ impl<'tcx> PrivateItemsInPublicInterfacesChecker<'_, 'tcx> { self.check(def_id, item_visibility, effective_vis).generics().predicates(); for assoc_item in tcx.associated_items(id.owner_id).in_definition_order() { + if assoc_item.is_impl_trait_in_trait() { + continue; + } + self.check_assoc_item(assoc_item, item_visibility, effective_vis); + + if assoc_item.is_type() { + self.check( + assoc_item.def_id.expect_local(), + item_visibility, + effective_vis, + ) + .bounds(); + } } } DefKind::TraitAlias => { @@ -1707,6 +1712,10 @@ impl<'tcx> PrivateItemsInPublicInterfacesChecker<'_, 'tcx> { } for assoc_item in tcx.associated_items(id.owner_id).in_definition_order() { + if assoc_item.is_impl_trait_in_trait() { + continue; + } + let impl_item_vis = if !of_trait { min(tcx.local_visibility(assoc_item.def_id.expect_local()), impl_vis, tcx) } else { diff --git a/compiler/rustc_public/src/unstable/convert/internal.rs b/compiler/rustc_public/src/unstable/convert/internal.rs index 8594f65100415..73a3fed111b36 100644 --- a/compiler/rustc_public/src/unstable/convert/internal.rs +++ b/compiler/rustc_public/src/unstable/convert/internal.rs @@ -433,7 +433,7 @@ where } impl RustcInternal for BoundVariableKind { - type T<'tcx> = rustc_ty::BoundVariableKind<'tcx>; + type T<'tcx> = rustc_ty::BoundVariableKind; fn internal<'tcx>( &self, diff --git a/compiler/rustc_public/src/unstable/convert/stable/ty.rs b/compiler/rustc_public/src/unstable/convert/stable/ty.rs index 70cdae43126c4..cee144122c0ed 100644 --- a/compiler/rustc_public/src/unstable/convert/stable/ty.rs +++ b/compiler/rustc_public/src/unstable/convert/stable/ty.rs @@ -271,7 +271,7 @@ impl<'tcx> Stable<'tcx> for ty::FnSig<'tcx> { } } -impl<'tcx> Stable<'tcx> for ty::BoundTyKind<'tcx> { +impl<'tcx> Stable<'tcx> for ty::BoundTyKind { type T = crate::ty::BoundTyKind; fn stable<'cx>( @@ -290,7 +290,7 @@ impl<'tcx> Stable<'tcx> for ty::BoundTyKind<'tcx> { } } -impl<'tcx> Stable<'tcx> for ty::BoundRegionKind<'tcx> { +impl<'tcx> Stable<'tcx> for ty::BoundRegionKind { type T = crate::ty::BoundRegionKind; fn stable<'cx>( @@ -307,12 +307,12 @@ impl<'tcx> Stable<'tcx> for ty::BoundRegionKind<'tcx> { cx.tcx.item_name(*def_id).to_string(), ), ty::BoundRegionKind::ClosureEnv => BoundRegionKind::BrEnv, - ty::BoundRegionKind::NamedForPrinting(_) => bug!("only used for pretty printing"), + ty::BoundRegionKind::NamedAnon(_) => bug!("only used for pretty printing"), } } } -impl<'tcx> Stable<'tcx> for ty::BoundVariableKind<'tcx> { +impl<'tcx> Stable<'tcx> for ty::BoundVariableKind { type T = crate::ty::BoundVariableKind; fn stable<'cx>( @@ -546,7 +546,7 @@ impl<'tcx> Stable<'tcx> for ty::ParamTy { } } -impl<'tcx> Stable<'tcx> for ty::BoundTy<'tcx> { +impl<'tcx> Stable<'tcx> for ty::BoundTy { type T = crate::ty::BoundTy; fn stable<'cx>( &self, diff --git a/compiler/rustc_public/src/unstable/internal_cx/mod.rs b/compiler/rustc_public/src/unstable/internal_cx/mod.rs index 4da86b9442f1d..601ca4fb5cfdb 100644 --- a/compiler/rustc_public/src/unstable/internal_cx/mod.rs +++ b/compiler/rustc_public/src/unstable/internal_cx/mod.rs @@ -78,10 +78,7 @@ impl<'tcx> InternalCx<'tcx> for TyCtxt<'tcx> { fn mk_bound_variable_kinds_from_iter(self, iter: I) -> T::Output where I: Iterator, - T: ty::CollectAndApply< - ty::BoundVariableKind<'tcx>, - &'tcx List>, - >, + T: ty::CollectAndApply>, { TyCtxt::mk_bound_variable_kinds_from_iter(self, iter) } diff --git a/compiler/rustc_public/src/unstable/mod.rs b/compiler/rustc_public/src/unstable/mod.rs index 583493c23d66f..2b69fb5408cf9 100644 --- a/compiler/rustc_public/src/unstable/mod.rs +++ b/compiler/rustc_public/src/unstable/mod.rs @@ -47,10 +47,7 @@ pub trait InternalCx<'tcx>: Copy + Clone { fn mk_bound_variable_kinds_from_iter(self, iter: I) -> T::Output where I: Iterator, - T: ty::CollectAndApply< - ty::BoundVariableKind<'tcx>, - &'tcx List>, - >; + T: ty::CollectAndApply>; fn mk_place_elems(self, v: &[mir::PlaceElem<'tcx>]) -> &'tcx List>; diff --git a/compiler/rustc_query_impl/src/lib.rs b/compiler/rustc_query_impl/src/lib.rs index 4e79d0842da22..b628224db5369 100644 --- a/compiler/rustc_query_impl/src/lib.rs +++ b/compiler/rustc_query_impl/src/lib.rs @@ -10,6 +10,7 @@ use rustc_data_structures::stable_hasher::HashStable; use rustc_data_structures::sync::AtomicU64; use rustc_middle::arena::Arena; use rustc_middle::dep_graph::{self, DepKind, DepKindVTable, DepNodeIndex}; +use rustc_middle::query::erase::{Erase, erase, restore}; use rustc_middle::query::on_disk_cache::{CacheEncoder, EncodedDepNodeIndex, OnDiskCache}; use rustc_middle::query::plumbing::{QuerySystem, QuerySystemFns, QueryVTable}; use rustc_middle::query::{ @@ -21,7 +22,7 @@ use rustc_query_system::dep_graph::SerializedDepNodeIndex; use rustc_query_system::ich::StableHashingContext; use rustc_query_system::query::{ CycleError, CycleErrorHandling, HashResult, QueryCache, QueryDispatcher, QueryMap, QueryMode, - QueryState, get_query_incr, get_query_non_incr, + QueryStackDeferred, QueryState, get_query_incr, get_query_non_incr, }; use rustc_span::{ErrorGuaranteed, Span}; @@ -66,11 +67,11 @@ impl<'tcx, C: QueryCache, const ANON: bool, const DEPTH_LIMIT: bool, const FEEDA // This is `impl QueryDispatcher for SemiDynamicQueryDispatcher`. impl<'tcx, C: QueryCache, const ANON: bool, const DEPTH_LIMIT: bool, const FEEDABLE: bool> - QueryDispatcher<'tcx> for SemiDynamicQueryDispatcher<'tcx, C, ANON, DEPTH_LIMIT, FEEDABLE> + QueryDispatcher> + for SemiDynamicQueryDispatcher<'tcx, C, ANON, DEPTH_LIMIT, FEEDABLE> where for<'a> C::Key: HashStable>, { - type Qcx = QueryCtxt<'tcx>; type Key = C::Key; type Value = C::Value; type Cache = C; @@ -81,12 +82,15 @@ where } #[inline(always)] - fn will_cache_on_disk_for_key(self, tcx: TyCtxt<'tcx>, key: &Self::Key) -> bool { - self.vtable.will_cache_on_disk_for_key_fn.map_or(false, |f| f(tcx, key)) + fn cache_on_disk(self, tcx: TyCtxt<'tcx>, key: &Self::Key) -> bool { + (self.vtable.cache_on_disk)(tcx, key) } #[inline(always)] - fn query_state<'a>(self, qcx: QueryCtxt<'tcx>) -> &'a QueryState<'tcx, Self::Key> + fn query_state<'a>( + self, + qcx: QueryCtxt<'tcx>, + ) -> &'a QueryState> where QueryCtxt<'tcx>: 'a, { @@ -95,12 +99,15 @@ where unsafe { &*(&qcx.tcx.query_system.states as *const QueryStates<'tcx>) .byte_add(self.vtable.query_state) - .cast::>() + .cast::>>() } } #[inline(always)] - fn query_cache<'a>(self, qcx: QueryCtxt<'tcx>) -> &'a Self::Cache { + fn query_cache<'a>(self, qcx: QueryCtxt<'tcx>) -> &'a Self::Cache + where + 'tcx: 'a, + { // Safety: // This is just manually doing the subfield referencing through pointer math. unsafe { @@ -128,18 +135,21 @@ where prev_index: SerializedDepNodeIndex, index: DepNodeIndex, ) -> Option { - // `?` will return None immediately for queries that never cache to disk. - self.vtable.try_load_from_disk_fn?(qcx.tcx, key, prev_index, index) + if self.vtable.can_load_from_disk { + (self.vtable.try_load_from_disk)(qcx.tcx, key, prev_index, index) + } else { + None + } } #[inline] - fn is_loadable_from_disk( + fn loadable_from_disk( self, qcx: QueryCtxt<'tcx>, key: &Self::Key, index: SerializedDepNodeIndex, ) -> bool { - self.vtable.is_loadable_from_disk_fn.map_or(false, |f| f(qcx.tcx, key, index)) + (self.vtable.loadable_from_disk)(qcx.tcx, key, index) } fn value_from_cycle_error( @@ -205,14 +215,14 @@ where /// on the type `rustc_query_impl::query_impl::$name::QueryType`. trait QueryDispatcherUnerased<'tcx> { type UnerasedValue; - type Dispatcher: QueryDispatcher<'tcx, Qcx = QueryCtxt<'tcx>>; + type Dispatcher: QueryDispatcher>; const NAME: &'static &'static str; fn query_dispatcher(tcx: TyCtxt<'tcx>) -> Self::Dispatcher; fn restore_val( - value: >::Value, + value: >>::Value, ) -> Self::UnerasedValue; } diff --git a/compiler/rustc_query_impl/src/plumbing.rs b/compiler/rustc_query_impl/src/plumbing.rs index 2d4e10a0380c8..6ead03a527a7a 100644 --- a/compiler/rustc_query_impl/src/plumbing.rs +++ b/compiler/rustc_query_impl/src/plumbing.rs @@ -60,7 +60,9 @@ impl<'tcx> HasDepContext for QueryCtxt<'tcx> { } } -impl<'tcx> QueryContext<'tcx> for QueryCtxt<'tcx> { +impl<'tcx> QueryContext for QueryCtxt<'tcx> { + type QueryInfo = QueryStackDeferred<'tcx>; + #[inline] fn jobserver_proxy(&self) -> &Proxy { &self.tcx.jobserver_proxy @@ -91,7 +93,10 @@ impl<'tcx> QueryContext<'tcx> for QueryCtxt<'tcx> { /// Prefer passing `false` to `require_complete` to avoid potential deadlocks, /// especially when called from within a deadlock handler, unless a /// complete map is needed and no deadlock is possible at this call site. - fn collect_active_jobs(self, require_complete: bool) -> Result, QueryMap<'tcx>> { + fn collect_active_jobs( + self, + require_complete: bool, + ) -> Result>, QueryMap>> { let mut jobs = QueryMap::default(); let mut complete = true; @@ -276,10 +281,7 @@ macro_rules! feedable { macro_rules! hash_result { ([][$V:ty]) => {{ - Some(|hcx, result| { - let result = ::rustc_middle::query::erase::restore_val::<$V>(*result); - ::rustc_query_system::dep_graph::hash_result(hcx, &result) - }) + Some(|hcx, result| dep_graph::hash_result(hcx, &restore::<$V>(*result))) }}; ([(no_hash) $($rest:tt)*][$V:ty]) => {{ None @@ -317,7 +319,7 @@ macro_rules! should_ever_cache_on_disk { }; } -fn mk_query_stack_frame_extra<'tcx, K: Key + Copy + 'tcx>( +fn create_query_frame_extra<'tcx, K: Key + Copy + 'tcx>( (tcx, key, kind, name, do_describe): ( TyCtxt<'tcx>, K, @@ -368,16 +370,18 @@ pub(crate) fn create_query_frame< ) -> QueryStackFrame> { let def_id = key.key_as_def_id(); - let hash = tcx.with_stable_hashing_context(|mut hcx| { - let mut hasher = StableHasher::new(); - kind.as_usize().hash_stable(&mut hcx, &mut hasher); - key.hash_stable(&mut hcx, &mut hasher); - hasher.finish::() - }); + let hash = || { + tcx.with_stable_hashing_context(|mut hcx| { + let mut hasher = StableHasher::new(); + kind.as_usize().hash_stable(&mut hcx, &mut hasher); + key.hash_stable(&mut hcx, &mut hasher); + hasher.finish::() + }) + }; let def_id_for_ty_in_cycle = key.def_id_for_ty_in_cycle(); let info = - QueryStackDeferred::new((tcx, key, kind, name, do_describe), mk_query_stack_frame_extra); + QueryStackDeferred::new((tcx, key, kind, name, do_describe), create_query_frame_extra); QueryStackFrame::new(info, kind, hash, def_id, def_id_for_ty_in_cycle) } @@ -396,7 +400,7 @@ pub(crate) fn encode_query_results<'a, 'tcx, Q>( assert!(query.query_state(qcx).all_inactive()); let cache = query.query_cache(qcx); cache.iter(&mut |key, value, dep_node| { - if query.will_cache_on_disk_for_key(qcx.tcx, key) { + if query.cache_on_disk(qcx.tcx, key) { let dep_node = SerializedDepNodeIndex::new(dep_node.index()); // Record position of the cache entry. @@ -410,7 +414,7 @@ pub(crate) fn encode_query_results<'a, 'tcx, Q>( } pub(crate) fn query_key_hash_verify<'tcx>( - query: impl QueryDispatcher<'tcx, Qcx = QueryCtxt<'tcx>>, + query: impl QueryDispatcher>, qcx: QueryCtxt<'tcx>, ) { let _timer = qcx.tcx.prof.generic_activity_with_arg("query_key_hash_verify_for", query.name()); @@ -438,14 +442,14 @@ pub(crate) fn query_key_hash_verify<'tcx>( fn try_load_from_on_disk_cache<'tcx, Q>(query: Q, tcx: TyCtxt<'tcx>, dep_node: DepNode) where - Q: QueryDispatcher<'tcx, Qcx = QueryCtxt<'tcx>>, + Q: QueryDispatcher>, { debug_assert!(tcx.dep_graph.is_green(&dep_node)); let key = Q::Key::recover(tcx, &dep_node).unwrap_or_else(|| { panic!("Failed to recover key for {:?} with hash {}", dep_node, dep_node.hash) }); - if query.will_cache_on_disk_for_key(tcx, &key) { + if query.cache_on_disk(tcx, &key) { let _ = query.execute_query(tcx, key); } } @@ -484,7 +488,7 @@ where fn force_from_dep_node<'tcx, Q>(query: Q, tcx: TyCtxt<'tcx>, dep_node: DepNode) -> bool where - Q: QueryDispatcher<'tcx, Qcx = QueryCtxt<'tcx>>, + Q: QueryDispatcher>, { // We must avoid ever having to call `force_from_dep_node()` for a // `DepNode::codegen_unit`: @@ -519,7 +523,8 @@ pub(crate) fn make_dep_kind_vtable_for_query<'tcx, Q>( where Q: QueryDispatcherUnerased<'tcx>, { - let fingerprint_style = ::Key::fingerprint_style(); + let fingerprint_style = + >>::Key::fingerprint_style(); if is_anon || !fingerprint_style.reconstructible() { return DepKindVTable { @@ -593,7 +598,6 @@ macro_rules! define_queries { pub(crate) mod query_impl { $(pub(crate) mod $name { use super::super::*; use std::marker::PhantomData; - use ::rustc_middle::query::erase::{self, Erased}; pub(crate) mod get_query_incr { use super::*; @@ -606,7 +610,7 @@ macro_rules! define_queries { span: Span, key: queries::$name::Key<'tcx>, mode: QueryMode, - ) -> Option>> { + ) -> Option>> { #[cfg(debug_assertions)] let _guard = tracing::span!(tracing::Level::TRACE, stringify!($name), ?key).entered(); get_query_incr( @@ -628,7 +632,7 @@ macro_rules! define_queries { span: Span, key: queries::$name::Key<'tcx>, __mode: QueryMode, - ) -> Option>> { + ) -> Option>> { Some(get_query_non_incr( QueryType::query_dispatcher(tcx), QueryCtxt::new(tcx), @@ -648,12 +652,8 @@ macro_rules! define_queries { cycle_error_handling: cycle_error_handling!([$($modifiers)*]), query_state: std::mem::offset_of!(QueryStates<'tcx>, $name), query_cache: std::mem::offset_of!(QueryCaches<'tcx>, $name), - will_cache_on_disk_for_key_fn: should_ever_cache_on_disk!([$($modifiers)*] { - Some(::rustc_middle::query::cached::$name) - } { - None - }), - execute_query: |tcx, key| erase::erase_val(tcx.$name(key)), + cache_on_disk: |tcx, key| ::rustc_middle::query::cached::$name(tcx, key), + execute_query: |tcx, key| erase(tcx.$name(key)), compute: |tcx, key| { #[cfg(debug_assertions)] let _guard = tracing::span!(tracing::Level::TRACE, stringify!($name), ?key).entered(); @@ -670,36 +670,39 @@ macro_rules! define_queries { ) ) }, - try_load_from_disk_fn: should_ever_cache_on_disk!([$($modifiers)*] { - Some(|tcx, key, prev_index, index| { - // Check the `cache_on_disk_if` condition for this key. - if !::rustc_middle::query::cached::$name(tcx, key) { - return None; + can_load_from_disk: should_ever_cache_on_disk!([$($modifiers)*] true false), + try_load_from_disk: should_ever_cache_on_disk!([$($modifiers)*] { + |tcx, key, prev_index, index| { + if ::rustc_middle::query::cached::$name(tcx, key) { + let value = $crate::plumbing::try_load_from_disk::< + queries::$name::ProvidedValue<'tcx> + >( + tcx, + prev_index, + index, + ); + value.map(|value| queries::$name::provided_to_erased(tcx, value)) + } else { + None } - - let value: queries::$name::ProvidedValue<'tcx> = - $crate::plumbing::try_load_from_disk(tcx, prev_index, index)?; - - // Arena-alloc the value if appropriate, and erase it. - Some(queries::$name::provided_to_erased(tcx, value)) - }) - } { - None - }), - is_loadable_from_disk_fn: should_ever_cache_on_disk!([$($modifiers)*] { - Some(|tcx, key, index| -> bool { - ::rustc_middle::query::cached::$name(tcx, key) && - $crate::plumbing::loadable_from_disk(tcx, index) - }) + } } { - None + |_tcx, _key, _prev_index, _index| None }), value_from_cycle_error: |tcx, cycle, guar| { let result: queries::$name::Value<'tcx> = Value::from_cycle_error(tcx, cycle, guar); - erase::erase_val(result) + erase(result) + }, + loadable_from_disk: |_tcx, _key, _index| { + should_ever_cache_on_disk!([$($modifiers)*] { + ::rustc_middle::query::cached::$name(_tcx, _key) && + $crate::plumbing::loadable_from_disk(_tcx, _index) + } { + false + }) }, hash_result: hash_result!([$($modifiers)*][queries::$name::Value<'tcx>]), - format_value: |value| format!("{:?}", erase::restore_val::>(*value)), + format_value: |value| format!("{:?}", restore::>(*value)), } } @@ -728,14 +731,14 @@ macro_rules! define_queries { } #[inline(always)] - fn restore_val(value: >::Value) -> Self::UnerasedValue { - erase::restore_val::>(value) + fn restore_val(value: >>::Value) -> Self::UnerasedValue { + restore::>(value) } } pub(crate) fn collect_active_jobs<'tcx>( tcx: TyCtxt<'tcx>, - qmap: &mut QueryMap<'tcx>, + qmap: &mut QueryMap>, require_complete: bool, ) -> Option<()> { let make_query = |tcx, key| { @@ -819,7 +822,7 @@ macro_rules! define_queries { // These arrays are used for iteration and can't be indexed by `DepKind`. const COLLECT_ACTIVE_JOBS: &[ - for<'tcx> fn(TyCtxt<'tcx>, &mut QueryMap<'tcx>, bool) -> Option<()> + for<'tcx> fn(TyCtxt<'tcx>, &mut QueryMap>, bool) -> Option<()> ] = &[$(query_impl::$name::collect_active_jobs),*]; diff --git a/compiler/rustc_query_system/Cargo.toml b/compiler/rustc_query_system/Cargo.toml index 0ad8143c5a4f7..73ab03576dec8 100644 --- a/compiler/rustc_query_system/Cargo.toml +++ b/compiler/rustc_query_system/Cargo.toml @@ -23,3 +23,8 @@ rustc_thread_pool = { path = "../rustc_thread_pool" } smallvec = { version = "1.8.1", features = ["union", "may_dangle"] } tracing = "0.1" # tidy-alphabetical-end + +[dependencies.hashbrown] +version = "0.16.1" +default-features = false +features = ["nightly"] # for may_dangle diff --git a/compiler/rustc_query_system/src/dep_graph/graph.rs b/compiler/rustc_query_system/src/dep_graph/graph.rs index 36f5ccfc68f4a..f0cc9636b75c2 100644 --- a/compiler/rustc_query_system/src/dep_graph/graph.rs +++ b/compiler/rustc_query_system/src/dep_graph/graph.rs @@ -519,11 +519,7 @@ impl DepGraph { /// This encodes a diagnostic by creating a node with an unique index and associating /// `diagnostic` with it, for use in the next session. #[inline] - pub fn record_diagnostic<'tcx, Qcx: QueryContext<'tcx>>( - &self, - qcx: Qcx, - diagnostic: &DiagInner, - ) { + pub fn record_diagnostic(&self, qcx: Qcx, diagnostic: &DiagInner) { if let Some(ref data) = self.data { D::read_deps(|task_deps| match task_deps { TaskDepsRef::EvalAlways | TaskDepsRef::Ignore => return, @@ -536,7 +532,7 @@ impl DepGraph { /// This forces a diagnostic node green by running its side effect. `prev_index` would /// refer to a node created used `encode_diagnostic` in the previous session. #[inline] - pub fn force_diagnostic_node<'tcx, Qcx: QueryContext<'tcx>>( + pub fn force_diagnostic_node( &self, qcx: Qcx, prev_index: SerializedDepNodeIndex, @@ -662,7 +658,7 @@ impl DepGraphData { } #[inline] - pub(crate) fn prev_node_of(&self, prev_index: SerializedDepNodeIndex) -> &DepNode { + pub(crate) fn prev_node_of(&self, prev_index: SerializedDepNodeIndex) -> DepNode { self.previous.index_to_node(prev_index) } @@ -673,7 +669,7 @@ impl DepGraphData { /// This encodes a diagnostic by creating a node with an unique index and associating /// `diagnostic` with it, for use in the next session. #[inline] - fn encode_diagnostic<'tcx, Qcx: QueryContext<'tcx>>( + fn encode_diagnostic( &self, qcx: Qcx, diagnostic: &DiagInner, @@ -697,7 +693,7 @@ impl DepGraphData { /// This forces a diagnostic node green by running its side effect. `prev_index` would /// refer to a node created used `encode_diagnostic` in the previous session. #[inline] - fn force_diagnostic_node<'tcx, Qcx: QueryContext<'tcx>>( + fn force_diagnostic_node( &self, qcx: Qcx, prev_index: SerializedDepNodeIndex, @@ -783,7 +779,7 @@ impl DepGraphData { #[cfg(debug_assertions)] self.current.record_edge( dep_node_index, - *self.previous.index_to_node(prev_index), + self.previous.index_to_node(prev_index), self.previous.fingerprint_by_index(prev_index), ); @@ -847,7 +843,7 @@ impl DepGraph { DepNodeColor::Unknown } - pub fn try_mark_green<'tcx, Qcx: QueryContext<'tcx, Deps = D>>( + pub fn try_mark_green>( &self, qcx: Qcx, dep_node: &DepNode, @@ -862,7 +858,7 @@ impl DepGraphData { /// A node will have an index, when it's already been marked green, or when we can mark it /// green. This function will mark the current task as a reader of the specified node, when /// a node index can be found for that node. - pub(crate) fn try_mark_green<'tcx, Qcx: QueryContext<'tcx, Deps = D>>( + pub(crate) fn try_mark_green>( &self, qcx: Qcx, dep_node: &DepNode, @@ -872,8 +868,6 @@ impl DepGraphData { // Return None if the dep node didn't exist in the previous session let prev_index = self.previous.node_to_index_opt(dep_node)?; - debug_assert_eq!(self.previous.index_to_node(prev_index), dep_node); - match self.colors.get(prev_index) { DepNodeColor::Green(dep_node_index) => Some((prev_index, dep_node_index)), DepNodeColor::Red => None, @@ -882,14 +876,14 @@ impl DepGraphData { // in the previous compilation session too, so we can try to // mark it as green by recursively marking all of its // dependencies green. - self.try_mark_previous_green(qcx, prev_index, None) + self.try_mark_previous_green(qcx, prev_index, dep_node, None) .map(|dep_node_index| (prev_index, dep_node_index)) } } } #[instrument(skip(self, qcx, parent_dep_node_index, frame), level = "debug")] - fn try_mark_parent_green<'tcx, Qcx: QueryContext<'tcx, Deps = D>>( + fn try_mark_parent_green>( &self, qcx: Qcx, parent_dep_node_index: SerializedDepNodeIndex, @@ -920,7 +914,7 @@ impl DepGraphData { DepNodeColor::Unknown => {} } - let dep_dep_node = get_dep_dep_node(); + let dep_dep_node = &get_dep_dep_node(); // We don't know the state of this dependency. If it isn't // an eval_always node, let's try to mark it green recursively. @@ -930,7 +924,8 @@ impl DepGraphData { dep_dep_node, dep_dep_node.hash, ); - let node_index = self.try_mark_previous_green(qcx, parent_dep_node_index, Some(frame)); + let node_index = + self.try_mark_previous_green(qcx, parent_dep_node_index, dep_dep_node, Some(frame)); if node_index.is_some() { debug!("managed to MARK dependency {dep_dep_node:?} as green"); @@ -978,19 +973,19 @@ impl DepGraphData { /// Try to mark a dep-node which existed in the previous compilation session as green. #[instrument(skip(self, qcx, prev_dep_node_index, frame), level = "debug")] - fn try_mark_previous_green<'tcx, Qcx: QueryContext<'tcx, Deps = D>>( + fn try_mark_previous_green>( &self, qcx: Qcx, prev_dep_node_index: SerializedDepNodeIndex, + dep_node: &DepNode, frame: Option<&MarkFrame<'_>>, ) -> Option { let frame = MarkFrame { index: prev_dep_node_index, parent: frame }; // We never try to mark eval_always nodes as green - debug_assert!( - !qcx.dep_context() - .is_eval_always(self.previous.index_to_node(prev_dep_node_index).kind) - ); + debug_assert!(!qcx.dep_context().is_eval_always(dep_node.kind)); + + debug_assert_eq!(self.previous.index_to_node(prev_dep_node_index), *dep_node); let prev_deps = self.previous.edge_targets_from(prev_dep_node_index); @@ -1011,10 +1006,7 @@ impl DepGraphData { // ... and finally storing a "Green" entry in the color map. // Multiple threads can all write the same color here - debug!( - "successfully marked {:?} as green", - self.previous.index_to_node(prev_dep_node_index) - ); + debug!("successfully marked {dep_node:?} as green"); Some(dep_node_index) } } @@ -1454,7 +1446,7 @@ fn panic_on_forbidden_read(data: &DepGraphData, dep_node_index: DepN // previous session and has been marked green for prev_index in data.colors.values.indices() { if data.colors.current(prev_index) == Some(dep_node_index) { - dep_node = Some(*data.previous.index_to_node(prev_index)); + dep_node = Some(data.previous.index_to_node(prev_index)); break; } } diff --git a/compiler/rustc_query_system/src/dep_graph/mod.rs b/compiler/rustc_query_system/src/dep_graph/mod.rs index 8f714a2c96d65..874b41cbf3b1c 100644 --- a/compiler/rustc_query_system/src/dep_graph/mod.rs +++ b/compiler/rustc_query_system/src/dep_graph/mod.rs @@ -83,9 +83,9 @@ pub trait DepContext: Copy { } /// Load data from the on-disk cache. - fn try_load_from_on_disk_cache(self, dep_node: &DepNode) { + fn try_load_from_on_disk_cache(self, dep_node: DepNode) { if let Some(try_load_fn) = self.dep_kind_vtable(dep_node.kind).try_load_from_on_disk_cache { - try_load_fn(self, *dep_node) + try_load_fn(self, dep_node) } } diff --git a/compiler/rustc_query_system/src/dep_graph/serialized.rs b/compiler/rustc_query_system/src/dep_graph/serialized.rs index aa4c928d3cdc8..403394674a027 100644 --- a/compiler/rustc_query_system/src/dep_graph/serialized.rs +++ b/compiler/rustc_query_system/src/dep_graph/serialized.rs @@ -133,8 +133,8 @@ impl SerializedDepGraph { } #[inline] - pub fn index_to_node(&self, dep_node_index: SerializedDepNodeIndex) -> &DepNode { - &self.nodes[dep_node_index] + pub fn index_to_node(&self, dep_node_index: SerializedDepNodeIndex) -> DepNode { + self.nodes[dep_node_index] } #[inline] @@ -346,7 +346,7 @@ impl SerializedNodeHeader { #[inline] fn new( - node: &DepNode, + node: DepNode, index: DepNodeIndex, fingerprint: Fingerprint, edge_max_index: u32, @@ -379,7 +379,7 @@ impl SerializedNodeHeader { { let res = Self { bytes, _marker: PhantomData }; assert_eq!(fingerprint, res.fingerprint()); - assert_eq!(*node, res.node()); + assert_eq!(node, res.node()); if let Some(len) = res.len() { assert_eq!(edge_count, len as usize); } @@ -452,7 +452,7 @@ struct NodeInfo { impl NodeInfo { fn encode(&self, e: &mut MemEncoder, index: DepNodeIndex) { - let NodeInfo { ref node, fingerprint, ref edges } = *self; + let NodeInfo { node, fingerprint, ref edges } = *self; let header = SerializedNodeHeader::::new( node, index, @@ -482,7 +482,7 @@ impl NodeInfo { #[inline] fn encode_promoted( e: &mut MemEncoder, - node: &DepNode, + node: DepNode, index: DepNodeIndex, fingerprint: Fingerprint, prev_index: SerializedDepNodeIndex, @@ -604,7 +604,7 @@ impl EncoderState { #[inline] fn record( &self, - node: &DepNode, + node: DepNode, index: DepNodeIndex, edge_count: usize, edges: impl FnOnce(&Self) -> Vec, @@ -622,7 +622,7 @@ impl EncoderState { outline(move || { // Do not ICE when a query is called from within `with_query`. if let Some(record_graph) = &mut record_graph.try_lock() { - record_graph.push(index, *node, &edges); + record_graph.push(index, node, &edges); } }); } @@ -661,7 +661,7 @@ impl EncoderState { node.encode::(&mut local.encoder, index); self.flush_mem_encoder(&mut *local); self.record( - &node.node, + node.node, index, node.edges.len(), |_| node.edges[..].to_vec(), diff --git a/compiler/rustc_query_system/src/query/dispatcher.rs b/compiler/rustc_query_system/src/query/dispatcher.rs index ac6c38dd7db55..bba1703dfbb6b 100644 --- a/compiler/rustc_query_system/src/query/dispatcher.rs +++ b/compiler/rustc_query_system/src/query/dispatcher.rs @@ -5,18 +5,13 @@ use rustc_data_structures::fingerprint::Fingerprint; use rustc_span::ErrorGuaranteed; use super::QueryStackFrameExtra; -use crate::dep_graph::{DepKind, DepNode, DepNodeParams, HasDepContext, SerializedDepNodeIndex}; +use crate::dep_graph::{DepKind, DepNode, DepNodeParams, SerializedDepNodeIndex}; use crate::ich::StableHashingContext; use crate::query::caches::QueryCache; use crate::query::{CycleError, CycleErrorHandling, DepNodeIndex, QueryContext, QueryState}; pub type HashResult = Option, &V) -> Fingerprint>; -/// Unambiguous shorthand for `::DepContext`. -#[expect(type_alias_bounds)] -type DepContextOf<'tcx, This: QueryDispatcher<'tcx>> = - <>::Qcx as HasDepContext>::DepContext; - /// Trait that can be used as a vtable for a single query, providing operations /// and metadata for that query. /// @@ -25,15 +20,12 @@ type DepContextOf<'tcx, This: QueryDispatcher<'tcx>> = /// Those types are not visible from this `rustc_query_system` crate. /// /// "Dispatcher" should be understood as a near-synonym of "vtable". -pub trait QueryDispatcher<'tcx>: Copy { +pub trait QueryDispatcher: Copy { fn name(self) -> &'static str; - /// Query context used by this dispatcher, i.e. `rustc_query_impl::QueryCtxt`. - type Qcx: QueryContext<'tcx>; - // `Key` and `Value` are `Copy` instead of `Clone` to ensure copying them stays cheap, // but it isn't necessary. - type Key: DepNodeParams> + Eq + Hash + Copy + Debug; + type Key: DepNodeParams + Eq + Hash + Copy + Debug; type Value: Copy; type Cache: QueryCache; @@ -41,37 +33,36 @@ pub trait QueryDispatcher<'tcx>: Copy { fn format_value(self) -> fn(&Self::Value) -> String; // Don't use this method to access query results, instead use the methods on TyCtxt - fn query_state<'a>(self, tcx: Self::Qcx) -> &'a QueryState<'tcx, Self::Key>; + fn query_state<'a>(self, tcx: Qcx) -> &'a QueryState + where + Qcx: 'a; // Don't use this method to access query results, instead use the methods on TyCtxt - fn query_cache<'a>(self, tcx: Self::Qcx) -> &'a Self::Cache; + fn query_cache<'a>(self, tcx: Qcx) -> &'a Self::Cache + where + Qcx: 'a; - fn will_cache_on_disk_for_key(self, tcx: DepContextOf<'tcx, Self>, key: &Self::Key) -> bool; + fn cache_on_disk(self, tcx: Qcx::DepContext, key: &Self::Key) -> bool; // Don't use this method to compute query results, instead use the methods on TyCtxt - fn execute_query(self, tcx: DepContextOf<'tcx, Self>, k: Self::Key) -> Self::Value; + fn execute_query(self, tcx: Qcx::DepContext, k: Self::Key) -> Self::Value; - fn compute(self, tcx: Self::Qcx, key: Self::Key) -> Self::Value; + fn compute(self, tcx: Qcx, key: Self::Key) -> Self::Value; fn try_load_from_disk( self, - tcx: Self::Qcx, + tcx: Qcx, key: &Self::Key, prev_index: SerializedDepNodeIndex, index: DepNodeIndex, ) -> Option; - fn is_loadable_from_disk( - self, - qcx: Self::Qcx, - key: &Self::Key, - idx: SerializedDepNodeIndex, - ) -> bool; + fn loadable_from_disk(self, qcx: Qcx, key: &Self::Key, idx: SerializedDepNodeIndex) -> bool; /// Synthesize an error value to let compilation continue after a cycle. fn value_from_cycle_error( self, - tcx: DepContextOf<'tcx, Self>, + tcx: Qcx::DepContext, cycle_error: &CycleError, guar: ErrorGuaranteed, ) -> Self::Value; @@ -86,7 +77,7 @@ pub trait QueryDispatcher<'tcx>: Copy { fn hash_result(self) -> HashResult; // Just here for convenience and checking that the key matches the kind, don't override this. - fn construct_dep_node(self, tcx: DepContextOf<'tcx, Self>, key: &Self::Key) -> DepNode { + fn construct_dep_node(self, tcx: Qcx::DepContext, key: &Self::Key) -> DepNode { DepNode::construct(tcx, self.dep_kind(), key) } } diff --git a/compiler/rustc_query_system/src/query/job.rs b/compiler/rustc_query_system/src/query/job.rs index 177bcd63cbc62..5810ce0cbe668 100644 --- a/compiler/rustc_query_system/src/query/job.rs +++ b/compiler/rustc_query_system/src/query/job.rs @@ -12,7 +12,7 @@ use rustc_hir::def::DefKind; use rustc_session::Session; use rustc_span::{DUMMY_SP, Span}; -use super::{QueryStackDeferred, QueryStackFrameExtra}; +use super::QueryStackFrameExtra; use crate::dep_graph::DepContext; use crate::error::CycleStack; use crate::query::plumbing::CycleError; @@ -26,8 +26,8 @@ pub struct QueryInfo { pub query: QueryStackFrame, } -impl<'tcx> QueryInfo> { - pub(crate) fn lift>( +impl QueryInfo { + pub(crate) fn lift>( &self, qcx: Qcx, ) -> QueryInfo { @@ -35,39 +35,39 @@ impl<'tcx> QueryInfo> { } } -pub type QueryMap<'tcx> = FxHashMap>; +pub type QueryMap = FxHashMap>; /// A value uniquely identifying an active query job. #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug)] pub struct QueryJobId(pub NonZero); impl QueryJobId { - fn query<'a, 'tcx>(self, map: &'a QueryMap<'tcx>) -> QueryStackFrame> { + fn query(self, map: &QueryMap) -> QueryStackFrame { map.get(&self).unwrap().query.clone() } - fn span<'a, 'tcx>(self, map: &'a QueryMap<'tcx>) -> Span { + fn span(self, map: &QueryMap) -> Span { map.get(&self).unwrap().job.span } - fn parent<'a, 'tcx>(self, map: &'a QueryMap<'tcx>) -> Option { + fn parent(self, map: &QueryMap) -> Option { map.get(&self).unwrap().job.parent } - fn latch<'a, 'tcx>(self, map: &'a QueryMap<'tcx>) -> Option<&'a QueryLatch<'tcx>> { + fn latch(self, map: &QueryMap) -> Option<&QueryLatch> { map.get(&self).unwrap().job.latch.as_ref() } } #[derive(Clone, Debug)] -pub struct QueryJobInfo<'tcx> { - pub query: QueryStackFrame>, - pub job: QueryJob<'tcx>, +pub struct QueryJobInfo { + pub query: QueryStackFrame, + pub job: QueryJob, } /// Represents an active query job. #[derive(Debug)] -pub struct QueryJob<'tcx> { +pub struct QueryJob { pub id: QueryJobId, /// The span corresponding to the reason for which this query was required. @@ -77,23 +77,23 @@ pub struct QueryJob<'tcx> { pub parent: Option, /// The latch that is used to wait on this job. - latch: Option>, + latch: Option>, } -impl<'tcx> Clone for QueryJob<'tcx> { +impl Clone for QueryJob { fn clone(&self) -> Self { Self { id: self.id, span: self.span, parent: self.parent, latch: self.latch.clone() } } } -impl<'tcx> QueryJob<'tcx> { +impl QueryJob { /// Creates a new query job. #[inline] pub fn new(id: QueryJobId, span: Span, parent: Option) -> Self { QueryJob { id, span, parent, latch: None } } - pub(super) fn latch(&mut self) -> QueryLatch<'tcx> { + pub(super) fn latch(&mut self) -> QueryLatch { if self.latch.is_none() { self.latch = Some(QueryLatch::new()); } @@ -113,12 +113,12 @@ impl<'tcx> QueryJob<'tcx> { } impl QueryJobId { - pub(super) fn find_cycle_in_stack<'tcx>( + pub(super) fn find_cycle_in_stack( &self, - query_map: QueryMap<'tcx>, + query_map: QueryMap, current_job: &Option, span: Span, - ) -> CycleError> { + ) -> CycleError { // Find the waitee amongst `current_job` parents let mut cycle = Vec::new(); let mut current_job = Option::clone(current_job); @@ -152,10 +152,7 @@ impl QueryJobId { #[cold] #[inline(never)] - pub fn find_dep_kind_root<'tcx>( - &self, - query_map: QueryMap<'tcx>, - ) -> (QueryJobInfo<'tcx>, usize) { + pub fn find_dep_kind_root(&self, query_map: QueryMap) -> (QueryJobInfo, usize) { let mut depth = 1; let info = query_map.get(&self).unwrap(); let dep_kind = info.query.dep_kind; @@ -175,31 +172,31 @@ impl QueryJobId { } #[derive(Debug)] -struct QueryWaiter<'tcx> { +struct QueryWaiter { query: Option, condvar: Condvar, span: Span, - cycle: Mutex>>>, + cycle: Mutex>>, } #[derive(Debug)] -struct QueryLatchInfo<'tcx> { +struct QueryLatchInfo { complete: bool, - waiters: Vec>>, + waiters: Vec>>, } #[derive(Debug)] -pub(super) struct QueryLatch<'tcx> { - info: Arc>>, +pub(super) struct QueryLatch { + info: Arc>>, } -impl<'tcx> Clone for QueryLatch<'tcx> { +impl Clone for QueryLatch { fn clone(&self) -> Self { Self { info: Arc::clone(&self.info) } } } -impl<'tcx> QueryLatch<'tcx> { +impl QueryLatch { fn new() -> Self { QueryLatch { info: Arc::new(Mutex::new(QueryLatchInfo { complete: false, waiters: Vec::new() })), @@ -209,10 +206,10 @@ impl<'tcx> QueryLatch<'tcx> { /// Awaits for the query job to complete. pub(super) fn wait_on( &self, - qcx: impl QueryContext<'tcx>, + qcx: impl QueryContext, query: Option, span: Span, - ) -> Result<(), CycleError>> { + ) -> Result<(), CycleError> { let waiter = Arc::new(QueryWaiter { query, span, cycle: Mutex::new(None), condvar: Condvar::new() }); self.wait_on_inner(qcx, &waiter); @@ -227,7 +224,7 @@ impl<'tcx> QueryLatch<'tcx> { } /// Awaits the caller on this latch by blocking the current thread. - fn wait_on_inner(&self, qcx: impl QueryContext<'tcx>, waiter: &Arc>) { + fn wait_on_inner(&self, qcx: impl QueryContext, waiter: &Arc>) { let mut info = self.info.lock(); if !info.complete { // We push the waiter on to the `waiters` list. It can be accessed inside @@ -263,7 +260,7 @@ impl<'tcx> QueryLatch<'tcx> { /// Removes a single waiter from the list of waiters. /// This is used to break query cycles. - fn extract_waiter(&self, waiter: usize) -> Arc> { + fn extract_waiter(&self, waiter: usize) -> Arc> { let mut info = self.info.lock(); debug_assert!(!info.complete); // Remove the waiter from the list of waiters @@ -283,8 +280,8 @@ type Waiter = (QueryJobId, usize); /// For visits of resumable waiters it returns Some(Some(Waiter)) which has the /// required information to resume the waiter. /// If all `visit` calls returns None, this function also returns None. -fn visit_waiters<'tcx, F>( - query_map: &QueryMap<'tcx>, +fn visit_waiters( + query_map: &QueryMap, query: QueryJobId, mut visit: F, ) -> Option> @@ -317,8 +314,8 @@ where /// `span` is the reason for the `query` to execute. This is initially DUMMY_SP. /// If a cycle is detected, this initial value is replaced with the span causing /// the cycle. -fn cycle_check<'tcx>( - query_map: &QueryMap<'tcx>, +fn cycle_check( + query_map: &QueryMap, query: QueryJobId, span: Span, stack: &mut Vec<(Span, QueryJobId)>, @@ -357,8 +354,8 @@ fn cycle_check<'tcx>( /// Finds out if there's a path to the compiler root (aka. code which isn't in a query) /// from `query` without going through any of the queries in `visited`. /// This is achieved with a depth first search. -fn connected_to_root<'tcx>( - query_map: &QueryMap<'tcx>, +fn connected_to_root( + query_map: &QueryMap, query: QueryJobId, visited: &mut FxHashSet, ) -> bool { @@ -379,7 +376,7 @@ fn connected_to_root<'tcx>( } // Deterministically pick an query from a list -fn pick_query<'a, 'tcx, T, F>(query_map: &QueryMap<'tcx>, queries: &'a [T], f: F) -> &'a T +fn pick_query<'a, I: Clone, T, F>(query_map: &QueryMap, queries: &'a [T], f: F) -> &'a T where F: Fn(&T) -> (Span, QueryJobId), { @@ -404,10 +401,10 @@ where /// the function return true. /// If a cycle was not found, the starting query is removed from `jobs` and /// the function returns false. -fn remove_cycle<'tcx>( - query_map: &QueryMap<'tcx>, +fn remove_cycle( + query_map: &QueryMap, jobs: &mut Vec, - wakelist: &mut Vec>>, + wakelist: &mut Vec>>, ) -> bool { let mut visited = FxHashSet::default(); let mut stack = Vec::new(); @@ -508,7 +505,10 @@ fn remove_cycle<'tcx>( /// uses a query latch and then resuming that waiter. /// There may be multiple cycles involved in a deadlock, so this searches /// all active queries for cycles before finally resuming all the waiters at once. -pub fn break_query_cycles<'tcx>(query_map: QueryMap<'tcx>, registry: &rustc_thread_pool::Registry) { +pub fn break_query_cycles( + query_map: QueryMap, + registry: &rustc_thread_pool::Registry, +) { let mut wakelist = Vec::new(); // It is OK per the comments: // - https://github.com/rust-lang/rust/pull/131200#issuecomment-2798854932 @@ -602,7 +602,7 @@ pub fn report_cycle<'a>( sess.dcx().create_err(cycle_diag) } -pub fn print_query_stack<'tcx, Qcx: QueryContext<'tcx>>( +pub fn print_query_stack( qcx: Qcx, mut current_query: Option, dcx: DiagCtxtHandle<'_>, diff --git a/compiler/rustc_query_system/src/query/mod.rs b/compiler/rustc_query_system/src/query/mod.rs index 63202429679d2..701253d50fcca 100644 --- a/compiler/rustc_query_system/src/query/mod.rs +++ b/compiler/rustc_query_system/src/query/mod.rs @@ -58,19 +58,22 @@ pub struct QueryStackFrame { pub def_id_for_ty_in_cycle: Option, } -impl<'tcx> QueryStackFrame> { +impl QueryStackFrame { #[inline] pub fn new( - info: QueryStackDeferred<'tcx>, + info: I, dep_kind: DepKind, - hash: Hash64, + hash: impl FnOnce() -> Hash64, def_id: Option, def_id_for_ty_in_cycle: Option, ) -> Self { - Self { info, def_id, dep_kind, hash, def_id_for_ty_in_cycle } + Self { info, def_id, dep_kind, hash: hash(), def_id_for_ty_in_cycle } } - fn lift>(&self, qcx: Qcx) -> QueryStackFrame { + fn lift>( + &self, + qcx: Qcx, + ) -> QueryStackFrame { QueryStackFrame { info: qcx.lift_query_info(&self.info), dep_kind: self.dep_kind, @@ -156,7 +159,9 @@ pub enum QuerySideEffect { Diagnostic(DiagInner), } -pub trait QueryContext<'tcx>: HasDepContext { +pub trait QueryContext: HasDepContext { + type QueryInfo: Clone; + /// Gets a jobserver reference which is used to release then acquire /// a token while waiting on a query. fn jobserver_proxy(&self) -> &Proxy; @@ -166,9 +171,12 @@ pub trait QueryContext<'tcx>: HasDepContext { /// Get the query information from the TLS context. fn current_query_job(self) -> Option; - fn collect_active_jobs(self, require_complete: bool) -> Result, QueryMap<'tcx>>; + fn collect_active_jobs( + self, + require_complete: bool, + ) -> Result, QueryMap>; - fn lift_query_info(self, info: &QueryStackDeferred<'tcx>) -> QueryStackFrameExtra; + fn lift_query_info(self, info: &Self::QueryInfo) -> QueryStackFrameExtra; /// Load a side effect associated to the node in the previous session. fn load_side_effect( diff --git a/compiler/rustc_query_system/src/query/plumbing.rs b/compiler/rustc_query_system/src/query/plumbing.rs index 98bbd3ebc4a0f..9afad1546e9eb 100644 --- a/compiler/rustc_query_system/src/query/plumbing.rs +++ b/compiler/rustc_query_system/src/query/plumbing.rs @@ -7,8 +7,9 @@ use std::fmt::Debug; use std::hash::Hash; use std::mem; +use hashbrown::HashTable; +use hashbrown::hash_table::Entry; use rustc_data_structures::fingerprint::Fingerprint; -use rustc_data_structures::hash_table::{self, Entry, HashTable}; use rustc_data_structures::sharded::{self, Sharded}; use rustc_data_structures::stack::ensure_sufficient_stack; use rustc_data_structures::sync::LockGuard; @@ -17,10 +18,8 @@ use rustc_errors::{Diag, FatalError, StashKey}; use rustc_span::{DUMMY_SP, Span}; use tracing::instrument; -use super::{QueryDispatcher, QueryStackDeferred, QueryStackFrameExtra}; -use crate::dep_graph::{ - DepContext, DepGraphData, DepNode, DepNodeIndex, DepNodeParams, HasDepContext, -}; +use super::{QueryDispatcher, QueryStackFrameExtra}; +use crate::dep_graph::{DepContext, DepGraphData, DepNode, DepNodeIndex, DepNodeParams}; use crate::ich::StableHashingContext; use crate::query::caches::QueryCache; use crate::query::job::{QueryInfo, QueryJob, QueryJobId, QueryJobInfo, QueryLatch, report_cycle}; @@ -33,35 +32,23 @@ fn equivalent_key(k: &K) -> impl Fn(&(K, V)) -> bool + '_ { move |x| x.0 == *k } -/// For a particular query, keeps track of "active" keys, i.e. keys whose -/// evaluation has started but has not yet finished successfully. -/// -/// (Successful query evaluation for a key is represented by an entry in the -/// query's in-memory cache.) -pub struct QueryState<'tcx, K> { - active: Sharded)>>, +pub struct QueryState { + active: Sharded)>>, } -/// For a particular query and key, tracks the status of a query evaluation -/// that has started, but has not yet finished successfully. -/// -/// (Successful query evaluation for a key is represented by an entry in the -/// query's in-memory cache.) -enum ActiveKeyStatus<'tcx> { - /// Some thread is already evaluating the query for this key. - /// - /// The enclosed [`QueryJob`] can be used to wait for it to finish. - Started(QueryJob<'tcx>), +/// Indicates the state of a query for a given key in a query map. +enum QueryResult { + /// An already executing query. The query job can be used to await for its completion. + Started(QueryJob), /// The query panicked. Queries trying to wait on this will raise a fatal error which will /// silently panic. Poisoned, } -impl<'tcx> ActiveKeyStatus<'tcx> { - /// Obtains the enclosed [`QueryJob`], or panics if this query evaluation - /// was poisoned by a panic. - fn expect_job(self) -> QueryJob<'tcx> { +impl QueryResult { + /// Unwraps the query job expecting that it has started. + fn expect_job(self) -> QueryJob { match self { Self::Started(job) => job, Self::Poisoned => { @@ -71,7 +58,7 @@ impl<'tcx> ActiveKeyStatus<'tcx> { } } -impl<'tcx, K> QueryState<'tcx, K> +impl QueryState where K: Eq + Hash + Copy + Debug, { @@ -82,15 +69,15 @@ where pub fn collect_active_jobs( &self, qcx: Qcx, - make_query: fn(Qcx, K) -> QueryStackFrame>, - jobs: &mut QueryMap<'tcx>, + make_query: fn(Qcx, K) -> QueryStackFrame, + jobs: &mut QueryMap, require_complete: bool, ) -> Option<()> { let mut active = Vec::new(); - let mut collect = |iter: LockGuard<'_, HashTable<(K, ActiveKeyStatus<'tcx>)>>| { + let mut collect = |iter: LockGuard<'_, HashTable<(K, QueryResult)>>| { for (k, v) in iter.iter() { - if let ActiveKeyStatus::Started(ref job) = *v { + if let QueryResult::Started(ref job) = *v { active.push((*k, job.clone())); } } @@ -119,40 +106,42 @@ where } } -impl<'tcx, K> Default for QueryState<'tcx, K> { - fn default() -> QueryState<'tcx, K> { +impl Default for QueryState { + fn default() -> QueryState { QueryState { active: Default::default() } } } /// A type representing the responsibility to execute the job in the `job` field. /// This will poison the relevant query if dropped. -struct JobOwner<'a, 'tcx, K> +struct JobOwner<'tcx, K, I> where K: Eq + Hash + Copy, { - state: &'a QueryState<'tcx, K>, + state: &'tcx QueryState, key: K, } #[cold] #[inline(never)] -fn mk_cycle<'tcx, Q>(query: Q, qcx: Q::Qcx, cycle_error: CycleError) -> Q::Value +fn mk_cycle(query: Q, qcx: Qcx, cycle_error: CycleError) -> Q::Value where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { let error = report_cycle(qcx.dep_context().sess(), &cycle_error); handle_cycle_error(query, qcx, &cycle_error, error) } -fn handle_cycle_error<'tcx, Q>( +fn handle_cycle_error( query: Q, - qcx: Q::Qcx, + qcx: Qcx, cycle_error: &CycleError, error: Diag<'_>, ) -> Q::Value where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { match query.cycle_error_handling() { CycleErrorHandling::Error => { @@ -181,7 +170,7 @@ where } } -impl<'a, 'tcx, K> JobOwner<'a, 'tcx, K> +impl<'tcx, K, I> JobOwner<'tcx, K, I> where K: Eq + Hash + Copy, { @@ -218,7 +207,7 @@ where } } -impl<'a, 'tcx, K> Drop for JobOwner<'a, 'tcx, K> +impl<'tcx, K, I> Drop for JobOwner<'tcx, K, I> where K: Eq + Hash + Copy, { @@ -234,7 +223,7 @@ where Err(_) => panic!(), Ok(occupied) => { let ((key, value), vacant) = occupied.remove(); - vacant.insert((key, ActiveKeyStatus::Poisoned)); + vacant.insert((key, QueryResult::Poisoned)); value.expect_job() } } @@ -252,8 +241,8 @@ pub struct CycleError { pub cycle: Vec>, } -impl<'tcx> CycleError> { - fn lift>(&self, qcx: Qcx) -> CycleError { +impl CycleError { + fn lift>(&self, qcx: Qcx) -> CycleError { CycleError { usage: self.usage.as_ref().map(|(span, frame)| (*span, frame.lift(qcx))), cycle: self.cycle.iter().map(|info| info.lift(qcx)).collect(), @@ -283,14 +272,15 @@ where #[cold] #[inline(never)] -fn cycle_error<'tcx, Q>( +fn cycle_error( query: Q, - qcx: Q::Qcx, + qcx: Qcx, try_execute: QueryJobId, span: Span, ) -> (Q::Value, Option) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { // Ensure there was no errors collecting all active jobs. // We need the complete map to ensure we find a cycle to break. @@ -301,16 +291,17 @@ where } #[inline(always)] -fn wait_for_query<'tcx, Q>( +fn wait_for_query( query: Q, - qcx: Q::Qcx, + qcx: Qcx, span: Span, key: Q::Key, - latch: QueryLatch<'tcx>, + latch: QueryLatch, current: Option, ) -> (Q::Value, Option) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { // For parallel queries, we'll block and wait until the query running // in another thread has completed. Record how long we wait in the @@ -331,7 +322,7 @@ where let shard = query.query_state(qcx).active.lock_shard_by_hash(key_hash); match shard.find(key_hash, equivalent_key(&key)) { // The query we waited on panicked. Continue unwinding here. - Some((_, ActiveKeyStatus::Poisoned)) => FatalError.raise(), + Some((_, QueryResult::Poisoned)) => FatalError.raise(), _ => panic!( "query '{}' result must be in the cache or the query must be poisoned after a wait", query.name() @@ -350,15 +341,16 @@ where } #[inline(never)] -fn try_execute_query<'tcx, Q, const INCR: bool>( +fn try_execute_query( query: Q, - qcx: Q::Qcx, + qcx: Qcx, span: Span, key: Q::Key, dep_node: Option, ) -> (Q::Value, Option) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { let state = query.query_state(qcx); let key_hash = sharded::make_hash(&key); @@ -385,16 +377,16 @@ where // state map. let id = qcx.next_job_id(); let job = QueryJob::new(id, span, current_job_id); - entry.insert((key, ActiveKeyStatus::Started(job))); + entry.insert((key, QueryResult::Started(job))); // Drop the lock before we start executing the query drop(state_lock); - execute_job::(query, qcx, state, key, key_hash, id, dep_node) + execute_job::<_, _, INCR>(query, qcx, state, key, key_hash, id, dep_node) } Entry::Occupied(mut entry) => { match &mut entry.get_mut().1 { - ActiveKeyStatus::Started(job) => { + QueryResult::Started(job) => { if sync::is_dyn_thread_safe() { // Get the latch out let latch = job.latch(); @@ -412,24 +404,25 @@ where // so we just return the error. cycle_error(query, qcx, id, span) } - ActiveKeyStatus::Poisoned => FatalError.raise(), + QueryResult::Poisoned => FatalError.raise(), } } } } #[inline(always)] -fn execute_job<'tcx, Q, const INCR: bool>( +fn execute_job( query: Q, - qcx: Q::Qcx, - state: &QueryState<'tcx, Q::Key>, + qcx: Qcx, + state: &QueryState, key: Q::Key, key_hash: u64, id: QueryJobId, dep_node: Option, ) -> (Q::Value, Option) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { // Use `JobOwner` so the query will be poisoned if executing it panics. let job_owner = JobOwner { state, key }; @@ -491,14 +484,15 @@ where // Fast path for when incr. comp. is off. #[inline(always)] -fn execute_job_non_incr<'tcx, Q>( +fn execute_job_non_incr( query: Q, - qcx: Q::Qcx, + qcx: Qcx, key: Q::Key, job_id: QueryJobId, ) -> (Q::Value, DepNodeIndex) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { debug_assert!(!qcx.dep_context().dep_graph().is_fully_enabled()); @@ -527,16 +521,17 @@ where } #[inline(always)] -fn execute_job_incr<'tcx, Q>( +fn execute_job_incr( query: Q, - qcx: Q::Qcx, - dep_graph_data: &DepGraphData<::Deps>, + qcx: Qcx, + dep_graph_data: &DepGraphData, key: Q::Key, mut dep_node_opt: Option, job_id: QueryJobId, ) -> (Q::Value, DepNodeIndex) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { if !query.anon() && !query.eval_always() { // `to_dep_node` is expensive for some `DepKind`s. @@ -582,15 +577,16 @@ where } #[inline(always)] -fn try_load_from_disk_and_cache_in_memory<'tcx, Q>( +fn try_load_from_disk_and_cache_in_memory( query: Q, - dep_graph_data: &DepGraphData<::Deps>, - qcx: Q::Qcx, + dep_graph_data: &DepGraphData, + qcx: Qcx, key: &Q::Key, dep_node: &DepNode, ) -> Option<(Q::Value, DepNodeIndex)> where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { // Note this function can be called concurrently from the same query // We must ensure that this is handled correctly. @@ -634,7 +630,7 @@ where // We always expect to find a cached result for things that // can be forced from `DepNode`. debug_assert!( - !query.will_cache_on_disk_for_key(*qcx.dep_context(), key) + !query.cache_on_disk(*qcx.dep_context(), key) || !qcx.dep_context().fingerprint_style(dep_node.kind).reconstructible(), "missing on-disk cache entry for {dep_node:?}" ); @@ -642,7 +638,7 @@ where // Sanity check for the logic in `ensure`: if the node is green and the result loadable, // we should actually be able to load it. debug_assert!( - !query.is_loadable_from_disk(qcx, key, prev_dep_node_index), + !query.loadable_from_disk(qcx, key, prev_dep_node_index), "missing on-disk cache entry for loadable {dep_node:?}" ); @@ -768,14 +764,15 @@ fn incremental_verify_ich_failed( /// /// Note: The optimization is only available during incr. comp. #[inline(never)] -fn ensure_must_run<'tcx, Q>( +fn ensure_must_run( query: Q, - qcx: Q::Qcx, + qcx: Qcx, key: &Q::Key, check_cache: bool, ) -> (bool, Option) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { if query.eval_always() { return (true, None); @@ -809,7 +806,7 @@ where return (false, None); } - let loadable = query.is_loadable_from_disk(qcx, key, serialized_dep_node_index); + let loadable = query.loadable_from_disk(qcx, key, serialized_dep_node_index); (!loadable, Some(dep_node)) } @@ -820,25 +817,27 @@ pub enum QueryMode { } #[inline(always)] -pub fn get_query_non_incr<'tcx, Q>(query: Q, qcx: Q::Qcx, span: Span, key: Q::Key) -> Q::Value +pub fn get_query_non_incr(query: Q, qcx: Qcx, span: Span, key: Q::Key) -> Q::Value where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { debug_assert!(!qcx.dep_context().dep_graph().is_fully_enabled()); - ensure_sufficient_stack(|| try_execute_query::(query, qcx, span, key, None).0) + ensure_sufficient_stack(|| try_execute_query::(query, qcx, span, key, None).0) } #[inline(always)] -pub fn get_query_incr<'tcx, Q>( +pub fn get_query_incr( query: Q, - qcx: Q::Qcx, + qcx: Qcx, span: Span, key: Q::Key, mode: QueryMode, ) -> Option where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { debug_assert!(qcx.dep_context().dep_graph().is_fully_enabled()); @@ -852,17 +851,19 @@ where None }; - let (result, dep_node_index) = - ensure_sufficient_stack(|| try_execute_query::(query, qcx, span, key, dep_node)); + let (result, dep_node_index) = ensure_sufficient_stack(|| { + try_execute_query::<_, _, true>(query, qcx, span, key, dep_node) + }); if let Some(dep_node_index) = dep_node_index { qcx.dep_context().dep_graph().read_index(dep_node_index) } Some(result) } -pub fn force_query<'tcx, Q>(query: Q, qcx: Q::Qcx, key: Q::Key, dep_node: DepNode) +pub fn force_query(query: Q, qcx: Qcx, key: Q::Key, dep_node: DepNode) where - Q: QueryDispatcher<'tcx>, + Q: QueryDispatcher, + Qcx: QueryContext, { // We may be concurrently trying both execute and force a query. // Ensure that only one of them runs the query. @@ -874,6 +875,6 @@ where debug_assert!(!query.anon()); ensure_sufficient_stack(|| { - try_execute_query::(query, qcx, DUMMY_SP, key, Some(dep_node)) + try_execute_query::<_, _, true>(query, qcx, DUMMY_SP, key, Some(dep_node)) }); } diff --git a/compiler/rustc_resolve/src/build_reduced_graph.rs b/compiler/rustc_resolve/src/build_reduced_graph.rs index f0dffd8829da3..e06ca59771e61 100644 --- a/compiler/rustc_resolve/src/build_reduced_graph.rs +++ b/compiler/rustc_resolve/src/build_reduced_graph.rs @@ -60,7 +60,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { } } - /// Create a name definition from the given components, and put it into the local module. + /// Create a name definitinon from the given components, and put it into the local module. fn define_local( &mut self, parent: Module<'ra>, @@ -76,7 +76,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { self.plant_decl_into_local_module(ident, orig_ident.span, ns, decl); } - /// Create a name definition from the given components, and put it into the extern module. + /// Create a name definitinon from the given components, and put it into the extern module. fn define_extern( &self, parent: Module<'ra>, diff --git a/compiler/rustc_resolve/src/diagnostics.rs b/compiler/rustc_resolve/src/diagnostics.rs index 6f2d3e79d10ab..5c401c3bf8280 100644 --- a/compiler/rustc_resolve/src/diagnostics.rs +++ b/compiler/rustc_resolve/src/diagnostics.rs @@ -1709,6 +1709,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns), parent_scope, None, + false, None, None, ) else { @@ -2545,6 +2546,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns_to_try), parent_scope, None, + false, ignore_decl, ignore_import, ) @@ -2648,6 +2650,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ValueNS), parent_scope, None, + false, ignore_decl, ignore_import, ) { diff --git a/compiler/rustc_resolve/src/effective_visibilities.rs b/compiler/rustc_resolve/src/effective_visibilities.rs index 55518276a4f0f..295635a605477 100644 --- a/compiler/rustc_resolve/src/effective_visibilities.rs +++ b/compiler/rustc_resolve/src/effective_visibilities.rs @@ -96,10 +96,13 @@ impl<'a, 'ra, 'tcx> EffectiveVisibilitiesVisitor<'a, 'ra, 'tcx> { // is the maximum value among visibilities of declarations corresponding to that def id. for (decl, eff_vis) in visitor.import_effective_visibilities.iter() { let DeclKind::Import { import, .. } = decl.kind else { unreachable!() }; - if let Some(node_id) = import.id() { - r.effective_visibilities.update_eff_vis(r.local_def_id(node_id), eff_vis, r.tcx) - } - if decl.ambiguity.get().is_some() && eff_vis.is_public_at_level(Level::Reexported) { + if !decl.is_ambiguity_recursive() { + if let Some(node_id) = import.id() { + r.effective_visibilities.update_eff_vis(r.local_def_id(node_id), eff_vis, r.tcx) + } + } else if decl.ambiguity.get().is_some() + && eff_vis.is_public_at_level(Level::Reexported) + { exported_ambiguities.insert(*decl); } } @@ -120,13 +123,31 @@ impl<'a, 'ra, 'tcx> EffectiveVisibilitiesVisitor<'a, 'ra, 'tcx> { // Set the given effective visibility level to `Level::Direct` and // sets the rest of the `use` chain to `Level::Reexported` until // we hit the actual exported item. + // + // If the binding is ambiguous, put the root ambiguity binding and all reexports + // leading to it into the table. They are used by the `ambiguous_glob_reexports` + // lint. For all bindings added to the table this way `is_ambiguity` returns true. + let is_ambiguity = + |decl: Decl<'ra>, warn: bool| decl.ambiguity.get().is_some() && !warn; let mut parent_id = ParentId::Def(module_id); + let mut warn_ambiguity = decl.warn_ambiguity.get(); while let DeclKind::Import { source_decl, .. } = decl.kind { self.update_import(decl, parent_id); + + if is_ambiguity(decl, warn_ambiguity) { + // Stop at the root ambiguity, further bindings in the chain should not + // be reexported because the root ambiguity blocks any access to them. + // (Those further bindings are most likely not ambiguities themselves.) + break; + } + parent_id = ParentId::Import(decl); decl = source_decl; + warn_ambiguity |= source_decl.warn_ambiguity.get(); } - if let Some(def_id) = decl.res().opt_def_id().and_then(|id| id.as_local()) { + if !is_ambiguity(decl, warn_ambiguity) + && let Some(def_id) = decl.res().opt_def_id().and_then(|id| id.as_local()) + { self.update_def(def_id, decl.vis().expect_local(), parent_id); } } diff --git a/compiler/rustc_resolve/src/ident.rs b/compiler/rustc_resolve/src/ident.rs index 4fbde60d86792..26dca5e6e5089 100644 --- a/compiler/rustc_resolve/src/ident.rs +++ b/compiler/rustc_resolve/src/ident.rs @@ -350,6 +350,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Module(ns, module), parent_scope, finalize.map(|finalize| Finalize { used: Used::Scope, ..finalize }), + finalize.is_some(), ignore_decl, None, ) @@ -367,6 +368,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns), parent_scope, finalize, + finalize.is_some(), ignore_decl, None, ) @@ -394,9 +396,12 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { scope_set: ScopeSet<'ra>, parent_scope: &ParentScope<'ra>, finalize: Option, + force: bool, ignore_decl: Option>, ignore_import: Option>, ) -> Result, Determinacy> { + assert!(force || finalize.is_none()); // `finalize` implies `force` + // Make sure `self`, `super` etc produce an error when passed to here. if !matches!(scope_set, ScopeSet::Module(..)) && orig_ident.is_path_segment_keyword() { return Err(Determinacy::Determined); @@ -446,6 +451,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { parent_scope, // Shadowed decls don't need to be marked as used or non-speculatively loaded. if innermost_results.is_empty() { finalize } else { None }, + force, ignore_decl, ignore_import, ) { @@ -503,7 +509,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { // Scope visiting walked all the scopes and maybe found something in one of them. match innermost_results.first() { Some(&(decl, ..)) => Ok(decl), - None => Err(determinacy), + None => Err(Determinacy::determined(determinacy == Determinacy::Determined || force)), } } @@ -517,6 +523,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { scope_set: ScopeSet<'ra>, parent_scope: &ParentScope<'ra>, finalize: Option, + force: bool, ignore_decl: Option>, ignore_import: Option>, ) -> Result, ControlFlow> { @@ -539,7 +546,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { match self.reborrow().resolve_derive_macro_path( derive, parent_scope, - false, + force, ignore_import, ) { Ok((Some(ext), _)) => { @@ -610,7 +617,11 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { Ok(decl) } Err(ControlFlow::Continue(determinacy)) => Err(determinacy), - Err(ControlFlow::Break(..)) => return decl, + Err(ControlFlow::Break(determinacy)) => { + return Err(ControlFlow::Break(Determinacy::determined( + determinacy == Determinacy::Determined || force, + ))); + } } } Scope::ModuleGlobs(module, derive_fallback_lint_id) => { @@ -657,7 +668,11 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { Ok(binding) } Err(ControlFlow::Continue(determinacy)) => Err(determinacy), - Err(ControlFlow::Break(..)) => return binding, + Err(ControlFlow::Break(determinacy)) => { + return Err(ControlFlow::Break(Determinacy::determined( + determinacy == Determinacy::Determined || force, + ))); + } } } Scope::MacroUsePrelude => match self.macro_use_prelude.get(&ident.name).cloned() { @@ -700,6 +715,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Module(ns, prelude), parent_scope, None, + false, ignore_decl, ignore_import, ) @@ -935,6 +951,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Module(ns, module), parent_scope, finalize, + finalize.is_some(), ignore_decl, ignore_import, ), @@ -943,6 +960,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::ModuleAndExternPrelude(ns, module), parent_scope, finalize, + finalize.is_some(), ignore_decl, ignore_import, ), @@ -955,6 +973,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::ExternPrelude, parent_scope, finalize, + finalize.is_some(), ignore_decl, ignore_import, ) @@ -977,6 +996,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns), parent_scope, finalize, + finalize.is_some(), ignore_decl, ignore_import, ) @@ -1160,6 +1180,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Module(ns, module), adjusted_parent_scope, None, + false, ignore_decl, ignore_import, ); @@ -1860,6 +1881,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns), parent_scope, finalize, + finalize.is_some(), ignore_decl, ignore_import, ) @@ -1935,8 +1957,8 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ); } } - Err(Undetermined) if finalize.is_none() => return PathResult::Indeterminate, - Err(Determined | Undetermined) => { + Err(Undetermined) => return PathResult::Indeterminate, + Err(Determined) => { if let Some(ModuleOrUniformRoot::Module(module)) = module && opt_ns.is_some() && !module.is_normal() diff --git a/compiler/rustc_resolve/src/imports.rs b/compiler/rustc_resolve/src/imports.rs index 0573400280857..7ff24bc612dfa 100644 --- a/compiler/rustc_resolve/src/imports.rs +++ b/compiler/rustc_resolve/src/imports.rs @@ -1498,6 +1498,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::All(ns), &import.parent_scope, None, + false, decls[ns].get().decl(), None, ) { diff --git a/compiler/rustc_resolve/src/macros.rs b/compiler/rustc_resolve/src/macros.rs index b933c2b9d0362..b7d83d9e130c8 100644 --- a/compiler/rustc_resolve/src/macros.rs +++ b/compiler/rustc_resolve/src/macros.rs @@ -799,12 +799,10 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Macro(kind), parent_scope, None, + force, None, None, ); - let binding = binding.map_err(|determinacy| { - Determinacy::determined(determinacy == Determinacy::Determined || force) - }); if let Err(Determinacy::Undetermined) = binding { return Err(Determinacy::Undetermined); } @@ -960,6 +958,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Macro(kind), &parent_scope, Some(Finalize::new(ast::CRATE_NODE_ID, ident.span)), + true, None, None, ) { @@ -1014,6 +1013,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Macro(MacroKind::Attr), &parent_scope, Some(Finalize::new(ast::CRATE_NODE_ID, ident.span)), + true, None, None, ); @@ -1117,6 +1117,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> { ScopeSet::Macro(MacroKind::Bang), &ParentScope { macro_rules: no_macro_rules, ..*parent_scope }, None, + false, None, None, ); diff --git a/compiler/rustc_span/src/symbol.rs b/compiler/rustc_span/src/symbol.rs index b0ef95d10ffa0..2066b75da0095 100644 --- a/compiler/rustc_span/src/symbol.rs +++ b/compiler/rustc_span/src/symbol.rs @@ -1239,6 +1239,7 @@ symbols! { i128_legacy_fn_min_value, i128_legacy_mod, i128_type, + id, ident, if_let, if_let_guard, @@ -1995,7 +1996,6 @@ symbols! { rustc_no_implicit_autorefs, rustc_no_implicit_bounds, rustc_no_mir_inline, - rustc_non_const_trait_method, rustc_nonnull_optimization_guaranteed, rustc_nounwind, rustc_objc_class, @@ -2340,6 +2340,7 @@ symbols! { type_const, type_id, type_id_eq, + type_id_implements_trait, type_info, type_ir, type_ir_infer_ctxt_like, diff --git a/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs b/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs index 3b158c13521ea..d1810b6fa4860 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs @@ -21,7 +21,7 @@ pub(crate) fn target() -> Target { max_atomic_width: Some(128), // As documented in https://developer.android.com/ndk/guides/cpu-features.html // the neon (ASIMD) and FP must exist on all android aarch64 targets. - features: "+v8a,+neon".into(), + features: "+v8a,+neon,+outline-atomics".into(), // the AAPCS64 expects use of non-leaf frame pointers per // https://github.com/ARM-software/abi-aa/blob/4492d1570eb70c8fd146623e0db65b2d241f12e7/aapcs64/aapcs64.rst#the-frame-pointer // and we tend to encounter interesting bugs in AArch64 unwinding code if we do not diff --git a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs index ce17280b153d6..db3cf83ddc999 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs @@ -3,7 +3,7 @@ use crate::spec::{Arch, Cc, FramePointer, LinkerFlavor, Lld, Target, TargetMetad pub(crate) fn target() -> Target { let mut base = base::windows_gnullvm::opts(); base.max_atomic_width = Some(128); - base.features = "+v8a,+neon".into(); + base.features = "+v8a,+neon,+outline-atomics".into(); base.linker = Some("aarch64-w64-mingw32-clang".into()); base.add_pre_link_args(LinkerFlavor::Gnu(Cc::No, Lld::No), &["-m", "arm64pe"]); diff --git a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs index 0d06bec21f4a4..e9f7f51a7a35b 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs @@ -3,7 +3,7 @@ use crate::spec::{Arch, FramePointer, Target, TargetMetadata, base}; pub(crate) fn target() -> Target { let mut base = base::windows_msvc::opts(); base.max_atomic_width = Some(128); - base.features = "+v8a,+neon".into(); + base.features = "+v8a,+neon,+outline-atomics".into(); // Microsoft recommends enabling frame pointers on Arm64 Windows. // From https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170#integer-registers diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs index 69a65e6b0f024..47775f9684008 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs @@ -15,7 +15,7 @@ pub(crate) fn target() -> Target { data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(), arch: Arch::AArch64, options: TargetOptions { - features: "+v8a".into(), + features: "+v8a,+outline-atomics".into(), max_atomic_width: Some(128), stack_probes: StackProbeType::Inline, supported_sanitizers: SanitizerSet::ADDRESS diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs index 6489e2bda8091..8a07f98075a89 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs @@ -5,7 +5,7 @@ use crate::spec::{ pub(crate) fn target() -> Target { let mut base = base::fuchsia::opts(); base.cpu = "generic".into(); - base.features = "+v8a,+crc,+aes,+sha2,+neon".into(); + base.features = "+v8a,+crc,+aes,+sha2,+neon,+outline-atomics".into(); base.max_atomic_width = Some(128); base.stack_probes = StackProbeType::Inline; base.supported_sanitizers = SanitizerSet::ADDRESS diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs index e5e40cb38b911..14a2f007f1e8c 100644 --- a/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs @@ -13,7 +13,7 @@ pub(crate) fn target() -> Target { data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(), arch: Arch::AArch64, options: TargetOptions { - features: "+v8a".into(), + features: "+v8a,+outline-atomics".into(), max_atomic_width: Some(128), stack_probes: StackProbeType::Inline, ..base::openbsd::opts() diff --git a/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs b/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs index fb735b54dd82c..47623c34dce32 100644 --- a/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs +++ b/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs @@ -19,8 +19,6 @@ pub(crate) fn target() -> Target { pre_link_args, post_link_args, relocation_model: RelocModel::Pic, - crt_static_respected: true, - crt_static_default: true, panic_strategy: PanicStrategy::Unwind, no_default_libraries: false, families: cvs!["unix", "wasm"], diff --git a/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs b/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs index ca846bca874eb..e3c8bfe4a452a 100644 --- a/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs +++ b/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs @@ -12,7 +12,7 @@ use rustc_hir::{ }; use rustc_middle::bug; use rustc_middle::hir::nested_filter; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, DerefAdjustKind}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow}; use rustc_middle::ty::print::{FmtPrinter, PrettyPrinter, Print, Printer}; use rustc_middle::ty::{ self, GenericArg, GenericArgKind, GenericArgsRef, InferConst, IsSuggestable, Term, TermKind, @@ -615,7 +615,7 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> { // first adjustment was not a builtin deref. let adjustment = match typeck_results.expr_adjustments(receiver) { [ - Adjustment { kind: Adjust::Deref(DerefAdjustKind::Builtin), target: _ }, + Adjustment { kind: Adjust::Deref(None), target: _ }, .., Adjustment { kind: Adjust::Borrow(AutoBorrow::Ref(..)), target: _ }, ] => "", diff --git a/compiler/rustc_trait_selection/src/error_reporting/infer/nice_region_error/placeholder_relation.rs b/compiler/rustc_trait_selection/src/error_reporting/infer/nice_region_error/placeholder_relation.rs index 05a1e3fe95dd9..3bab09bc587f0 100644 --- a/compiler/rustc_trait_selection/src/error_reporting/infer/nice_region_error/placeholder_relation.rs +++ b/compiler/rustc_trait_selection/src/error_reporting/infer/nice_region_error/placeholder_relation.rs @@ -34,18 +34,14 @@ impl<'tcx> NiceRegionError<'_, 'tcx> { (Some(self.tcx().def_span(def_id)), Some(self.tcx().item_name(def_id))) } ty::BoundRegionKind::Anon | ty::BoundRegionKind::ClosureEnv => (None, None), - ty::BoundRegionKind::NamedForPrinting(_) => { - bug!("only used for pretty printing") - } + ty::BoundRegionKind::NamedAnon(_) => bug!("only used for pretty printing"), }; let (sup_span, sup_symbol) = match *sup_name { ty::BoundRegionKind::Named(def_id) => { (Some(self.tcx().def_span(def_id)), Some(self.tcx().item_name(def_id))) } ty::BoundRegionKind::Anon | ty::BoundRegionKind::ClosureEnv => (None, None), - ty::BoundRegionKind::NamedForPrinting(_) => { - bug!("only used for pretty printing") - } + ty::BoundRegionKind::NamedAnon(_) => bug!("only used for pretty printing"), }; let diag = match (sub_span, sup_span, sub_symbol, sup_symbol) { (Some(sub_span), Some(sup_span), Some(sub_symbol), Some(sup_symbol)) => { diff --git a/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs b/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs index b11461cd0e32d..fdaf2d619dd56 100644 --- a/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs +++ b/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs @@ -1052,7 +1052,7 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> { } fn report_inference_failure(&self, var_origin: RegionVariableOrigin<'tcx>) -> Diag<'_> { - let br_string = |br: ty::BoundRegionKind<'tcx>| { + let br_string = |br: ty::BoundRegionKind| { let mut s = match br { ty::BoundRegionKind::Named(def_id) => self.tcx.item_name(def_id).to_string(), _ => String::new(), diff --git a/compiler/rustc_trait_selection/src/traits/coherence.rs b/compiler/rustc_trait_selection/src/traits/coherence.rs index 9f59f6c592509..2aae5f2cde1e8 100644 --- a/compiler/rustc_trait_selection/src/traits/coherence.rs +++ b/compiler/rustc_trait_selection/src/traits/coherence.rs @@ -566,7 +566,7 @@ fn plug_infer_with_placeholders<'tcx>( ty, Ty::new_placeholder( self.infcx.tcx, - ty::PlaceholderType::new( + ty::Placeholder::new( self.universe, ty::BoundTy { var: self.next_var(), kind: ty::BoundTyKind::Anon }, ), @@ -592,9 +592,9 @@ fn plug_infer_with_placeholders<'tcx>( ct, ty::Const::new_placeholder( self.infcx.tcx, - ty::PlaceholderConst::new( + ty::Placeholder::new( self.universe, - ty::BoundConst::new(self.next_var()), + ty::BoundConst { var: self.next_var() }, ), ), ) @@ -623,7 +623,7 @@ fn plug_infer_with_placeholders<'tcx>( r, ty::Region::new_placeholder( self.infcx.tcx, - ty::PlaceholderRegion::new( + ty::Placeholder::new( self.universe, ty::BoundRegion { var: self.next_var(), diff --git a/compiler/rustc_trait_selection/src/traits/mod.rs b/compiler/rustc_trait_selection/src/traits/mod.rs index 4e027a301cc8b..5839a8c2e2951 100644 --- a/compiler/rustc_trait_selection/src/traits/mod.rs +++ b/compiler/rustc_trait_selection/src/traits/mod.rs @@ -772,7 +772,7 @@ fn replace_param_and_infer_args_with_placeholder<'tcx>( self.idx += 1; ty::Const::new_placeholder( self.tcx, - ty::PlaceholderConst::new(ty::UniverseIndex::ROOT, ty::BoundConst::new(idx)), + ty::PlaceholderConst::new(ty::UniverseIndex::ROOT, ty::BoundConst { var: idx }), ) } else { c.super_fold_with(self) diff --git a/compiler/rustc_trait_selection/src/traits/util.rs b/compiler/rustc_trait_selection/src/traits/util.rs index c3f46aa51c737..19ccf6a55bf1a 100644 --- a/compiler/rustc_trait_selection/src/traits/util.rs +++ b/compiler/rustc_trait_selection/src/traits/util.rs @@ -220,9 +220,9 @@ pub fn with_replaced_escaping_bound_vars< /// The inverse of [`BoundVarReplacer`]: replaces placeholders with the bound vars from which they came. pub struct PlaceholderReplacer<'a, 'tcx> { infcx: &'a InferCtxt<'tcx>, - mapped_regions: FxIndexMap, ty::BoundRegion<'tcx>>, - mapped_types: FxIndexMap, ty::BoundTy<'tcx>>, - mapped_consts: FxIndexMap, ty::BoundConst<'tcx>>, + mapped_regions: FxIndexMap, ty::BoundRegion>, + mapped_types: FxIndexMap, ty::BoundTy>, + mapped_consts: FxIndexMap, ty::BoundConst>, universe_indices: &'a [Option], current_index: ty::DebruijnIndex, } @@ -230,9 +230,9 @@ pub struct PlaceholderReplacer<'a, 'tcx> { impl<'a, 'tcx> PlaceholderReplacer<'a, 'tcx> { pub fn replace_placeholders>>( infcx: &'a InferCtxt<'tcx>, - mapped_regions: FxIndexMap, ty::BoundRegion<'tcx>>, - mapped_types: FxIndexMap, ty::BoundTy<'tcx>>, - mapped_consts: FxIndexMap, ty::BoundConst<'tcx>>, + mapped_regions: FxIndexMap, ty::BoundRegion>, + mapped_types: FxIndexMap, ty::BoundTy>, + mapped_consts: FxIndexMap, ty::BoundConst>, universe_indices: &'a [Option], value: T, ) -> T { diff --git a/compiler/rustc_ty_utils/src/ty.rs b/compiler/rustc_ty_utils/src/ty.rs index d6a29aba22b90..bb25a14ef7443 100644 --- a/compiler/rustc_ty_utils/src/ty.rs +++ b/compiler/rustc_ty_utils/src/ty.rs @@ -210,7 +210,7 @@ struct ImplTraitInTraitFinder<'a, 'tcx> { tcx: TyCtxt<'tcx>, predicates: &'a mut Vec>, fn_def_id: DefId, - bound_vars: &'tcx ty::List>, + bound_vars: &'tcx ty::List, seen: FxHashSet, depth: ty::DebruijnIndex, } diff --git a/compiler/rustc_type_ir/src/binder.rs b/compiler/rustc_type_ir/src/binder.rs index fc8b39f7c01f0..b5c9080154cea 100644 --- a/compiler/rustc_type_ir/src/binder.rs +++ b/compiler/rustc_type_ir/src/binder.rs @@ -1,14 +1,11 @@ use std::fmt; -use std::hash::Hash; use std::marker::PhantomData; use std::ops::{ControlFlow, Deref}; use derive_where::derive_where; #[cfg(feature = "nightly")] use rustc_macros::{Decodable_NoContext, Encodable_NoContext, HashStable_NoContext}; -use rustc_type_ir_macros::{ - GenericTypeVisitable, Lift_Generic, TypeFoldable_Generic, TypeVisitable_Generic, -}; +use rustc_type_ir_macros::{GenericTypeVisitable, TypeFoldable_Generic, TypeVisitable_Generic}; use tracing::instrument; use crate::data_structures::SsoHashSet; @@ -26,11 +23,8 @@ use crate::{self as ty, DebruijnIndex, Interner, UniverseIndex}; /// for more details. /// /// `Decodable` and `Encodable` are implemented for `Binder` using the `impl_binder_encode_decode!` macro. -// FIXME(derive-where#136): Need to use separate `derive_where` for -// `Copy` and `Ord` to prevent the emitted `Clone` and `PartialOrd` -// impls from incorrectly relying on `T: Copy` and `T: Ord`. -#[derive_where(Copy; I: Interner, T: Copy)] #[derive_where(Clone, Hash, PartialEq, Debug; I: Interner, T)] +#[derive_where(Copy; I: Interner, T: Copy)] #[derive(GenericTypeVisitable)] #[cfg_attr(feature = "nightly", derive(HashStable_NoContext))] pub struct Binder { @@ -365,12 +359,9 @@ impl TypeVisitor for ValidateBoundVars { /// `instantiate`. /// /// See for more details. -// FIXME(derive-where#136): Need to use separate `derive_where` for -// `Copy` and `Ord` to prevent the emitted `Clone` and `PartialOrd` -// impls from incorrectly relying on `T: Copy` and `T: Ord`. -#[derive_where(Ord; I: Interner, T: Ord)] +#[derive_where(Clone, PartialEq, Ord, Hash, Debug; I: Interner, T)] +#[derive_where(PartialOrd; I: Interner, T: Ord)] #[derive_where(Copy; I: Interner, T: Copy)] -#[derive_where(Clone, PartialOrd, PartialEq, Hash, Debug; I: Interner, T)] #[derive(GenericTypeVisitable)] #[cfg_attr( feature = "nightly", @@ -964,12 +955,11 @@ pub enum BoundVarIndexKind { /// The "placeholder index" fully defines a placeholder region, type, or const. Placeholders are /// identified by both a universe, as well as a name residing within that universe. Distinct bound /// regions/types/consts within the same universe simply have an unknown relationship to one -// FIXME(derive-where#136): Need to use separate `derive_where` for -// `Copy` and `Ord` to prevent the emitted `Clone` and `PartialOrd` -// impls from incorrectly relying on `T: Copy` and `T: Ord`. -#[derive_where(Ord; I: Interner, T: Ord)] -#[derive_where(Copy; I: Interner, T: Copy)] -#[derive_where(Clone, PartialOrd, PartialEq, Eq, Hash; I: Interner, T)] +/// another. +#[derive_where(Clone, PartialEq, Ord, Hash; I: Interner, T)] +#[derive_where(PartialOrd; I: Interner, T: Ord)] +#[derive_where(Copy; I: Interner, T: Copy, T)] +#[derive_where(Eq; T)] #[derive(TypeVisitable_Generic, TypeFoldable_Generic)] #[cfg_attr( feature = "nightly", @@ -983,6 +973,12 @@ pub struct Placeholder { _tcx: PhantomData I>, } +impl Placeholder { + pub fn new(universe: UniverseIndex, bound: T) -> Self { + Placeholder { universe, bound, _tcx: PhantomData } + } +} + impl fmt::Debug for ty::Placeholder { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { if self.universe == ty::UniverseIndex::ROOT { @@ -1007,321 +1003,3 @@ where }) } } - -#[derive_where(Clone, Copy, PartialEq, Eq, Hash; I: Interner)] -#[derive(Lift_Generic)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, Decodable_NoContext, HashStable_NoContext) -)] - -pub enum BoundRegionKind { - /// An anonymous region parameter for a given fn (&T) - Anon, - - /// An anonymous region parameter with a `Symbol` name. - /// - /// Used to give late-bound regions names for things like pretty printing. - NamedForPrinting(I::Symbol), - - /// Late-bound regions that appear in the AST. - Named(I::DefId), - - /// Anonymous region for the implicit env pointer parameter - /// to a closure - ClosureEnv, -} - -impl fmt::Debug for ty::BoundRegionKind { - fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - match *self { - ty::BoundRegionKind::Anon => write!(f, "BrAnon"), - ty::BoundRegionKind::NamedForPrinting(name) => { - write!(f, "BrNamedForPrinting({:?})", name) - } - ty::BoundRegionKind::Named(did) => { - write!(f, "BrNamed({did:?})") - } - ty::BoundRegionKind::ClosureEnv => write!(f, "BrEnv"), - } - } -} - -impl BoundRegionKind { - pub fn is_named(&self, tcx: I) -> bool { - self.get_name(tcx).is_some() - } - - pub fn get_name(&self, tcx: I) -> Option { - match *self { - ty::BoundRegionKind::Named(def_id) => { - let name = tcx.item_name(def_id); - if name.is_kw_underscore_lifetime() { None } else { Some(name) } - } - ty::BoundRegionKind::NamedForPrinting(name) => Some(name), - _ => None, - } - } - - pub fn get_id(&self) -> Option { - match *self { - ty::BoundRegionKind::Named(id) => Some(id), - _ => None, - } - } -} - -#[derive_where(Clone, Copy, PartialEq, Eq, Debug, Hash; I: Interner)] -#[derive(Lift_Generic)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, Decodable_NoContext, HashStable_NoContext) -)] -pub enum BoundTyKind { - Anon, - Param(I::DefId), -} - -#[derive_where(Clone, Copy, PartialEq, Eq, Debug, Hash; I: Interner)] -#[derive(Lift_Generic)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, Decodable_NoContext, HashStable_NoContext) -)] -pub enum BoundVariableKind { - Ty(BoundTyKind), - Region(BoundRegionKind), - Const, -} - -impl BoundVariableKind { - pub fn expect_region(self) -> BoundRegionKind { - match self { - BoundVariableKind::Region(lt) => lt, - _ => panic!("expected a region, but found another kind"), - } - } - - pub fn expect_ty(self) -> BoundTyKind { - match self { - BoundVariableKind::Ty(ty) => ty, - _ => panic!("expected a type, but found another kind"), - } - } - - pub fn expect_const(self) { - match self { - BoundVariableKind::Const => (), - _ => panic!("expected a const, but found another kind"), - } - } -} - -#[derive_where(Clone, Copy, PartialEq, Eq, Hash; I: Interner)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, HashStable_NoContext, Decodable_NoContext) -)] -pub struct BoundRegion { - pub var: ty::BoundVar, - pub kind: BoundRegionKind, -} - -impl core::fmt::Debug for BoundRegion { - fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { - match self.kind { - BoundRegionKind::Anon => write!(f, "{:?}", self.var), - BoundRegionKind::ClosureEnv => write!(f, "{:?}.Env", self.var), - BoundRegionKind::Named(def) => { - write!(f, "{:?}.Named({:?})", self.var, def) - } - BoundRegionKind::NamedForPrinting(symbol) => { - write!(f, "{:?}.NamedAnon({:?})", self.var, symbol) - } - } - } -} - -impl BoundRegion { - pub fn var(self) -> ty::BoundVar { - self.var - } - - pub fn assert_eq(self, var: BoundVariableKind) { - assert_eq!(self.kind, var.expect_region()) - } -} - -pub type PlaceholderRegion = ty::Placeholder>; - -impl PlaceholderRegion { - pub fn universe(self) -> UniverseIndex { - self.universe - } - - pub fn var(self) -> ty::BoundVar { - self.bound.var() - } - - pub fn with_updated_universe(self, ui: UniverseIndex) -> Self { - Self { universe: ui, bound: self.bound, _tcx: PhantomData } - } - - pub fn new(ui: UniverseIndex, bound: BoundRegion) -> Self { - Self { universe: ui, bound, _tcx: PhantomData } - } - - pub fn new_anon(ui: UniverseIndex, var: ty::BoundVar) -> Self { - let bound = BoundRegion { var, kind: BoundRegionKind::Anon }; - Self { universe: ui, bound, _tcx: PhantomData } - } -} - -#[derive_where(Clone, Copy, PartialEq, Eq, Hash; I: Interner)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, Decodable_NoContext, HashStable_NoContext) -)] -pub struct BoundTy { - pub var: ty::BoundVar, - pub kind: BoundTyKind, -} - -impl Lift for BoundTy -where - BoundTyKind: Lift>, -{ - type Lifted = BoundTy; - - fn lift_to_interner(self, cx: U) -> Option { - Some(BoundTy { var: self.var, kind: self.kind.lift_to_interner(cx)? }) - } -} - -impl fmt::Debug for ty::BoundTy { - fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - match self.kind { - ty::BoundTyKind::Anon => write!(f, "{:?}", self.var), - ty::BoundTyKind::Param(def_id) => write!(f, "{def_id:?}"), - } - } -} - -impl BoundTy { - pub fn var(self) -> ty::BoundVar { - self.var - } - - pub fn assert_eq(self, var: BoundVariableKind) { - assert_eq!(self.kind, var.expect_ty()) - } -} - -pub type PlaceholderType = ty::Placeholder>; - -impl PlaceholderType { - pub fn universe(self) -> UniverseIndex { - self.universe - } - - pub fn var(self) -> ty::BoundVar { - self.bound.var - } - - pub fn with_updated_universe(self, ui: UniverseIndex) -> Self { - Self { universe: ui, bound: self.bound, _tcx: PhantomData } - } - - pub fn new(ui: UniverseIndex, bound: BoundTy) -> Self { - Self { universe: ui, bound, _tcx: PhantomData } - } - - pub fn new_anon(ui: UniverseIndex, var: ty::BoundVar) -> Self { - let bound = BoundTy { var, kind: BoundTyKind::Anon }; - Self { universe: ui, bound, _tcx: PhantomData } - } -} - -#[derive_where(Clone, Copy, PartialEq, Debug, Eq, Hash; I: Interner)] -#[cfg_attr( - feature = "nightly", - derive(Encodable_NoContext, Decodable_NoContext, HashStable_NoContext) -)] -pub struct BoundConst { - pub var: ty::BoundVar, - #[derive_where(skip(Debug))] - pub _tcx: PhantomData I>, -} - -impl BoundConst { - pub fn var(self) -> ty::BoundVar { - self.var - } - - pub fn assert_eq(self, var: BoundVariableKind) { - var.expect_const() - } - - pub fn new(var: ty::BoundVar) -> Self { - Self { var, _tcx: PhantomData } - } -} - -pub type PlaceholderConst = ty::Placeholder>; - -impl PlaceholderConst { - pub fn universe(self) -> UniverseIndex { - self.universe - } - - pub fn var(self) -> ty::BoundVar { - self.bound.var - } - - pub fn with_updated_universe(self, ui: UniverseIndex) -> Self { - Self { universe: ui, bound: self.bound, _tcx: PhantomData } - } - - pub fn new(ui: UniverseIndex, bound: BoundConst) -> Self { - Self { universe: ui, bound, _tcx: PhantomData } - } - - pub fn new_anon(ui: UniverseIndex, var: ty::BoundVar) -> Self { - let bound = BoundConst::new(var); - Self { universe: ui, bound, _tcx: PhantomData } - } - - pub fn find_const_ty_from_env(self, env: I::ParamEnv) -> I::Ty { - let mut candidates = env.caller_bounds().iter().filter_map(|clause| { - // `ConstArgHasType` are never desugared to be higher ranked. - match clause.kind().skip_binder() { - ty::ClauseKind::ConstArgHasType(placeholder_ct, ty) => { - assert!(!(placeholder_ct, ty).has_escaping_bound_vars()); - - match placeholder_ct.kind() { - ty::ConstKind::Placeholder(placeholder_ct) if placeholder_ct == self => { - Some(ty) - } - _ => None, - } - } - _ => None, - } - }); - - // N.B. it may be tempting to fix ICEs by making this function return - // `Option>` instead of `Ty<'tcx>`; however, this is generally - // considered to be a bandaid solution, since it hides more important - // underlying issues with how we construct generics and predicates of - // items. It's advised to fix the underlying issue rather than trying - // to modify this function. - let ty = candidates.next().unwrap_or_else(|| { - panic!("cannot find `{self:?}` in param-env: {env:#?}"); - }); - assert!( - candidates.next().is_none(), - "did not expect duplicate `ConstParamHasTy` for `{self:?}` in param-env: {env:#?}" - ); - ty - } -} diff --git a/compiler/rustc_type_ir/src/canonical.rs b/compiler/rustc_type_ir/src/canonical.rs index 8e7414674c6e7..12d222258b0c6 100644 --- a/compiler/rustc_type_ir/src/canonical.rs +++ b/compiler/rustc_type_ir/src/canonical.rs @@ -108,7 +108,7 @@ pub enum CanonicalVarKind { Float, /// A "placeholder" that represents "any type". - PlaceholderTy(ty::PlaceholderType), + PlaceholderTy(I::PlaceholderTy), /// Region variable `'?R`. Region(UniverseIndex), @@ -116,13 +116,13 @@ pub enum CanonicalVarKind { /// A "placeholder" that represents "any region". Created when you /// are solving a goal like `for<'a> T: Foo<'a>` to represent the /// bound region `'a`. - PlaceholderRegion(ty::PlaceholderRegion), + PlaceholderRegion(I::PlaceholderRegion), /// Some kind of const inference variable. Const(UniverseIndex), /// A "placeholder" that represents "any const". - PlaceholderConst(ty::PlaceholderConst), + PlaceholderConst(I::PlaceholderConst), } impl Eq for CanonicalVarKind {} diff --git a/compiler/rustc_type_ir/src/const_kind.rs b/compiler/rustc_type_ir/src/const_kind.rs index b215230ea443c..5b136ae03121e 100644 --- a/compiler/rustc_type_ir/src/const_kind.rs +++ b/compiler/rustc_type_ir/src/const_kind.rs @@ -26,10 +26,10 @@ pub enum ConstKind { Infer(InferConst), /// Bound const variable, used only when preparing a trait query. - Bound(BoundVarIndexKind, ty::BoundConst), + Bound(BoundVarIndexKind, I::BoundConst), /// A placeholder const - universally quantified higher-ranked const. - Placeholder(ty::PlaceholderConst), + Placeholder(I::PlaceholderConst), /// An unnormalized const item such as an anon const or assoc const or free const item. /// Right now anything other than anon consts does not actually work properly but this diff --git a/compiler/rustc_type_ir/src/error.rs b/compiler/rustc_type_ir/src/error.rs index eba4c7c6644ac..502622aa50ca8 100644 --- a/compiler/rustc_type_ir/src/error.rs +++ b/compiler/rustc_type_ir/src/error.rs @@ -33,7 +33,7 @@ pub enum TypeError { ArgCount, RegionsDoesNotOutlive(I::Region, I::Region), - RegionsInsufficientlyPolymorphic(ty::BoundRegion, I::Region), + RegionsInsufficientlyPolymorphic(I::BoundRegion, I::Region), RegionsPlaceholderMismatch, Sorts(ExpectedFound), diff --git a/compiler/rustc_type_ir/src/inherent.rs b/compiler/rustc_type_ir/src/inherent.rs index 89cb236d38c6d..4323b1ca64690 100644 --- a/compiler/rustc_type_ir/src/inherent.rs +++ b/compiler/rustc_type_ir/src/inherent.rs @@ -12,7 +12,7 @@ use crate::elaborate::Elaboratable; use crate::fold::{TypeFoldable, TypeSuperFoldable}; use crate::relate::Relate; use crate::solve::{AdtDestructorKind, SizedTraitKind}; -use crate::visit::{Flags, TypeSuperVisitable, TypeVisitable}; +use crate::visit::{Flags, TypeSuperVisitable, TypeVisitable, TypeVisitableExt}; use crate::{self as ty, CollectAndApply, Interner, UpcastFrom}; pub trait Ty>: @@ -42,9 +42,9 @@ pub trait Ty>: fn new_param(interner: I, param: I::ParamTy) -> Self; - fn new_placeholder(interner: I, param: ty::PlaceholderType) -> Self; + fn new_placeholder(interner: I, param: I::PlaceholderTy) -> Self; - fn new_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundTy) -> Self; + fn new_bound(interner: I, debruijn: ty::DebruijnIndex, var: I::BoundTy) -> Self; fn new_anon_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundVar) -> Self; @@ -228,7 +228,7 @@ pub trait Region>: + Flags + Relate { - fn new_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundRegion) -> Self; + fn new_bound(interner: I, debruijn: ty::DebruijnIndex, var: I::BoundRegion) -> Self; fn new_anon_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundVar) -> Self; @@ -236,7 +236,7 @@ pub trait Region>: fn new_static(interner: I) -> Self; - fn new_placeholder(interner: I, var: ty::PlaceholderRegion) -> Self; + fn new_placeholder(interner: I, var: I::PlaceholderRegion) -> Self; fn is_bound(self) -> bool { matches!(self.kind(), ty::ReBound(..)) @@ -260,13 +260,13 @@ pub trait Const>: fn new_var(interner: I, var: ty::ConstVid) -> Self; - fn new_bound(interner: I, debruijn: ty::DebruijnIndex, bound_const: ty::BoundConst) -> Self; + fn new_bound(interner: I, debruijn: ty::DebruijnIndex, bound_const: I::BoundConst) -> Self; fn new_anon_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundVar) -> Self; fn new_canonical_bound(interner: I, var: ty::BoundVar) -> Self; - fn new_placeholder(interner: I, param: ty::PlaceholderConst) -> Self; + fn new_placeholder(interner: I, param: I::PlaceholderConst) -> Self; fn new_unevaluated(interner: I, uv: ty::UnevaluatedConst) -> Self; @@ -543,12 +543,68 @@ pub trait Clauses>: { } +/// Common capabilities of placeholder kinds +pub trait PlaceholderLike: Copy + Debug + Hash + Eq { + fn universe(self) -> ty::UniverseIndex; + fn var(self) -> ty::BoundVar; + + type Bound: BoundVarLike; + fn new(ui: ty::UniverseIndex, bound: Self::Bound) -> Self; + fn new_anon(ui: ty::UniverseIndex, var: ty::BoundVar) -> Self; + fn with_updated_universe(self, ui: ty::UniverseIndex) -> Self; +} + +pub trait PlaceholderConst: PlaceholderLike { + fn find_const_ty_from_env(self, env: I::ParamEnv) -> I::Ty; +} +impl PlaceholderConst for I::PlaceholderConst { + fn find_const_ty_from_env(self, env: I::ParamEnv) -> I::Ty { + let mut candidates = env.caller_bounds().iter().filter_map(|clause| { + // `ConstArgHasType` are never desugared to be higher ranked. + match clause.kind().skip_binder() { + ty::ClauseKind::ConstArgHasType(placeholder_ct, ty) => { + assert!(!(placeholder_ct, ty).has_escaping_bound_vars()); + + match placeholder_ct.kind() { + ty::ConstKind::Placeholder(placeholder_ct) if placeholder_ct == self => { + Some(ty) + } + _ => None, + } + } + _ => None, + } + }); + + // N.B. it may be tempting to fix ICEs by making this function return + // `Option>` instead of `Ty<'tcx>`; however, this is generally + // considered to be a bandaid solution, since it hides more important + // underlying issues with how we construct generics and predicates of + // items. It's advised to fix the underlying issue rather than trying + // to modify this function. + let ty = candidates.next().unwrap_or_else(|| { + panic!("cannot find `{self:?}` in param-env: {env:#?}"); + }); + assert!( + candidates.next().is_none(), + "did not expect duplicate `ConstParamHasTy` for `{self:?}` in param-env: {env:#?}" + ); + ty + } +} + pub trait IntoKind { type Kind; fn kind(self) -> Self::Kind; } +pub trait BoundVarLike: Copy + Debug + Hash + Eq { + fn var(self) -> ty::BoundVar; + + fn assert_eq(self, var: I::BoundVarKind); +} + pub trait ParamLike: Copy + Debug + Hash + Eq { fn index(self) -> u32; } @@ -712,7 +768,3 @@ impl<'a, S: SliceLike> SliceLike for &'a S { (*self).as_slice() } } - -pub trait Symbol: Copy + Hash + PartialEq + Eq + Debug { - fn is_kw_underscore_lifetime(self) -> bool; -} diff --git a/compiler/rustc_type_ir/src/interner.rs b/compiler/rustc_type_ir/src/interner.rs index 59ae6733fb847..0ab27a65c6879 100644 --- a/compiler/rustc_type_ir/src/interner.rs +++ b/compiler/rustc_type_ir/src/interner.rs @@ -61,12 +61,8 @@ pub trait Interner: type GenericArg: GenericArg; type Term: Term; - type BoundVarKinds: Copy - + Debug - + Hash - + Eq - + SliceLike> - + Default; + type BoundVarKinds: Copy + Debug + Hash + Eq + SliceLike + Default; + type BoundVarKind: Copy + Debug + Hash + Eq; type PredefinedOpaques: Copy + Debug @@ -124,7 +120,9 @@ pub trait Interner: type Tys: Tys; type FnInputTys: Copy + Debug + Hash + Eq + SliceLike + TypeVisitable; type ParamTy: ParamLike; - type Symbol: Symbol; + type BoundTy: BoundVarLike; + type PlaceholderTy: PlaceholderLike; + type Symbol: Copy + Hash + PartialEq + Eq + Debug; // Things stored inside of tys type ErrorGuaranteed: Copy + Debug + Hash + Eq; @@ -151,6 +149,8 @@ pub trait Interner: // Kinds of consts type Const: Const; type ParamConst: Copy + Debug + Hash + Eq + ParamLike; + type BoundConst: BoundVarLike; + type PlaceholderConst: PlaceholderConst; type ValueConst: ValueConst; type ExprConst: ExprConst; type ValTree: ValTree; @@ -160,6 +160,8 @@ pub trait Interner: type Region: Region; type EarlyParamRegion: ParamLike; type LateParamRegion: Copy + Debug + Hash + Eq; + type BoundRegion: BoundVarLike; + type PlaceholderRegion: PlaceholderLike; type RegionAssumptions: Copy + Debug @@ -409,8 +411,6 @@ pub trait Interner: self, canonical_goal: CanonicalInput, ) -> (QueryResult, Self::Probe); - - fn item_name(self, item_index: Self::DefId) -> Self::Symbol; } /// Imagine you have a function `F: FnOnce(&[T]) -> R`, plus an iterator `iter` diff --git a/compiler/rustc_type_ir/src/outlives.rs b/compiler/rustc_type_ir/src/outlives.rs index 300e5c0b46956..c7dccea6adc12 100644 --- a/compiler/rustc_type_ir/src/outlives.rs +++ b/compiler/rustc_type_ir/src/outlives.rs @@ -14,7 +14,7 @@ use crate::{self as ty, Interner}; pub enum Component { Region(I::Region), Param(I::ParamTy), - Placeholder(ty::PlaceholderType), + Placeholder(I::PlaceholderTy), UnresolvedInferenceVariable(ty::InferTy), // Projections like `T::Foo` are tricky because a constraint like diff --git a/compiler/rustc_type_ir/src/region_kind.rs b/compiler/rustc_type_ir/src/region_kind.rs index e08c274f9f147..9acf9ff8557e7 100644 --- a/compiler/rustc_type_ir/src/region_kind.rs +++ b/compiler/rustc_type_ir/src/region_kind.rs @@ -8,7 +8,7 @@ use rustc_macros::{Decodable_NoContext, Encodable_NoContext, HashStable_NoContex use rustc_type_ir_macros::GenericTypeVisitable; use self::RegionKind::*; -use crate::{BoundRegion, BoundVarIndexKind, Interner, PlaceholderRegion}; +use crate::{BoundVarIndexKind, Interner}; rustc_index::newtype_index! { /// A **region** **v**ariable **ID**. @@ -149,7 +149,7 @@ pub enum RegionKind { /// Bound regions inside of types **must not** be erased, as they impact trait /// selection and the `TypeId` of that type. `for<'a> fn(&'a ())` and /// `fn(&'static ())` are different types and have to be treated as such. - ReBound(BoundVarIndexKind, BoundRegion), + ReBound(BoundVarIndexKind, I::BoundRegion), /// Late-bound function parameters are represented using a `ReBound`. When /// inside of a function, we convert these bound variables to placeholder @@ -170,7 +170,7 @@ pub enum RegionKind { /// Should not exist outside of type inference. /// /// Used when instantiating a `forall` binder via `infcx.enter_forall`. - RePlaceholder(PlaceholderRegion), + RePlaceholder(I::PlaceholderRegion), /// Erased region, used by trait selection, in MIR and during codegen. ReErased, @@ -214,9 +214,9 @@ impl fmt::Debug for RegionKind { impl HashStable for RegionKind where I::EarlyParamRegion: HashStable, + I::BoundRegion: HashStable, I::LateParamRegion: HashStable, - I::DefId: HashStable, - I::Symbol: HashStable, + I::PlaceholderRegion: HashStable, { #[inline] fn hash_stable(&self, hcx: &mut CTX, hasher: &mut StableHasher) { diff --git a/compiler/rustc_type_ir/src/ty_kind.rs b/compiler/rustc_type_ir/src/ty_kind.rs index 7cb71387e8680..498797bef653a 100644 --- a/compiler/rustc_type_ir/src/ty_kind.rs +++ b/compiler/rustc_type_ir/src/ty_kind.rs @@ -233,7 +233,7 @@ pub enum TyKind { /// /// [1]: https://rustc-dev-guide.rust-lang.org/traits/hrtb.html /// [2]: https://rustc-dev-guide.rust-lang.org/traits/canonical-queries.html - Bound(BoundVarIndexKind, ty::BoundTy), + Bound(BoundVarIndexKind, I::BoundTy), /// A placeholder type, used during higher ranked subtyping to instantiate /// bound variables. @@ -243,7 +243,7 @@ pub enum TyKind { /// to the bound variable's index from the binder from which it was instantiated), /// and `U` is the universe index in which it is instantiated, or totally omitted /// if the universe index is zero. - Placeholder(ty::PlaceholderType), + Placeholder(I::PlaceholderTy), /// A type variable used during type checking. /// diff --git a/library/Cargo.lock b/library/Cargo.lock index 4801f92c63e5a..608e7e412c3b9 100644 --- a/library/Cargo.lock +++ b/library/Cargo.lock @@ -274,9 +274,9 @@ dependencies = [ [[package]] name = "rustc-demangle" -version = "0.1.27" +version = "0.1.26" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b50b8869d9fc858ce7266cce0194bd74df58b9d0e3f6df3a9fc8eb470d95c09d" +checksum = "56f7d92ca342cea22a06f2121d944b4fd82af56988c270852495420f961d4ace" dependencies = [ "rustc-std-workspace-core", ] diff --git a/library/alloc/Cargo.toml b/library/alloc/Cargo.toml index 541257b6cda6e..fb1f8c86dbfd5 100644 --- a/library/alloc/Cargo.toml +++ b/library/alloc/Cargo.toml @@ -21,6 +21,7 @@ compiler_builtins = { path = "../compiler-builtins/compiler-builtins", features [features] compiler-builtins-mem = ['compiler_builtins/mem'] compiler-builtins-c = ["compiler_builtins/c"] +compiler-builtins-no-f16-f128 = ["compiler_builtins/no-f16-f128"] # Choose algorithms that are optimized for binary size instead of runtime performance optimize_for_size = ["core/optimize_for_size"] diff --git a/library/alloc/src/collections/binary_heap/mod.rs b/library/alloc/src/collections/binary_heap/mod.rs index 97aafbc7b6994..5710b2a3a91d8 100644 --- a/library/alloc/src/collections/binary_heap/mod.rs +++ b/library/alloc/src/collections/binary_heap/mod.rs @@ -649,33 +649,6 @@ impl BinaryHeap { }) } - /// Removes and returns the greatest item from the binary heap if the predicate - /// returns `true`, or [`None`] if the predicate returns false or the heap - /// is empty (the predicate will not be called in that case). - /// - /// # Examples - /// - /// ``` - /// #![feature(binary_heap_pop_if)] - /// use std::collections::BinaryHeap; - /// let mut heap = BinaryHeap::from([1, 2]); - /// let pred = |x: &i32| *x % 2 == 0; - /// - /// assert_eq!(heap.pop_if(pred), Some(2)); - /// assert_eq!(heap.as_slice(), [1]); - /// assert_eq!(heap.pop_if(pred), None); - /// assert_eq!(heap.as_slice(), [1]); - /// ``` - /// - /// # Time complexity - /// - /// The worst case cost of `pop_if` on a heap containing *n* elements is *O*(log(*n*)). - #[unstable(feature = "binary_heap_pop_if", issue = "151828")] - pub fn pop_if(&mut self, predicate: impl FnOnce(&T) -> bool) -> Option { - let first = self.peek()?; - if predicate(first) { self.pop() } else { None } - } - /// Pushes an item onto the binary heap. /// /// # Examples diff --git a/library/alloc/src/collections/linked_list.rs b/library/alloc/src/collections/linked_list.rs index 3889fca30bc87..6cab5728a2818 100644 --- a/library/alloc/src/collections/linked_list.rs +++ b/library/alloc/src/collections/linked_list.rs @@ -854,6 +854,7 @@ impl LinkedList { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// use std::collections::LinkedList; /// /// let mut dl = LinkedList::from([1, 2, 3]); @@ -862,7 +863,7 @@ impl LinkedList { /// *ptr += 4; /// assert_eq!(dl.front().unwrap(), &6); /// ``` - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `LinkedList::push_front` instead"] pub fn push_front_mut(&mut self, elt: T) -> &mut T { let mut node = @@ -925,6 +926,7 @@ impl LinkedList { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// use std::collections::LinkedList; /// /// let mut dl = LinkedList::from([1, 2, 3]); @@ -933,7 +935,7 @@ impl LinkedList { /// *ptr += 4; /// assert_eq!(dl.back().unwrap(), &6); /// ``` - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `LinkedList::push_back` instead"] pub fn push_back_mut(&mut self, elt: T) -> &mut T { let mut node = diff --git a/library/alloc/src/collections/vec_deque/mod.rs b/library/alloc/src/collections/vec_deque/mod.rs index eda29db442572..c51317a1a68f7 100644 --- a/library/alloc/src/collections/vec_deque/mod.rs +++ b/library/alloc/src/collections/vec_deque/mod.rs @@ -2168,6 +2168,7 @@ impl VecDeque { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// use std::collections::VecDeque; /// /// let mut d = VecDeque::from([1, 2, 3]); @@ -2175,7 +2176,7 @@ impl VecDeque { /// *x -= 1; /// assert_eq!(d.front(), Some(&7)); /// ``` - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `VecDeque::push_front` instead"] pub fn push_front_mut(&mut self, value: T) -> &mut T { if self.is_full() { @@ -2211,6 +2212,7 @@ impl VecDeque { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// use std::collections::VecDeque; /// /// let mut d = VecDeque::from([1, 2, 3]); @@ -2218,7 +2220,7 @@ impl VecDeque { /// *x += 1; /// assert_eq!(d.back(), Some(&10)); /// ``` - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `VecDeque::push_back` instead"] pub fn push_back_mut(&mut self, value: T) -> &mut T { if self.is_full() { @@ -2417,6 +2419,7 @@ impl VecDeque { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// use std::collections::VecDeque; /// /// let mut vec_deque = VecDeque::from([1, 2, 3]); @@ -2425,7 +2428,7 @@ impl VecDeque { /// *x += 7; /// assert_eq!(vec_deque, &[1, 12, 2, 3]); /// ``` - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `VecDeque::insert` instead"] pub fn insert_mut(&mut self, index: usize, value: T) -> &mut T { assert!(index <= self.len(), "index out of bounds"); diff --git a/library/alloc/src/collections/vec_deque/splice.rs b/library/alloc/src/collections/vec_deque/splice.rs index d7b9a96291c39..cd98af7341ded 100644 --- a/library/alloc/src/collections/vec_deque/splice.rs +++ b/library/alloc/src/collections/vec_deque/splice.rs @@ -143,11 +143,7 @@ impl Drain<'_, T, A> { let new_tail_start = tail_start + additional; unsafe { - deque.wrap_copy( - deque.to_physical_idx(tail_start), - deque.to_physical_idx(new_tail_start), - self.tail_len, - ); + deque.wrap_copy(tail_start, new_tail_start, self.tail_len); } self.drain_len += additional; } diff --git a/library/alloc/src/vec/mod.rs b/library/alloc/src/vec/mod.rs index 6cbe89d9da4f2..aaf22e80ec601 100644 --- a/library/alloc/src/vec/mod.rs +++ b/library/alloc/src/vec/mod.rs @@ -1003,6 +1003,9 @@ const impl Vec { /// # Examples /// /// ``` + /// #![feature(push_mut)] + /// + /// /// let mut vec = vec![1, 2]; /// let last = vec.push_mut(3); /// assert_eq!(*last, 3); @@ -1020,7 +1023,7 @@ const impl Vec { /// vector's elements to a larger allocation. This expensive operation is /// offset by the *capacity* *O*(1) insertions it allows. #[inline] - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[must_use = "if you don't need a reference to the value, use `Vec::push` instead"] pub fn push_mut(&mut self, value: T) -> &mut T { // Inform codegen that the length does not change across grow_one(). @@ -2193,6 +2196,7 @@ impl Vec { /// # Examples /// /// ``` + /// #![feature(push_mut)] /// let mut vec = vec![1, 3, 5, 9]; /// let x = vec.insert_mut(3, 6); /// *x += 1; @@ -2206,7 +2210,7 @@ impl Vec { /// the insertion index is 0. #[cfg(not(no_global_oom_handling))] #[inline] - #[stable(feature = "push_mut", since = "CURRENT_RUSTC_VERSION")] + #[unstable(feature = "push_mut", issue = "135974")] #[track_caller] #[must_use = "if you don't need a reference to the value, use `Vec::insert` instead"] pub fn insert_mut(&mut self, index: usize, element: T) -> &mut T { @@ -2685,6 +2689,7 @@ impl Vec { /// Takes *O*(1) time. #[inline] #[unstable(feature = "vec_push_within_capacity", issue = "100486")] + // #[unstable(feature = "push_mut", issue = "135974")] pub fn push_within_capacity(&mut self, value: T) -> Result<&mut T, T> { if self.len == self.buf.capacity() { return Err(value); diff --git a/library/alloctests/tests/collections/binary_heap.rs b/library/alloctests/tests/collections/binary_heap.rs index e1484c32a4f8a..95f4c3e614f5e 100644 --- a/library/alloctests/tests/collections/binary_heap.rs +++ b/library/alloctests/tests/collections/binary_heap.rs @@ -136,18 +136,6 @@ fn test_peek_and_pop() { } } -#[test] -fn test_pop_if() { - let data = vec![9, 8, 7, 6, 5, 4, 3, 2, 1, 0]; - let mut sorted = data.clone(); - sorted.sort(); - let mut heap = BinaryHeap::from(data); - while let Some(popped) = heap.pop_if(|x| *x > 2) { - assert_eq!(popped, sorted.pop().unwrap()); - } - assert_eq!(heap.into_sorted_vec(), vec![0, 1, 2]); -} - #[test] fn test_peek_mut() { let data = vec![2, 4, 6, 2, 1, 8, 10, 3, 5, 7, 0, 9, 1]; diff --git a/library/alloctests/tests/lib.rs b/library/alloctests/tests/lib.rs index e15c86496cf1b..2926248edbf55 100644 --- a/library/alloctests/tests/lib.rs +++ b/library/alloctests/tests/lib.rs @@ -1,5 +1,4 @@ #![feature(allocator_api)] -#![feature(binary_heap_pop_if)] #![feature(const_heap)] #![feature(deque_extend_front)] #![feature(iter_array_chunks)] diff --git a/library/alloctests/tests/vec_deque.rs b/library/alloctests/tests/vec_deque.rs index 92853fe00fd63..e06d18250a51a 100644 --- a/library/alloctests/tests/vec_deque.rs +++ b/library/alloctests/tests/vec_deque.rs @@ -2336,14 +2336,3 @@ fn test_splice_forget() { std::mem::forget(v.splice(2..4, a)); assert_eq!(v, &[1, 2]); } - -#[test] -fn test_splice_wrapping() { - let mut vec = VecDeque::with_capacity(10); - vec.push_front(7u8); - vec.push_back(9); - - vec.splice(1..1, [8]); - - assert_eq!(Vec::from(vec), [7, 8, 9]); -} diff --git a/library/compiler-builtins/builtins-shim/Cargo.toml b/library/compiler-builtins/builtins-shim/Cargo.toml index 746d5b21dc3f1..ac77224f5ce1e 100644 --- a/library/compiler-builtins/builtins-shim/Cargo.toml +++ b/library/compiler-builtins/builtins-shim/Cargo.toml @@ -47,6 +47,10 @@ c = ["dep:cc"] # the generic versions on all platforms. no-asm = [] +# Workaround for codegen backends which haven't yet implemented `f16` and +# `f128` support. Disabled any intrinsics which use those types. +no-f16-f128 = [] + # Flag this library as the unstable compiler-builtins lib compiler-builtins = [] diff --git a/library/compiler-builtins/builtins-test/Cargo.toml b/library/compiler-builtins/builtins-test/Cargo.toml index 550f736a76dbb..9346ea65420b2 100644 --- a/library/compiler-builtins/builtins-test/Cargo.toml +++ b/library/compiler-builtins/builtins-test/Cargo.toml @@ -33,6 +33,7 @@ utest-macros = { git = "https://github.com/japaric/utest" } default = ["mangled-names"] c = ["compiler_builtins/c"] no-asm = ["compiler_builtins/no-asm"] +no-f16-f128 = ["compiler_builtins/no-f16-f128"] mem = ["compiler_builtins/mem"] mangled-names = ["compiler_builtins/mangled-names"] # Skip tests that rely on f128 symbols being available on the system diff --git a/library/compiler-builtins/ci/run.sh b/library/compiler-builtins/ci/run.sh index 0c07b32c74b93..bc94d42fe837a 100755 --- a/library/compiler-builtins/ci/run.sh +++ b/library/compiler-builtins/ci/run.sh @@ -36,6 +36,8 @@ else "${test_builtins[@]}" --features c --release "${test_builtins[@]}" --features no-asm "${test_builtins[@]}" --features no-asm --release + "${test_builtins[@]}" --features no-f16-f128 + "${test_builtins[@]}" --features no-f16-f128 --release "${test_builtins[@]}" --benches "${test_builtins[@]}" --benches --release @@ -61,6 +63,8 @@ symcheck+=(-- build-and-check) "${symcheck[@]}" "$target" -- -p compiler_builtins --features c --release "${symcheck[@]}" "$target" -- -p compiler_builtins --features no-asm "${symcheck[@]}" "$target" -- -p compiler_builtins --features no-asm --release +"${symcheck[@]}" "$target" -- -p compiler_builtins --features no-f16-f128 +"${symcheck[@]}" "$target" -- -p compiler_builtins --features no-f16-f128 --release run_intrinsics_test() { build_args=(--verbose --manifest-path builtins-test-intrinsics/Cargo.toml) diff --git a/library/compiler-builtins/compiler-builtins/Cargo.toml b/library/compiler-builtins/compiler-builtins/Cargo.toml index 496dde2d4cf25..0845861dcfe3c 100644 --- a/library/compiler-builtins/compiler-builtins/Cargo.toml +++ b/library/compiler-builtins/compiler-builtins/Cargo.toml @@ -45,6 +45,10 @@ c = ["dep:cc"] # the generic versions on all platforms. no-asm = [] +# Workaround for codegen backends which haven't yet implemented `f16` and +# `f128` support. Disabled any intrinsics which use those types. +no-f16-f128 = [] + # Flag this library as the unstable compiler-builtins lib compiler-builtins = [] diff --git a/library/compiler-builtins/compiler-builtins/configure.rs b/library/compiler-builtins/compiler-builtins/configure.rs index f16da6b58f812..79e238abc0f62 100644 --- a/library/compiler-builtins/compiler-builtins/configure.rs +++ b/library/compiler-builtins/compiler-builtins/configure.rs @@ -95,13 +95,16 @@ pub fn configure_aliases(target: &Target) { * * https://github.com/rust-lang/rustc_codegen_cranelift/blob/c713ffab3c6e28ab4b4dd4e392330f786ea657ad/src/lib.rs#L196-L226 */ + // If the feature is set, disable both of these types. + let no_f16_f128 = target.cargo_features.iter().any(|s| s == "no-f16-f128"); + println!("cargo::rustc-check-cfg=cfg(f16_enabled)"); - if target.reliable_f16 { + if target.reliable_f16 && !no_f16_f128 { println!("cargo::rustc-cfg=f16_enabled"); } println!("cargo::rustc-check-cfg=cfg(f128_enabled)"); - if target.reliable_f128 { + if target.reliable_f128 && !no_f16_f128 { println!("cargo::rustc-cfg=f128_enabled"); } } diff --git a/library/compiler-builtins/libm/configure.rs b/library/compiler-builtins/libm/configure.rs index ee65a3a8d6243..857a302297169 100644 --- a/library/compiler-builtins/libm/configure.rs +++ b/library/compiler-builtins/libm/configure.rs @@ -143,13 +143,16 @@ fn emit_f16_f128_cfg(cfg: &Config) { /* See the compiler-builtins configure file for info about the meaning of these options */ + // If the feature is set, disable both of these types. + let no_f16_f128 = cfg.cargo_features.iter().any(|s| s == "no-f16-f128"); + println!("cargo:rustc-check-cfg=cfg(f16_enabled)"); - if cfg.reliable_f16 { + if cfg.reliable_f16 && !no_f16_f128 { println!("cargo:rustc-cfg=f16_enabled"); } println!("cargo:rustc-check-cfg=cfg(f128_enabled)"); - if cfg.reliable_f128 { + if cfg.reliable_f128 && !no_f16_f128 { println!("cargo:rustc-cfg=f128_enabled"); } } diff --git a/library/core/src/fmt/builders.rs b/library/core/src/fmt/builders.rs index 7550dac45cd02..197cddd3fa9de 100644 --- a/library/core/src/fmt/builders.rs +++ b/library/core/src/fmt/builders.rs @@ -1227,9 +1227,8 @@ impl<'a, 'b: 'a> DebugMap<'a, 'b> { /// assert_eq!(format!("{:?}", wrapped), "'a'"); /// ``` #[stable(feature = "fmt_from_fn", since = "1.93.0")] -#[rustc_const_stable(feature = "const_fmt_from_fn", since = "CURRENT_RUSTC_VERSION")] #[must_use = "returns a type implementing Debug and Display, which do not have any effects unless they are used"] -pub const fn from_fn) -> fmt::Result>(f: F) -> FromFn { +pub fn from_fn) -> fmt::Result>(f: F) -> FromFn { FromFn(f) } diff --git a/library/core/src/intrinsics/mod.rs b/library/core/src/intrinsics/mod.rs index 051dda731881f..74b112bd6b05a 100644 --- a/library/core/src/intrinsics/mod.rs +++ b/library/core/src/intrinsics/mod.rs @@ -2852,6 +2852,15 @@ pub const unsafe fn size_of_val(ptr: *const T) -> usize; #[rustc_intrinsic_const_stable_indirect] pub const unsafe fn align_of_val(ptr: *const T) -> usize; +/// Check if a type represented by a `TypeId` implements a trait represented by a `TypeId`. +/// It can only be called at compile time, the backends do +/// not implement it. +#[rustc_intrinsic] +#[unstable(feature = "core_intrinsics", issue = "none")] +pub const fn type_id_implements_trait(_id: crate::any::TypeId, _trait: crate::any::TypeId) -> bool { + panic!("`TypeId::implements_trait` can only be called at compile-time") +} + /// Compute the type information of a concrete type. /// It can only be called at compile time, the backends do /// not implement it. diff --git a/library/core/src/iter/traits/collect.rs b/library/core/src/iter/traits/collect.rs index 9c3edfd4192d5..c3b9a0f0b7a4e 100644 --- a/library/core/src/iter/traits/collect.rs +++ b/library/core/src/iter/traits/collect.rs @@ -279,8 +279,7 @@ pub trait FromIterator: Sized { )] #[rustc_skip_during_method_dispatch(array, boxed_slice)] #[stable(feature = "rust1", since = "1.0.0")] -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -pub const trait IntoIterator { +pub trait IntoIterator { /// The type of the elements being iterated over. #[rustc_diagnostic_item = "IntoIteratorItem"] #[stable(feature = "rust1", since = "1.0.0")] @@ -313,8 +312,7 @@ pub const trait IntoIterator { } #[stable(feature = "rust1", since = "1.0.0")] -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -impl const IntoIterator for I { +impl IntoIterator for I { type Item = I::Item; type IntoIter = I; diff --git a/library/core/src/iter/traits/iterator.rs b/library/core/src/iter/traits/iterator.rs index d919230d094d8..dc484e2a27f61 100644 --- a/library/core/src/iter/traits/iterator.rs +++ b/library/core/src/iter/traits/iterator.rs @@ -37,8 +37,7 @@ fn _assert_is_dyn_compatible(_: &dyn Iterator) {} #[lang = "iterator"] #[rustc_diagnostic_item = "Iterator"] #[must_use = "iterators are lazy and do nothing unless consumed"] -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -pub const trait Iterator { +pub trait Iterator { /// The type of the elements being iterated over. #[rustc_diagnostic_item = "IteratorItem"] #[stable(feature = "rust1", since = "1.0.0")] @@ -108,7 +107,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "iter_next_chunk", issue = "98326")] - #[rustc_non_const_trait_method] fn next_chunk( &mut self, ) -> Result<[Self::Item; N], array::IntoIter> @@ -221,7 +219,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn count(self) -> usize where Self: Sized, @@ -254,7 +251,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn last(self) -> Option where Self: Sized, @@ -302,7 +298,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "iter_advance_by", issue = "77404")] - #[rustc_non_const_trait_method] fn advance_by(&mut self, n: usize) -> Result<(), NonZero> { /// Helper trait to specialize `advance_by` via `try_fold` for `Sized` iterators. trait SpecAdvanceBy { @@ -380,7 +375,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn nth(&mut self, n: usize) -> Option { self.advance_by(n).ok()?; self.next() @@ -431,7 +425,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_step_by", since = "1.28.0")] - #[rustc_non_const_trait_method] fn step_by(self, step: usize) -> StepBy where Self: Sized, @@ -503,7 +496,6 @@ pub const trait Iterator { /// [`OsStr`]: ../../std/ffi/struct.OsStr.html #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn chain(self, other: U) -> Chain where Self: Sized, @@ -622,7 +614,6 @@ pub const trait Iterator { /// [`zip`]: crate::iter::zip #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn zip(self, other: U) -> Zip where Self: Sized, @@ -666,7 +657,6 @@ pub const trait Iterator { /// [`intersperse_with`]: Iterator::intersperse_with #[inline] #[unstable(feature = "iter_intersperse", issue = "79524")] - #[rustc_non_const_trait_method] fn intersperse(self, separator: Self::Item) -> Intersperse where Self: Sized, @@ -725,7 +715,6 @@ pub const trait Iterator { /// [`intersperse`]: Iterator::intersperse #[inline] #[unstable(feature = "iter_intersperse", issue = "79524")] - #[rustc_non_const_trait_method] fn intersperse_with(self, separator: G) -> IntersperseWith where Self: Sized, @@ -785,7 +774,6 @@ pub const trait Iterator { #[rustc_diagnostic_item = "IteratorMap"] #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn map(self, f: F) -> Map where Self: Sized, @@ -831,7 +819,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_for_each", since = "1.21.0")] - #[rustc_non_const_trait_method] fn for_each(self, f: F) where Self: Sized, @@ -907,7 +894,6 @@ pub const trait Iterator { #[inline] #[stable(feature = "rust1", since = "1.0.0")] #[rustc_diagnostic_item = "iter_filter"] - #[rustc_non_const_trait_method] fn filter

(self, predicate: P) -> Filter where Self: Sized, @@ -953,7 +939,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn filter_map(self, f: F) -> FilterMap where Self: Sized, @@ -1001,7 +986,6 @@ pub const trait Iterator { #[inline] #[stable(feature = "rust1", since = "1.0.0")] #[rustc_diagnostic_item = "enumerate_method"] - #[rustc_non_const_trait_method] fn enumerate(self) -> Enumerate where Self: Sized, @@ -1073,7 +1057,6 @@ pub const trait Iterator { /// [`next`]: Iterator::next #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn peekable(self) -> Peekable where Self: Sized, @@ -1139,7 +1122,6 @@ pub const trait Iterator { #[inline] #[doc(alias = "drop_while")] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn skip_while

(self, predicate: P) -> SkipWhile where Self: Sized, @@ -1218,7 +1200,6 @@ pub const trait Iterator { /// the iteration should stop, but wasn't placed back into the iterator. #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn take_while

(self, predicate: P) -> TakeWhile where Self: Sized, @@ -1307,7 +1288,6 @@ pub const trait Iterator { /// [`fuse`]: Iterator::fuse #[inline] #[stable(feature = "iter_map_while", since = "1.57.0")] - #[rustc_non_const_trait_method] fn map_while(self, predicate: P) -> MapWhile where Self: Sized, @@ -1337,7 +1317,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn skip(self, n: usize) -> Skip where Self: Sized, @@ -1410,7 +1389,6 @@ pub const trait Iterator { #[doc(alias = "limit")] #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn take(self, n: usize) -> Take where Self: Sized, @@ -1458,7 +1436,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn scan(self, initial_state: St, f: F) -> Scan where Self: Sized, @@ -1497,7 +1474,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn flat_map(self, f: F) -> FlatMap where Self: Sized, @@ -1582,7 +1558,6 @@ pub const trait Iterator { /// [`flat_map()`]: Iterator::flat_map #[inline] #[stable(feature = "iterator_flatten", since = "1.29.0")] - #[rustc_non_const_trait_method] fn flatten(self) -> Flatten where Self: Sized, @@ -1739,7 +1714,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "iter_map_windows", issue = "87155")] - #[rustc_non_const_trait_method] fn map_windows(self, f: F) -> MapWindows where Self: Sized, @@ -1802,7 +1776,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn fuse(self) -> Fuse where Self: Sized, @@ -1887,7 +1860,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn inspect(self, f: F) -> Inspect where Self: Sized, @@ -2047,7 +2019,6 @@ pub const trait Iterator { #[stable(feature = "rust1", since = "1.0.0")] #[must_use = "if you really need to exhaust the iterator, consider `.for_each(drop)` instead"] #[rustc_diagnostic_item = "iterator_collect_fn"] - #[rustc_non_const_trait_method] fn collect>(self) -> B where Self: Sized, @@ -2135,7 +2106,6 @@ pub const trait Iterator { /// [`collect`]: Iterator::collect #[inline] #[unstable(feature = "iterator_try_collect", issue = "94047")] - #[rustc_non_const_trait_method] fn try_collect(&mut self) -> ChangeOutputType where Self: Sized, @@ -2208,7 +2178,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "iter_collect_into", issue = "94780")] - #[rustc_non_const_trait_method] fn collect_into>(self, collection: &mut E) -> &mut E where Self: Sized, @@ -2241,7 +2210,6 @@ pub const trait Iterator { /// assert_eq!(odd, [1, 3]); /// ``` #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn partition(self, f: F) -> (B, B) where Self: Sized, @@ -2304,7 +2272,6 @@ pub const trait Iterator { /// assert!(a[i..].iter().all(|n| n % 2 == 1)); // odds /// ``` #[unstable(feature = "iter_partition_in_place", issue = "62543")] - #[rustc_non_const_trait_method] fn partition_in_place<'a, T: 'a, P>(mut self, ref mut predicate: P) -> usize where Self: Sized + DoubleEndedIterator, @@ -2362,7 +2329,6 @@ pub const trait Iterator { /// assert!(!"IntoIterator".chars().is_partitioned(char::is_uppercase)); /// ``` #[unstable(feature = "iter_is_partitioned", issue = "62544")] - #[rustc_non_const_trait_method] fn is_partitioned

(mut self, mut predicate: P) -> bool where Self: Sized, @@ -2457,7 +2423,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_try_fold", since = "1.27.0")] - #[rustc_non_const_trait_method] fn try_fold(&mut self, init: B, mut f: F) -> R where Self: Sized, @@ -2516,7 +2481,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_try_fold", since = "1.27.0")] - #[rustc_non_const_trait_method] fn try_for_each(&mut self, f: F) -> R where Self: Sized, @@ -2636,7 +2600,6 @@ pub const trait Iterator { #[doc(alias = "inject", alias = "foldl")] #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn fold(mut self, init: B, mut f: F) -> B where Self: Sized, @@ -2674,7 +2637,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_fold_self", since = "1.51.0")] - #[rustc_non_const_trait_method] fn reduce(mut self, f: F) -> Option where Self: Sized, @@ -2746,7 +2708,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "iterator_try_reduce", issue = "87053")] - #[rustc_non_const_trait_method] fn try_reduce( &mut self, f: impl FnMut(Self::Item, Self::Item) -> R, @@ -2805,7 +2766,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn all(&mut self, f: F) -> bool where Self: Sized, @@ -2859,7 +2819,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn any(&mut self, f: F) -> bool where Self: Sized, @@ -2933,7 +2892,6 @@ pub const trait Iterator { /// Note that `iter.find(f)` is equivalent to `iter.filter(f).next()`. #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn find

(&mut self, predicate: P) -> Option where Self: Sized, @@ -2965,7 +2923,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iterator_find_map", since = "1.30.0")] - #[rustc_non_const_trait_method] fn find_map(&mut self, f: F) -> Option where Self: Sized, @@ -3024,7 +2981,6 @@ pub const trait Iterator { /// ``` #[inline] #[unstable(feature = "try_find", issue = "63178")] - #[rustc_non_const_trait_method] fn try_find( &mut self, f: impl FnMut(&Self::Item) -> R, @@ -3108,7 +3064,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn position

(&mut self, predicate: P) -> Option where Self: Sized, @@ -3174,7 +3129,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn rposition

(self) -> P where Self: Sized, @@ -3704,7 +3644,6 @@ pub const trait Iterator { /// assert_eq!([1, 2].iter().cmp([1].iter()), Ordering::Greater); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn cmp(self, other: I) -> Ordering where I: IntoIterator, @@ -3732,7 +3671,6 @@ pub const trait Iterator { /// assert_eq!(xs.into_iter().cmp_by(ys, |x, y| (2 * x).cmp(&y)), Ordering::Greater); /// ``` #[unstable(feature = "iter_order_by", issue = "64295")] - #[rustc_non_const_trait_method] fn cmp_by(self, other: I, cmp: F) -> Ordering where Self: Sized, @@ -3789,7 +3727,6 @@ pub const trait Iterator { /// ``` /// #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn partial_cmp(self, other: I) -> Option where I: IntoIterator, @@ -3826,7 +3763,6 @@ pub const trait Iterator { /// ); /// ``` #[unstable(feature = "iter_order_by", issue = "64295")] - #[rustc_non_const_trait_method] fn partial_cmp_by(self, other: I, partial_cmp: F) -> Option where Self: Sized, @@ -3860,7 +3796,6 @@ pub const trait Iterator { /// assert_eq!([1].iter().eq([1, 2].iter()), false); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn eq(self, other: I) -> bool where I: IntoIterator, @@ -3884,7 +3819,6 @@ pub const trait Iterator { /// assert!(xs.iter().eq_by(ys, |x, y| x * x == y)); /// ``` #[unstable(feature = "iter_order_by", issue = "64295")] - #[rustc_non_const_trait_method] fn eq_by(self, other: I, eq: F) -> bool where Self: Sized, @@ -3914,7 +3848,6 @@ pub const trait Iterator { /// assert_eq!([1].iter().ne([1, 2].iter()), true); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn ne(self, other: I) -> bool where I: IntoIterator, @@ -3936,7 +3869,6 @@ pub const trait Iterator { /// assert_eq!([1, 2].iter().lt([1, 2].iter()), false); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn lt(self, other: I) -> bool where I: IntoIterator, @@ -3958,7 +3890,6 @@ pub const trait Iterator { /// assert_eq!([1, 2].iter().le([1, 2].iter()), true); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn le(self, other: I) -> bool where I: IntoIterator, @@ -3980,7 +3911,6 @@ pub const trait Iterator { /// assert_eq!([1, 2].iter().gt([1, 2].iter()), false); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn gt(self, other: I) -> bool where I: IntoIterator, @@ -4002,7 +3932,6 @@ pub const trait Iterator { /// assert_eq!([1, 2].iter().ge([1, 2].iter()), true); /// ``` #[stable(feature = "iter_order", since = "1.5.0")] - #[rustc_non_const_trait_method] fn ge(self, other: I) -> bool where I: IntoIterator, @@ -4032,7 +3961,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "is_sorted", since = "1.82.0")] - #[rustc_non_const_trait_method] fn is_sorted(self) -> bool where Self: Sized, @@ -4059,7 +3987,6 @@ pub const trait Iterator { /// assert!(std::iter::empty::().is_sorted_by(|a, b| true)); /// ``` #[stable(feature = "is_sorted", since = "1.82.0")] - #[rustc_non_const_trait_method] fn is_sorted_by(mut self, compare: F) -> bool where Self: Sized, @@ -4104,7 +4031,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "is_sorted", since = "1.82.0")] - #[rustc_non_const_trait_method] fn is_sorted_by_key(self, f: F) -> bool where Self: Sized, @@ -4120,7 +4046,6 @@ pub const trait Iterator { #[inline] #[doc(hidden)] #[unstable(feature = "trusted_random_access", issue = "none")] - #[rustc_non_const_trait_method] unsafe fn __iterator_get_unchecked(&mut self, _idx: usize) -> Self::Item where Self: TrustedRandomAccessNoCoerce, diff --git a/library/core/src/mem/maybe_dangling.rs b/library/core/src/mem/maybe_dangling.rs index a5f77e667f975..3c5437757e975 100644 --- a/library/core/src/mem/maybe_dangling.rs +++ b/library/core/src/mem/maybe_dangling.rs @@ -29,7 +29,7 @@ use crate::{mem, ptr}; /// mem::forget(boxed); // <-- this is UB! /// ``` /// -/// Even though the `Box`'s destructor is not run (and thus we don't have a double free bug), this +/// Even though the `Box`e's destructor is not run (and thus we don't have a double free bug), this /// code is still UB. This is because when moving `boxed` into `forget`, its validity invariants /// are asserted, causing UB since the `Box` is dangling. The safety comment is as such wrong, as /// moving the `boxed` variable as part of the `forget` call *is* a use. diff --git a/library/core/src/mem/type_info.rs b/library/core/src/mem/type_info.rs index 8b30803c97c98..94f469eaa997d 100644 --- a/library/core/src/mem/type_info.rs +++ b/library/core/src/mem/type_info.rs @@ -2,7 +2,8 @@ //! runtime or const-eval processable way. use crate::any::TypeId; -use crate::intrinsics::type_of; +use crate::intrinsics::{type_id_implements_trait, type_of}; +use crate::ptr; /// Compile-time type information. #[derive(Debug)] @@ -14,6 +15,8 @@ pub struct Type { pub kind: TypeKind, /// Size of the type. `None` if it is unsized pub size: Option, + /// `TypeId` that the type was gathered from. + pub id: TypeId, } impl TypeId { @@ -34,6 +37,30 @@ impl Type { pub const fn of() -> Self { const { TypeId::of::().info() } } + + /// Checks if the type has the trait. + /// It can only be called at compile time. + pub const fn has_trait> + ?Sized + 'static>( + self, + ) -> bool { + type_id_implements_trait(self.id, TypeId::of::()) + } + + /// Checks if the type has the trait represented by the `TypeId`. + /// Returns `None` if the `trait_represented_by_type_id` is not a trait represented by type id. + /// It can only be called at compile time. + #[unstable(feature = "type_info", issue = "146922")] + #[rustc_const_unstable(feature = "type_info", issue = "146922")] + pub const fn has_trait_represented_by_type_id( + self, + trait_represented_by_type_id: TypeId, + ) -> Option { + if matches!(trait_represented_by_type_id.info().kind, TypeKind::DynTrait(_)) { + Some(type_id_implements_trait(self.id, trait_represented_by_type_id)) + } else { + None + } + } } /// Compile-time type information. diff --git a/library/core/src/ops/range.rs b/library/core/src/ops/range.rs index c15c8f20c16be..a0b74ff383ea4 100644 --- a/library/core/src/ops/range.rs +++ b/library/core/src/ops/range.rs @@ -773,7 +773,7 @@ impl Bound<&T> { /// ``` #[unstable(feature = "bound_copied", issue = "145966")] #[must_use] - pub const fn copied(self) -> Bound { + pub fn copied(self) -> Bound { match self { Bound::Unbounded => Bound::Unbounded, Bound::Included(x) => Bound::Included(*x), diff --git a/library/core/src/option.rs b/library/core/src/option.rs index 3dc53941977cb..eb4f978b7c19d 100644 --- a/library/core/src/option.rs +++ b/library/core/src/option.rs @@ -584,7 +584,7 @@ use crate::clone::TrivialClone; use crate::iter::{self, FusedIterator, TrustedLen}; use crate::marker::Destruct; -use crate::ops::{self, ControlFlow, Deref, DerefMut, Residual, Try}; +use crate::ops::{self, ControlFlow, Deref, DerefMut}; use crate::panicking::{panic, panic_display}; use crate::pin::Pin; use crate::{cmp, convert, hint, mem, slice}; @@ -1816,49 +1816,6 @@ impl Option { unsafe { self.as_mut().unwrap_unchecked() } } - /// If the option is `None`, calls the closure and inserts its output if successful. - /// - /// If the closure returns a residual value such as `Err` or `None`, - /// that residual value is returned and nothing is inserted. - /// - /// If the option is `Some`, nothing is inserted. - /// - /// Unless a residual is returned, a mutable reference to the value - /// of the option will be output. - /// - /// # Examples - /// - /// ``` - /// #![feature(option_get_or_try_insert_with)] - /// let mut o1: Option = None; - /// let mut o2: Option = None; - /// - /// let number = "12345"; - /// - /// assert_eq!(o1.get_or_try_insert_with(|| number.parse()).copied(), Ok(12345)); - /// assert!(o2.get_or_try_insert_with(|| number.parse()).is_err()); - /// assert_eq!(o1, Some(12345)); - /// assert_eq!(o2, None); - /// ``` - #[inline] - #[unstable(feature = "option_get_or_try_insert_with", issue = "143648")] - pub fn get_or_try_insert_with<'a, R, F>( - &'a mut self, - f: F, - ) -> >::TryType - where - F: FnOnce() -> R, - R: Try>, - { - if let None = self { - *self = Some(f()?); - } - // SAFETY: a `None` variant for `self` would have been replaced by a `Some` - // variant in the code above. - - Try::from_output(unsafe { self.as_mut().unwrap_unchecked() }) - } - ///////////////////////////////////////////////////////////////////////// // Misc ///////////////////////////////////////////////////////////////////////// @@ -2300,8 +2257,7 @@ impl const Default for Option { } #[stable(feature = "rust1", since = "1.0.0")] -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -impl const IntoIterator for Option { +impl IntoIterator for Option { type Item = T; type IntoIter = IntoIter; @@ -2473,8 +2429,7 @@ struct Item { opt: Option, } -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -impl const Iterator for Item { +impl Iterator for Item { type Item = A; #[inline] @@ -2484,7 +2439,7 @@ impl const Iterator for Item { #[inline] fn size_hint(&self) -> (usize, Option) { - let len = self.opt.len(); + let len = self.len(); (len, Some(len)) } } @@ -2608,8 +2563,7 @@ pub struct IntoIter { } #[stable(feature = "rust1", since = "1.0.0")] -#[rustc_const_unstable(feature = "const_iter", issue = "92476")] -impl const Iterator for IntoIter { +impl Iterator for IntoIter { type Item = A; #[inline] diff --git a/library/core/src/ptr/alignment.rs b/library/core/src/ptr/alignment.rs index 7c34b026e14be..42c95e6c9cd25 100644 --- a/library/core/src/ptr/alignment.rs +++ b/library/core/src/ptr/alignment.rs @@ -13,12 +13,7 @@ use crate::{cmp, fmt, hash, mem, num}; #[unstable(feature = "ptr_alignment_type", issue = "102070")] #[derive(Copy, Clone, PartialEq, Eq)] #[repr(transparent)] -pub struct Alignment { - // This field is never used directly (nor is the enum), - // as it's just there to convey the validity invariant. - // (Hopefully it'll eventually be a pattern type instead.) - _inner_repr_trick: AlignmentEnum, -} +pub struct Alignment(AlignmentEnum); // Alignment is `repr(usize)`, but via extra steps. const _: () = assert!(size_of::() == size_of::()); @@ -42,7 +37,7 @@ impl Alignment { /// assert_eq!(Alignment::MIN.as_usize(), 1); /// ``` #[unstable(feature = "ptr_alignment_type", issue = "102070")] - pub const MIN: Self = Self::new(1).unwrap(); + pub const MIN: Self = Self(AlignmentEnum::_Align1Shl0); /// Returns the alignment for a type. /// @@ -171,10 +166,7 @@ impl Alignment { #[unstable(feature = "ptr_alignment_type", issue = "102070")] #[inline] pub const fn as_usize(self) -> usize { - // Going through `as_nonzero` helps this be more clearly the inverse of - // `new_unchecked`, letting MIR optimizations fold it away. - - self.as_nonzero().get() + self.0 as usize } /// Returns the alignment as a [NonZero]<[usize]>. diff --git a/library/core/src/ptr/const_ptr.rs b/library/core/src/ptr/const_ptr.rs index 2566d1471ab7f..00b71f9a997c4 100644 --- a/library/core/src/ptr/const_ptr.rs +++ b/library/core/src/ptr/const_ptr.rs @@ -1386,43 +1386,6 @@ impl *const T { pub const fn cast_uninit(self) -> *const MaybeUninit { self as _ } - - /// Forms a raw slice from a pointer and a length. - /// - /// The `len` argument is the number of **elements**, not the number of bytes. - /// - /// This function is safe, but actually using the return value is unsafe. - /// See the documentation of [`slice::from_raw_parts`] for slice safety requirements. - /// - /// [`slice::from_raw_parts`]: crate::slice::from_raw_parts - /// - /// # Examples - /// - /// ```rust - /// #![feature(ptr_cast_slice)] - /// // create a slice pointer when starting out with a pointer to the first element - /// let x = [5, 6, 7]; - /// let raw_pointer = x.as_ptr(); - /// let slice = raw_pointer.cast_slice(3); - /// assert_eq!(unsafe { &*slice }[2], 7); - /// ``` - /// - /// You must ensure that the pointer is valid and not null before dereferencing - /// the raw slice. A slice reference must never have a null pointer, even if it's empty. - /// - /// ```rust,should_panic - /// #![feature(ptr_cast_slice)] - /// use std::ptr; - /// let danger: *const [u8] = ptr::null::().cast_slice(0); - /// unsafe { - /// danger.as_ref().expect("references must not be null"); - /// } - /// ``` - #[inline] - #[unstable(feature = "ptr_cast_slice", issue = "149103")] - pub const fn cast_slice(self, len: usize) -> *const [T] { - slice_from_raw_parts(self, len) - } } impl *const MaybeUninit { /// Casts from a maybe-uninitialized type to its initialized version. diff --git a/library/core/src/ptr/mut_ptr.rs b/library/core/src/ptr/mut_ptr.rs index 20e71bc2a1a56..11e0a83bd7ec0 100644 --- a/library/core/src/ptr/mut_ptr.rs +++ b/library/core/src/ptr/mut_ptr.rs @@ -1655,51 +1655,6 @@ impl *mut T { pub const fn cast_uninit(self) -> *mut MaybeUninit { self as _ } - - /// Forms a raw mutable slice from a pointer and a length. - /// - /// The `len` argument is the number of **elements**, not the number of bytes. - /// - /// Performs the same functionality as [`cast_slice`] on a `*const T`, except that a - /// raw mutable slice is returned, as opposed to a raw immutable slice. - /// - /// This function is safe, but actually using the return value is unsafe. - /// See the documentation of [`slice::from_raw_parts_mut`] for slice safety requirements. - /// - /// [`slice::from_raw_parts_mut`]: crate::slice::from_raw_parts_mut - /// [`cast_slice`]: pointer::cast_slice - /// - /// # Examples - /// - /// ```rust - /// #![feature(ptr_cast_slice)] - /// - /// let x = &mut [5, 6, 7]; - /// let slice = x.as_mut_ptr().cast_slice(3); - /// - /// unsafe { - /// (*slice)[2] = 99; // assign a value at an index in the slice - /// }; - /// - /// assert_eq!(unsafe { &*slice }[2], 99); - /// ``` - /// - /// You must ensure that the pointer is valid and not null before dereferencing - /// the raw slice. A slice reference must never have a null pointer, even if it's empty. - /// - /// ```rust,should_panic - /// #![feature(ptr_cast_slice)] - /// use std::ptr; - /// let danger: *mut [u8] = ptr::null_mut::().cast_slice(0); - /// unsafe { - /// danger.as_mut().expect("references must not be null"); - /// } - /// ``` - #[inline] - #[unstable(feature = "ptr_cast_slice", issue = "149103")] - pub const fn cast_slice(self, len: usize) -> *mut [T] { - slice_from_raw_parts_mut(self, len) - } } impl *mut MaybeUninit { /// Casts from a maybe-uninitialized type to its initialized version. diff --git a/library/core/src/ptr/non_null.rs b/library/core/src/ptr/non_null.rs index 7b9e638289bf0..cb43d095f5d1a 100644 --- a/library/core/src/ptr/non_null.rs +++ b/library/core/src/ptr/non_null.rs @@ -1377,35 +1377,6 @@ impl NonNull { pub const fn cast_uninit(self) -> NonNull> { self.cast() } - - /// Creates a non-null raw slice from a thin pointer and a length. - /// - /// The `len` argument is the number of **elements**, not the number of bytes. - /// - /// This function is safe, but dereferencing the return value is unsafe. - /// See the documentation of [`slice::from_raw_parts`] for slice safety requirements. - /// - /// # Examples - /// - /// ```rust - /// #![feature(ptr_cast_slice)] - /// use std::ptr::NonNull; - /// - /// // create a slice pointer when starting out with a pointer to the first element - /// let mut x = [5, 6, 7]; - /// let nonnull_pointer = NonNull::new(x.as_mut_ptr()).unwrap(); - /// let slice = nonnull_pointer.cast_slice(3); - /// assert_eq!(unsafe { slice.as_ref()[2] }, 7); - /// ``` - /// - /// (Note that this example artificially demonstrates a use of this method, - /// but `let slice = NonNull::from(&x[..]);` would be a better way to write code like this.) - #[inline] - #[must_use] - #[unstable(feature = "ptr_cast_slice", issue = "149103")] - pub const fn cast_slice(self, len: usize) -> NonNull<[T]> { - NonNull::slice_from_raw_parts(self, len) - } } impl NonNull> { /// Casts from a maybe-uninitialized type to its initialized version. diff --git a/library/core/src/slice/index.rs b/library/core/src/slice/index.rs index 59802989c18fb..d8ed521f44353 100644 --- a/library/core/src/slice/index.rs +++ b/library/core/src/slice/index.rs @@ -910,7 +910,29 @@ where R: [const] ops::RangeBounds + [const] Destruct, { let len = bounds.end; - into_slice_range(len, (range.start_bound().copied(), range.end_bound().copied())) + + let end = match range.end_bound() { + ops::Bound::Included(&end) if end >= len => slice_index_fail(0, end, len), + // Cannot overflow because `end < len` implies `end < usize::MAX`. + ops::Bound::Included(&end) => end + 1, + + ops::Bound::Excluded(&end) if end > len => slice_index_fail(0, end, len), + ops::Bound::Excluded(&end) => end, + ops::Bound::Unbounded => len, + }; + + let start = match range.start_bound() { + ops::Bound::Excluded(&start) if start >= end => slice_index_fail(start, end, len), + // Cannot overflow because `start < end` implies `start < usize::MAX`. + ops::Bound::Excluded(&start) => start + 1, + + ops::Bound::Included(&start) if start > end => slice_index_fail(start, end, len), + ops::Bound::Included(&start) => start, + + ops::Bound::Unbounded => 0, + }; + + ops::Range { start, end } } /// Performs bounds checking of a range without panicking. @@ -950,8 +972,20 @@ where R: ops::RangeBounds, { let len = bounds.end; - let r = into_range(len, (range.start_bound().copied(), range.end_bound().copied()))?; - if r.start > r.end || r.end > len { None } else { Some(r) } + + let start = match range.start_bound() { + ops::Bound::Included(&start) => start, + ops::Bound::Excluded(start) => start.checked_add(1)?, + ops::Bound::Unbounded => 0, + }; + + let end = match range.end_bound() { + ops::Bound::Included(end) => end.checked_add(1)?, + ops::Bound::Excluded(&end) => end, + ops::Bound::Unbounded => len, + }; + + if start > end || end > len { None } else { Some(ops::Range { start, end }) } } /// Converts a pair of `ops::Bound`s into `ops::Range` without performing any @@ -977,7 +1011,6 @@ pub(crate) const fn into_range_unchecked( /// Converts pair of `ops::Bound`s into `ops::Range`. /// Returns `None` on overflowing indices. #[rustc_const_unstable(feature = "const_range", issue = "none")] -#[inline] pub(crate) const fn into_range( len: usize, (start, end): (ops::Bound, ops::Bound), @@ -1003,8 +1036,7 @@ pub(crate) const fn into_range( /// Converts pair of `ops::Bound`s into `ops::Range`. /// Panics on overflowing indices. -#[inline] -pub(crate) const fn into_slice_range( +pub(crate) fn into_slice_range( len: usize, (start, end): (ops::Bound, ops::Bound), ) -> ops::Range { diff --git a/library/core/src/slice/mod.rs b/library/core/src/slice/mod.rs index 36dd4d6782ac1..139d2a4b42729 100644 --- a/library/core/src/slice/mod.rs +++ b/library/core/src/slice/mod.rs @@ -3939,219 +3939,6 @@ impl [T] { } } - /// Moves the elements of this slice `N` places to the left, returning the ones - /// that "fall off" the front, and putting `inserted` at the end. - /// - /// Equivalently, you can think of concatenating `self` and `inserted` into one - /// long sequence, then returning the left-most `N` items and the rest into `self`: - /// - /// ```text - /// self (before) inserted - /// vvvvvvvvvvvvvvv vvv - /// [1, 2, 3, 4, 5] [9] - /// ↙ ↙ ↙ ↙ ↙ ↙ - /// [1] [2, 3, 4, 5, 9] - /// ^^^ ^^^^^^^^^^^^^^^ - /// returned self (after) - /// ``` - /// - /// See also [`Self::shift_right`] and compare [`Self::rotate_left`]. - /// - /// # Examples - /// - /// ``` - /// #![feature(slice_shift)] - /// - /// // Same as the diagram above - /// let mut a = [1, 2, 3, 4, 5]; - /// let inserted = [9]; - /// let returned = a.shift_left(inserted); - /// assert_eq!(returned, [1]); - /// assert_eq!(a, [2, 3, 4, 5, 9]); - /// - /// // You can shift multiple items at a time - /// let mut a = *b"Hello world"; - /// assert_eq!(a.shift_left(*b" peace"), *b"Hello "); - /// assert_eq!(a, *b"world peace"); - /// - /// // The name comes from this operation's similarity to bitshifts - /// let mut a: u8 = 0b10010110; - /// a <<= 3; - /// assert_eq!(a, 0b10110000_u8); - /// let mut a: [_; 8] = [1, 0, 0, 1, 0, 1, 1, 0]; - /// a.shift_left([0; 3]); - /// assert_eq!(a, [1, 0, 1, 1, 0, 0, 0, 0]); - /// - /// // Remember you can sub-slice to affect less that the whole slice. - /// // For example, this is similar to `.remove(1)` + `.insert(4, 'Z')` - /// let mut a = ['a', 'b', 'c', 'd', 'e', 'f']; - /// assert_eq!(a[1..=4].shift_left(['Z']), ['b']); - /// assert_eq!(a, ['a', 'c', 'd', 'e', 'Z', 'f']); - /// - /// // If the size matches it's equivalent to `mem::replace` - /// let mut a = [1, 2, 3]; - /// assert_eq!(a.shift_left([7, 8, 9]), [1, 2, 3]); - /// assert_eq!(a, [7, 8, 9]); - /// - /// // Some of the "inserted" elements end up returned if the slice is too short - /// let mut a = []; - /// assert_eq!(a.shift_left([1, 2, 3]), [1, 2, 3]); - /// let mut a = [9]; - /// assert_eq!(a.shift_left([1, 2, 3]), [9, 1, 2]); - /// assert_eq!(a, [3]); - /// ``` - #[unstable(feature = "slice_shift", issue = "151772")] - pub const fn shift_left(&mut self, inserted: [T; N]) -> [T; N] { - if let Some(shift) = self.len().checked_sub(N) { - // SAFETY: Having just checked that the inserted/returned arrays are - // shorter than (or the same length as) the slice: - // 1. The read for the items to return is in-bounds - // 2. We can `memmove` the slice over to cover the items we're returning - // to ensure those aren't double-dropped - // 3. Then we write (in-bounds for the same reason as the read) the - // inserted items atop the items of the slice that we just duplicated - // - // And none of this can panic, so there's no risk of intermediate unwinds. - unsafe { - let ptr = self.as_mut_ptr(); - let returned = ptr.cast_array::().read(); - ptr.copy_from(ptr.add(N), shift); - ptr.add(shift).cast_array::().write(inserted); - returned - } - } else { - // SAFETY: Having checked that the slice is strictly shorter than the - // inserted/returned arrays, it means we'll be copying the whole slice - // into the returned array, but that's not enough on its own. We also - // need to copy some of the inserted array into the returned array, - // with the rest going into the slice. Because `&mut` is exclusive - // and we own both `inserted` and `returned`, they're all disjoint - // allocations from each other as we can use `nonoverlapping` copies. - // - // We avoid double-frees by `ManuallyDrop`ing the inserted items, - // since we always copy them to other locations that will drop them - // instead. Plus nothing in here can panic -- it's just memcpy three - // times -- so there's no intermediate unwinds to worry about. - unsafe { - let len = self.len(); - let slice = self.as_mut_ptr(); - let inserted = mem::ManuallyDrop::new(inserted); - let inserted = (&raw const inserted).cast::(); - - let mut returned = MaybeUninit::<[T; N]>::uninit(); - let ptr = returned.as_mut_ptr().cast::(); - ptr.copy_from_nonoverlapping(slice, len); - ptr.add(len).copy_from_nonoverlapping(inserted, N - len); - slice.copy_from_nonoverlapping(inserted.add(N - len), len); - returned.assume_init() - } - } - } - - /// Moves the elements of this slice `N` places to the right, returning the ones - /// that "fall off" the back, and putting `inserted` at the beginning. - /// - /// Equivalently, you can think of concatenating `inserted` and `self` into one - /// long sequence, then returning the right-most `N` items and the rest into `self`: - /// - /// ```text - /// inserted self (before) - /// vvv vvvvvvvvvvvvvvv - /// [0] [5, 6, 7, 8, 9] - /// ↘ ↘ ↘ ↘ ↘ ↘ - /// [0, 5, 6, 7, 8] [9] - /// ^^^^^^^^^^^^^^^ ^^^ - /// self (after) returned - /// ``` - /// - /// See also [`Self::shift_left`] and compare [`Self::rotate_right`]. - /// - /// # Examples - /// - /// ``` - /// #![feature(slice_shift)] - /// - /// // Same as the diagram above - /// let mut a = [5, 6, 7, 8, 9]; - /// let inserted = [0]; - /// let returned = a.shift_right(inserted); - /// assert_eq!(returned, [9]); - /// assert_eq!(a, [0, 5, 6, 7, 8]); - /// - /// // The name comes from this operation's similarity to bitshifts - /// let mut a: u8 = 0b10010110; - /// a >>= 3; - /// assert_eq!(a, 0b00010010_u8); - /// let mut a: [_; 8] = [1, 0, 0, 1, 0, 1, 1, 0]; - /// a.shift_right([0; 3]); - /// assert_eq!(a, [0, 0, 0, 1, 0, 0, 1, 0]); - /// - /// // Remember you can sub-slice to affect less that the whole slice. - /// // For example, this is similar to `.remove(4)` + `.insert(1, 'Z')` - /// let mut a = ['a', 'b', 'c', 'd', 'e', 'f']; - /// assert_eq!(a[1..=4].shift_right(['Z']), ['e']); - /// assert_eq!(a, ['a', 'Z', 'b', 'c', 'd', 'f']); - /// - /// // If the size matches it's equivalent to `mem::replace` - /// let mut a = [1, 2, 3]; - /// assert_eq!(a.shift_right([7, 8, 9]), [1, 2, 3]); - /// assert_eq!(a, [7, 8, 9]); - /// - /// // Some of the "inserted" elements end up returned if the slice is too short - /// let mut a = []; - /// assert_eq!(a.shift_right([1, 2, 3]), [1, 2, 3]); - /// let mut a = [9]; - /// assert_eq!(a.shift_right([1, 2, 3]), [2, 3, 9]); - /// assert_eq!(a, [1]); - /// ``` - #[unstable(feature = "slice_shift", issue = "151772")] - pub const fn shift_right(&mut self, inserted: [T; N]) -> [T; N] { - if let Some(shift) = self.len().checked_sub(N) { - // SAFETY: Having just checked that the inserted/returned arrays are - // shorter than (or the same length as) the slice: - // 1. The read for the items to return is in-bounds - // 2. We can `memmove` the slice over to cover the items we're returning - // to ensure those aren't double-dropped - // 3. Then we write (in-bounds for the same reason as the read) the - // inserted items atop the items of the slice that we just duplicated - // - // And none of this can panic, so there's no risk of intermediate unwinds. - unsafe { - let ptr = self.as_mut_ptr(); - let returned = ptr.add(shift).cast_array::().read(); - ptr.add(N).copy_from(ptr, shift); - ptr.cast_array::().write(inserted); - returned - } - } else { - // SAFETY: Having checked that the slice is strictly shorter than the - // inserted/returned arrays, it means we'll be copying the whole slice - // into the returned array, but that's not enough on its own. We also - // need to copy some of the inserted array into the returned array, - // with the rest going into the slice. Because `&mut` is exclusive - // and we own both `inserted` and `returned`, they're all disjoint - // allocations from each other as we can use `nonoverlapping` copies. - // - // We avoid double-frees by `ManuallyDrop`ing the inserted items, - // since we always copy them to other locations that will drop them - // instead. Plus nothing in here can panic -- it's just memcpy three - // times -- so there's no intermediate unwinds to worry about. - unsafe { - let len = self.len(); - let slice = self.as_mut_ptr(); - let inserted = mem::ManuallyDrop::new(inserted); - let inserted = (&raw const inserted).cast::(); - - let mut returned = MaybeUninit::<[T; N]>::uninit(); - let ptr = returned.as_mut_ptr().cast::(); - ptr.add(N - len).copy_from_nonoverlapping(slice, len); - ptr.copy_from_nonoverlapping(inserted.add(len), N - len); - slice.copy_from_nonoverlapping(inserted, len); - returned.assume_init() - } - } - } - /// Fills `self` with elements by cloning `value`. /// /// # Examples @@ -4656,6 +4443,7 @@ impl [T] { where Simd: AsRef<[T; LANES]>, T: simd::SimdElement, + simd::LaneCount: simd::SupportedLaneCount, { // These are expected to always match, as vector types are laid out like // arrays per , but we @@ -4691,6 +4479,7 @@ impl [T] { where Simd: AsMut<[T; LANES]>, T: simd::SimdElement, + simd::LaneCount: simd::SupportedLaneCount, { // These are expected to always match, as vector types are laid out like // arrays per , but we diff --git a/library/coretests/tests/iter/mod.rs b/library/coretests/tests/iter/mod.rs index f300f421f7c13..5b2769d04698d 100644 --- a/library/coretests/tests/iter/mod.rs +++ b/library/coretests/tests/iter/mod.rs @@ -99,18 +99,3 @@ pub fn extend_for_unit() { } assert_eq!(x, 5); } - -#[test] -pub fn test_const_iter() { - const X: bool = { - let it = Some(42); - let mut run = false; - #[expect(for_loops_over_fallibles)] - for x in it { - assert!(x == 42); - run = true; - } - run - }; - assert_eq!(true, X); -} diff --git a/library/coretests/tests/lib.rs b/library/coretests/tests/lib.rs index 9054eada12fb7..8cca714b73933 100644 --- a/library/coretests/tests/lib.rs +++ b/library/coretests/tests/lib.rs @@ -27,7 +27,6 @@ #![feature(const_drop_in_place)] #![feature(const_eval_select)] #![feature(const_index)] -#![feature(const_iter)] #![feature(const_ops)] #![feature(const_option_ops)] #![feature(const_ref_cell)] @@ -102,7 +101,6 @@ #![feature(slice_index_methods)] #![feature(slice_internals)] #![feature(slice_partition_dedup)] -#![feature(slice_shift)] #![feature(slice_split_once)] #![feature(sliceindex_wrappers)] #![feature(split_array)] diff --git a/library/coretests/tests/mem/type_info.rs b/library/coretests/tests/mem/type_info.rs index 87f2d5dd8289c..3efb39f79955e 100644 --- a/library/coretests/tests/mem/type_info.rs +++ b/library/coretests/tests/mem/type_info.rs @@ -292,3 +292,16 @@ fn test_dynamic_traits() { assert!(sync.trait_ty.is_auto); } } + +#[test] +fn test_implements_trait() { + struct Garlic; + trait Blah {} + impl Blah for Garlic {} + + const { + assert!(TypeId::of::().info().has_trait::()); + assert!(TypeId::of::().info().has_trait::()); + assert!(!TypeId::of::<*const Box>().info().has_trait::()); + } +} diff --git a/library/coretests/tests/slice.rs b/library/coretests/tests/slice.rs index 2bb62f36bb0e6..6f60f71e8a477 100644 --- a/library/coretests/tests/slice.rs +++ b/library/coretests/tests/slice.rs @@ -2507,41 +2507,3 @@ fn test_slice_from_raw_parts_in_const() { assert_eq!(EMPTY_SLICE.as_ptr().addr(), 123456); assert_eq!(EMPTY_SLICE.len(), 0); } - -#[test] -fn test_shift_left() { - #[track_caller] - fn case( - mut a: [i32; M], - i: [i32; N], - j: [i32; N], - b: [i32; M], - ) { - assert_eq!((a.shift_left(i), a), (j, b)); - } - case([], [1, 2, 3, 4, 5], [1, 2, 3, 4, 5], []); - case([1], [2, 3, 4, 5], [1, 2, 3, 4], [5]); - case([1, 2], [3, 4, 5], [1, 2, 3], [4, 5]); - case([1, 2, 3], [4, 5], [1, 2], [3, 4, 5]); - case([1, 2, 3, 4], [5], [1], [2, 3, 4, 5]); - case([1, 2, 3, 4, 5], [], [], [1, 2, 3, 4, 5]); -} - -#[test] -fn test_shift_right() { - #[track_caller] - fn case( - i: [i32; N], - mut a: [i32; M], - b: [i32; M], - j: [i32; N], - ) { - assert_eq!((a.shift_right(i), a), (j, b)); - } - case([], [1, 2, 3, 4, 5], [1, 2, 3, 4, 5], []); - case([1], [2, 3, 4, 5], [1, 2, 3, 4], [5]); - case([1, 2], [3, 4, 5], [1, 2, 3], [4, 5]); - case([1, 2, 3], [4, 5], [1, 2], [3, 4, 5]); - case([1, 2, 3, 4], [5], [1], [2, 3, 4, 5]); - case([1, 2, 3, 4, 5], [], [], [1, 2, 3, 4, 5]); -} diff --git a/library/portable-simd/.github/workflows/ci.yml b/library/portable-simd/.github/workflows/ci.yml index de7efa3552836..3984d8f0d8d99 100644 --- a/library/portable-simd/.github/workflows/ci.yml +++ b/library/portable-simd/.github/workflows/ci.yml @@ -59,7 +59,7 @@ jobs: strategy: fail-fast: false matrix: - target: [x86_64-pc-windows-msvc, i686-pc-windows-msvc, x86_64-unknown-linux-gnu] + target: [x86_64-pc-windows-msvc, i686-pc-windows-msvc, i586-pc-windows-msvc, x86_64-unknown-linux-gnu] # `default` means we use the default target config for the target, # `native` means we run with `-Ctarget-cpu=native`, and anything else is # an arg to `-Ctarget-feature` @@ -68,12 +68,18 @@ jobs: exclude: # -Ctarget-cpu=native sounds like bad-news if target != host - { target: i686-pc-windows-msvc, target_feature: native } + - { target: i586-pc-windows-msvc, target_feature: native } include: # Populate the `matrix.os` field - { target: x86_64-unknown-linux-gnu, os: ubuntu-latest } - { target: x86_64-pc-windows-msvc, os: windows-latest } - { target: i686-pc-windows-msvc, os: windows-latest } + - { target: i586-pc-windows-msvc, os: windows-latest } + + # These are globally available on all the other targets. + - { target: i586-pc-windows-msvc, target_feature: +sse, os: windows-latest } + - { target: i586-pc-windows-msvc, target_feature: +sse2, os: windows-latest } # Annoyingly, the x86_64-unknown-linux-gnu runner *almost* always has # avx512vl, but occasionally doesn't. Maybe one day we can enable it. @@ -123,7 +129,7 @@ jobs: run: cargo doc --verbose --target=${{ matrix.target }} env: RUSTDOCFLAGS: -Dwarnings - + macos-tests: name: ${{ matrix.target }} runs-on: macos-latest @@ -240,18 +246,9 @@ jobs: miri: runs-on: ubuntu-latest - strategy: - fail-fast: false - matrix: - shard: [1, 2, 3, 4] env: PROPTEST_CASES: 16 steps: - uses: actions/checkout@v4 - - - name: Install cargo-nextest - uses: taiki-e/install-action@nextest - - - name: Test (Miri) (partition ${{ matrix.shard }}/4) - run: | - cargo miri nextest run --partition count:${{ matrix.shard }}/4 + - name: Test (Miri) + run: cargo miri test diff --git a/library/portable-simd/Cargo.lock b/library/portable-simd/Cargo.lock index 5a5f0d8907ae3..1584c704fb221 100644 --- a/library/portable-simd/Cargo.lock +++ b/library/portable-simd/Cargo.lock @@ -1,12 +1,12 @@ # This file is automatically @generated by Cargo. # It is not intended for manual editing. -version = 4 +version = 3 [[package]] name = "autocfg" -version = "1.5.0" +version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8" +checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" [[package]] name = "bitflags" @@ -16,30 +16,31 @@ checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" [[package]] name = "bumpalo" -version = "3.19.0" +version = "3.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "46c5e41b57b8bba42a04676d81cb89e9ee8e859a1a66f80a5a72e1cb76b34d43" +checksum = "a3e2c3daef883ecc1b5d58c15adae93470a91d425f3532ba1695849656af3fc1" [[package]] name = "byteorder" -version = "1.5.0" +version = "1.4.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b" +checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610" [[package]] -name = "cc" -version = "1.2.33" +name = "cfg-if" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3ee0f8803222ba5a7e2777dd72ca451868909b1ac410621b676adf07280e9b5f" -dependencies = [ - "shlex", -] +checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] -name = "cfg-if" -version = "1.0.1" +name = "console_error_panic_hook" +version = "0.1.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9555578bc9e57714c812a1f84e4fc5b4d21fcb063490c624de019f7464c91268" +checksum = "a06aeb73f470f66dcdbf7223caeebb85984942f22f1adb2a088cf9668146bbbc" +dependencies = [ + "cfg-if", + "wasm-bindgen", +] [[package]] name = "core_simd" @@ -52,70 +53,47 @@ dependencies = [ "wasm-bindgen-test", ] -[[package]] -name = "float-cmp" -version = "0.10.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b09cf3155332e944990140d967ff5eceb70df778b34f77d8075db46e4704e6d8" -dependencies = [ - "num-traits", -] - [[package]] name = "js-sys" -version = "0.3.77" +version = "0.3.64" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1cfaf33c695fc6e08064efbc1f72ec937429614f25eef83af942d0e227c3a28f" +checksum = "c5f195fe497f702db0f318b07fdd68edb16955aed830df8363d837542f8f935a" dependencies = [ - "once_cell", "wasm-bindgen", ] [[package]] name = "log" -version = "0.4.27" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "13dc2df351e3202783a1fe0d44375f7295ffb4049267b0f3018346dc122a1d94" - -[[package]] -name = "minicov" -version = "0.3.7" +version = "0.4.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f27fe9f1cc3c22e1687f9446c2083c4c5fc7f0bcf1c7a86bdbded14985895b4b" -dependencies = [ - "cc", - "walkdir", -] +checksum = "b5e6163cb8c49088c2c36f57875e58ccd8c87c7427f7fbd50ea6710b2f3f2e8f" [[package]] name = "num-traits" -version = "0.2.19" +version = "0.2.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "071dfc062690e90b734c0b2273ce72ad0ffa95f0c74596bc250dcfd960262841" +checksum = "f30b0abd723be7e2ffca1272140fac1a2f084c77ec3e123c192b66af1ee9e6c2" dependencies = [ "autocfg", ] [[package]] name = "once_cell" -version = "1.21.3" +version = "1.18.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" +checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "ppv-lite86" -version = "0.2.21" +version = "0.2.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "85eae3c4ed2f50dcfe72643da4befc30deadb458a9b590d720cde2f2b1e97da9" -dependencies = [ - "zerocopy", -] +checksum = "5b40af805b3121feab8a3c29f04d8ad262fa8e0561883e7653e024ae4479e6de" [[package]] name = "proc-macro2" -version = "1.0.101" +version = "1.0.66" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "89ae43fd86e4158d6db51ad8e2b80f313af9cc74f5c0e03ccb87de09998732de" +checksum = "18fb31db3f9bddb2ea821cde30a9f70117e3f119938b5ee630b7403aa6e2ead9" dependencies = [ "unicode-ident", ] @@ -136,9 +114,9 @@ dependencies = [ [[package]] name = "quote" -version = "1.0.40" +version = "1.0.33" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1885c039570dc00dcb4ff087a89e185fd56bae234ddc7f056a945bf36467248d" +checksum = "5267fca4496028628a95160fc423a33e8b2e6af8a5302579e322e4b520293cae" dependencies = [ "proc-macro2", ] @@ -189,25 +167,10 @@ dependencies = [ ] [[package]] -name = "rustversion" -version = "1.0.22" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b39cdef0fa800fc44525c84ccb54a029961a8215f9619753635a9c0d2538d46d" - -[[package]] -name = "same-file" -version = "1.0.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "93fc1dc3aaa9bfed95e02e6eadabb4baf7e3078b0bd1b4d7b6b0b68378900502" -dependencies = [ - "winapi-util", -] - -[[package]] -name = "shlex" -version = "1.3.0" +name = "scoped-tls" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" +checksum = "e1cf6437eb19a8f4a6cc0f7dca544973b0b78843adbfeb3683d1a94a0024a294" [[package]] name = "std_float" @@ -221,9 +184,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.106" +version = "2.0.29" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ede7c438028d4436d71104916910f5bb611972c5cfd7f89b8300a8186e6fada6" +checksum = "c324c494eba9d92503e6f1ef2e6df781e78f6a7705a0202d9801b198807d518a" dependencies = [ "proc-macro2", "quote", @@ -234,46 +197,34 @@ dependencies = [ name = "test_helpers" version = "0.1.0" dependencies = [ - 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"once_cell", "wasm-bindgen", "web-sys", ] [[package]] name = "wasm-bindgen-macro" -version = "0.2.100" +version = "0.2.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7fe63fc6d09ed3792bd0897b314f53de8e16568c2b3f7982f468c0bf9bd0b407" +checksum = "dee495e55982a3bd48105a7b947fd2a9b4a8ae3010041b9e0faab3f9cd028f1d" dependencies = [ "quote", "wasm-bindgen-macro-support", @@ -305,9 +255,9 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro-support" -version = "0.2.100" +version = "0.2.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8ae87ea40c9f689fc23f209965b6fb8a99ad69aeeb0231408be24920604395de" +checksum = "54681b18a46765f095758388f2d0cf16eb8d4169b639ab575a8f5693af210c7b" dependencies = [ "proc-macro2", "quote", @@ -318,21 +268,19 @@ dependencies = [ [[package]] name = "wasm-bindgen-shared" -version = "0.2.100" +version = "0.2.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1a05d73b933a847d6cccdda8f838a22ff101ad9bf93e33684f39c1f5f0eece3d" -dependencies = [ - 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It can also be used to describe "scalar operations" that use strictly scalar values, like addition. This term is mostly used to differentiate between vectorized operations that use SIMD instructions and scalar operations that don't. -* **Lane:** A single element position within a vector is called a lane. If you have `N` lanes available then they're numbered from `0` to `N-1` when referring to them, again like an array. The biggest difference between an array element and a vector lane is that in general it is *relatively costly* to access an individual lane value. On most architectures, the vector has to be pushed out of the SIMD register onto the stack, then an individual lane is accessed while it's on the stack (and possibly the stack value is read back into a register). For this reason, when working with SIMD you should avoid reading or writing the value of an individual lane during hot loops. +* **Lane:** A single element position within a vector is called a lane. If you have `N` lanes available then they're numbered from `0` to `N-1` when referring to them, again like an array. The biggest difference between an array element and a vector lane is that in general is *relatively costly* to access an individual lane value. On most architectures, the vector has to be pushed out of the SIMD register onto the stack, then an individual lane is accessed while it's on the stack (and possibly the stack value is read back into a register). For this reason, when working with SIMD you should avoid reading or writing the value of an individual lane during hot loops. * **Bit Widths:** When talking about SIMD, the bit widths used are the bit size of the vectors involved, *not* the individual elements. So "128-bit SIMD" has 128-bit vectors, and that might be `f32x4`, `i32x4`, `i16x8`, or other variations. While 128-bit SIMD is the most common, there's also 64-bit, 256-bit, and even 512-bit on the newest CPUs. diff --git a/library/portable-simd/crates/core_simd/examples/dot_product.rs b/library/portable-simd/crates/core_simd/examples/dot_product.rs index 4ef32bfa60b5e..75d152ae7f0e3 100644 --- a/library/portable-simd/crates/core_simd/examples/dot_product.rs +++ b/library/portable-simd/crates/core_simd/examples/dot_product.rs @@ -1,6 +1,8 @@ //! Code taken from the `packed_simd` crate. //! Run this code with `cargo test --example dot_product`. +#![feature(array_chunks)] +#![feature(slice_as_chunks)] // Add these imports to use the stdsimd library #![feature(portable_simd)] use core_simd::simd::prelude::*; @@ -31,7 +33,7 @@ pub fn dot_prod_scalar_1(a: &[f32], b: &[f32]) -> f32 { } // We now move on to the SIMD implementations: notice the following constructs: -// `as_chunks::<4>`: mapping this over the vector will let us construct SIMD vectors +// `array_chunks::<4>`: mapping this over the vector will let use construct SIMD vectors // `f32x4::from_array`: construct the SIMD vector from a slice // `(a * b).reduce_sum()`: Multiply both f32x4 vectors together, and then reduce them. // This approach essentially uses SIMD to produce a vector of length N/4 of all the products, @@ -40,11 +42,9 @@ pub fn dot_prod_scalar_1(a: &[f32], b: &[f32]) -> f32 { pub fn dot_prod_simd_0(a: &[f32], b: &[f32]) -> f32 { assert_eq!(a.len(), b.len()); // TODO handle remainder when a.len() % 4 != 0 - a.as_chunks::<4>() - .0 - .iter() + a.array_chunks::<4>() .map(|&a| f32x4::from_array(a)) - .zip(b.as_chunks::<4>().0.iter().map(|&b| f32x4::from_array(b))) + .zip(b.array_chunks::<4>().map(|&b| f32x4::from_array(b))) .map(|(a, b)| (a * b).reduce_sum()) .sum() } @@ -60,11 +60,9 @@ pub fn dot_prod_simd_0(a: &[f32], b: &[f32]) -> f32 { pub fn dot_prod_simd_1(a: &[f32], b: &[f32]) -> f32 { assert_eq!(a.len(), b.len()); // TODO handle remainder when a.len() % 4 != 0 - a.as_chunks::<4>() - .0 - .iter() + a.array_chunks::<4>() .map(|&a| f32x4::from_array(a)) - .zip(b.as_chunks::<4>().0.iter().map(|&b| f32x4::from_array(b))) + .zip(b.array_chunks::<4>().map(|&b| f32x4::from_array(b))) .fold(f32x4::splat(0.0), |acc, zipped| acc + zipped.0 * zipped.1) .reduce_sum() } @@ -76,11 +74,9 @@ pub fn dot_prod_simd_2(a: &[f32], b: &[f32]) -> f32 { assert_eq!(a.len(), b.len()); // TODO handle remainder when a.len() % 4 != 0 let mut res = f32x4::splat(0.0); - a.as_chunks::<4>() - .0 - .iter() + a.array_chunks::<4>() .map(|&a| f32x4::from_array(a)) - .zip(b.as_chunks::<4>().0.iter().map(|&b| f32x4::from_array(b))) + .zip(b.array_chunks::<4>().map(|&b| f32x4::from_array(b))) .for_each(|(a, b)| { res = a.mul_add(b, res); }); @@ -117,11 +113,9 @@ pub fn dot_prod_simd_3(a: &[f32], b: &[f32]) -> f32 { // next example. pub fn dot_prod_simd_4(a: &[f32], b: &[f32]) -> f32 { let mut sum = a - .as_chunks::<4>() - .0 - .iter() + .array_chunks::<4>() .map(|&a| f32x4::from_array(a)) - .zip(b.as_chunks::<4>().0.iter().map(|&b| f32x4::from_array(b))) + .zip(b.array_chunks::<4>().map(|&b| f32x4::from_array(b))) .map(|(a, b)| a * b) .fold(f32x4::splat(0.0), std::ops::Add::add) .reduce_sum(); @@ -137,11 +131,9 @@ pub fn dot_prod_simd_4(a: &[f32], b: &[f32]) -> f32 { // This version allocates a single `XMM` register for accumulation, and the folds don't allocate on top of that. // Notice the use of `mul_add`, which can do a multiply and an add operation ber iteration. pub fn dot_prod_simd_5(a: &[f32], b: &[f32]) -> f32 { - a.as_chunks::<4>() - .0 - .iter() + a.array_chunks::<4>() .map(|&a| f32x4::from_array(a)) - .zip(b.as_chunks::<4>().0.iter().map(|&b| f32x4::from_array(b))) + .zip(b.array_chunks::<4>().map(|&b| f32x4::from_array(b))) .fold(f32x4::splat(0.), |acc, (a, b)| a.mul_add(b, acc)) .reduce_sum() } diff --git a/library/portable-simd/crates/core_simd/examples/matrix_inversion.rs b/library/portable-simd/crates/core_simd/examples/matrix_inversion.rs index ad2eea9153e08..bad86414401d7 100644 --- a/library/portable-simd/crates/core_simd/examples/matrix_inversion.rs +++ b/library/portable-simd/crates/core_simd/examples/matrix_inversion.rs @@ -1,7 +1,7 @@ //! 4x4 matrix inverse // Code ported from the `packed_simd` crate // Run this code with `cargo test --example matrix_inversion` -#![feature(portable_simd)] +#![feature(array_chunks, portable_simd)] use core_simd::simd::prelude::*; // Gotta define our own 4x4 matrix since Rust doesn't ship multidim arrays yet :^) diff --git a/library/portable-simd/crates/core_simd/src/fmt.rs b/library/portable-simd/crates/core_simd/src/fmt.rs index 90c520e75bb39..3a540f5a04908 100644 --- a/library/portable-simd/crates/core_simd/src/fmt.rs +++ b/library/portable-simd/crates/core_simd/src/fmt.rs @@ -1,8 +1,9 @@ -use crate::simd::{Simd, SimdElement}; +use crate::simd::{LaneCount, Simd, SimdElement, SupportedLaneCount}; use core::fmt; impl fmt::Debug for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + fmt::Debug, { /// A `Simd` has a debug format like the one for `[T]`: diff --git a/library/portable-simd/crates/core_simd/src/iter.rs b/library/portable-simd/crates/core_simd/src/iter.rs index fdc458efeda48..b3732fd74d5f6 100644 --- a/library/portable-simd/crates/core_simd/src/iter.rs +++ b/library/portable-simd/crates/core_simd/src/iter.rs @@ -1,4 +1,4 @@ -use crate::simd::Simd; +use crate::simd::{LaneCount, Simd, SupportedLaneCount}; use core::{ iter::{Product, Sum}, ops::{Add, Mul}, @@ -7,6 +7,8 @@ use core::{ macro_rules! impl_traits { { $type:ty } => { impl Sum for Simd<$type, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn sum>(iter: I) -> Self { @@ -15,6 +17,8 @@ macro_rules! impl_traits { } impl Product for Simd<$type, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn product>(iter: I) -> Self { @@ -23,6 +27,8 @@ macro_rules! impl_traits { } impl<'a, const N: usize> Sum<&'a Self> for Simd<$type, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn sum>(iter: I) -> Self { @@ -31,6 +37,8 @@ macro_rules! impl_traits { } impl<'a, const N: usize> Product<&'a Self> for Simd<$type, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn product>(iter: I) -> Self { diff --git a/library/portable-simd/crates/core_simd/src/lane_count.rs b/library/portable-simd/crates/core_simd/src/lane_count.rs new file mode 100644 index 0000000000000..bbdfd5f5f3ed3 --- /dev/null +++ b/library/portable-simd/crates/core_simd/src/lane_count.rs @@ -0,0 +1,40 @@ +mod sealed { + pub trait Sealed {} +} +use sealed::Sealed; + +/// Specifies the number of lanes in a SIMD vector as a type. +pub struct LaneCount; + +impl LaneCount { + /// The number of bytes in a bitmask with this many lanes. + pub const BITMASK_LEN: usize = N.div_ceil(8); +} + +/// Statically guarantees that a lane count is marked as supported. +/// +/// This trait is *sealed*: the list of implementors below is total. +/// Users do not have the ability to mark additional `LaneCount` values as supported. +/// Only SIMD vectors with supported lane counts are constructable. +pub trait SupportedLaneCount: Sealed { + #[doc(hidden)] + type BitMask: Copy + Default + AsRef<[u8]> + AsMut<[u8]>; +} + +impl Sealed for LaneCount {} + +macro_rules! supported_lane_count { + ($($lanes:literal),+) => { + $( + impl SupportedLaneCount for LaneCount<$lanes> { + type BitMask = [u8; ($lanes + 7) / 8]; + } + )+ + }; +} + +supported_lane_count!( + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, + 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64 +); diff --git a/library/portable-simd/crates/core_simd/src/lib.rs b/library/portable-simd/crates/core_simd/src/lib.rs index fe26d99b9194c..717b882b64ba1 100644 --- a/library/portable-simd/crates/core_simd/src/lib.rs +++ b/library/portable-simd/crates/core_simd/src/lib.rs @@ -9,8 +9,7 @@ simd_ffi, staged_api, prelude_import, - ptr_metadata, - rustc_attrs + ptr_metadata )] #![cfg_attr( all( @@ -31,6 +30,10 @@ any(target_arch = "powerpc", target_arch = "powerpc64"), feature(stdarch_powerpc) )] +#![cfg_attr( + all(target_arch = "x86_64", target_feature = "avx512f"), + feature(stdarch_x86_avx512) +)] #![warn(missing_docs, clippy::missing_inline_in_public_items)] // basically all items, really #![deny( unsafe_op_in_unsafe_fn, @@ -38,7 +41,7 @@ clippy::undocumented_unsafe_blocks )] #![doc(test(attr(deny(warnings))))] -#![allow(internal_features, clippy::repr_packed_without_abi)] +#![allow(internal_features)] #![unstable(feature = "portable_simd", issue = "86656")] //! Portable SIMD module. diff --git a/library/portable-simd/crates/core_simd/src/masks.rs b/library/portable-simd/crates/core_simd/src/masks.rs index 3e2209556b66b..19d45f4d3b31a 100644 --- a/library/portable-simd/crates/core_simd/src/masks.rs +++ b/library/portable-simd/crates/core_simd/src/masks.rs @@ -2,33 +2,20 @@ //! Types representing #![allow(non_camel_case_types)] -use crate::simd::{Select, Simd, SimdCast, SimdElement}; +#[cfg_attr( + not(all(target_arch = "x86_64", target_feature = "avx512f")), + path = "masks/full_masks.rs" +)] +#[cfg_attr( + all(target_arch = "x86_64", target_feature = "avx512f"), + path = "masks/bitmask.rs" +)] +mod mask_impl; + +use crate::simd::{LaneCount, Simd, SimdCast, SimdElement, SupportedLaneCount}; use core::cmp::Ordering; use core::{fmt, mem}; -pub(crate) trait FixEndianness { - fn fix_endianness(self) -> Self; -} - -macro_rules! impl_fix_endianness { - { $($int:ty),* } => { - $( - impl FixEndianness for $int { - #[inline(always)] - fn fix_endianness(self) -> Self { - if cfg!(target_endian = "big") { - <$int>::reverse_bits(self) - } else { - self - } - } - } - )* - } -} - -impl_fix_endianness! { u8, u16, u32, u64 } - mod sealed { use super::*; @@ -41,6 +28,7 @@ mod sealed { pub trait Sealed { fn valid(values: Simd) -> bool where + LaneCount: SupportedLaneCount, Self: SimdElement; fn eq(self, other: Self) -> bool; @@ -68,6 +56,8 @@ macro_rules! impl_element { impl Sealed for $ty { #[inline] fn valid(value: Simd) -> bool + where + LaneCount: SupportedLaneCount, { // We can't use `Simd` directly, because `Simd`'s functions call this function and // we will end up with an infinite loop. @@ -118,19 +108,23 @@ impl_element! { isize, usize } /// The layout of this type is unspecified, and may change between platforms /// and/or Rust versions, and code should not assume that it is equivalent to /// `[T; N]`. -/// -/// `N` cannot be 0 and may be at most 64. This limit may be increased in -/// the future. #[repr(transparent)] -pub struct Mask(Simd) +pub struct Mask(mask_impl::Mask) where - T: MaskElement; + T: MaskElement, + LaneCount: SupportedLaneCount; -impl Copy for Mask where T: MaskElement {} +impl Copy for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ +} impl Clone for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn clone(&self) -> Self { @@ -141,12 +135,12 @@ where impl Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { /// Constructs a mask by setting all elements to the given value. #[inline] - #[rustc_const_unstable(feature = "portable_simd", issue = "86656")] - pub const fn splat(value: bool) -> Self { - Self(Simd::splat(if value { T::TRUE } else { T::FALSE })) + pub fn splat(value: bool) -> Self { + Self(mask_impl::Mask::splat(value)) } /// Converts an array of bools to a SIMD mask. @@ -162,7 +156,7 @@ where let bytes: [u8; N] = mem::transmute_copy(&array); let bools: Simd = core::intrinsics::simd::simd_ne(Simd::from_array(bytes), Simd::splat(0u8)); - Mask::from_simd_unchecked(core::intrinsics::simd::simd_cast(bools)) + Mask::from_int_unchecked(core::intrinsics::simd::simd_cast(bools)) } } @@ -180,7 +174,7 @@ where // This would be hypothetically valid as an "in-place" transmute, // but these are "dependently-sized" types, so copy elision it is! unsafe { - let mut bytes: Simd = core::intrinsics::simd::simd_cast(self.to_simd()); + let mut bytes: Simd = core::intrinsics::simd::simd_cast(self.to_int()); bytes &= Simd::splat(1i8); mem::transmute_copy(&bytes) } @@ -193,12 +187,12 @@ where /// All elements must be either 0 or -1. #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] - pub unsafe fn from_simd_unchecked(value: Simd) -> Self { + pub unsafe fn from_int_unchecked(value: Simd) -> Self { // Safety: the caller must confirm this invariant unsafe { core::intrinsics::assume(::valid(value)); + Self(mask_impl::Mask::from_int_unchecked(value)) } - Self(value) } /// Converts a vector of integers to a mask, where 0 represents `false` and -1 @@ -209,26 +203,25 @@ where #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] #[track_caller] - pub fn from_simd(value: Simd) -> Self { + pub fn from_int(value: Simd) -> Self { assert!(T::valid(value), "all values must be either 0 or -1",); // Safety: the validity has been checked - unsafe { Self::from_simd_unchecked(value) } + unsafe { Self::from_int_unchecked(value) } } /// Converts the mask to a vector of integers, where 0 represents `false` and -1 /// represents `true`. #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - pub fn to_simd(self) -> Simd { - self.0 + pub fn to_int(self) -> Simd { + self.0.to_int() } /// Converts the mask to a mask of any other element size. #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] pub fn cast(self) -> Mask { - // Safety: mask elements are integers - unsafe { Mask(core::intrinsics::simd::simd_as(self.0)) } + Mask(self.0.convert()) } /// Tests the value of the specified element. @@ -239,7 +232,7 @@ where #[must_use = "method returns a new bool and does not mutate the original value"] pub unsafe fn test_unchecked(&self, index: usize) -> bool { // Safety: the caller must confirm this invariant - unsafe { T::eq(*self.0.as_array().get_unchecked(index), T::TRUE) } + unsafe { self.0.test_unchecked(index) } } /// Tests the value of the specified element. @@ -250,7 +243,9 @@ where #[must_use = "method returns a new bool and does not mutate the original value"] #[track_caller] pub fn test(&self, index: usize) -> bool { - T::eq(self.0[index], T::TRUE) + assert!(index < N, "element index out of range"); + // Safety: the element index has been checked + unsafe { self.test_unchecked(index) } } /// Sets the value of the specified element. @@ -261,7 +256,7 @@ where pub unsafe fn set_unchecked(&mut self, index: usize, value: bool) { // Safety: the caller must confirm this invariant unsafe { - *self.0.as_mut_array().get_unchecked_mut(index) = if value { T::TRUE } else { T::FALSE } + self.0.set_unchecked(index, value); } } @@ -272,65 +267,35 @@ where #[inline] #[track_caller] pub fn set(&mut self, index: usize, value: bool) { - self.0[index] = if value { T::TRUE } else { T::FALSE } + assert!(index < N, "element index out of range"); + // Safety: the element index has been checked + unsafe { + self.set_unchecked(index, value); + } } /// Returns true if any element is set, or false otherwise. #[inline] #[must_use = "method returns a new bool and does not mutate the original value"] pub fn any(self) -> bool { - // Safety: `self` is a mask vector - unsafe { core::intrinsics::simd::simd_reduce_any(self.0) } + self.0.any() } /// Returns true if all elements are set, or false otherwise. #[inline] #[must_use = "method returns a new bool and does not mutate the original value"] pub fn all(self) -> bool { - // Safety: `self` is a mask vector - unsafe { core::intrinsics::simd::simd_reduce_all(self.0) } + self.0.all() } /// Creates a bitmask from a mask. /// /// Each bit is set if the corresponding element in the mask is `true`. + /// If the mask contains more than 64 elements, the bitmask is truncated to the first 64. #[inline] #[must_use = "method returns a new integer and does not mutate the original value"] pub fn to_bitmask(self) -> u64 { - const { - assert!(N <= 64, "number of elements can't be greater than 64"); - } - - #[inline] - unsafe fn to_bitmask_impl( - mask: Mask, - ) -> U - where - T: MaskElement, - { - let resized = mask.resize::(false); - - // Safety: `resized` is an integer vector with length M, which must match T - let bitmask: U = unsafe { core::intrinsics::simd::simd_bitmask(resized.0) }; - - // LLVM assumes bit order should match endianness - bitmask.fix_endianness() - } - - // TODO modify simd_bitmask to zero-extend output, making this unnecessary - if N <= 8 { - // Safety: bitmask matches length - unsafe { to_bitmask_impl::(self) as u64 } - } else if N <= 16 { - // Safety: bitmask matches length - unsafe { to_bitmask_impl::(self) as u64 } - } else if N <= 32 { - // Safety: bitmask matches length - unsafe { to_bitmask_impl::(self) as u64 } - } else { - // Safety: bitmask matches length - unsafe { to_bitmask_impl::(self) } - } + self.0.to_bitmask_integer() } /// Creates a mask from a bitmask. @@ -340,7 +305,7 @@ where #[inline] #[must_use = "method returns a new mask and does not mutate the original value"] pub fn from_bitmask(bitmask: u64) -> Self { - Self(bitmask.select(Simd::splat(T::TRUE), Simd::splat(T::FALSE))) + Self(mask_impl::Mask::from_bitmask_integer(bitmask)) } /// Finds the index of the first set element. @@ -386,7 +351,7 @@ where // Safety: the input and output are integer vectors let index: Simd = unsafe { core::intrinsics::simd::simd_cast(index) }; - let masked_index = self.select(index, Self::splat(true).to_simd()); + let masked_index = self.select(index, Self::splat(true).to_int()); // Safety: the input and output are integer vectors let masked_index: Simd = @@ -411,6 +376,7 @@ where impl From<[bool; N]> for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn from(array: [bool; N]) -> Self { @@ -421,6 +387,7 @@ where impl From> for [bool; N] where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn from(vector: Mask) -> Self { @@ -431,6 +398,7 @@ where impl Default for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn default() -> Self { @@ -441,6 +409,7 @@ where impl PartialEq for Mask where T: MaskElement + PartialEq, + LaneCount: SupportedLaneCount, { #[inline] fn eq(&self, other: &Self) -> bool { @@ -451,6 +420,7 @@ where impl PartialOrd for Mask where T: MaskElement + PartialOrd, + LaneCount: SupportedLaneCount, { #[inline] fn partial_cmp(&self, other: &Self) -> Option { @@ -461,6 +431,7 @@ where impl fmt::Debug for Mask where T: MaskElement + fmt::Debug, + LaneCount: SupportedLaneCount, { #[inline] fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { @@ -473,18 +444,19 @@ where impl core::ops::BitAnd for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] fn bitand(self, rhs: Self) -> Self { - // Safety: `self` is an integer vector - unsafe { Self(core::intrinsics::simd::simd_and(self.0, rhs.0)) } + Self(self.0 & rhs.0) } } impl core::ops::BitAnd for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] @@ -496,6 +468,7 @@ where impl core::ops::BitAnd> for bool where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Mask; #[inline] @@ -507,18 +480,19 @@ where impl core::ops::BitOr for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] fn bitor(self, rhs: Self) -> Self { - // Safety: `self` is an integer vector - unsafe { Self(core::intrinsics::simd::simd_or(self.0, rhs.0)) } + Self(self.0 | rhs.0) } } impl core::ops::BitOr for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] @@ -530,6 +504,7 @@ where impl core::ops::BitOr> for bool where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Mask; #[inline] @@ -541,18 +516,19 @@ where impl core::ops::BitXor for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] fn bitxor(self, rhs: Self) -> Self::Output { - // Safety: `self` is an integer vector - unsafe { Self(core::intrinsics::simd::simd_xor(self.0, rhs.0)) } + Self(self.0 ^ rhs.0) } } impl core::ops::BitXor for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] @@ -564,6 +540,7 @@ where impl core::ops::BitXor> for bool where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Mask; #[inline] @@ -575,27 +552,30 @@ where impl core::ops::Not for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { type Output = Mask; #[inline] fn not(self) -> Self::Output { - Self::splat(true) ^ self + Self(!self.0) } } impl core::ops::BitAndAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitand_assign(&mut self, rhs: Self) { - *self = *self & rhs; + self.0 = self.0 & rhs.0; } } impl core::ops::BitAndAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitand_assign(&mut self, rhs: bool) { @@ -606,16 +586,18 @@ where impl core::ops::BitOrAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitor_assign(&mut self, rhs: Self) { - *self = *self | rhs; + self.0 = self.0 | rhs.0; } } impl core::ops::BitOrAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitor_assign(&mut self, rhs: bool) { @@ -626,16 +608,18 @@ where impl core::ops::BitXorAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitxor_assign(&mut self, rhs: Self) { - *self = *self ^ rhs; + self.0 = self.0 ^ rhs.0; } } impl core::ops::BitXorAssign for Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { #[inline] fn bitxor_assign(&mut self, rhs: bool) { @@ -647,6 +631,8 @@ macro_rules! impl_from { { $from:ty => $($to:ty),* } => { $( impl From> for Mask<$to, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn from(value: Mask<$from, N>) -> Self { diff --git a/library/portable-simd/crates/core_simd/src/masks/bitmask.rs b/library/portable-simd/crates/core_simd/src/masks/bitmask.rs new file mode 100644 index 0000000000000..32d37b5533926 --- /dev/null +++ b/library/portable-simd/crates/core_simd/src/masks/bitmask.rs @@ -0,0 +1,228 @@ +#![allow(unused_imports)] +use super::MaskElement; +use crate::simd::{LaneCount, Simd, SupportedLaneCount}; +use core::marker::PhantomData; + +/// A mask where each lane is represented by a single bit. +#[repr(transparent)] +pub(crate) struct Mask( + as SupportedLaneCount>::BitMask, + PhantomData, +) +where + T: MaskElement, + LaneCount: SupportedLaneCount; + +impl Copy for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ +} + +impl Clone for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn clone(&self) -> Self { + *self + } +} + +impl PartialEq for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn eq(&self, other: &Self) -> bool { + self.0.as_ref() == other.0.as_ref() + } +} + +impl PartialOrd for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn partial_cmp(&self, other: &Self) -> Option { + self.0.as_ref().partial_cmp(other.0.as_ref()) + } +} + +impl Eq for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ +} + +impl Ord for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn cmp(&self, other: &Self) -> core::cmp::Ordering { + self.0.as_ref().cmp(other.0.as_ref()) + } +} + +impl Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) fn splat(value: bool) -> Self { + let mut mask = as SupportedLaneCount>::BitMask::default(); + if value { + mask.as_mut().fill(u8::MAX) + } else { + mask.as_mut().fill(u8::MIN) + } + if N % 8 > 0 { + *mask.as_mut().last_mut().unwrap() &= u8::MAX >> (8 - N % 8); + } + Self(mask, PhantomData) + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) unsafe fn test_unchecked(&self, lane: usize) -> bool { + (self.0.as_ref()[lane / 8] >> (lane % 8)) & 0x1 > 0 + } + + #[inline] + pub(crate) unsafe fn set_unchecked(&mut self, lane: usize, value: bool) { + unsafe { + self.0.as_mut()[lane / 8] ^= ((value ^ self.test_unchecked(lane)) as u8) << (lane % 8) + } + } + + #[inline] + #[must_use = "method returns a new vector and does not mutate the original value"] + pub(crate) fn to_int(self) -> Simd { + unsafe { + core::intrinsics::simd::simd_select_bitmask( + self.0, + Simd::splat(T::TRUE), + Simd::splat(T::FALSE), + ) + } + } + + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) unsafe fn from_int_unchecked(value: Simd) -> Self { + unsafe { Self(core::intrinsics::simd::simd_bitmask(value), PhantomData) } + } + + #[inline] + pub(crate) fn to_bitmask_integer(self) -> u64 { + let mut bitmask = [0u8; 8]; + bitmask[..self.0.as_ref().len()].copy_from_slice(self.0.as_ref()); + u64::from_ne_bytes(bitmask) + } + + #[inline] + pub(crate) fn from_bitmask_integer(bitmask: u64) -> Self { + let mut bytes = as SupportedLaneCount>::BitMask::default(); + let len = bytes.as_mut().len(); + bytes + .as_mut() + .copy_from_slice(&bitmask.to_ne_bytes()[..len]); + Self(bytes, PhantomData) + } + + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) fn convert(self) -> Mask + where + U: MaskElement, + { + // Safety: bitmask layout does not depend on the element width + unsafe { core::mem::transmute_copy(&self) } + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) fn any(self) -> bool { + self != Self::splat(false) + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) fn all(self) -> bool { + self == Self::splat(true) + } +} + +impl core::ops::BitAnd for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, + as SupportedLaneCount>::BitMask: AsRef<[u8]> + AsMut<[u8]>, +{ + type Output = Self; + #[inline] + fn bitand(mut self, rhs: Self) -> Self { + for (l, r) in self.0.as_mut().iter_mut().zip(rhs.0.as_ref().iter()) { + *l &= r; + } + self + } +} + +impl core::ops::BitOr for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, + as SupportedLaneCount>::BitMask: AsRef<[u8]> + AsMut<[u8]>, +{ + type Output = Self; + #[inline] + fn bitor(mut self, rhs: Self) -> Self { + for (l, r) in self.0.as_mut().iter_mut().zip(rhs.0.as_ref().iter()) { + *l |= r; + } + self + } +} + +impl core::ops::BitXor for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn bitxor(mut self, rhs: Self) -> Self::Output { + for (l, r) in self.0.as_mut().iter_mut().zip(rhs.0.as_ref().iter()) { + *l ^= r; + } + self + } +} + +impl core::ops::Not for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn not(mut self) -> Self::Output { + for x in self.0.as_mut() { + *x = !*x; + } + if N % 8 > 0 { + *self.0.as_mut().last_mut().unwrap() &= u8::MAX >> (8 - N % 8); + } + self + } +} diff --git a/library/portable-simd/crates/core_simd/src/masks/full_masks.rs b/library/portable-simd/crates/core_simd/src/masks/full_masks.rs new file mode 100644 index 0000000000000..4e98db4070a9d --- /dev/null +++ b/library/portable-simd/crates/core_simd/src/masks/full_masks.rs @@ -0,0 +1,296 @@ +//! Masks that take up full SIMD vector registers. + +use crate::simd::{LaneCount, MaskElement, Simd, SupportedLaneCount}; + +#[repr(transparent)] +pub(crate) struct Mask(Simd) +where + T: MaskElement, + LaneCount: SupportedLaneCount; + +impl Copy for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ +} + +impl Clone for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn clone(&self) -> Self { + *self + } +} + +impl PartialEq for Mask +where + T: MaskElement + PartialEq, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn eq(&self, other: &Self) -> bool { + self.0.eq(&other.0) + } +} + +impl PartialOrd for Mask +where + T: MaskElement + PartialOrd, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn partial_cmp(&self, other: &Self) -> Option { + self.0.partial_cmp(&other.0) + } +} + +impl Eq for Mask +where + T: MaskElement + Eq, + LaneCount: SupportedLaneCount, +{ +} + +impl Ord for Mask +where + T: MaskElement + Ord, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn cmp(&self, other: &Self) -> core::cmp::Ordering { + self.0.cmp(&other.0) + } +} + +// Used for bitmask bit order workaround +pub(crate) trait ReverseBits { + // Reverse the least significant `n` bits of `self`. + // (Remaining bits must be 0.) + fn reverse_bits(self, n: usize) -> Self; +} + +macro_rules! impl_reverse_bits { + { $($int:ty),* } => { + $( + impl ReverseBits for $int { + #[inline(always)] + fn reverse_bits(self, n: usize) -> Self { + let rev = <$int>::reverse_bits(self); + let bitsize = size_of::<$int>() * 8; + if n < bitsize { + // Shift things back to the right + rev >> (bitsize - n) + } else { + rev + } + } + } + )* + } +} + +impl_reverse_bits! { u8, u16, u32, u64 } + +impl Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) fn splat(value: bool) -> Self { + Self(Simd::splat(if value { T::TRUE } else { T::FALSE })) + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) unsafe fn test_unchecked(&self, lane: usize) -> bool { + T::eq(self.0[lane], T::TRUE) + } + + #[inline] + pub(crate) unsafe fn set_unchecked(&mut self, lane: usize, value: bool) { + self.0[lane] = if value { T::TRUE } else { T::FALSE } + } + + #[inline] + #[must_use = "method returns a new vector and does not mutate the original value"] + pub(crate) fn to_int(self) -> Simd { + self.0 + } + + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) unsafe fn from_int_unchecked(value: Simd) -> Self { + Self(value) + } + + #[inline] + #[must_use = "method returns a new mask and does not mutate the original value"] + pub(crate) fn convert(self) -> Mask + where + U: MaskElement, + { + // Safety: masks are simply integer vectors of 0 and -1, and we can cast the element type. + unsafe { Mask(core::intrinsics::simd::simd_cast(self.0)) } + } + + #[inline] + unsafe fn to_bitmask_impl(self) -> U + where + LaneCount: SupportedLaneCount, + { + let resized = self.to_int().resize::(T::FALSE); + + // Safety: `resized` is an integer vector with length M, which must match T + let bitmask: U = unsafe { core::intrinsics::simd::simd_bitmask(resized) }; + + // LLVM assumes bit order should match endianness + if cfg!(target_endian = "big") { + bitmask.reverse_bits(M) + } else { + bitmask + } + } + + #[inline] + unsafe fn from_bitmask_impl(bitmask: U) -> Self + where + LaneCount: SupportedLaneCount, + { + // LLVM assumes bit order should match endianness + let bitmask = if cfg!(target_endian = "big") { + bitmask.reverse_bits(M) + } else { + bitmask + }; + + // SAFETY: `mask` is the correct bitmask type for a u64 bitmask + let mask: Simd = unsafe { + core::intrinsics::simd::simd_select_bitmask( + bitmask, + Simd::::splat(T::TRUE), + Simd::::splat(T::FALSE), + ) + }; + + // SAFETY: `mask` only contains `T::TRUE` or `T::FALSE` + unsafe { Self::from_int_unchecked(mask.resize::(T::FALSE)) } + } + + #[inline] + pub(crate) fn to_bitmask_integer(self) -> u64 { + // TODO modify simd_bitmask to zero-extend output, making this unnecessary + if N <= 8 { + // Safety: bitmask matches length + unsafe { self.to_bitmask_impl::() as u64 } + } else if N <= 16 { + // Safety: bitmask matches length + unsafe { self.to_bitmask_impl::() as u64 } + } else if N <= 32 { + // Safety: bitmask matches length + unsafe { self.to_bitmask_impl::() as u64 } + } else { + // Safety: bitmask matches length + unsafe { self.to_bitmask_impl::() } + } + } + + #[inline] + pub(crate) fn from_bitmask_integer(bitmask: u64) -> Self { + // TODO modify simd_bitmask_select to truncate input, making this unnecessary + if N <= 8 { + // Safety: bitmask matches length + unsafe { Self::from_bitmask_impl::(bitmask as u8) } + } else if N <= 16 { + // Safety: bitmask matches length + unsafe { Self::from_bitmask_impl::(bitmask as u16) } + } else if N <= 32 { + // Safety: bitmask matches length + unsafe { Self::from_bitmask_impl::(bitmask as u32) } + } else { + // Safety: bitmask matches length + unsafe { Self::from_bitmask_impl::(bitmask) } + } + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) fn any(self) -> bool { + // Safety: use `self` as an integer vector + unsafe { core::intrinsics::simd::simd_reduce_any(self.to_int()) } + } + + #[inline] + #[must_use = "method returns a new bool and does not mutate the original value"] + pub(crate) fn all(self) -> bool { + // Safety: use `self` as an integer vector + unsafe { core::intrinsics::simd::simd_reduce_all(self.to_int()) } + } +} + +impl From> for Simd +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + #[inline] + fn from(value: Mask) -> Self { + value.0 + } +} + +impl core::ops::BitAnd for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn bitand(self, rhs: Self) -> Self { + // Safety: `self` is an integer vector + unsafe { Self(core::intrinsics::simd::simd_and(self.0, rhs.0)) } + } +} + +impl core::ops::BitOr for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn bitor(self, rhs: Self) -> Self { + // Safety: `self` is an integer vector + unsafe { Self(core::intrinsics::simd::simd_or(self.0, rhs.0)) } + } +} + +impl core::ops::BitXor for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn bitxor(self, rhs: Self) -> Self { + // Safety: `self` is an integer vector + unsafe { Self(core::intrinsics::simd::simd_xor(self.0, rhs.0)) } + } +} + +impl core::ops::Not for Mask +where + T: MaskElement, + LaneCount: SupportedLaneCount, +{ + type Output = Self; + #[inline] + fn not(self) -> Self::Output { + Self::splat(true) ^ self + } +} diff --git a/library/portable-simd/crates/core_simd/src/mod.rs b/library/portable-simd/crates/core_simd/src/mod.rs index 5f635d80a178f..45b1a0f975141 100644 --- a/library/portable-simd/crates/core_simd/src/mod.rs +++ b/library/portable-simd/crates/core_simd/src/mod.rs @@ -5,6 +5,7 @@ mod alias; mod cast; mod fmt; mod iter; +mod lane_count; mod masks; mod ops; mod select; @@ -26,8 +27,8 @@ pub mod simd { pub use crate::core_simd::alias::*; pub use crate::core_simd::cast::*; + pub use crate::core_simd::lane_count::{LaneCount, SupportedLaneCount}; pub use crate::core_simd::masks::*; - pub use crate::core_simd::select::*; pub use crate::core_simd::swizzle::*; pub use crate::core_simd::to_bytes::ToBytes; pub use crate::core_simd::vector::*; diff --git a/library/portable-simd/crates/core_simd/src/ops.rs b/library/portable-simd/crates/core_simd/src/ops.rs index eb6601f734831..f36e8d01a73bb 100644 --- a/library/portable-simd/crates/core_simd/src/ops.rs +++ b/library/portable-simd/crates/core_simd/src/ops.rs @@ -1,4 +1,4 @@ -use crate::simd::{Select, Simd, SimdElement, cmp::SimdPartialEq}; +use crate::simd::{LaneCount, Simd, SimdElement, SupportedLaneCount, cmp::SimdPartialEq}; use core::ops::{Add, Mul}; use core::ops::{BitAnd, BitOr, BitXor}; use core::ops::{Div, Rem, Sub}; @@ -12,6 +12,7 @@ mod unary; impl core::ops::Index for Simd where T: SimdElement, + LaneCount: SupportedLaneCount, I: core::slice::SliceIndex<[T]>, { type Output = I::Output; @@ -24,6 +25,7 @@ where impl core::ops::IndexMut for Simd where T: SimdElement, + LaneCount: SupportedLaneCount, I: core::slice::SliceIndex<[T]>, { #[inline] @@ -128,6 +130,7 @@ macro_rules! for_base_types { impl $op for Simd<$scalar, N> where $scalar: SimdElement, + LaneCount: SupportedLaneCount, { type Output = $out; diff --git a/library/portable-simd/crates/core_simd/src/ops/assign.rs b/library/portable-simd/crates/core_simd/src/ops/assign.rs index c1830c35df778..d21d867de26d6 100644 --- a/library/portable-simd/crates/core_simd/src/ops/assign.rs +++ b/library/portable-simd/crates/core_simd/src/ops/assign.rs @@ -21,6 +21,7 @@ macro_rules! assign_ops { where Self: $trait, T: SimdElement, + LaneCount: SupportedLaneCount, { #[inline] fn $assign_call(&mut self, rhs: U) { diff --git a/library/portable-simd/crates/core_simd/src/ops/deref.rs b/library/portable-simd/crates/core_simd/src/ops/deref.rs index 360b83c403468..913cbbe977c46 100644 --- a/library/portable-simd/crates/core_simd/src/ops/deref.rs +++ b/library/portable-simd/crates/core_simd/src/ops/deref.rs @@ -13,6 +13,7 @@ macro_rules! deref_lhs { where T: SimdElement, $simd: $trait<$simd, Output = $simd>, + LaneCount: SupportedLaneCount, { type Output = Simd; @@ -32,6 +33,7 @@ macro_rules! deref_rhs { where T: SimdElement, $simd: $trait<$simd, Output = $simd>, + LaneCount: SupportedLaneCount, { type Output = Simd; @@ -62,6 +64,7 @@ macro_rules! deref_ops { where T: SimdElement, $simd: $trait<$simd, Output = $simd>, + LaneCount: SupportedLaneCount, { type Output = $simd; diff --git a/library/portable-simd/crates/core_simd/src/ops/shift_scalar.rs b/library/portable-simd/crates/core_simd/src/ops/shift_scalar.rs index 7ca83dc40f617..f5115a5a5e935 100644 --- a/library/portable-simd/crates/core_simd/src/ops/shift_scalar.rs +++ b/library/portable-simd/crates/core_simd/src/ops/shift_scalar.rs @@ -1,11 +1,13 @@ // Shift operations uniquely typically only have a scalar on the right-hand side. // Here, we implement shifts for scalar RHS arguments. -use crate::simd::Simd; +use crate::simd::{LaneCount, Simd, SupportedLaneCount}; macro_rules! impl_splatted_shifts { { impl $trait:ident :: $trait_fn:ident for $ty:ty } => { impl core::ops::$trait<$ty> for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] @@ -15,6 +17,8 @@ macro_rules! impl_splatted_shifts { } impl core::ops::$trait<&$ty> for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Output = Self; #[inline] @@ -24,6 +28,8 @@ macro_rules! impl_splatted_shifts { } impl<'lhs, const N: usize> core::ops::$trait<$ty> for &'lhs Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Output = Simd<$ty, N>; #[inline] @@ -33,6 +39,8 @@ macro_rules! impl_splatted_shifts { } impl<'lhs, const N: usize> core::ops::$trait<&$ty> for &'lhs Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Output = Simd<$ty, N>; #[inline] diff --git a/library/portable-simd/crates/core_simd/src/ops/unary.rs b/library/portable-simd/crates/core_simd/src/ops/unary.rs index e1c06167f9790..412a5b801171b 100644 --- a/library/portable-simd/crates/core_simd/src/ops/unary.rs +++ b/library/portable-simd/crates/core_simd/src/ops/unary.rs @@ -1,4 +1,4 @@ -use crate::simd::{Simd, SimdElement}; +use crate::simd::{LaneCount, Simd, SimdElement, SupportedLaneCount}; use core::ops::{Neg, Not}; // unary ops macro_rules! neg { @@ -6,6 +6,7 @@ macro_rules! neg { $(impl Neg for Simd<$scalar, N> where $scalar: SimdElement, + LaneCount: SupportedLaneCount, { type Output = Self; @@ -39,6 +40,7 @@ macro_rules! not { $(impl Not for Simd<$scalar, N> where $scalar: SimdElement, + LaneCount: SupportedLaneCount, { type Output = Self; diff --git a/library/portable-simd/crates/core_simd/src/select.rs b/library/portable-simd/crates/core_simd/src/select.rs index 404f54d8f3827..f33aa261a928f 100644 --- a/library/portable-simd/crates/core_simd/src/select.rs +++ b/library/portable-simd/crates/core_simd/src/select.rs @@ -1,155 +1,54 @@ -use crate::simd::{FixEndianness, Mask, MaskElement, Simd, SimdElement}; +use crate::simd::{LaneCount, Mask, MaskElement, Simd, SimdElement, SupportedLaneCount}; -/// Choose elements from two vectors using a mask. -/// -/// For each element in the mask, choose the corresponding element from `true_values` if -/// that element mask is true, and `false_values` if that element mask is false. -/// -/// If the mask is `u64`, it's treated as a bitmask with the least significant bit -/// corresponding to the first element. -/// -/// # Examples -/// -/// ## Selecting values from `Simd` -/// ``` -/// # #![feature(portable_simd)] -/// # #[cfg(feature = "as_crate")] use core_simd::simd; -/// # #[cfg(not(feature = "as_crate"))] use core::simd; -/// # use simd::{Simd, Mask, Select}; -/// let a = Simd::from_array([0, 1, 2, 3]); -/// let b = Simd::from_array([4, 5, 6, 7]); -/// let mask = Mask::::from_array([true, false, false, true]); -/// let c = mask.select(a, b); -/// assert_eq!(c.to_array(), [0, 5, 6, 3]); -/// ``` -/// -/// ## Selecting values from `Mask` -/// ``` -/// # #![feature(portable_simd)] -/// # #[cfg(feature = "as_crate")] use core_simd::simd; -/// # #[cfg(not(feature = "as_crate"))] use core::simd; -/// # use simd::{Mask, Select}; -/// let a = Mask::::from_array([true, true, false, false]); -/// let b = Mask::::from_array([false, false, true, true]); -/// let mask = Mask::::from_array([true, false, false, true]); -/// let c = mask.select(a, b); -/// assert_eq!(c.to_array(), [true, false, true, false]); -/// ``` -/// -/// ## Selecting with a bitmask -/// ``` -/// # #![feature(portable_simd)] -/// # #[cfg(feature = "as_crate")] use core_simd::simd; -/// # #[cfg(not(feature = "as_crate"))] use core::simd; -/// # use simd::{Mask, Select}; -/// let a = Mask::::from_array([true, true, false, false]); -/// let b = Mask::::from_array([false, false, true, true]); -/// let mask = 0b1001; -/// let c = mask.select(a, b); -/// assert_eq!(c.to_array(), [true, false, true, false]); -/// ``` -pub trait Select { - /// Choose elements - fn select(self, true_values: T, false_values: T) -> T; -} - -impl Select> for Mask -where - T: SimdElement, - U: MaskElement, -{ - #[inline] - fn select(self, true_values: Simd, false_values: Simd) -> Simd { - // Safety: - // simd_as between masks is always safe (they're vectors of ints). - // simd_select uses a mask that matches the width and number of elements - unsafe { - let mask: Simd = core::intrinsics::simd::simd_as(self.to_simd()); - core::intrinsics::simd::simd_select(mask, true_values, false_values) - } - } -} - -impl Select> for u64 -where - T: SimdElement, -{ - #[inline] - fn select(self, true_values: Simd, false_values: Simd) -> Simd { - const { - assert!(N <= 64, "number of elements can't be greater than 64"); - } - - #[inline] - unsafe fn select_impl( - bitmask: U, - true_values: Simd, - false_values: Simd, - ) -> Simd - where - T: SimdElement, - { - let default = true_values[0]; - let true_values = true_values.resize::(default); - let false_values = false_values.resize::(default); - - // LLVM assumes bit order should match endianness - let bitmask = bitmask.fix_endianness(); - - // Safety: the caller guarantees that the size of U matches M - let selected = unsafe { - core::intrinsics::simd::simd_select_bitmask(bitmask, true_values, false_values) - }; - - selected.resize::(default) - } - - // TODO modify simd_bitmask_select to truncate input, making this unnecessary - if N <= 8 { - let bitmask = self as u8; - // Safety: bitmask matches length - unsafe { select_impl::(bitmask, true_values, false_values) } - } else if N <= 16 { - let bitmask = self as u16; - // Safety: bitmask matches length - unsafe { select_impl::(bitmask, true_values, false_values) } - } else if N <= 32 { - let bitmask = self as u32; - // Safety: bitmask matches length - unsafe { select_impl::(bitmask, true_values, false_values) } - } else { - let bitmask = self; - // Safety: bitmask matches length - unsafe { select_impl::(bitmask, true_values, false_values) } - } - } -} - -impl Select> for Mask +impl Mask where T: MaskElement, - U: MaskElement, + LaneCount: SupportedLaneCount, { + /// Choose elements from two vectors. + /// + /// For each element in the mask, choose the corresponding element from `true_values` if + /// that element mask is true, and `false_values` if that element mask is false. + /// + /// # Examples + /// ``` + /// # #![feature(portable_simd)] + /// # use core::simd::{Simd, Mask}; + /// let a = Simd::from_array([0, 1, 2, 3]); + /// let b = Simd::from_array([4, 5, 6, 7]); + /// let mask = Mask::from_array([true, false, false, true]); + /// let c = mask.select(a, b); + /// assert_eq!(c.to_array(), [0, 5, 6, 3]); + /// ``` #[inline] - fn select(self, true_values: Mask, false_values: Mask) -> Mask { - let selected: Simd = - Select::select(self, true_values.to_simd(), false_values.to_simd()); - - // Safety: all values come from masks - unsafe { Mask::from_simd_unchecked(selected) } + #[must_use = "method returns a new vector and does not mutate the original inputs"] + pub fn select(self, true_values: Simd, false_values: Simd) -> Simd + where + U: SimdElement, + { + // Safety: The mask has been cast to a vector of integers, + // and the operands to select between are vectors of the same type and length. + unsafe { core::intrinsics::simd::simd_select(self.to_int(), true_values, false_values) } } -} -impl Select> for u64 -where - T: MaskElement, -{ + /// Choose elements from two masks. + /// + /// For each element in the mask, choose the corresponding element from `true_values` if + /// that element mask is true, and `false_values` if that element mask is false. + /// + /// # Examples + /// ``` + /// # #![feature(portable_simd)] + /// # use core::simd::Mask; + /// let a = Mask::::from_array([true, true, false, false]); + /// let b = Mask::::from_array([false, false, true, true]); + /// let mask = Mask::::from_array([true, false, false, true]); + /// let c = mask.select_mask(a, b); + /// assert_eq!(c.to_array(), [true, false, true, false]); + /// ``` #[inline] - fn select(self, true_values: Mask, false_values: Mask) -> Mask { - let selected: Simd = - Select::select(self, true_values.to_simd(), false_values.to_simd()); - - // Safety: all values come from masks - unsafe { Mask::from_simd_unchecked(selected) } + #[must_use = "method returns a new mask and does not mutate the original inputs"] + pub fn select_mask(self, true_values: Self, false_values: Self) -> Self { + self & true_values | !self & false_values } } diff --git a/library/portable-simd/crates/core_simd/src/simd/cmp/eq.rs b/library/portable-simd/crates/core_simd/src/simd/cmp/eq.rs index d553d6c040c91..2312ba401fa78 100644 --- a/library/portable-simd/crates/core_simd/src/simd/cmp/eq.rs +++ b/library/portable-simd/crates/core_simd/src/simd/cmp/eq.rs @@ -1,5 +1,5 @@ use crate::simd::{ - Mask, Simd, SimdElement, + LaneCount, Mask, Simd, SimdElement, SupportedLaneCount, ptr::{SimdConstPtr, SimdMutPtr}, }; @@ -21,6 +21,8 @@ macro_rules! impl_number { { $($number:ty),* } => { $( impl SimdPartialEq for Simd<$number, N> + where + LaneCount: SupportedLaneCount, { type Mask = Mask<<$number as SimdElement>::Mask, N>; @@ -28,14 +30,14 @@ macro_rules! impl_number { fn simd_eq(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_eq(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_eq(self, other)) } } #[inline] fn simd_ne(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_ne(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_ne(self, other)) } } } )* @@ -48,6 +50,8 @@ macro_rules! impl_mask { { $($integer:ty),* } => { $( impl SimdPartialEq for Mask<$integer, N> + where + LaneCount: SupportedLaneCount, { type Mask = Self; @@ -55,14 +59,14 @@ macro_rules! impl_mask { fn simd_eq(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_eq(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_eq(self.to_int(), other.to_int())) } } #[inline] fn simd_ne(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_ne(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_ne(self.to_int(), other.to_int())) } } } )* @@ -71,7 +75,10 @@ macro_rules! impl_mask { impl_mask! { i8, i16, i32, i64, isize } -impl SimdPartialEq for Simd<*const T, N> { +impl SimdPartialEq for Simd<*const T, N> +where + LaneCount: SupportedLaneCount, +{ type Mask = Mask; #[inline] @@ -85,7 +92,10 @@ impl SimdPartialEq for Simd<*const T, N> { } } -impl SimdPartialEq for Simd<*mut T, N> { +impl SimdPartialEq for Simd<*mut T, N> +where + LaneCount: SupportedLaneCount, +{ type Mask = Mask; #[inline] diff --git a/library/portable-simd/crates/core_simd/src/simd/cmp/ord.rs b/library/portable-simd/crates/core_simd/src/simd/cmp/ord.rs index 5672fbbf54caa..e813e7613032c 100644 --- a/library/portable-simd/crates/core_simd/src/simd/cmp/ord.rs +++ b/library/portable-simd/crates/core_simd/src/simd/cmp/ord.rs @@ -1,5 +1,5 @@ use crate::simd::{ - Mask, Select, Simd, + LaneCount, Mask, Simd, SupportedLaneCount, cmp::SimdPartialEq, ptr::{SimdConstPtr, SimdMutPtr}, }; @@ -49,37 +49,41 @@ macro_rules! impl_integer { { $($integer:ty),* } => { $( impl SimdPartialOrd for Simd<$integer, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn simd_lt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_lt(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_lt(self, other)) } } #[inline] fn simd_le(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_le(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_le(self, other)) } } #[inline] fn simd_gt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_gt(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_gt(self, other)) } } #[inline] fn simd_ge(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_ge(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_ge(self, other)) } } } impl SimdOrd for Simd<$integer, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn simd_max(self, other: Self) -> Self { @@ -111,33 +115,35 @@ macro_rules! impl_float { { $($float:ty),* } => { $( impl SimdPartialOrd for Simd<$float, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn simd_lt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_lt(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_lt(self, other)) } } #[inline] fn simd_le(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_le(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_le(self, other)) } } #[inline] fn simd_gt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_gt(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_gt(self, other)) } } #[inline] fn simd_ge(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Mask::from_simd_unchecked(core::intrinsics::simd::simd_ge(self, other)) } + unsafe { Mask::from_int_unchecked(core::intrinsics::simd::simd_ge(self, other)) } } } )* @@ -150,46 +156,50 @@ macro_rules! impl_mask { { $($integer:ty),* } => { $( impl SimdPartialOrd for Mask<$integer, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn simd_lt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_lt(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_lt(self.to_int(), other.to_int())) } } #[inline] fn simd_le(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_le(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_le(self.to_int(), other.to_int())) } } #[inline] fn simd_gt(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_gt(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_gt(self.to_int(), other.to_int())) } } #[inline] fn simd_ge(self, other: Self) -> Self::Mask { // Safety: `self` is a vector, and the result of the comparison // is always a valid mask. - unsafe { Self::from_simd_unchecked(core::intrinsics::simd::simd_ge(self.to_simd(), other.to_simd())) } + unsafe { Self::from_int_unchecked(core::intrinsics::simd::simd_ge(self.to_int(), other.to_int())) } } } impl SimdOrd for Mask<$integer, N> + where + LaneCount: SupportedLaneCount, { #[inline] fn simd_max(self, other: Self) -> Self { - self.simd_gt(other).select(other, self) + self.simd_gt(other).select_mask(other, self) } #[inline] fn simd_min(self, other: Self) -> Self { - self.simd_lt(other).select(other, self) + self.simd_lt(other).select_mask(other, self) } #[inline] @@ -208,7 +218,10 @@ macro_rules! impl_mask { impl_mask! { i8, i16, i32, i64, isize } -impl SimdPartialOrd for Simd<*const T, N> { +impl SimdPartialOrd for Simd<*const T, N> +where + LaneCount: SupportedLaneCount, +{ #[inline] fn simd_lt(self, other: Self) -> Self::Mask { self.addr().simd_lt(other.addr()) @@ -230,7 +243,10 @@ impl SimdPartialOrd for Simd<*const T, N> { } } -impl SimdOrd for Simd<*const T, N> { +impl SimdOrd for Simd<*const T, N> +where + LaneCount: SupportedLaneCount, +{ #[inline] fn simd_max(self, other: Self) -> Self { self.simd_lt(other).select(other, self) @@ -252,7 +268,10 @@ impl SimdOrd for Simd<*const T, N> { } } -impl SimdPartialOrd for Simd<*mut T, N> { +impl SimdPartialOrd for Simd<*mut T, N> +where + LaneCount: SupportedLaneCount, +{ #[inline] fn simd_lt(self, other: Self) -> Self::Mask { self.addr().simd_lt(other.addr()) @@ -274,7 +293,10 @@ impl SimdPartialOrd for Simd<*mut T, N> { } } -impl SimdOrd for Simd<*mut T, N> { +impl SimdOrd for Simd<*mut T, N> +where + LaneCount: SupportedLaneCount, +{ #[inline] fn simd_max(self, other: Self) -> Self { self.simd_lt(other).select(other, self) diff --git a/library/portable-simd/crates/core_simd/src/simd/num/float.rs b/library/portable-simd/crates/core_simd/src/simd/num/float.rs index efd7c2469512b..b5972c47373bb 100644 --- a/library/portable-simd/crates/core_simd/src/simd/num/float.rs +++ b/library/portable-simd/crates/core_simd/src/simd/num/float.rs @@ -1,6 +1,6 @@ use super::sealed::Sealed; use crate::simd::{ - Mask, Select, Simd, SimdCast, SimdElement, + LaneCount, Mask, Simd, SimdCast, SimdElement, SupportedLaneCount, cmp::{SimdPartialEq, SimdPartialOrd}, }; @@ -240,9 +240,15 @@ pub trait SimdFloat: Copy + Sealed { macro_rules! impl_trait { { $($ty:ty { bits: $bits_ty:ty, mask: $mask_ty:ty }),* } => { $( - impl Sealed for Simd<$ty, N> {} + impl Sealed for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, + { + } impl SimdFloat for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Mask = Mask<<$mask_ty as SimdElement>::Mask, N>; type Scalar = $ty; diff --git a/library/portable-simd/crates/core_simd/src/simd/num/int.rs b/library/portable-simd/crates/core_simd/src/simd/num/int.rs index eee54d3968808..e7253313f036c 100644 --- a/library/portable-simd/crates/core_simd/src/simd/num/int.rs +++ b/library/portable-simd/crates/core_simd/src/simd/num/int.rs @@ -1,6 +1,7 @@ use super::sealed::Sealed; use crate::simd::{ - Mask, Select, Simd, SimdCast, SimdElement, cmp::SimdOrd, cmp::SimdPartialOrd, num::SimdUint, + LaneCount, Mask, Simd, SimdCast, SimdElement, SupportedLaneCount, cmp::SimdOrd, + cmp::SimdPartialOrd, num::SimdUint, }; /// Operations on SIMD vectors of signed integers. @@ -241,9 +242,16 @@ pub trait SimdInt: Copy + Sealed { macro_rules! impl_trait { { $($ty:ident ($unsigned:ident)),* } => { $( - impl Sealed for Simd<$ty, N> {} + impl Sealed for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, + { + } - impl SimdInt for Simd<$ty, N> { + impl SimdInt for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, + { type Mask = Mask<<$ty as SimdElement>::Mask, N>; type Scalar = $ty; type Unsigned = Simd<$unsigned, N>; diff --git a/library/portable-simd/crates/core_simd/src/simd/num/uint.rs b/library/portable-simd/crates/core_simd/src/simd/num/uint.rs index 606107a1f06f8..e3ba8658bd803 100644 --- a/library/portable-simd/crates/core_simd/src/simd/num/uint.rs +++ b/library/portable-simd/crates/core_simd/src/simd/num/uint.rs @@ -1,5 +1,5 @@ use super::sealed::Sealed; -use crate::simd::{Simd, SimdCast, SimdElement, cmp::SimdOrd}; +use crate::simd::{LaneCount, Simd, SimdCast, SimdElement, SupportedLaneCount, cmp::SimdOrd}; /// Operations on SIMD vectors of unsigned integers. pub trait SimdUint: Copy + Sealed { @@ -124,9 +124,15 @@ pub trait SimdUint: Copy + Sealed { macro_rules! impl_trait { { $($ty:ident ($signed:ident)),* } => { $( - impl Sealed for Simd<$ty, N> {} + impl Sealed for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, + { + } impl SimdUint for Simd<$ty, N> + where + LaneCount: SupportedLaneCount, { type Scalar = $ty; type Cast = Simd; diff --git a/library/portable-simd/crates/core_simd/src/simd/ptr/const_ptr.rs b/library/portable-simd/crates/core_simd/src/simd/ptr/const_ptr.rs index 7ef9dc21373ec..36452e7ae920d 100644 --- a/library/portable-simd/crates/core_simd/src/simd/ptr/const_ptr.rs +++ b/library/portable-simd/crates/core_simd/src/simd/ptr/const_ptr.rs @@ -1,5 +1,5 @@ use super::sealed::Sealed; -use crate::simd::{Mask, Simd, cmp::SimdPartialEq, num::SimdUint}; +use crate::simd::{LaneCount, Mask, Simd, SupportedLaneCount, cmp::SimdPartialEq, num::SimdUint}; /// Operations on SIMD vectors of constant pointers. pub trait SimdConstPtr: Copy + Sealed { @@ -88,9 +88,12 @@ pub trait SimdConstPtr: Copy + Sealed { fn wrapping_sub(self, count: Self::Usize) -> Self; } -impl Sealed for Simd<*const T, N> {} +impl Sealed for Simd<*const T, N> where LaneCount: SupportedLaneCount {} -impl SimdConstPtr for Simd<*const T, N> { +impl SimdConstPtr for Simd<*const T, N> +where + LaneCount: SupportedLaneCount, +{ type Usize = Simd; type Isize = Simd; type CastPtr = Simd<*const U, N>; diff --git a/library/portable-simd/crates/core_simd/src/simd/ptr/mut_ptr.rs b/library/portable-simd/crates/core_simd/src/simd/ptr/mut_ptr.rs index 3b9b75ddf5660..c644f390c20a5 100644 --- a/library/portable-simd/crates/core_simd/src/simd/ptr/mut_ptr.rs +++ b/library/portable-simd/crates/core_simd/src/simd/ptr/mut_ptr.rs @@ -1,5 +1,5 @@ use super::sealed::Sealed; -use crate::simd::{Mask, Simd, cmp::SimdPartialEq, num::SimdUint}; +use crate::simd::{LaneCount, Mask, Simd, SupportedLaneCount, cmp::SimdPartialEq, num::SimdUint}; /// Operations on SIMD vectors of mutable pointers. pub trait SimdMutPtr: Copy + Sealed { @@ -85,9 +85,12 @@ pub trait SimdMutPtr: Copy + Sealed { fn wrapping_sub(self, count: Self::Usize) -> Self; } -impl Sealed for Simd<*mut T, N> {} +impl Sealed for Simd<*mut T, N> where LaneCount: SupportedLaneCount {} -impl SimdMutPtr for Simd<*mut T, N> { +impl SimdMutPtr for Simd<*mut T, N> +where + LaneCount: SupportedLaneCount, +{ type Usize = Simd; type Isize = Simd; type CastPtr = Simd<*mut U, N>; diff --git a/library/portable-simd/crates/core_simd/src/swizzle.rs b/library/portable-simd/crates/core_simd/src/swizzle.rs index 02dcd71356dd6..dbdd6ef40eba7 100644 --- a/library/portable-simd/crates/core_simd/src/swizzle.rs +++ b/library/portable-simd/crates/core_simd/src/swizzle.rs @@ -1,4 +1,4 @@ -use crate::simd::{Mask, MaskElement, Simd, SimdElement}; +use crate::simd::{LaneCount, Mask, MaskElement, Simd, SimdElement, SupportedLaneCount}; /// Constructs a new SIMD vector by copying elements from selected elements in other vectors. /// @@ -82,6 +82,8 @@ pub trait Swizzle { fn swizzle(vector: Simd) -> Simd where T: SimdElement, + LaneCount: SupportedLaneCount, + LaneCount: SupportedLaneCount, { // Safety: `vector` is a vector, and the index is a const vector of u32. unsafe { @@ -120,6 +122,8 @@ pub trait Swizzle { fn concat_swizzle(first: Simd, second: Simd) -> Simd where T: SimdElement, + LaneCount: SupportedLaneCount, + LaneCount: SupportedLaneCount, { // Safety: `first` and `second` are vectors, and the index is a const vector of u32. unsafe { @@ -157,9 +161,11 @@ pub trait Swizzle { fn swizzle_mask(mask: Mask) -> Mask where T: MaskElement, + LaneCount: SupportedLaneCount, + LaneCount: SupportedLaneCount, { // SAFETY: all elements of this mask come from another mask - unsafe { Mask::from_simd_unchecked(Self::swizzle(mask.to_simd())) } + unsafe { Mask::from_int_unchecked(Self::swizzle(mask.to_int())) } } /// Creates a new mask from the elements of `first` and `second`. @@ -171,17 +177,18 @@ pub trait Swizzle { fn concat_swizzle_mask(first: Mask, second: Mask) -> Mask where T: MaskElement, + LaneCount: SupportedLaneCount, + LaneCount: SupportedLaneCount, { // SAFETY: all elements of this mask come from another mask - unsafe { - Mask::from_simd_unchecked(Self::concat_swizzle(first.to_simd(), second.to_simd())) - } + unsafe { Mask::from_int_unchecked(Self::concat_swizzle(first.to_int(), second.to_int())) } } } impl Simd where T: SimdElement, + LaneCount: SupportedLaneCount, { /// Reverse the order of the elements in the vector. #[inline] @@ -455,7 +462,10 @@ where /// ``` #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] - pub fn resize(self, value: T) -> Simd { + pub fn resize(self, value: T) -> Simd + where + LaneCount: SupportedLaneCount, + { struct Resize; impl Swizzle for Resize { const INDEX: [usize; M] = const { @@ -483,7 +493,10 @@ where /// ``` #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] - pub fn extract(self) -> Simd { + pub fn extract(self) -> Simd + where + LaneCount: SupportedLaneCount, + { struct Extract; impl Swizzle for Extract { const INDEX: [usize; LEN] = const { @@ -504,13 +517,14 @@ where impl Mask where T: MaskElement, + LaneCount: SupportedLaneCount, { /// Reverse the order of the elements in the mask. #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] pub fn reverse(self) -> Self { // Safety: swizzles are safe for masks - unsafe { Self::from_simd_unchecked(self.to_simd().reverse()) } + unsafe { Self::from_int_unchecked(self.to_int().reverse()) } } /// Rotates the mask such that the first `OFFSET` elements of the slice move to the end @@ -520,7 +534,7 @@ where #[must_use = "method returns a new vector and does not mutate the original inputs"] pub fn rotate_elements_left(self) -> Self { // Safety: swizzles are safe for masks - unsafe { Self::from_simd_unchecked(self.to_simd().rotate_elements_left::()) } + unsafe { Self::from_int_unchecked(self.to_int().rotate_elements_left::()) } } /// Rotates the mask such that the first `self.len() - OFFSET` elements of the mask move to @@ -530,7 +544,7 @@ where #[must_use = "method returns a new vector and does not mutate the original inputs"] pub fn rotate_elements_right(self) -> Self { // Safety: swizzles are safe for masks - unsafe { Self::from_simd_unchecked(self.to_simd().rotate_elements_right::()) } + unsafe { Self::from_int_unchecked(self.to_int().rotate_elements_right::()) } } /// Shifts the mask elements to the left by `OFFSET`, filling in with @@ -540,7 +554,7 @@ where pub fn shift_elements_left(self, padding: bool) -> Self { // Safety: swizzles are safe for masks unsafe { - Self::from_simd_unchecked(self.to_simd().shift_elements_left::(if padding { + Self::from_int_unchecked(self.to_int().shift_elements_left::(if padding { T::TRUE } else { T::FALSE @@ -555,7 +569,7 @@ where pub fn shift_elements_right(self, padding: bool) -> Self { // Safety: swizzles are safe for masks unsafe { - Self::from_simd_unchecked(self.to_simd().shift_elements_right::(if padding { + Self::from_int_unchecked(self.to_int().shift_elements_right::(if padding { T::TRUE } else { T::FALSE @@ -584,9 +598,9 @@ where #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] pub fn interleave(self, other: Self) -> (Self, Self) { - let (lo, hi) = self.to_simd().interleave(other.to_simd()); + let (lo, hi) = self.to_int().interleave(other.to_int()); // Safety: swizzles are safe for masks - unsafe { (Self::from_simd_unchecked(lo), Self::from_simd_unchecked(hi)) } + unsafe { (Self::from_int_unchecked(lo), Self::from_int_unchecked(hi)) } } /// Deinterleave two masks. @@ -613,12 +627,12 @@ where #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] pub fn deinterleave(self, other: Self) -> (Self, Self) { - let (even, odd) = self.to_simd().deinterleave(other.to_simd()); + let (even, odd) = self.to_int().deinterleave(other.to_int()); // Safety: swizzles are safe for masks unsafe { ( - Self::from_simd_unchecked(even), - Self::from_simd_unchecked(odd), + Self::from_int_unchecked(even), + Self::from_int_unchecked(odd), ) } } @@ -639,10 +653,13 @@ where /// ``` #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] - pub fn resize(self, value: bool) -> Mask { + pub fn resize(self, value: bool) -> Mask + where + LaneCount: SupportedLaneCount, + { // Safety: swizzles are safe for masks unsafe { - Mask::::from_simd_unchecked(self.to_simd().resize::(if value { + Mask::::from_int_unchecked(self.to_int().resize::(if value { T::TRUE } else { T::FALSE @@ -662,8 +679,11 @@ where /// ``` #[inline] #[must_use = "method returns a new vector and does not mutate the original inputs"] - pub fn extract(self) -> Mask { + pub fn extract(self) -> Mask + where + LaneCount: SupportedLaneCount, + { // Safety: swizzles are safe for masks - unsafe { Mask::::from_simd_unchecked(self.to_simd().extract::()) } + unsafe { Mask::::from_int_unchecked(self.to_int().extract::()) } } } diff --git a/library/portable-simd/crates/core_simd/src/swizzle_dyn.rs b/library/portable-simd/crates/core_simd/src/swizzle_dyn.rs index ae0b174973da7..773bd028bae09 100644 --- a/library/portable-simd/crates/core_simd/src/swizzle_dyn.rs +++ b/library/portable-simd/crates/core_simd/src/swizzle_dyn.rs @@ -1,7 +1,10 @@ -use crate::simd::Simd; +use crate::simd::{LaneCount, Simd, SupportedLaneCount}; use core::mem; -impl Simd { +impl Simd +where + LaneCount: SupportedLaneCount, +{ /// Swizzle a vector of bytes according to the index vector. /// Indices within range select the appropriate byte. /// Indices "out of bounds" instead select 0. @@ -136,7 +139,7 @@ unsafe fn armv7_neon_swizzle_u8x16(bytes: Simd, idxs: Simd) -> S #[inline] #[allow(clippy::let_and_return)] unsafe fn avx2_pshufb(bytes: Simd, idxs: Simd) -> Simd { - use crate::simd::{Select, cmp::SimdPartialOrd}; + use crate::simd::cmp::SimdPartialOrd; #[cfg(target_arch = "x86")] use core::arch::x86; #[cfg(target_arch = "x86_64")] @@ -181,7 +184,10 @@ unsafe fn transize( f: unsafe fn(T, T) -> T, a: Simd, b: Simd, -) -> Simd { +) -> Simd +where + LaneCount: SupportedLaneCount, +{ // SAFETY: Same obligation to use this function as to use mem::transmute_copy. unsafe { mem::transmute_copy(&f(mem::transmute_copy(&a), mem::transmute_copy(&b))) } } @@ -190,8 +196,11 @@ unsafe fn transize( #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] #[allow(unused)] #[inline(always)] -fn zeroing_idxs(idxs: Simd) -> Simd { - use crate::simd::{Select, cmp::SimdPartialOrd}; +fn zeroing_idxs(idxs: Simd) -> Simd +where + LaneCount: SupportedLaneCount, +{ + use crate::simd::cmp::SimdPartialOrd; idxs.simd_lt(Simd::splat(N as u8)) .select(idxs, Simd::splat(u8::MAX)) } diff --git a/library/portable-simd/crates/core_simd/src/to_bytes.rs b/library/portable-simd/crates/core_simd/src/to_bytes.rs index 1fd285e457db8..fee2cc06c5b09 100644 --- a/library/portable-simd/crates/core_simd/src/to_bytes.rs +++ b/library/portable-simd/crates/core_simd/src/to_bytes.rs @@ -1,12 +1,12 @@ use crate::simd::{ - Simd, SimdElement, + LaneCount, Simd, SimdElement, SupportedLaneCount, num::{SimdFloat, SimdInt, SimdUint}, }; mod sealed { use super::*; pub trait Sealed {} - impl Sealed for Simd {} + impl Sealed for Simd where LaneCount: SupportedLaneCount {} } use sealed::Sealed; diff --git a/library/portable-simd/crates/core_simd/src/vector.rs b/library/portable-simd/crates/core_simd/src/vector.rs index 5b3a689f3611b..f40031f8c4da7 100644 --- a/library/portable-simd/crates/core_simd/src/vector.rs +++ b/library/portable-simd/crates/core_simd/src/vector.rs @@ -1,7 +1,5 @@ -use core::intrinsics::simd::SimdAlign; - use crate::simd::{ - Mask, MaskElement, + LaneCount, Mask, MaskElement, SupportedLaneCount, Swizzle, cmp::SimdPartialOrd, num::SimdUint, ptr::{SimdConstPtr, SimdMutPtr}, @@ -53,8 +51,6 @@ use crate::simd::{ /// Thus it is sound to [`transmute`] `Simd` to `[T; N]` and should optimize to "zero cost", /// but the reverse transmutation may require a copy the compiler cannot simply elide. /// -/// `N` cannot be 0 and may be at most 64. This limit may be increased in the future. -/// /// # ABI "Features" /// Due to Rust's safety guarantees, `Simd` is currently passed and returned via memory, /// not SIMD registers, except as an optimization. Using `#[inline]` on functions that accept @@ -104,13 +100,14 @@ use crate::simd::{ // avoided, as it will likely become illegal on `#[repr(simd)]` structs in the future. It also // causes rustc to emit illegal LLVM IR in some cases. #[repr(simd, packed)] -#[rustc_simd_monomorphize_lane_limit = "64"] pub struct Simd([T; N]) where + LaneCount: SupportedLaneCount, T: SimdElement; impl Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { /// Number of elements in this vector. @@ -149,8 +146,30 @@ where #[inline] #[rustc_const_unstable(feature = "portable_simd", issue = "86656")] pub const fn splat(value: T) -> Self { - // SAFETY: T is a SimdElement, and the item type of Self. - unsafe { core::intrinsics::simd::simd_splat(value) } + const fn splat_const(value: T) -> Simd + where + T: SimdElement, + LaneCount: SupportedLaneCount, + { + Simd::from_array([value; N]) + } + + fn splat_rt(value: T) -> Simd + where + T: SimdElement, + LaneCount: SupportedLaneCount, + { + // This is preferred over `[value; N]`, since it's explicitly a splat: + // https://github.com/rust-lang/rust/issues/97804 + struct Splat; + impl Swizzle for Splat { + const INDEX: [usize; N] = [0; N]; + } + + Splat::swizzle::(Simd::::from([value])) + } + + core::intrinsics::const_eval_select((value,), splat_const, splat_rt) } /// Returns an array reference containing the entire SIMD vector. @@ -176,7 +195,7 @@ where /// Returns a mutable array reference containing the entire SIMD vector. #[inline] - pub const fn as_mut_array(&mut self) -> &mut [T; N] { + pub fn as_mut_array(&mut self) -> &mut [T; N] { // SAFETY: `Simd` is just an overaligned `[T; N]` with // potential padding at the end, so pointer casting to a // `&mut [T; N]` is safe. @@ -305,7 +324,7 @@ where /// ``` #[inline] #[track_caller] - pub const fn copy_to_slice(self, slice: &mut [T]) { + pub fn copy_to_slice(self, slice: &mut [T]) { assert!( slice.len() >= Self::LEN, "slice length must be at least the number of elements" @@ -446,7 +465,7 @@ where /// value from `or` is passed through. /// /// # Safety - /// Enabled `ptr` elements must be safe to read as if by `core::ptr::read`. + /// Enabled `ptr` elements must be safe to read as if by `std::ptr::read`. #[must_use] #[inline] pub unsafe fn load_select_ptr( @@ -456,11 +475,12 @@ where ) -> Self { // SAFETY: The safety of reading elements through `ptr` is ensured by the caller. unsafe { - core::intrinsics::simd::simd_masked_load::<_, _, _, { SimdAlign::Element }>( - enable.to_simd(), - ptr, - or, - ) + core::intrinsics::simd::simd_masked_load::< + _, + _, + _, + { core::intrinsics::simd::SimdAlign::Element }, + >(enable.to_int(), ptr, or) } } @@ -639,7 +659,7 @@ where or: Self, ) -> Self { // Safety: The caller is responsible for upholding all invariants - unsafe { core::intrinsics::simd::simd_gather(or, source, enable.to_simd()) } + unsafe { core::intrinsics::simd::simd_gather(or, source, enable.to_int()) } } /// Conditionally write contiguous elements to `slice`. The `enable` mask controls @@ -711,11 +731,12 @@ where pub unsafe fn store_select_ptr(self, ptr: *mut T, enable: Mask<::Mask, N>) { // SAFETY: The safety of writing elements through `ptr` is ensured by the caller. unsafe { - core::intrinsics::simd::simd_masked_store::<_, _, _, { SimdAlign::Element }>( - enable.to_simd(), - ptr, - self, - ) + core::intrinsics::simd::simd_masked_store::< + _, + _, + _, + { core::intrinsics::simd::SimdAlign::Element }, + >(enable.to_int(), ptr, self) } } @@ -875,14 +896,20 @@ where #[cfg_attr(miri, track_caller)] // even without panics, this helps for Miri backtraces pub unsafe fn scatter_select_ptr(self, dest: Simd<*mut T, N>, enable: Mask) { // Safety: The caller is responsible for upholding all invariants - unsafe { core::intrinsics::simd::simd_scatter(self, dest, enable.to_simd()) } + unsafe { core::intrinsics::simd::simd_scatter(self, dest, enable.to_int()) } } } -impl Copy for Simd where T: SimdElement {} +impl Copy for Simd +where + LaneCount: SupportedLaneCount, + T: SimdElement, +{ +} impl Clone for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -893,6 +920,7 @@ where impl Default for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + Default, { #[inline] @@ -903,6 +931,7 @@ where impl PartialEq for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + PartialEq, { #[inline] @@ -911,7 +940,7 @@ where let mask = unsafe { let tfvec: Simd<::Mask, N> = core::intrinsics::simd::simd_eq(*self, *other); - Mask::from_simd_unchecked(tfvec) + Mask::from_int_unchecked(tfvec) }; // Two vectors are equal if all elements are equal when compared elementwise @@ -925,7 +954,7 @@ where let mask = unsafe { let tfvec: Simd<::Mask, N> = core::intrinsics::simd::simd_ne(*self, *other); - Mask::from_simd_unchecked(tfvec) + Mask::from_int_unchecked(tfvec) }; // Two vectors are non-equal if any elements are non-equal when compared elementwise @@ -936,6 +965,7 @@ where /// Lexicographic order. For the SIMD elementwise minimum and maximum, use simd_min and simd_max instead. impl PartialOrd for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + PartialOrd, { #[inline] @@ -945,11 +975,17 @@ where } } -impl Eq for Simd where T: SimdElement + Eq {} +impl Eq for Simd +where + LaneCount: SupportedLaneCount, + T: SimdElement + Eq, +{ +} /// Lexicographic order. For the SIMD elementwise minimum and maximum, use simd_min and simd_max instead. impl Ord for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + Ord, { #[inline] @@ -961,6 +997,7 @@ where impl core::hash::Hash for Simd where + LaneCount: SupportedLaneCount, T: SimdElement + core::hash::Hash, { #[inline] @@ -975,6 +1012,7 @@ where // array references impl AsRef<[T; N]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -985,6 +1023,7 @@ where impl AsMut<[T; N]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -996,6 +1035,7 @@ where // slice references impl AsRef<[T]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -1006,6 +1046,7 @@ where impl AsMut<[T]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -1017,6 +1058,7 @@ where // vector/array conversion impl From<[T; N]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -1027,6 +1069,7 @@ where impl From> for [T; N] where + LaneCount: SupportedLaneCount, T: SimdElement, { #[inline] @@ -1037,6 +1080,7 @@ where impl TryFrom<&[T]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { type Error = core::array::TryFromSliceError; @@ -1049,6 +1093,7 @@ where impl TryFrom<&mut [T]> for Simd where + LaneCount: SupportedLaneCount, T: SimdElement, { type Error = core::array::TryFromSliceError; @@ -1186,7 +1231,10 @@ where } #[inline] -fn lane_indices() -> Simd { +fn lane_indices() -> Simd +where + LaneCount: SupportedLaneCount, +{ #![allow(clippy::needless_range_loop)] let mut index = [0; N]; for i in 0..N { @@ -1198,6 +1246,7 @@ fn lane_indices() -> Simd { #[inline] fn mask_up_to(len: usize) -> Mask where + LaneCount: SupportedLaneCount, M: MaskElement, { let index = lane_indices::(); diff --git a/library/portable-simd/crates/core_simd/src/vendor/loongarch64.rs b/library/portable-simd/crates/core_simd/src/vendor/loongarch64.rs index 1f84cdb971ecb..1290bc166b2b8 100644 --- a/library/portable-simd/crates/core_simd/src/vendor/loongarch64.rs +++ b/library/portable-simd/crates/core_simd/src/vendor/loongarch64.rs @@ -1,26 +1,31 @@ use crate::simd::*; use core::arch::loongarch64::*; -from_transmute! { unsafe u8x16 => m128i } -from_transmute! { unsafe u8x32 => m256i } -from_transmute! { unsafe i8x16 => m128i } -from_transmute! { unsafe i8x32 => m256i } +from_transmute! { unsafe u8x16 => v16u8 } +from_transmute! { unsafe u8x32 => v32u8 } +from_transmute! { unsafe i8x16 => v16i8 } +from_transmute! { unsafe i8x32 => v32i8 } -from_transmute! { unsafe u16x8 => m128i } -from_transmute! { unsafe u16x16 => m256i } -from_transmute! { unsafe i16x8 => m128i } -from_transmute! { unsafe i16x16 => m256i } +from_transmute! { unsafe u16x8 => v8u16 } +from_transmute! { unsafe u16x16 => v16u16 } +from_transmute! { unsafe i16x8 => v8i16 } +from_transmute! { unsafe i16x16 => v16i16 } -from_transmute! { unsafe u32x4 => m128i } -from_transmute! { unsafe u32x8 => m256i } -from_transmute! { unsafe i32x4 => m128i } -from_transmute! { unsafe i32x8 => m256i } -from_transmute! { unsafe f32x4 => m128 } -from_transmute! { unsafe f32x8 => m256 } +from_transmute! { unsafe u32x4 => v4u32 } +from_transmute! { unsafe u32x8 => v8u32 } +from_transmute! { unsafe i32x4 => v4i32 } +from_transmute! { unsafe i32x8 => v8i32 } +from_transmute! { unsafe f32x4 => v4f32 } +from_transmute! { unsafe f32x8 => v8f32 } -from_transmute! { unsafe u64x2 => m128i } -from_transmute! { unsafe u64x4 => m256i } -from_transmute! { unsafe i64x2 => m128i } -from_transmute! { unsafe i64x4 => m256i } -from_transmute! { unsafe f64x2 => m128d } -from_transmute! { unsafe f64x4 => m256d } +from_transmute! { unsafe u64x2 => v2u64 } +from_transmute! { unsafe u64x4 => v4u64 } +from_transmute! { unsafe i64x2 => v2i64 } +from_transmute! { unsafe i64x4 => v4i64 } +from_transmute! { unsafe f64x2 => v2f64 } +from_transmute! { unsafe f64x4 => v4f64 } + +from_transmute! { unsafe usizex2 => v2u64 } +from_transmute! { unsafe usizex4 => v4u64 } +from_transmute! { unsafe isizex2 => v2i64 } +from_transmute! { unsafe isizex4 => v4i64 } diff --git a/library/portable-simd/crates/core_simd/src/vendor/wasm32.rs b/library/portable-simd/crates/core_simd/src/vendor/wasm32.rs index 1fdb2bc86d346..ef3baf885b0fb 100644 --- a/library/portable-simd/crates/core_simd/src/vendor/wasm32.rs +++ b/library/portable-simd/crates/core_simd/src/vendor/wasm32.rs @@ -14,3 +14,17 @@ from_transmute! { unsafe f32x4 => v128 } from_transmute! { unsafe u64x2 => v128 } from_transmute! { unsafe i64x2 => v128 } from_transmute! { unsafe f64x2 => v128 } + +#[cfg(target_pointer_width = "32")] +mod p32 { + use super::*; + from_transmute! { unsafe usizex4 => v128 } + from_transmute! { unsafe isizex4 => v128 } +} + +#[cfg(target_pointer_width = "64")] +mod p64 { + use super::*; + from_transmute! { unsafe usizex2 => v128 } + from_transmute! { unsafe isizex2 => v128 } +} diff --git a/library/portable-simd/crates/core_simd/src/vendor/x86.rs b/library/portable-simd/crates/core_simd/src/vendor/x86.rs index eae42e6fd0d0a..66aaf90eef597 100644 --- a/library/portable-simd/crates/core_simd/src/vendor/x86.rs +++ b/library/portable-simd/crates/core_simd/src/vendor/x86.rs @@ -39,3 +39,25 @@ from_transmute! { unsafe i64x8 => __m512i } from_transmute! { unsafe f64x2 => __m128d } from_transmute! { unsafe f64x4 => __m256d } from_transmute! { unsafe f64x8 => __m512d } + +#[cfg(target_pointer_width = "32")] +mod p32 { + use super::*; + from_transmute! { unsafe usizex4 => __m128i } + from_transmute! { unsafe usizex8 => __m256i } + from_transmute! { unsafe Simd => __m512i } + from_transmute! { unsafe isizex4 => __m128i } + from_transmute! { unsafe isizex8 => __m256i } + from_transmute! { unsafe Simd => __m512i } +} + +#[cfg(target_pointer_width = "64")] +mod p64 { + use super::*; + from_transmute! { unsafe usizex2 => __m128i } + from_transmute! { unsafe usizex4 => __m256i } + from_transmute! { unsafe usizex8 => __m512i } + from_transmute! { unsafe isizex2 => __m128i } + from_transmute! { unsafe isizex4 => __m256i } + from_transmute! { unsafe isizex8 => __m512i } +} diff --git a/library/portable-simd/crates/core_simd/tests/masks.rs b/library/portable-simd/crates/core_simd/tests/masks.rs index 53fb2367b6055..48786d02440b3 100644 --- a/library/portable-simd/crates/core_simd/tests/masks.rs +++ b/library/portable-simd/crates/core_simd/tests/masks.rs @@ -65,9 +65,9 @@ macro_rules! test_mask_api { fn roundtrip_int_conversion() { let values = [true, false, false, true, false, false, true, false]; let mask = Mask::<$type, 8>::from_array(values); - let int = mask.to_simd(); + let int = mask.to_int(); assert_eq!(int.to_array(), [-1, 0, 0, -1, 0, 0, -1, 0]); - assert_eq!(Mask::<$type, 8>::from_simd(int), mask); + assert_eq!(Mask::<$type, 8>::from_int(int), mask); } #[test] diff --git a/library/portable-simd/crates/std_float/src/lib.rs b/library/portable-simd/crates/std_float/src/lib.rs index b269efc9b1d76..148aa5f9f1771 100644 --- a/library/portable-simd/crates/std_float/src/lib.rs +++ b/library/portable-simd/crates/std_float/src/lib.rs @@ -11,7 +11,7 @@ use core_simd::simd; use core::intrinsics::simd as intrinsics; -use simd::Simd; +use simd::{LaneCount, Simd, SupportedLaneCount}; #[cfg(feature = "as_crate")] mod experimental { @@ -66,43 +66,28 @@ pub trait StdFloat: Sealed + Sized { /// Produces a vector where every element has the sine of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn sin(self) -> Self { - unsafe { intrinsics::simd_fsin(self) } - } + fn sin(self) -> Self; /// Produces a vector where every element has the cosine of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn cos(self) -> Self { - unsafe { intrinsics::simd_fcos(self) } - } + fn cos(self) -> Self; /// Produces a vector where every element has the exponential (base e) of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn exp(self) -> Self { - unsafe { intrinsics::simd_fexp(self) } - } + fn exp(self) -> Self; /// Produces a vector where every element has the exponential (base 2) of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn exp2(self) -> Self { - unsafe { intrinsics::simd_fexp2(self) } - } + fn exp2(self) -> Self; /// Produces a vector where every element has the natural logarithm of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn ln(self) -> Self { - unsafe { intrinsics::simd_flog(self) } - } + fn ln(self) -> Self; /// Produces a vector where every element has the logarithm with respect to an arbitrary /// in the equivalently-indexed elements in `self` and `base`. @@ -114,19 +99,13 @@ pub trait StdFloat: Sealed + Sized { /// Produces a vector where every element has the base-2 logarithm of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn log2(self) -> Self { - unsafe { intrinsics::simd_flog2(self) } - } + fn log2(self) -> Self; /// Produces a vector where every element has the base-10 logarithm of the value /// in the equivalently-indexed element in `self`. - #[inline] #[must_use = "method returns a new vector and does not mutate the original value"] - fn log10(self) -> Self { - unsafe { intrinsics::simd_flog10(self) } - } + fn log10(self) -> Self; /// Returns the smallest integer greater than or equal to each element. #[must_use = "method returns a new vector and does not mutate the original value"] @@ -161,19 +140,68 @@ pub trait StdFloat: Sealed + Sized { fn fract(self) -> Self; } -impl Sealed for Simd {} -impl Sealed for Simd {} - -impl StdFloat for Simd { - #[inline] - fn fract(self) -> Self { - self - self.trunc() +impl Sealed for Simd where LaneCount: SupportedLaneCount {} +impl Sealed for Simd where LaneCount: SupportedLaneCount {} + +macro_rules! impl_float { + { + $($fn:ident: $intrinsic:ident,)* + } => { + impl StdFloat for Simd + where + LaneCount: SupportedLaneCount, + { + #[inline] + fn fract(self) -> Self { + self - self.trunc() + } + + $( + #[inline] + fn $fn(self) -> Self { + unsafe { intrinsics::$intrinsic(self) } + } + )* + } + + impl StdFloat for Simd + where + LaneCount: SupportedLaneCount, + { + #[inline] + fn fract(self) -> Self { + self - self.trunc() + } + + $( + #[inline] + fn $fn(self) -> Self { + // https://github.com/llvm/llvm-project/issues/83729 + #[cfg(target_arch = "aarch64")] + { + let mut ln = Self::splat(0f64); + for i in 0..N { + ln[i] = self[i].$fn() + } + ln + } + + #[cfg(not(target_arch = "aarch64"))] + { + unsafe { intrinsics::$intrinsic(self) } + } + } + )* + } } } -impl StdFloat for Simd { - #[inline] - fn fract(self) -> Self { - self - self.trunc() - } +impl_float! { + sin: simd_fsin, + cos: simd_fcos, + exp: simd_fexp, + exp2: simd_fexp2, + ln: simd_flog, + log2: simd_flog2, + log10: simd_flog10, } diff --git a/library/portable-simd/crates/std_float/tests/float.rs b/library/portable-simd/crates/std_float/tests/float.rs index c608ba49564e0..c66c968f8c667 100644 --- a/library/portable-simd/crates/std_float/tests/float.rs +++ b/library/portable-simd/crates/std_float/tests/float.rs @@ -16,33 +16,15 @@ macro_rules! unary_test { } } -macro_rules! unary_approx_test { +macro_rules! binary_test { { $scalar:tt, $($func:tt),+ } => { test_helpers::test_lanes! { $( fn $func() { - test_helpers::test_unary_elementwise_approx( - &core_simd::simd::Simd::<$scalar, LANES>::$func, - &$scalar::$func, - &|_| true, - 8, - ) - } - )* - } - } -} - -macro_rules! binary_approx_test { - { $scalar:tt, $($func:tt),+ } => { - test_helpers::test_lanes! { - $( - fn $func() { - test_helpers::test_binary_elementwise_approx( + test_helpers::test_binary_elementwise( &core_simd::simd::Simd::<$scalar, LANES>::$func, &$scalar::$func, &|_, _| true, - 16, ) } )* @@ -71,13 +53,10 @@ macro_rules! impl_tests { mod $scalar { use std_float::StdFloat; - unary_test! { $scalar, sqrt, ceil, floor, round, trunc } + unary_test! { $scalar, sqrt, sin, cos, exp, exp2, ln, log2, log10, ceil, floor, round, trunc } + binary_test! { $scalar, log } ternary_test! { $scalar, mul_add } - // https://github.com/rust-lang/miri/issues/3555 - unary_approx_test! { $scalar, sin, cos, exp, exp2, ln, log2, log10 } - binary_approx_test! { $scalar, log } - test_helpers::test_lanes! { fn fract() { test_helpers::test_unary_elementwise_flush_subnormals( diff --git a/library/portable-simd/crates/test_helpers/Cargo.toml b/library/portable-simd/crates/test_helpers/Cargo.toml index 408bb04c7aa40..a5359b9abc84d 100644 --- a/library/portable-simd/crates/test_helpers/Cargo.toml +++ b/library/portable-simd/crates/test_helpers/Cargo.toml @@ -6,4 +6,3 @@ publish = false [dependencies] proptest = { version = "0.10", default-features = false, features = ["alloc"] } -float-cmp = "0.10" diff --git a/library/portable-simd/crates/test_helpers/src/lib.rs b/library/portable-simd/crates/test_helpers/src/lib.rs index eb3d3f68bc2ea..197c920e11eac 100644 --- a/library/portable-simd/crates/test_helpers/src/lib.rs +++ b/library/portable-simd/crates/test_helpers/src/lib.rs @@ -12,9 +12,6 @@ pub mod wasm; #[macro_use] pub mod biteq; -#[macro_use] -pub mod approxeq; - pub mod subnormals; use subnormals::FlushSubnormals; @@ -188,41 +185,6 @@ pub fn test_unary_elementwise( - fv: &dyn Fn(Vector) -> VectorResult, - fs: &dyn Fn(Scalar) -> ScalarResult, - check: &dyn Fn([Scalar; LANES]) -> bool, - ulps: i64, -) where - Scalar: Copy + core::fmt::Debug + DefaultStrategy, - ScalarResult: Copy + approxeq::ApproxEq + core::fmt::Debug + DefaultStrategy, - Vector: Into<[Scalar; LANES]> + From<[Scalar; LANES]> + Copy, - VectorResult: Into<[ScalarResult; LANES]> + From<[ScalarResult; LANES]> + Copy, -{ - test_1(&|x: [Scalar; LANES]| { - proptest::prop_assume!(check(x)); - let result_1: [ScalarResult; LANES] = fv(x.into()).into(); - let result_2: [ScalarResult; LANES] = x - .iter() - .copied() - .map(fs) - .collect::>() - .try_into() - .unwrap(); - crate::prop_assert_approxeq!(result_1, result_2, ulps); - Ok(()) - }); -} - /// Test a unary vector function against a unary scalar function, applied elementwise. /// /// Where subnormals are flushed, use approximate equality. @@ -328,44 +290,6 @@ pub fn test_binary_elementwise< }); } -/// Test a binary vector function against a binary scalar function, applied elementwise. -pub fn test_binary_elementwise_approx< - Scalar1, - Scalar2, - ScalarResult, - Vector1, - Vector2, - VectorResult, - const LANES: usize, ->( - fv: &dyn Fn(Vector1, Vector2) -> VectorResult, - fs: &dyn Fn(Scalar1, Scalar2) -> ScalarResult, - check: &dyn Fn([Scalar1; LANES], [Scalar2; LANES]) -> bool, - ulps: i64, -) where - Scalar1: Copy + core::fmt::Debug + DefaultStrategy, - Scalar2: Copy + core::fmt::Debug + DefaultStrategy, - ScalarResult: Copy + approxeq::ApproxEq + core::fmt::Debug + DefaultStrategy, - Vector1: Into<[Scalar1; LANES]> + From<[Scalar1; LANES]> + Copy, - Vector2: Into<[Scalar2; LANES]> + From<[Scalar2; LANES]> + Copy, - VectorResult: Into<[ScalarResult; LANES]> + From<[ScalarResult; LANES]> + Copy, -{ - test_2(&|x: [Scalar1; LANES], y: [Scalar2; LANES]| { - proptest::prop_assume!(check(x, y)); - let result_1: [ScalarResult; LANES] = fv(x.into(), y.into()).into(); - let result_2: [ScalarResult; LANES] = x - .iter() - .copied() - .zip(y.iter().copied()) - .map(|(x, y)| fs(x, y)) - .collect::>() - .try_into() - .unwrap(); - crate::prop_assert_approxeq!(result_1, result_2, ulps); - Ok(()) - }); -} - /// Test a binary vector function against a binary scalar function, applied elementwise. /// /// Where subnormals are flushed, use approximate equality. @@ -604,6 +528,8 @@ macro_rules! test_lanes { use super::*; fn implementation() + where + core_simd::simd::LaneCount<$lanes>: core_simd::simd::SupportedLaneCount, $body #[cfg(target_arch = "wasm32")] @@ -702,6 +628,8 @@ macro_rules! test_lanes_panic { use super::*; fn implementation() + where + core_simd::simd::LaneCount<$lanes>: core_simd::simd::SupportedLaneCount, $body // test some odd and even non-power-of-2 lengths on miri diff --git a/library/portable-simd/rust-toolchain.toml b/library/portable-simd/rust-toolchain.toml index 639d07df73374..d17c6d2e88946 100644 --- a/library/portable-simd/rust-toolchain.toml +++ b/library/portable-simd/rust-toolchain.toml @@ -1,3 +1,3 @@ [toolchain] -channel = "nightly-2026-01-26" +channel = "nightly-2025-01-16" components = ["rustfmt", "clippy", "miri", "rust-src"] diff --git a/library/proc_macro/src/lib.rs b/library/proc_macro/src/lib.rs index 49b6f2ae41f89..95a7ea7d7b3b7 100644 --- a/library/proc_macro/src/lib.rs +++ b/library/proc_macro/src/lib.rs @@ -54,9 +54,7 @@ use std::{error, fmt}; pub use diagnostic::{Diagnostic, Level, MultiSpan}; #[unstable(feature = "proc_macro_value", issue = "136652")] pub use rustc_literal_escaper::EscapeError; -use rustc_literal_escaper::{ - MixedUnit, unescape_byte, unescape_byte_str, unescape_c_str, unescape_char, unescape_str, -}; +use rustc_literal_escaper::{MixedUnit, unescape_byte_str, unescape_c_str, unescape_str}; #[unstable(feature = "proc_macro_totokens", issue = "130977")] pub use to_tokens::ToTokens; @@ -1453,28 +1451,6 @@ impl Literal { }) } - /// Returns the unescaped character value if the current literal is a byte character literal. - #[unstable(feature = "proc_macro_value", issue = "136652")] - pub fn byte_character_value(&self) -> Result { - self.0.symbol.with(|symbol| match self.0.kind { - bridge::LitKind::Char => { - unescape_byte(symbol).map_err(ConversionErrorKind::FailedToUnescape) - } - _ => Err(ConversionErrorKind::InvalidLiteralKind), - }) - } - - /// Returns the unescaped character value if the current literal is a character literal. - #[unstable(feature = "proc_macro_value", issue = "136652")] - pub fn character_value(&self) -> Result { - self.0.symbol.with(|symbol| match self.0.kind { - bridge::LitKind::Char => { - unescape_char(symbol).map_err(ConversionErrorKind::FailedToUnescape) - } - _ => Err(ConversionErrorKind::InvalidLiteralKind), - }) - } - /// Returns the unescaped string value if the current literal is a string or a string literal. #[unstable(feature = "proc_macro_value", issue = "136652")] pub fn str_value(&self) -> Result { diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml index f4cc8edc0c1da..87887f113b79f 100644 --- a/library/std/Cargo.toml +++ b/library/std/Cargo.toml @@ -26,7 +26,7 @@ hashbrown = { version = "0.16.1", default-features = false, features = [ std_detect = { path = "../std_detect", public = true } # Dependencies of the `backtrace` crate -rustc-demangle = { version = "0.1.27", features = ['rustc-dep-of-std'] } +rustc-demangle = { version = "0.1.24", features = ['rustc-dep-of-std'] } [target.'cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))'.dependencies] miniz_oxide = { version = "0.8.0", optional = true, default-features = false } @@ -115,6 +115,7 @@ backtrace-trace-only = [] panic-unwind = ["dep:panic_unwind"] compiler-builtins-c = ["alloc/compiler-builtins-c"] compiler-builtins-mem = ["alloc/compiler-builtins-mem"] +compiler-builtins-no-f16-f128 = ["alloc/compiler-builtins-no-f16-f128"] llvm-libunwind = ["unwind/llvm-libunwind"] system-llvm-libunwind = ["unwind/system-llvm-libunwind"] diff --git a/library/std/src/env.rs b/library/std/src/env.rs index 615b767a4ea5a..5c068ad2471ad 100644 --- a/library/std/src/env.rs +++ b/library/std/src/env.rs @@ -728,7 +728,7 @@ pub fn temp_dir() -> PathBuf { /// /// You expected to safely execute the current executable, but you're /// instead executing something completely different. The code you -/// just executed runs with your privileges. +/// just executed run with your privileges. /// /// This sort of behavior has been known to [lead to privilege escalation] when /// used incorrectly. diff --git a/library/std/src/os/windows/mod.rs b/library/std/src/os/windows/mod.rs index 53c33d17a9f65..f452403ee8426 100644 --- a/library/std/src/os/windows/mod.rs +++ b/library/std/src/os/windows/mod.rs @@ -29,8 +29,6 @@ pub mod ffi; pub mod fs; pub mod io; -#[unstable(feature = "windows_unix_domain_sockets", issue = "150487")] -pub mod net; pub mod process; pub mod raw; pub mod thread; diff --git a/library/std/src/sys/pal/windows/mod.rs b/library/std/src/sys/pal/windows/mod.rs index 0cd9152614716..17e3cdbecd5c2 100644 --- a/library/std/src/sys/pal/windows/mod.rs +++ b/library/std/src/sys/pal/windows/mod.rs @@ -233,11 +233,6 @@ pub fn cvt(i: I) -> io::Result { if i.is_zero() { Err(io::Error::last_os_error()) } else { Ok(i) } } -#[allow(dead_code)] -pub fn cvt_nz(i: I) -> crate::io::Result<()> { - if i.is_zero() { Ok(()) } else { Err(crate::io::Error::last_os_error()) } -} - pub fn dur2timeout(dur: Duration) -> u32 { // Note that a duration is a (u64, u32) (seconds, nanoseconds) pair, and the // timeouts in windows APIs are typically u32 milliseconds. To translate, we diff --git a/library/std/src/sys/thread/mod.rs b/library/std/src/sys/thread/mod.rs index 9816981c7fc88..5010774dafde2 100644 --- a/library/std/src/sys/thread/mod.rs +++ b/library/std/src/sys/thread/mod.rs @@ -70,6 +70,7 @@ cfg_select! { target_os = "illumos", target_os = "dragonfly", target_os = "hurd", + target_os = "fuchsia", target_os = "vxworks", target_os = "wasi", target_vendor = "apple", @@ -130,6 +131,7 @@ cfg_select! { target_os = "illumos", target_os = "dragonfly", target_os = "hurd", + target_os = "fuchsia", target_os = "vxworks", target_os = "wasi", target_vendor = "apple", diff --git a/library/std/src/sys/thread/unix.rs b/library/std/src/sys/thread/unix.rs index b758737d00c64..e708c9a3f1bab 100644 --- a/library/std/src/sys/thread/unix.rs +++ b/library/std/src/sys/thread/unix.rs @@ -542,6 +542,7 @@ pub fn sleep(dur: Duration) { target_os = "illumos", target_os = "dragonfly", target_os = "hurd", + target_os = "fuchsia", target_os = "vxworks", target_os = "wasi", ) => { @@ -639,6 +640,7 @@ pub fn sleep(dur: Duration) { target_os = "illumos", target_os = "dragonfly", target_os = "hurd", + target_os = "fuchsia", target_os = "vxworks", target_os = "wasi", ))] diff --git a/library/std/src/thread/functions.rs b/library/std/src/thread/functions.rs index 95d7aaf518408..73d7278785704 100644 --- a/library/std/src/thread/functions.rs +++ b/library/std/src/thread/functions.rs @@ -316,6 +316,7 @@ pub fn sleep(dur: Duration) { /// | Illumos | [clock_nanosleep] (Monotonic Clock)] | /// | Dragonfly | [clock_nanosleep] (Monotonic Clock)] | /// | Hurd | [clock_nanosleep] (Monotonic Clock)] | +/// | Fuchsia | [clock_nanosleep] (Monotonic Clock)] | /// | Vxworks | [clock_nanosleep] (Monotonic Clock)] | /// | Apple | `mach_wait_until` | /// | Other | `sleep_until` uses [`sleep`] and does not issue a syscall itself | diff --git a/library/std/src/thread/join_handle.rs b/library/std/src/thread/join_handle.rs index 93dcc634d2dfa..7112fe44f9078 100644 --- a/library/std/src/thread/join_handle.rs +++ b/library/std/src/thread/join_handle.rs @@ -101,8 +101,6 @@ impl JoinHandle { /// Waits for the associated thread to finish. /// /// This function will return immediately if the associated thread has already finished. - /// Otherwise, it fully waits for the thread to finish, including all destructors - /// for thread-local variables that might be running after the main function of the thread. /// /// In terms of [atomic memory orderings], the completion of the associated /// thread synchronizes with this function returning. In other words, all diff --git a/library/std/src/thread/scoped.rs b/library/std/src/thread/scoped.rs index 929f7fdc6dcac..3ac9956336d7b 100644 --- a/library/std/src/thread/scoped.rs +++ b/library/std/src/thread/scoped.rs @@ -80,9 +80,6 @@ impl ScopeData { /// /// All threads spawned within the scope that haven't been manually joined /// will be automatically joined before this function returns. -/// However, note that joining will only wait for the main function of these threads to finish; even -/// when this function returns, destructors of thread-local variables in these threads might still -/// be running. /// /// # Panics /// @@ -293,8 +290,6 @@ impl<'scope, T> ScopedJoinHandle<'scope, T> { /// Waits for the associated thread to finish. /// /// This function will return immediately if the associated thread has already finished. - /// Otherwise, it fully waits for the thread to finish, including all destructors - /// for thread-local variables that might be running after the main function of the thread. /// /// In terms of [atomic memory orderings], the completion of the associated /// thread synchronizes with this function returning. diff --git a/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs b/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs index 9507b71106dd1..b042bd0c3c724 100644 --- a/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs +++ b/library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs @@ -733,42 +733,10 @@ pub fn vaddvq_u64(a: uint64x2_t) -> u64 { unsafe { simd_reduce_add_ordered(a, 0) } } #[doc = "Multi-vector floating-point absolute maximum"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamax_f16)"] -#[inline(always)] -#[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famax))] -#[unstable(feature = "faminmax", issue = "137933")] -pub fn vamax_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.famax.v4f16" - )] - fn _vamax_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t; - } - unsafe { _vamax_f16(a, b) } -} -#[doc = "Multi-vector floating-point absolute maximum"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f16)"] -#[inline(always)] -#[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famax))] -#[unstable(feature = "faminmax", issue = "137933")] -pub fn vamaxq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.famax.v8f16" - )] - fn _vamaxq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t; - } - unsafe { _vamaxq_f16(a, b) } -} -#[doc = "Multi-vector floating-point absolute maximum"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamax_f32)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famax))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { unsafe extern "unadjusted" { @@ -784,7 +752,7 @@ pub fn vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f32)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famax))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { unsafe extern "unadjusted" { @@ -800,7 +768,7 @@ pub fn vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f64)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famax))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { unsafe extern "unadjusted" { @@ -813,42 +781,10 @@ pub fn vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { unsafe { _vamaxq_f64(a, b) } } #[doc = "Multi-vector floating-point absolute minimum"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamin_f16)"] -#[inline(always)] -#[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famin))] -#[unstable(feature = "faminmax", issue = "137933")] -pub fn vamin_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.famin.v4f16" - )] - fn _vamin_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t; - } - unsafe { _vamin_f16(a, b) } -} -#[doc = "Multi-vector floating-point absolute minimum"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f16)"] -#[inline(always)] -#[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famin))] -#[unstable(feature = "faminmax", issue = "137933")] -pub fn vaminq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.famin.v8f16" - )] - fn _vaminq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t; - } - unsafe { _vaminq_f16(a, b) } -} -#[doc = "Multi-vector floating-point absolute minimum"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamin_f32)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famin))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { unsafe extern "unadjusted" { @@ -864,7 +800,7 @@ pub fn vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f32)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famin))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { unsafe extern "unadjusted" { @@ -880,7 +816,7 @@ pub fn vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f64)"] #[inline(always)] #[target_feature(enable = "neon,faminmax")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(famin))] +#[cfg_attr(test, assert_instr(nop))] #[unstable(feature = "faminmax", issue = "137933")] pub fn vaminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { unsafe extern "unadjusted" { @@ -9555,6 +9491,68 @@ pub fn vdivq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { pub fn vdivh_f16(a: f16, b: f16) -> f16 { a / b } +#[doc = "Dot product arithmetic (indexed)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,dotprod")] +#[cfg_attr(test, assert_instr(sdot, LANE = 0))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] +pub fn vdot_laneq_s32(a: int32x2_t, b: int8x8_t, c: int8x16_t) -> int32x2_t { + static_assert_uimm_bits!(LANE, 2); + let c: int32x4_t = vreinterpretq_s32_s8(c); + unsafe { + let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); + vdot_s32(a, b, vreinterpret_s8_s32(c)) + } +} +#[doc = "Dot product arithmetic (indexed)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,dotprod")] +#[cfg_attr(test, assert_instr(sdot, LANE = 0))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] +pub fn vdotq_laneq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t { + static_assert_uimm_bits!(LANE, 2); + let c: int32x4_t = vreinterpretq_s32_s8(c); + unsafe { + let c: int32x4_t = + simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); + vdotq_s32(a, b, vreinterpretq_s8_s32(c)) + } +} +#[doc = "Dot product arithmetic (indexed)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_u32)"] +#[inline(always)] +#[target_feature(enable = "neon,dotprod")] +#[cfg_attr(test, assert_instr(udot, LANE = 0))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] +pub fn vdot_laneq_u32(a: uint32x2_t, b: uint8x8_t, c: uint8x16_t) -> uint32x2_t { + static_assert_uimm_bits!(LANE, 2); + let c: uint32x4_t = vreinterpretq_u32_u8(c); + unsafe { + let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); + vdot_u32(a, b, vreinterpret_u8_u32(c)) + } +} +#[doc = "Dot product arithmetic (indexed)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_u32)"] +#[inline(always)] +#[target_feature(enable = "neon,dotprod")] +#[cfg_attr(test, assert_instr(udot, LANE = 0))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] +pub fn vdotq_laneq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { + static_assert_uimm_bits!(LANE, 2); + let c: uint32x4_t = vreinterpretq_u32_u8(c); + unsafe { + let c: uint32x4_t = + simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); + vdotq_u32(a, b, vreinterpretq_u8_u32(c)) + } +} #[doc = "Set all vector lanes to the same value"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_lane_f64)"] #[inline(always)] @@ -11174,7 +11172,7 @@ pub fn vfmsd_laneq_f64(a: f64, b: f64, c: float64x2_t) -> f64 { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,fp16")] #[cfg_attr(test, assert_instr(ldr))] @@ -11186,7 +11184,7 @@ pub unsafe fn vld1_f16(ptr: *const f16) -> float16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,fp16")] #[cfg_attr(test, assert_instr(ldr))] @@ -11198,7 +11196,7 @@ pub unsafe fn vld1q_f16(ptr: *const f16) -> float16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11209,7 +11207,7 @@ pub unsafe fn vld1_f32(ptr: *const f32) -> float32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11220,7 +11218,7 @@ pub unsafe fn vld1q_f32(ptr: *const f32) -> float32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11231,7 +11229,7 @@ pub unsafe fn vld1_f64(ptr: *const f64) -> float64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11242,7 +11240,7 @@ pub unsafe fn vld1q_f64(ptr: *const f64) -> float64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11253,7 +11251,7 @@ pub unsafe fn vld1_s8(ptr: *const i8) -> int8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11264,7 +11262,7 @@ pub unsafe fn vld1q_s8(ptr: *const i8) -> int8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11275,7 +11273,7 @@ pub unsafe fn vld1_s16(ptr: *const i16) -> int16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11286,7 +11284,7 @@ pub unsafe fn vld1q_s16(ptr: *const i16) -> int16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11297,7 +11295,7 @@ pub unsafe fn vld1_s32(ptr: *const i32) -> int32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11308,7 +11306,7 @@ pub unsafe fn vld1q_s32(ptr: *const i32) -> int32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11319,7 +11317,7 @@ pub unsafe fn vld1_s64(ptr: *const i64) -> int64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11330,7 +11328,7 @@ pub unsafe fn vld1q_s64(ptr: *const i64) -> int64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11341,7 +11339,7 @@ pub unsafe fn vld1_u8(ptr: *const u8) -> uint8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11352,7 +11350,7 @@ pub unsafe fn vld1q_u8(ptr: *const u8) -> uint8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11363,7 +11361,7 @@ pub unsafe fn vld1_u16(ptr: *const u16) -> uint16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11374,7 +11372,7 @@ pub unsafe fn vld1q_u16(ptr: *const u16) -> uint16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11385,7 +11383,7 @@ pub unsafe fn vld1_u32(ptr: *const u32) -> uint32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11396,7 +11394,7 @@ pub unsafe fn vld1q_u32(ptr: *const u32) -> uint32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11407,7 +11405,7 @@ pub unsafe fn vld1_u64(ptr: *const u64) -> uint64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11418,7 +11416,7 @@ pub unsafe fn vld1q_u64(ptr: *const u64) -> uint64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11429,7 +11427,7 @@ pub unsafe fn vld1_p8(ptr: *const p8) -> poly8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11440,7 +11438,7 @@ pub unsafe fn vld1q_p8(ptr: *const p8) -> poly8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11451,7 +11449,7 @@ pub unsafe fn vld1_p16(ptr: *const p16) -> poly16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] @@ -11462,7 +11460,7 @@ pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ldr))] @@ -11473,7 +11471,7 @@ pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ldr))] @@ -11484,7 +11482,7 @@ pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11502,7 +11500,7 @@ pub unsafe fn vld1_f64_x2(a: *const f64) -> float64x1x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11520,7 +11518,7 @@ pub unsafe fn vld1_f64_x3(a: *const f64) -> float64x1x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11538,7 +11536,7 @@ pub unsafe fn vld1_f64_x4(a: *const f64) -> float64x1x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11556,7 +11554,7 @@ pub unsafe fn vld1q_f64_x2(a: *const f64) -> float64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11574,7 +11572,7 @@ pub unsafe fn vld1q_f64_x3(a: *const f64) -> float64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11592,7 +11590,7 @@ pub unsafe fn vld1q_f64_x4(a: *const f64) -> float64x2x4_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11610,7 +11608,7 @@ pub unsafe fn vld2_dup_f64(a: *const f64) -> float64x1x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11628,7 +11626,7 @@ pub unsafe fn vld2q_dup_f64(a: *const f64) -> float64x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11646,7 +11644,7 @@ pub unsafe fn vld2q_dup_s64(a: *const i64) -> int64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11664,7 +11662,7 @@ pub unsafe fn vld2_f64(a: *const f64) -> float64x1x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11684,7 +11682,7 @@ pub unsafe fn vld2_lane_f64(a: *const f64, b: float64x1x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11704,7 +11702,7 @@ pub unsafe fn vld2_lane_s64(a: *const i64, b: int64x1x2_t) -> i #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11717,7 +11715,7 @@ pub unsafe fn vld2_lane_p64(a: *const p64, b: poly64x1x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11730,7 +11728,7 @@ pub unsafe fn vld2_lane_u64(a: *const u64, b: uint64x1x2_t) -> #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -11742,7 +11740,7 @@ pub unsafe fn vld2q_dup_p64(a: *const p64) -> poly64x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -11757,7 +11755,7 @@ pub unsafe fn vld2q_dup_p64(a: *const p64) -> poly64x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -11769,7 +11767,7 @@ pub unsafe fn vld2q_dup_u64(a: *const u64) -> uint64x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -11784,7 +11782,7 @@ pub unsafe fn vld2q_dup_u64(a: *const u64) -> uint64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11802,7 +11800,7 @@ pub unsafe fn vld2q_f64(a: *const f64) -> float64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11820,7 +11818,7 @@ pub unsafe fn vld2q_s64(a: *const i64) -> int64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11841,7 +11839,7 @@ pub unsafe fn vld2q_lane_f64(a: *const f64, b: float64x2x2_t) - #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11861,7 +11859,7 @@ pub unsafe fn vld2q_lane_s8(a: *const i8, b: int8x16x2_t) -> in #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11881,7 +11879,7 @@ pub unsafe fn vld2q_lane_s64(a: *const i64, b: int64x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11894,7 +11892,7 @@ pub unsafe fn vld2q_lane_p64(a: *const p64, b: poly64x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11907,7 +11905,7 @@ pub unsafe fn vld2q_lane_u8(a: *const u8, b: uint8x16x2_t) -> u #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11920,7 +11918,7 @@ pub unsafe fn vld2q_lane_u64(a: *const u64, b: uint64x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] @@ -11933,7 +11931,7 @@ pub unsafe fn vld2q_lane_p8(a: *const p8, b: poly8x16x2_t) -> p #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -11945,7 +11943,7 @@ pub unsafe fn vld2q_p64(a: *const p64) -> poly64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -11960,7 +11958,7 @@ pub unsafe fn vld2q_p64(a: *const p64) -> poly64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -11972,7 +11970,7 @@ pub unsafe fn vld2q_u64(a: *const u64) -> uint64x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -11987,7 +11985,7 @@ pub unsafe fn vld2q_u64(a: *const u64) -> uint64x2x2_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12005,7 +12003,7 @@ pub unsafe fn vld3_dup_f64(a: *const f64) -> float64x1x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12023,7 +12021,7 @@ pub unsafe fn vld3q_dup_f64(a: *const f64) -> float64x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12041,7 +12039,7 @@ pub unsafe fn vld3q_dup_s64(a: *const i64) -> int64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12059,7 +12057,7 @@ pub unsafe fn vld3_f64(a: *const f64) -> float64x1x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12085,7 +12083,7 @@ pub unsafe fn vld3_lane_f64(a: *const f64, b: float64x1x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12098,7 +12096,7 @@ pub unsafe fn vld3_lane_p64(a: *const p64, b: poly64x1x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12124,7 +12122,7 @@ pub unsafe fn vld3_lane_s64(a: *const i64, b: int64x1x3_t) -> i #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12137,7 +12135,7 @@ pub unsafe fn vld3_lane_u64(a: *const u64, b: uint64x1x3_t) -> #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -12149,7 +12147,7 @@ pub unsafe fn vld3q_dup_p64(a: *const p64) -> poly64x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -12165,7 +12163,7 @@ pub unsafe fn vld3q_dup_p64(a: *const p64) -> poly64x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -12177,7 +12175,7 @@ pub unsafe fn vld3q_dup_u64(a: *const u64) -> uint64x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -12193,7 +12191,7 @@ pub unsafe fn vld3q_dup_u64(a: *const u64) -> uint64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12211,7 +12209,7 @@ pub unsafe fn vld3q_f64(a: *const f64) -> float64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12229,7 +12227,7 @@ pub unsafe fn vld3q_s64(a: *const i64) -> int64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12255,7 +12253,7 @@ pub unsafe fn vld3q_lane_f64(a: *const f64, b: float64x2x3_t) - #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12268,7 +12266,7 @@ pub unsafe fn vld3q_lane_p64(a: *const p64, b: poly64x2x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12294,7 +12292,7 @@ pub unsafe fn vld3q_lane_s8(a: *const i8, b: int8x16x3_t) -> in #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12320,7 +12318,7 @@ pub unsafe fn vld3q_lane_s64(a: *const i64, b: int64x2x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12333,7 +12331,7 @@ pub unsafe fn vld3q_lane_u8(a: *const u8, b: uint8x16x3_t) -> u #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12346,7 +12344,7 @@ pub unsafe fn vld3q_lane_u64(a: *const u64, b: uint64x2x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] @@ -12359,7 +12357,7 @@ pub unsafe fn vld3q_lane_p8(a: *const p8, b: poly8x16x3_t) -> p #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -12371,7 +12369,7 @@ pub unsafe fn vld3q_p64(a: *const p64) -> poly64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -12387,7 +12385,7 @@ pub unsafe fn vld3q_p64(a: *const p64) -> poly64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -12399,7 +12397,7 @@ pub unsafe fn vld3q_u64(a: *const u64) -> uint64x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -12415,7 +12413,7 @@ pub unsafe fn vld3q_u64(a: *const u64) -> uint64x2x3_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4r))] @@ -12433,7 +12431,7 @@ pub unsafe fn vld4_dup_f64(a: *const f64) -> float64x1x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4r))] @@ -12451,7 +12449,7 @@ pub unsafe fn vld4q_dup_f64(a: *const f64) -> float64x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4r))] @@ -12469,7 +12467,7 @@ pub unsafe fn vld4q_dup_s64(a: *const i64) -> int64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12487,7 +12485,7 @@ pub unsafe fn vld4_f64(a: *const f64) -> float64x1x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12514,7 +12512,7 @@ pub unsafe fn vld4_lane_f64(a: *const f64, b: float64x1x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12541,7 +12539,7 @@ pub unsafe fn vld4_lane_s64(a: *const i64, b: int64x1x4_t) -> i #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12554,7 +12552,7 @@ pub unsafe fn vld4_lane_p64(a: *const p64, b: poly64x1x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12567,7 +12565,7 @@ pub unsafe fn vld4_lane_u64(a: *const u64, b: uint64x1x4_t) -> #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -12579,7 +12577,7 @@ pub unsafe fn vld4q_dup_p64(a: *const p64) -> poly64x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -12596,7 +12594,7 @@ pub unsafe fn vld4q_dup_p64(a: *const p64) -> poly64x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -12608,7 +12606,7 @@ pub unsafe fn vld4q_dup_u64(a: *const u64) -> uint64x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -12625,7 +12623,7 @@ pub unsafe fn vld4q_dup_u64(a: *const u64) -> uint64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12643,7 +12641,7 @@ pub unsafe fn vld4q_f64(a: *const f64) -> float64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12661,7 +12659,7 @@ pub unsafe fn vld4q_s64(a: *const i64) -> int64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12688,7 +12686,7 @@ pub unsafe fn vld4q_lane_f64(a: *const f64, b: float64x2x4_t) - #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12715,7 +12713,7 @@ pub unsafe fn vld4q_lane_s8(a: *const i8, b: int8x16x4_t) -> in #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12742,7 +12740,7 @@ pub unsafe fn vld4q_lane_s64(a: *const i64, b: int64x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12755,7 +12753,7 @@ pub unsafe fn vld4q_lane_p64(a: *const p64, b: poly64x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12768,7 +12766,7 @@ pub unsafe fn vld4q_lane_u8(a: *const u8, b: uint8x16x4_t) -> u #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12781,7 +12779,7 @@ pub unsafe fn vld4q_lane_u64(a: *const u64, b: uint64x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] @@ -12794,7 +12792,7 @@ pub unsafe fn vld4q_lane_p8(a: *const p8, b: poly8x16x4_t) -> p #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12806,7 +12804,7 @@ pub unsafe fn vld4q_p64(a: *const p64) -> poly64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12823,7 +12821,7 @@ pub unsafe fn vld4q_p64(a: *const p64) -> poly64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -12835,7 +12833,7 @@ pub unsafe fn vld4q_u64(a: *const u64) -> uint64x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -12849,241 +12847,10 @@ pub unsafe fn vld4q_u64(a: *const u64) -> uint64x2x4_t { ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [1, 0]) }; ret_val } -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1_lane_s64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1_lane_s64(ptr: *const i64, src: int64x1_t) -> int64x1_t { - static_assert!(LANE == 0); - let atomic_src = crate::sync::atomic::AtomicI64::from_ptr(ptr as *mut i64); - simd_insert!( - src, - LANE as u32, - atomic_src.load(crate::sync::atomic::Ordering::Acquire) - ) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1q_lane_s64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1q_lane_s64(ptr: *const i64, src: int64x2_t) -> int64x2_t { - static_assert_uimm_bits!(LANE, 1); - let atomic_src = crate::sync::atomic::AtomicI64::from_ptr(ptr as *mut i64); - simd_insert!( - src, - LANE as u32, - atomic_src.load(crate::sync::atomic::Ordering::Acquire) - ) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1q_lane_f64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1q_lane_f64(ptr: *const f64, src: float64x2_t) -> float64x2_t { - static_assert_uimm_bits!(LANE, 1); - transmute(vldap1q_lane_s64::(ptr as *mut i64, transmute(src))) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1_lane_u64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1_lane_u64(ptr: *const u64, src: uint64x1_t) -> uint64x1_t { - static_assert!(LANE == 0); - transmute(vldap1_lane_s64::(ptr as *mut i64, transmute(src))) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1q_lane_u64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1q_lane_u64(ptr: *const u64, src: uint64x2_t) -> uint64x2_t { - static_assert_uimm_bits!(LANE, 1); - transmute(vldap1q_lane_s64::(ptr as *mut i64, transmute(src))) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1_lane_p64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1_lane_p64(ptr: *const p64, src: poly64x1_t) -> poly64x1_t { - static_assert!(LANE == 0); - transmute(vldap1_lane_s64::(ptr as *mut i64, transmute(src))) -} -#[doc = "Load-acquire RCpc one single-element structure to one lane of one register"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldap1q_lane_p64)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[rustc_legacy_const_generics(2)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldap1, LANE = 0))] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub unsafe fn vldap1q_lane_p64(ptr: *const p64, src: poly64x2_t) -> poly64x2_t { - static_assert_uimm_bits!(LANE, 1); - transmute(vldap1q_lane_s64::(ptr as *mut i64, transmute(src))) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_f16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_lane_f16(a: float16x4_t, b: uint8x8_t) -> float16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2_lane_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_f16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_lane_f16(a: float16x8_t, b: uint8x8_t) -> float16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2q_lane_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_u8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_lane_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 1); - transmute(vluti2_lane_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_u8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_lane_u8(a: uint8x16_t, b: uint8x8_t) -> uint8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 1); - transmute(vluti2q_lane_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_u16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_lane_u16(a: uint16x4_t, b: uint8x8_t) -> uint16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2_lane_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_u16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_lane_u16(a: uint16x8_t, b: uint8x8_t) -> uint16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2q_lane_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_p8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_lane_p8(a: poly8x8_t, b: uint8x8_t) -> poly8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 1); - transmute(vluti2_lane_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_p8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_lane_p8(a: poly8x16_t, b: uint8x8_t) -> poly8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 1); - transmute(vluti2q_lane_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_p16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_lane_p16(a: poly16x4_t, b: uint8x8_t) -> poly16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2_lane_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_p16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_lane_p16(a: poly16x8_t, b: uint8x8_t) -> poly16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2q_lane_s16::(transmute(a), b)) -} #[doc = "Lookup table read with 2-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 1))] @@ -13103,7 +12870,7 @@ pub unsafe fn vluti2_lane_s8(a: int8x8_t, b: uint8x8_t) -> int8 #[doc = "Lookup table read with 2-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 1))] @@ -13123,7 +12890,7 @@ pub unsafe fn vluti2q_lane_s8(a: int8x16_t, b: uint8x8_t) -> in #[doc = "Lookup table read with 2-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 1))] @@ -13143,7 +12910,7 @@ pub unsafe fn vluti2_lane_s16(a: int16x4_t, b: uint8x8_t) -> in #[doc = "Lookup table read with 2-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 1))] @@ -13161,219 +12928,113 @@ pub unsafe fn vluti2q_lane_s16(a: int16x8_t, b: uint8x8_t) -> i _vluti2q_lane_s16(a, b, LANE) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_f16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_f16(a: float16x4_t, b: uint8x16_t) -> float16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2_laneq_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_f16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_f16(a: float16x8_t, b: uint8x16_t) -> float16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2q_laneq_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_u8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_u8(a: uint8x8_t, b: uint8x16_t) -> uint8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2_laneq_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_u8)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2q_laneq_s8::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_u16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_u16(a: uint16x4_t, b: uint8x16_t) -> uint16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2_laneq_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_u16)"] -#[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] -#[inline(always)] -#[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] -#[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] -#[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_u16(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2q_laneq_s16::(transmute(a), b)) -} -#[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_p8)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_p8(a: poly8x8_t, b: uint8x16_t) -> poly8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2_laneq_s8::(transmute(a), b)) +pub unsafe fn vluti2_lane_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x16_t { + static_assert!(LANE >= 0 && LANE <= 1); + transmute(vluti2_lane_s8::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_p8)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_p8(a: poly8x16_t, b: uint8x16_t) -> poly8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - transmute(vluti2q_laneq_s8::(transmute(a), b)) +pub unsafe fn vluti2q_lane_u8(a: uint8x16_t, b: uint8x8_t) -> uint8x16_t { + static_assert!(LANE >= 0 && LANE <= 1); + transmute(vluti2q_lane_s8::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_p16)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_p16(a: poly16x4_t, b: uint8x16_t) -> poly16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2_laneq_s16::(transmute(a), b)) +pub unsafe fn vluti2_lane_u16(a: uint16x4_t, b: uint8x8_t) -> uint16x8_t { + static_assert!(LANE >= 0 && LANE <= 3); + transmute(vluti2_lane_s16::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_p16)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_p16(a: poly16x8_t, b: uint8x16_t) -> poly16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - transmute(vluti2q_laneq_s16::(transmute(a), b)) +pub unsafe fn vluti2q_lane_u16(a: uint16x8_t, b: uint8x8_t) -> uint16x8_t { + static_assert!(LANE >= 0 && LANE <= 3); + transmute(vluti2q_lane_s16::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_s8)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_s8(a: int8x8_t, b: uint8x16_t) -> int8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.vluti2.laneq.v16i8.v8i8" - )] - fn _vluti2_laneq_s8(a: int8x8_t, b: uint8x16_t, n: i32) -> int8x16_t; - } - _vluti2_laneq_s8(a, b, INDEX) +pub unsafe fn vluti2_lane_p8(a: poly8x8_t, b: uint8x8_t) -> poly8x16_t { + static_assert!(LANE >= 0 && LANE <= 1); + transmute(vluti2_lane_s8::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_s8)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_s8(a: int8x16_t, b: uint8x16_t) -> int8x16_t { - static_assert!(INDEX >= 0 && INDEX <= 3); - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.vluti2.laneq.v16i8.v16i8" - )] - fn _vluti2q_laneq_s8(a: int8x16_t, b: uint8x16_t, n: i32) -> int8x16_t; - } - _vluti2q_laneq_s8(a, b, INDEX) +pub unsafe fn vluti2q_lane_p8(a: poly8x16_t, b: uint8x8_t) -> poly8x16_t { + static_assert!(LANE >= 0 && LANE <= 1); + transmute(vluti2q_lane_s8::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_laneq_s16)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2_laneq_s16(a: int16x4_t, b: uint8x16_t) -> int16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.vluti2.laneq.v8i16.v4i16" - )] - fn _vluti2_laneq_s16(a: int16x4_t, b: uint8x16_t, n: i32) -> int16x8_t; - } - _vluti2_laneq_s16(a, b, INDEX) +pub unsafe fn vluti2_lane_p16(a: poly16x4_t, b: uint8x8_t) -> poly16x8_t { + static_assert!(LANE >= 0 && LANE <= 3); + transmute(vluti2_lane_s16::(transmute(a), b)) } #[doc = "Lookup table read with 2-bit indices"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_laneq_s16)"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti2q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] -#[cfg_attr(test, assert_instr(nop, INDEX = 1))] +#[cfg_attr(test, assert_instr(nop, LANE = 1))] #[unstable(feature = "stdarch_neon_feat_lut", issue = "138050")] #[rustc_legacy_const_generics(2)] -pub unsafe fn vluti2q_laneq_s16(a: int16x8_t, b: uint8x16_t) -> int16x8_t { - static_assert!(INDEX >= 0 && INDEX <= 7); - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.vluti2.laneq.v8i16.v8i16" - )] - fn _vluti2q_laneq_s16(a: int16x8_t, b: uint8x16_t, n: i32) -> int16x8_t; - } - _vluti2q_laneq_s16(a, b, INDEX) +pub unsafe fn vluti2q_lane_p16(a: poly16x8_t, b: uint8x8_t) -> poly16x8_t { + static_assert!(LANE >= 0 && LANE <= 3); + transmute(vluti2q_lane_s16::(transmute(a), b)) } #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut,fp16")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13386,7 +13047,7 @@ pub unsafe fn vluti4q_lane_f16_x2(a: float16x8x2_t, b: uint8x8_ #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13399,7 +13060,7 @@ pub unsafe fn vluti4q_lane_u16_x2(a: uint16x8x2_t, b: uint8x8_t #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13412,7 +13073,7 @@ pub unsafe fn vluti4q_lane_p16_x2(a: poly16x8x2_t, b: uint8x8_t #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13432,7 +13093,7 @@ pub unsafe fn vluti4q_lane_s16_x2(a: int16x8x2_t, b: uint8x8_t) #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13452,7 +13113,7 @@ pub unsafe fn vluti4q_lane_s8(a: int8x16_t, b: uint8x8_t) -> in #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13465,7 +13126,7 @@ pub unsafe fn vluti4q_lane_u8(a: uint8x16_t, b: uint8x8_t) -> u #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13478,7 +13139,7 @@ pub unsafe fn vluti4q_lane_p8(a: poly8x16_t, b: uint8x8_t) -> p #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut,fp16")] #[cfg_attr(test, assert_instr(nop, LANE = 3))] @@ -13494,7 +13155,7 @@ pub unsafe fn vluti4q_laneq_f16_x2( #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 3))] @@ -13507,7 +13168,7 @@ pub unsafe fn vluti4q_laneq_u16_x2(a: uint16x8x2_t, b: uint8x16 #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 3))] @@ -13520,7 +13181,7 @@ pub unsafe fn vluti4q_laneq_p16_x2(a: poly16x8x2_t, b: uint8x16 #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 3))] @@ -13540,7 +13201,7 @@ pub unsafe fn vluti4q_laneq_s16_x2(a: int16x8x2_t, b: uint8x16_ #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13560,7 +13221,7 @@ pub unsafe fn vluti4q_laneq_s8(a: int8x16_t, b: uint8x16_t) -> #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -13573,7 +13234,7 @@ pub unsafe fn vluti4q_laneq_u8(a: uint8x16_t, b: uint8x16_t) -> #[doc = "Lookup table read with 4-bit indices"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vluti4q_laneq_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,lut")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -24452,86 +24113,6 @@ pub fn vrsubhn_high_u64(a: uint32x2_t, b: uint64x2_t, c: uint64x2_t) -> uint32x4 let x: uint32x2_t = vrsubhn_u64(b, c); unsafe { simd_shuffle!(a, x, [0, 1, 2, 3]) } } -#[doc = "Multi-vector floating-point adjust exponent"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vscale_f16)"] -#[inline(always)] -#[unstable(feature = "stdarch_neon_fp8", issue = "none")] -#[target_feature(enable = "neon,fp8")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(fscale))] -pub fn vscale_f16(vn: float16x4_t, vm: int16x4_t) -> float16x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fp8.fscale.v4f16" - )] - fn _vscale_f16(vn: float16x4_t, vm: int16x4_t) -> float16x4_t; - } - unsafe { _vscale_f16(vn, vm) } -} -#[doc = "Multi-vector floating-point adjust exponent"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vscaleq_f16)"] -#[inline(always)] -#[unstable(feature = "stdarch_neon_fp8", issue = "none")] -#[target_feature(enable = "neon,fp8")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(fscale))] -pub fn vscaleq_f16(vn: float16x8_t, vm: int16x8_t) -> float16x8_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fp8.fscale.v8f16" - )] - fn _vscaleq_f16(vn: float16x8_t, vm: int16x8_t) -> float16x8_t; - } - unsafe { _vscaleq_f16(vn, vm) } -} -#[doc = "Multi-vector floating-point adjust exponent"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vscale_f32)"] -#[inline(always)] -#[unstable(feature = "stdarch_neon_fp8", issue = "none")] -#[target_feature(enable = "neon,fp8")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(fscale))] -pub fn vscale_f32(vn: float32x2_t, vm: int32x2_t) -> float32x2_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fp8.fscale.v2f32" - )] - fn _vscale_f32(vn: float32x2_t, vm: int32x2_t) -> float32x2_t; - } - unsafe { _vscale_f32(vn, vm) } -} -#[doc = "Multi-vector floating-point adjust exponent"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vscaleq_f32)"] -#[inline(always)] -#[unstable(feature = "stdarch_neon_fp8", issue = "none")] -#[target_feature(enable = "neon,fp8")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(fscale))] -pub fn vscaleq_f32(vn: float32x4_t, vm: int32x4_t) -> float32x4_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fp8.fscale.v4f32" - )] - fn _vscaleq_f32(vn: float32x4_t, vm: int32x4_t) -> float32x4_t; - } - unsafe { _vscaleq_f32(vn, vm) } -} -#[doc = "Multi-vector floating-point adjust exponent"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vscaleq_f64)"] -#[inline(always)] -#[unstable(feature = "stdarch_neon_fp8", issue = "none")] -#[target_feature(enable = "neon,fp8")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(fscale))] -pub fn vscaleq_f64(vn: float64x2_t, vm: int64x2_t) -> float64x2_t { - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fp8.fscale.v2f64" - )] - fn _vscaleq_f64(vn: float64x2_t, vm: int64x2_t) -> float64x2_t; - } - unsafe { _vscaleq_f64(vn, vm) } -} #[doc = "Insert vector element from another vector element"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vset_lane_f64)"] #[inline(always)] @@ -25837,7 +25418,7 @@ pub fn vsrid_n_u64(a: u64, b: u64) -> u64 { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,fp16")] #[cfg_attr(test, assert_instr(str))] @@ -25850,7 +25431,7 @@ pub unsafe fn vst1_f16(ptr: *mut f16, a: float16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,fp16")] #[cfg_attr(test, assert_instr(str))] @@ -25863,7 +25444,7 @@ pub unsafe fn vst1q_f16(ptr: *mut f16, a: float16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25875,7 +25456,7 @@ pub unsafe fn vst1_f32(ptr: *mut f32, a: float32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25887,7 +25468,7 @@ pub unsafe fn vst1q_f32(ptr: *mut f32, a: float32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25899,7 +25480,7 @@ pub unsafe fn vst1_f64(ptr: *mut f64, a: float64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25911,7 +25492,7 @@ pub unsafe fn vst1q_f64(ptr: *mut f64, a: float64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25923,7 +25504,7 @@ pub unsafe fn vst1_s8(ptr: *mut i8, a: int8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25935,7 +25516,7 @@ pub unsafe fn vst1q_s8(ptr: *mut i8, a: int8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25947,7 +25528,7 @@ pub unsafe fn vst1_s16(ptr: *mut i16, a: int16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25959,7 +25540,7 @@ pub unsafe fn vst1q_s16(ptr: *mut i16, a: int16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25971,7 +25552,7 @@ pub unsafe fn vst1_s32(ptr: *mut i32, a: int32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25983,7 +25564,7 @@ pub unsafe fn vst1q_s32(ptr: *mut i32, a: int32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -25995,7 +25576,7 @@ pub unsafe fn vst1_s64(ptr: *mut i64, a: int64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26007,7 +25588,7 @@ pub unsafe fn vst1q_s64(ptr: *mut i64, a: int64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26019,7 +25600,7 @@ pub unsafe fn vst1_u8(ptr: *mut u8, a: uint8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26031,7 +25612,7 @@ pub unsafe fn vst1q_u8(ptr: *mut u8, a: uint8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26043,7 +25624,7 @@ pub unsafe fn vst1_u16(ptr: *mut u16, a: uint16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26055,7 +25636,7 @@ pub unsafe fn vst1q_u16(ptr: *mut u16, a: uint16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26067,7 +25648,7 @@ pub unsafe fn vst1_u32(ptr: *mut u32, a: uint32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26079,7 +25660,7 @@ pub unsafe fn vst1q_u32(ptr: *mut u32, a: uint32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26091,7 +25672,7 @@ pub unsafe fn vst1_u64(ptr: *mut u64, a: uint64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26103,7 +25684,7 @@ pub unsafe fn vst1q_u64(ptr: *mut u64, a: uint64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26115,7 +25696,7 @@ pub unsafe fn vst1_p8(ptr: *mut p8, a: poly8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26127,7 +25708,7 @@ pub unsafe fn vst1q_p8(ptr: *mut p8, a: poly8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26139,7 +25720,7 @@ pub unsafe fn vst1_p16(ptr: *mut p16, a: poly16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] @@ -26151,7 +25732,7 @@ pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(str))] @@ -26163,7 +25744,7 @@ pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(str))] @@ -26175,7 +25756,7 @@ pub unsafe fn vst1q_p64(ptr: *mut p64, a: poly64x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26193,7 +25774,7 @@ pub unsafe fn vst1_f64_x2(a: *mut f64, b: float64x1x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26211,7 +25792,7 @@ pub unsafe fn vst1q_f64_x2(a: *mut f64, b: float64x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26229,7 +25810,7 @@ pub unsafe fn vst1_f64_x3(a: *mut f64, b: float64x1x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26247,7 +25828,7 @@ pub unsafe fn vst1q_f64_x3(a: *mut f64, b: float64x2x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26271,7 +25852,7 @@ pub unsafe fn vst1_f64_x4(a: *mut f64, b: float64x1x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st1))] @@ -26295,7 +25876,7 @@ pub unsafe fn vst1q_f64_x4(a: *mut f64, b: float64x2x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -26308,7 +25889,7 @@ pub unsafe fn vst1_lane_f64(a: *mut f64, b: float64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(nop, LANE = 0))] @@ -26321,7 +25902,7 @@ pub unsafe fn vst1q_lane_f64(a: *mut f64, b: float64x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26339,7 +25920,7 @@ pub unsafe fn vst2_f64(a: *mut f64, b: float64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26359,7 +25940,7 @@ pub unsafe fn vst2_lane_f64(a: *mut f64, b: float64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26379,7 +25960,7 @@ pub unsafe fn vst2_lane_s64(a: *mut i64, b: int64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26392,7 +25973,7 @@ pub unsafe fn vst2_lane_p64(a: *mut p64, b: poly64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26405,7 +25986,7 @@ pub unsafe fn vst2_lane_u64(a: *mut u64, b: uint64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26423,7 +26004,7 @@ pub unsafe fn vst2q_f64(a: *mut f64, b: float64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26441,7 +26022,7 @@ pub unsafe fn vst2q_s64(a: *mut i64, b: int64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26461,7 +26042,7 @@ pub unsafe fn vst2q_lane_f64(a: *mut f64, b: float64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26481,7 +26062,7 @@ pub unsafe fn vst2q_lane_s8(a: *mut i8, b: int8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26501,7 +26082,7 @@ pub unsafe fn vst2q_lane_s64(a: *mut i64, b: int64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26514,7 +26095,7 @@ pub unsafe fn vst2q_lane_p64(a: *mut p64, b: poly64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26527,7 +26108,7 @@ pub unsafe fn vst2q_lane_u8(a: *mut u8, b: uint8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26540,7 +26121,7 @@ pub unsafe fn vst2q_lane_u64(a: *mut u64, b: uint64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] @@ -26553,7 +26134,7 @@ pub unsafe fn vst2q_lane_p8(a: *mut p8, b: poly8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st2))] @@ -26564,7 +26145,7 @@ pub unsafe fn vst2q_p64(a: *mut p64, b: poly64x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26575,7 +26156,7 @@ pub unsafe fn vst2q_u64(a: *mut u64, b: uint64x2x2_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26593,7 +26174,7 @@ pub unsafe fn vst3_f64(a: *mut f64, b: float64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] @@ -26613,7 +26194,7 @@ pub unsafe fn vst3_lane_f64(a: *mut f64, b: float64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] @@ -26633,7 +26214,7 @@ pub unsafe fn vst3_lane_s64(a: *mut i64, b: int64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -26646,7 +26227,7 @@ pub unsafe fn vst3_lane_p64(a: *mut p64, b: poly64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26659,7 +26240,7 @@ pub unsafe fn vst3_lane_u64(a: *mut u64, b: uint64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26677,7 +26258,7 @@ pub unsafe fn vst3q_f64(a: *mut f64, b: float64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26695,7 +26276,7 @@ pub unsafe fn vst3q_s64(a: *mut i64, b: int64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] @@ -26715,7 +26296,7 @@ pub unsafe fn vst3q_lane_f64(a: *mut f64, b: float64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] @@ -26735,7 +26316,7 @@ pub unsafe fn vst3q_lane_s8(a: *mut i8, b: int8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] @@ -26755,7 +26336,7 @@ pub unsafe fn vst3q_lane_s64(a: *mut i64, b: int64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -26768,7 +26349,7 @@ pub unsafe fn vst3q_lane_p64(a: *mut p64, b: poly64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26781,7 +26362,7 @@ pub unsafe fn vst3q_lane_u8(a: *mut u8, b: uint8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26794,7 +26375,7 @@ pub unsafe fn vst3q_lane_u64(a: *mut u64, b: uint64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26807,7 +26388,7 @@ pub unsafe fn vst3q_lane_p8(a: *mut p8, b: poly8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -26818,7 +26399,7 @@ pub unsafe fn vst3q_p64(a: *mut p64, b: poly64x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26829,7 +26410,7 @@ pub unsafe fn vst3q_u64(a: *mut u64, b: uint64x2x3_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26847,7 +26428,7 @@ pub unsafe fn vst4_f64(a: *mut f64, b: float64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] @@ -26874,7 +26455,7 @@ pub unsafe fn vst4_lane_f64(a: *mut f64, b: float64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] @@ -26901,7 +26482,7 @@ pub unsafe fn vst4_lane_s64(a: *mut i64, b: int64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -26914,7 +26495,7 @@ pub unsafe fn vst4_lane_p64(a: *mut p64, b: poly64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26927,7 +26508,7 @@ pub unsafe fn vst4_lane_u64(a: *mut u64, b: uint64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26945,7 +26526,7 @@ pub unsafe fn vst4q_f64(a: *mut f64, b: float64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -26963,7 +26544,7 @@ pub unsafe fn vst4q_s64(a: *mut i64, b: int64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_f64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] @@ -26990,7 +26571,7 @@ pub unsafe fn vst4q_lane_f64(a: *mut f64, b: float64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] @@ -27017,7 +26598,7 @@ pub unsafe fn vst4q_lane_s8(a: *mut i8, b: int8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] @@ -27044,7 +26625,7 @@ pub unsafe fn vst4q_lane_s64(a: *mut i64, b: int64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -27057,7 +26638,7 @@ pub unsafe fn vst4q_lane_p64(a: *mut p64, b: poly64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -27070,7 +26651,7 @@ pub unsafe fn vst4q_lane_u8(a: *mut u8, b: uint8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -27083,7 +26664,7 @@ pub unsafe fn vst4q_lane_u64(a: *mut u64, b: uint64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -27096,7 +26677,7 @@ pub unsafe fn vst4q_lane_p8(a: *mut p8, b: poly8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[target_feature(enable = "neon,aes")] @@ -27107,7 +26688,7 @@ pub unsafe fn vst4q_p64(a: *mut p64, b: poly64x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -27115,102 +26696,6 @@ pub unsafe fn vst4q_p64(a: *mut p64, b: poly64x2x4_t) { pub unsafe fn vst4q_u64(a: *mut u64, b: uint64x2x4_t) { vst4q_s64(transmute(a), transmute(b)) } -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1_lane_f64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1_lane_f64(ptr: *mut f64, val: float64x1_t) { - static_assert!(LANE == 0); - unsafe { vstl1_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1q_lane_f64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1q_lane_f64(ptr: *mut f64, val: float64x2_t) { - static_assert_uimm_bits!(LANE, 1); - unsafe { vstl1q_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1_lane_u64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1_lane_u64(ptr: *mut u64, val: uint64x1_t) { - static_assert!(LANE == 0); - unsafe { vstl1_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1q_lane_u64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1q_lane_u64(ptr: *mut u64, val: uint64x2_t) { - static_assert_uimm_bits!(LANE, 1); - unsafe { vstl1q_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1_lane_p64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1_lane_p64(ptr: *mut p64, val: poly64x1_t) { - static_assert!(LANE == 0); - unsafe { vstl1_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1q_lane_p64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1q_lane_p64(ptr: *mut p64, val: poly64x2_t) { - static_assert_uimm_bits!(LANE, 1); - unsafe { vstl1q_lane_s64::(ptr as *mut i64, transmute(val)) } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1_lane_s64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1_lane_s64(ptr: *mut i64, val: int64x1_t) { - static_assert!(LANE == 0); - let atomic_dst = ptr as *mut crate::sync::atomic::AtomicI64; - unsafe { - let lane: i64 = simd_extract!(val, LANE as u32); - (*atomic_dst).store(transmute(lane), crate::sync::atomic::Ordering::Release) - } -} -#[doc = "Store-Release a single-element structure from one lane of one register."] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstl1q_lane_s64)"] -#[inline(always)] -#[target_feature(enable = "neon,rcpc3")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stl1, LANE = 0))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -pub fn vstl1q_lane_s64(ptr: *mut i64, val: int64x2_t) { - static_assert_uimm_bits!(LANE, 1); - let atomic_dst = ptr as *mut crate::sync::atomic::AtomicI64; - unsafe { - let lane: i64 = simd_extract!(val, LANE as u32); - (*atomic_dst).store(transmute(lane), crate::sync::atomic::Ordering::Release) - } -} #[doc = "Subtract"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsub_f64)"] #[inline(always)] @@ -27419,6 +26904,37 @@ pub fn vsubw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t { simd_sub(a, simd_cast(c)) } } +#[doc = "Dot product index form with signed and unsigned integers"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsudot_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,i8mm")] +#[cfg_attr(test, assert_instr(sudot, LANE = 3))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] +pub fn vsudot_laneq_s32(a: int32x2_t, b: int8x8_t, c: uint8x16_t) -> int32x2_t { + static_assert_uimm_bits!(LANE, 2); + unsafe { + let c: uint32x4_t = transmute(c); + let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); + vusdot_s32(a, transmute(c), b) + } +} +#[doc = "Dot product index form with signed and unsigned integers"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsudotq_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,i8mm")] +#[cfg_attr(test, assert_instr(sudot, LANE = 3))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] +pub fn vsudotq_laneq_s32(a: int32x4_t, b: int8x16_t, c: uint8x16_t) -> int32x4_t { + static_assert_uimm_bits!(LANE, 2); + unsafe { + let c: uint32x4_t = transmute(c); + let c: uint32x4_t = + simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); + vusdotq_s32(a, transmute(c), b) + } +} #[doc = "Table look-up"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtbl1_s8)"] #[inline(always)] @@ -28758,6 +28274,37 @@ pub fn vuqadds_s32(a: i32, b: u32) -> i32 { } unsafe { _vuqadds_s32(a, b) } } +#[doc = "Dot product index form with unsigned and signed integers"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdot_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,i8mm")] +#[cfg_attr(test, assert_instr(usdot, LANE = 3))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] +pub fn vusdot_laneq_s32(a: int32x2_t, b: uint8x8_t, c: int8x16_t) -> int32x2_t { + static_assert_uimm_bits!(LANE, 2); + let c: int32x4_t = vreinterpretq_s32_s8(c); + unsafe { + let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); + vusdot_s32(a, b, vreinterpret_s8_s32(c)) + } +} +#[doc = "Dot product index form with unsigned and signed integers"] +#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdotq_laneq_s32)"] +#[inline(always)] +#[target_feature(enable = "neon,i8mm")] +#[cfg_attr(test, assert_instr(usdot, LANE = 3))] +#[rustc_legacy_const_generics(3)] +#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] +pub fn vusdotq_laneq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t { + static_assert_uimm_bits!(LANE, 2); + let c: int32x4_t = vreinterpretq_s32_s8(c); + unsafe { + let c: int32x4_t = + simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); + vusdotq_s32(a, b, vreinterpretq_s8_s32(c)) + } +} #[doc = "Unzip vectors"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vuzp1_f16)"] #[inline(always)] diff --git a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs index 3b67208182cb0..324ff73f62a14 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs @@ -9816,200 +9816,6 @@ pub fn vdotq_lane_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x8_ simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) } } -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsdot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sdot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdot_laneq_s32(a: int32x2_t, b: int8x8_t, c: int8x16_t) -> int32x2_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - vdot_s32(a, b, transmute(c)) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsdot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sdot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdot_laneq_s32(a: int32x2_t, b: int8x8_t, c: int8x16_t) -> int32x2_t { - static_assert_uimm_bits!(LANE, 2); - let a: int32x2_t = unsafe { simd_shuffle!(a, a, [1, 0]) }; - let b: int8x8_t = unsafe { simd_shuffle!(b, b, [7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: int8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - let ret_val: int32x2_t = vdot_s32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [1, 0]) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsdot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sdot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdotq_laneq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - vdotq_s32(a, b, transmute(c)) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsdot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sdot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdotq_laneq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t { - static_assert_uimm_bits!(LANE, 2); - let a: int32x4_t = unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }; - let b: int8x16_t = - unsafe { simd_shuffle!(b, b, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: int8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - let ret_val: int32x4_t = vdotq_s32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_u32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vudot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(udot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdot_laneq_u32(a: uint32x2_t, b: uint8x8_t, c: uint8x16_t) -> uint32x2_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - vdot_u32(a, b, transmute(c)) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_laneq_u32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vudot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(udot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdot_laneq_u32(a: uint32x2_t, b: uint8x8_t, c: uint8x16_t) -> uint32x2_t { - static_assert_uimm_bits!(LANE, 2); - let a: uint32x2_t = unsafe { simd_shuffle!(a, a, [1, 0]) }; - let b: uint8x8_t = unsafe { simd_shuffle!(b, b, [7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: uint8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - let ret_val: uint32x2_t = vdot_u32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [1, 0]) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_u32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vudot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(udot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdotq_laneq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - vdotq_u32(a, b, transmute(c)) - } -} -#[doc = "Dot product arithmetic (indexed)"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdotq_laneq_u32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,dotprod")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vudot, LANE = 0))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(udot, LANE = 0) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")] -pub fn vdotq_laneq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { - static_assert_uimm_bits!(LANE, 2); - let a: uint32x4_t = unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }; - let b: uint8x16_t = - unsafe { simd_shuffle!(b, b, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: uint8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - let ret_val: uint32x4_t = vdotq_u32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) - } -} #[doc = "Dot product arithmetic (vector)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdot_s32)"] #[inline(always)] @@ -12370,7 +12176,7 @@ pub fn vext_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { #[doc = "Extract vector from pair of vectors"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vext_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -12395,7 +12201,7 @@ pub unsafe fn vext_s64(a: int64x1_t, _b: int64x1_t) -> int64x1_t { #[doc = "Extract vector from pair of vectors"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vext_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15133,7 +14939,7 @@ pub fn vhsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { #[doc = "Load one single-element structure and replicate to all lanes of one register"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15152,7 +14958,7 @@ pub unsafe fn vld1_dup_f16(ptr: *const f16) -> float16x4_t { #[doc = "Load one single-element structure and replicate to all lanes of one register"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15171,7 +14977,7 @@ pub unsafe fn vld1q_dup_f16(ptr: *const f16) -> float16x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15194,7 +15000,7 @@ pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15217,7 +15023,7 @@ pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15240,7 +15046,7 @@ pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15263,7 +15069,7 @@ pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15286,7 +15092,7 @@ pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15309,7 +15115,7 @@ pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15332,7 +15138,7 @@ pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15355,7 +15161,7 @@ pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15378,7 +15184,7 @@ pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15401,7 +15207,7 @@ pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15424,7 +15230,7 @@ pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15447,7 +15253,7 @@ pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15470,7 +15276,7 @@ pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15493,7 +15299,7 @@ pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15516,7 +15322,7 @@ pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15539,7 +15345,7 @@ pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15562,7 +15368,7 @@ pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15585,7 +15391,7 @@ pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15608,7 +15414,7 @@ pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15631,7 +15437,7 @@ pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15663,7 +15469,7 @@ pub unsafe fn vld1_dup_p64(ptr: *const p64) -> poly64x1_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15695,7 +15501,7 @@ pub unsafe fn vld1_dup_s64(ptr: *const i64) -> int64x1_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15727,7 +15533,7 @@ pub unsafe fn vld1_dup_u64(ptr: *const u64) -> uint64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[cfg(target_arch = "arm")] @@ -15745,7 +15551,7 @@ pub unsafe fn vld1_f16(ptr: *const f16) -> float16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[cfg(target_arch = "arm")] @@ -15764,7 +15570,7 @@ pub unsafe fn vld1_f16(ptr: *const f16) -> float16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[cfg(target_arch = "arm")] @@ -15782,7 +15588,7 @@ pub unsafe fn vld1q_f16(ptr: *const f16) -> float16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[cfg(target_arch = "arm")] @@ -15801,7 +15607,7 @@ pub unsafe fn vld1q_f16(ptr: *const f16) -> float16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15827,7 +15633,7 @@ pub unsafe fn vld1_f16_x2(a: *const f16) -> float16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15853,7 +15659,7 @@ pub unsafe fn vld1_f16_x3(a: *const f16) -> float16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15879,7 +15685,7 @@ pub unsafe fn vld1_f16_x4(a: *const f16) -> float16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15905,7 +15711,7 @@ pub unsafe fn vld1q_f16_x2(a: *const f16) -> float16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15931,7 +15737,7 @@ pub unsafe fn vld1q_f16_x3(a: *const f16) -> float16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -15957,7 +15763,7 @@ pub unsafe fn vld1q_f16_x4(a: *const f16) -> float16x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -15970,7 +15776,7 @@ pub unsafe fn vld1_f32(ptr: *const f32) -> float32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -15983,7 +15789,7 @@ pub unsafe fn vld1q_f32(ptr: *const f32) -> float32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -15996,7 +15802,7 @@ pub unsafe fn vld1_u8(ptr: *const u8) -> uint8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16009,7 +15815,7 @@ pub unsafe fn vld1q_u8(ptr: *const u8) -> uint8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16022,7 +15828,7 @@ pub unsafe fn vld1_u16(ptr: *const u16) -> uint16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16035,7 +15841,7 @@ pub unsafe fn vld1q_u16(ptr: *const u16) -> uint16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16048,7 +15854,7 @@ pub unsafe fn vld1_u32(ptr: *const u32) -> uint32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16061,7 +15867,7 @@ pub unsafe fn vld1q_u32(ptr: *const u32) -> uint32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16074,7 +15880,7 @@ pub unsafe fn vld1_u64(ptr: *const u64) -> uint64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16087,7 +15893,7 @@ pub unsafe fn vld1q_u64(ptr: *const u64) -> uint64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16100,7 +15906,7 @@ pub unsafe fn vld1_p8(ptr: *const p8) -> poly8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16113,7 +15919,7 @@ pub unsafe fn vld1q_p8(ptr: *const p8) -> poly8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16126,7 +15932,7 @@ pub unsafe fn vld1_p16(ptr: *const p16) -> poly16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -16139,7 +15945,7 @@ pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,aes")] @@ -16152,7 +15958,7 @@ pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16183,7 +15989,7 @@ pub unsafe fn vld1_f32_x2(a: *const f32) -> float32x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16214,7 +16020,7 @@ pub unsafe fn vld1_f32_x3(a: *const f32) -> float32x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16245,7 +16051,7 @@ pub unsafe fn vld1_f32_x4(a: *const f32) -> float32x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16276,7 +16082,7 @@ pub unsafe fn vld1q_f32_x2(a: *const f32) -> float32x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16307,7 +16113,7 @@ pub unsafe fn vld1q_f32_x3(a: *const f32) -> float32x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16338,7 +16144,7 @@ pub unsafe fn vld1q_f32_x4(a: *const f32) -> float32x4x4_t { #[doc = "Load one single-element structure to one lane of one register"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16358,7 +16164,7 @@ pub unsafe fn vld1_lane_f16(ptr: *const f16, src: float16x4_t) #[doc = "Load one single-element structure to one lane of one register"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16378,7 +16184,7 @@ pub unsafe fn vld1q_lane_f16(ptr: *const f16, src: float16x8_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16403,7 +16209,7 @@ pub unsafe fn vld1_lane_f32(ptr: *const f32, src: float32x2_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16428,7 +16234,7 @@ pub unsafe fn vld1_lane_p16(ptr: *const p16, src: poly16x4_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16453,7 +16259,7 @@ pub unsafe fn vld1_lane_p8(ptr: *const p8, src: poly8x8_t) -> p #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16478,7 +16284,7 @@ pub unsafe fn vld1_lane_s16(ptr: *const i16, src: int16x4_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16503,7 +16309,7 @@ pub unsafe fn vld1_lane_s32(ptr: *const i32, src: int32x2_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16528,7 +16334,7 @@ pub unsafe fn vld1_lane_s64(ptr: *const i64, src: int64x1_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16553,7 +16359,7 @@ pub unsafe fn vld1_lane_s8(ptr: *const i8, src: int8x8_t) -> in #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16578,7 +16384,7 @@ pub unsafe fn vld1_lane_u16(ptr: *const u16, src: uint16x4_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16603,7 +16409,7 @@ pub unsafe fn vld1_lane_u32(ptr: *const u32, src: uint32x2_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16628,7 +16434,7 @@ pub unsafe fn vld1_lane_u64(ptr: *const u64, src: uint64x1_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16653,7 +16459,7 @@ pub unsafe fn vld1_lane_u8(ptr: *const u8, src: uint8x8_t) -> u #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16678,7 +16484,7 @@ pub unsafe fn vld1q_lane_f32(ptr: *const f32, src: float32x4_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16703,7 +16509,7 @@ pub unsafe fn vld1q_lane_p16(ptr: *const p16, src: poly16x8_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16728,7 +16534,7 @@ pub unsafe fn vld1q_lane_p8(ptr: *const p8, src: poly8x16_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16753,7 +16559,7 @@ pub unsafe fn vld1q_lane_s16(ptr: *const i16, src: int16x8_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16778,7 +16584,7 @@ pub unsafe fn vld1q_lane_s32(ptr: *const i32, src: int32x4_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16803,7 +16609,7 @@ pub unsafe fn vld1q_lane_s64(ptr: *const i64, src: int64x2_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16828,7 +16634,7 @@ pub unsafe fn vld1q_lane_s8(ptr: *const i8, src: int8x16_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16853,7 +16659,7 @@ pub unsafe fn vld1q_lane_u16(ptr: *const u16, src: uint16x8_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16878,7 +16684,7 @@ pub unsafe fn vld1q_lane_u32(ptr: *const u32, src: uint32x4_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16903,7 +16709,7 @@ pub unsafe fn vld1q_lane_u64(ptr: *const u64, src: uint64x2_t) #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16928,7 +16734,7 @@ pub unsafe fn vld1q_lane_u8(ptr: *const u8, src: uint8x16_t) -> #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16953,7 +16759,7 @@ pub unsafe fn vld1_lane_p64(ptr: *const p64, src: poly64x1_t) - #[doc = "Load one single-element structure to one lane of one register."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -16978,7 +16784,7 @@ pub unsafe fn vld1q_lane_p64(ptr: *const p64, src: poly64x2_t) #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,aes")] @@ -16996,7 +16802,7 @@ pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -17019,7 +16825,7 @@ pub unsafe fn vld1_p64_x2(a: *const p64) -> poly64x1x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -17042,7 +16848,7 @@ pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -17065,7 +16871,7 @@ pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -17089,7 +16895,7 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -17116,7 +16922,7 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -17140,7 +16946,7 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -17168,7 +16974,7 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon,aes")] @@ -17192,7 +16998,7 @@ pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon,aes")] @@ -17221,7 +17027,7 @@ pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17234,7 +17040,7 @@ pub unsafe fn vld1_s8(ptr: *const i8) -> int8x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17247,7 +17053,7 @@ pub unsafe fn vld1q_s8(ptr: *const i8) -> int8x16_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17260,7 +17066,7 @@ pub unsafe fn vld1_s16(ptr: *const i16) -> int16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17273,7 +17079,7 @@ pub unsafe fn vld1q_s16(ptr: *const i16) -> int16x8_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17286,7 +17092,7 @@ pub unsafe fn vld1_s32(ptr: *const i32) -> int32x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17299,7 +17105,7 @@ pub unsafe fn vld1q_s32(ptr: *const i32) -> int32x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17312,7 +17118,7 @@ pub unsafe fn vld1_s64(ptr: *const i64) -> int64x1_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -17325,7 +17131,7 @@ pub unsafe fn vld1q_s64(ptr: *const i64) -> int64x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17356,7 +17162,7 @@ pub unsafe fn vld1_s8_x2(a: *const i8) -> int8x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17387,7 +17193,7 @@ pub unsafe fn vld1_s8_x3(a: *const i8) -> int8x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17418,7 +17224,7 @@ pub unsafe fn vld1_s8_x4(a: *const i8) -> int8x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17449,7 +17255,7 @@ pub unsafe fn vld1q_s8_x2(a: *const i8) -> int8x16x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17480,7 +17286,7 @@ pub unsafe fn vld1q_s8_x3(a: *const i8) -> int8x16x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17511,7 +17317,7 @@ pub unsafe fn vld1q_s8_x4(a: *const i8) -> int8x16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17542,7 +17348,7 @@ pub unsafe fn vld1_s16_x2(a: *const i16) -> int16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17573,7 +17379,7 @@ pub unsafe fn vld1_s16_x3(a: *const i16) -> int16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17604,7 +17410,7 @@ pub unsafe fn vld1_s16_x4(a: *const i16) -> int16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17635,7 +17441,7 @@ pub unsafe fn vld1q_s16_x2(a: *const i16) -> int16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17666,7 +17472,7 @@ pub unsafe fn vld1q_s16_x3(a: *const i16) -> int16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17697,7 +17503,7 @@ pub unsafe fn vld1q_s16_x4(a: *const i16) -> int16x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17728,7 +17534,7 @@ pub unsafe fn vld1_s32_x2(a: *const i32) -> int32x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17759,7 +17565,7 @@ pub unsafe fn vld1_s32_x3(a: *const i32) -> int32x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17790,7 +17596,7 @@ pub unsafe fn vld1_s32_x4(a: *const i32) -> int32x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17821,7 +17627,7 @@ pub unsafe fn vld1q_s32_x2(a: *const i32) -> int32x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17852,7 +17658,7 @@ pub unsafe fn vld1q_s32_x3(a: *const i32) -> int32x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17883,7 +17689,7 @@ pub unsafe fn vld1q_s32_x4(a: *const i32) -> int32x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17914,7 +17720,7 @@ pub unsafe fn vld1_s64_x2(a: *const i64) -> int64x1x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17945,7 +17751,7 @@ pub unsafe fn vld1_s64_x3(a: *const i64) -> int64x1x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -17976,7 +17782,7 @@ pub unsafe fn vld1_s64_x4(a: *const i64) -> int64x1x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -18007,7 +17813,7 @@ pub unsafe fn vld1q_s64_x2(a: *const i64) -> int64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -18038,7 +17844,7 @@ pub unsafe fn vld1q_s64_x3(a: *const i64) -> int64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -18069,7 +17875,7 @@ pub unsafe fn vld1q_s64_x4(a: *const i64) -> int64x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18093,7 +17899,7 @@ pub unsafe fn vld1_u8_x2(a: *const u8) -> uint8x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18120,7 +17926,7 @@ pub unsafe fn vld1_u8_x2(a: *const u8) -> uint8x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18144,7 +17950,7 @@ pub unsafe fn vld1_u8_x3(a: *const u8) -> uint8x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18172,7 +17978,7 @@ pub unsafe fn vld1_u8_x3(a: *const u8) -> uint8x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18196,7 +18002,7 @@ pub unsafe fn vld1_u8_x4(a: *const u8) -> uint8x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18225,7 +18031,7 @@ pub unsafe fn vld1_u8_x4(a: *const u8) -> uint8x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18249,7 +18055,7 @@ pub unsafe fn vld1q_u8_x2(a: *const u8) -> uint8x16x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18288,7 +18094,7 @@ pub unsafe fn vld1q_u8_x2(a: *const u8) -> uint8x16x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18312,7 +18118,7 @@ pub unsafe fn vld1q_u8_x3(a: *const u8) -> uint8x16x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18358,7 +18164,7 @@ pub unsafe fn vld1q_u8_x3(a: *const u8) -> uint8x16x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18382,7 +18188,7 @@ pub unsafe fn vld1q_u8_x4(a: *const u8) -> uint8x16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18435,7 +18241,7 @@ pub unsafe fn vld1q_u8_x4(a: *const u8) -> uint8x16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18459,7 +18265,7 @@ pub unsafe fn vld1_u16_x2(a: *const u16) -> uint16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18486,7 +18292,7 @@ pub unsafe fn vld1_u16_x2(a: *const u16) -> uint16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18510,7 +18316,7 @@ pub unsafe fn vld1_u16_x3(a: *const u16) -> uint16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18538,7 +18344,7 @@ pub unsafe fn vld1_u16_x3(a: *const u16) -> uint16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18562,7 +18368,7 @@ pub unsafe fn vld1_u16_x4(a: *const u16) -> uint16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18591,7 +18397,7 @@ pub unsafe fn vld1_u16_x4(a: *const u16) -> uint16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18615,7 +18421,7 @@ pub unsafe fn vld1q_u16_x2(a: *const u16) -> uint16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18642,7 +18448,7 @@ pub unsafe fn vld1q_u16_x2(a: *const u16) -> uint16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18666,7 +18472,7 @@ pub unsafe fn vld1q_u16_x3(a: *const u16) -> uint16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18694,7 +18500,7 @@ pub unsafe fn vld1q_u16_x3(a: *const u16) -> uint16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18718,7 +18524,7 @@ pub unsafe fn vld1q_u16_x4(a: *const u16) -> uint16x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18747,7 +18553,7 @@ pub unsafe fn vld1q_u16_x4(a: *const u16) -> uint16x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18771,7 +18577,7 @@ pub unsafe fn vld1_u32_x2(a: *const u32) -> uint32x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18798,7 +18604,7 @@ pub unsafe fn vld1_u32_x2(a: *const u32) -> uint32x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18822,7 +18628,7 @@ pub unsafe fn vld1_u32_x3(a: *const u32) -> uint32x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18850,7 +18656,7 @@ pub unsafe fn vld1_u32_x3(a: *const u32) -> uint32x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18874,7 +18680,7 @@ pub unsafe fn vld1_u32_x4(a: *const u32) -> uint32x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18903,7 +18709,7 @@ pub unsafe fn vld1_u32_x4(a: *const u32) -> uint32x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18927,7 +18733,7 @@ pub unsafe fn vld1q_u32_x2(a: *const u32) -> uint32x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -18954,7 +18760,7 @@ pub unsafe fn vld1q_u32_x2(a: *const u32) -> uint32x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -18978,7 +18784,7 @@ pub unsafe fn vld1q_u32_x3(a: *const u32) -> uint32x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19006,7 +18812,7 @@ pub unsafe fn vld1q_u32_x3(a: *const u32) -> uint32x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19030,7 +18836,7 @@ pub unsafe fn vld1q_u32_x4(a: *const u32) -> uint32x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19059,7 +18865,7 @@ pub unsafe fn vld1q_u32_x4(a: *const u32) -> uint32x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -19082,7 +18888,7 @@ pub unsafe fn vld1_u64_x2(a: *const u64) -> uint64x1x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -19105,7 +18911,7 @@ pub unsafe fn vld1_u64_x3(a: *const u64) -> uint64x1x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -19128,7 +18934,7 @@ pub unsafe fn vld1_u64_x4(a: *const u64) -> uint64x1x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19152,7 +18958,7 @@ pub unsafe fn vld1q_u64_x2(a: *const u64) -> uint64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19179,7 +18985,7 @@ pub unsafe fn vld1q_u64_x2(a: *const u64) -> uint64x2x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19203,7 +19009,7 @@ pub unsafe fn vld1q_u64_x3(a: *const u64) -> uint64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19231,7 +19037,7 @@ pub unsafe fn vld1q_u64_x3(a: *const u64) -> uint64x2x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19255,7 +19061,7 @@ pub unsafe fn vld1q_u64_x4(a: *const u64) -> uint64x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19284,7 +19090,7 @@ pub unsafe fn vld1q_u64_x4(a: *const u64) -> uint64x2x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19308,7 +19114,7 @@ pub unsafe fn vld1_p8_x2(a: *const p8) -> poly8x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19335,7 +19141,7 @@ pub unsafe fn vld1_p8_x2(a: *const p8) -> poly8x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19359,7 +19165,7 @@ pub unsafe fn vld1_p8_x3(a: *const p8) -> poly8x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19387,7 +19193,7 @@ pub unsafe fn vld1_p8_x3(a: *const p8) -> poly8x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19411,7 +19217,7 @@ pub unsafe fn vld1_p8_x4(a: *const p8) -> poly8x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19440,7 +19246,7 @@ pub unsafe fn vld1_p8_x4(a: *const p8) -> poly8x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19464,7 +19270,7 @@ pub unsafe fn vld1q_p8_x2(a: *const p8) -> poly8x16x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19503,7 +19309,7 @@ pub unsafe fn vld1q_p8_x2(a: *const p8) -> poly8x16x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19527,7 +19333,7 @@ pub unsafe fn vld1q_p8_x3(a: *const p8) -> poly8x16x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19573,7 +19379,7 @@ pub unsafe fn vld1q_p8_x3(a: *const p8) -> poly8x16x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19597,7 +19403,7 @@ pub unsafe fn vld1q_p8_x4(a: *const p8) -> poly8x16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19650,7 +19456,7 @@ pub unsafe fn vld1q_p8_x4(a: *const p8) -> poly8x16x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19674,7 +19480,7 @@ pub unsafe fn vld1_p16_x2(a: *const p16) -> poly16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19701,7 +19507,7 @@ pub unsafe fn vld1_p16_x2(a: *const p16) -> poly16x4x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19725,7 +19531,7 @@ pub unsafe fn vld1_p16_x3(a: *const p16) -> poly16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19753,7 +19559,7 @@ pub unsafe fn vld1_p16_x3(a: *const p16) -> poly16x4x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19777,7 +19583,7 @@ pub unsafe fn vld1_p16_x4(a: *const p16) -> poly16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19806,7 +19612,7 @@ pub unsafe fn vld1_p16_x4(a: *const p16) -> poly16x4x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19830,7 +19636,7 @@ pub unsafe fn vld1q_p16_x2(a: *const p16) -> poly16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19857,7 +19663,7 @@ pub unsafe fn vld1q_p16_x2(a: *const p16) -> poly16x8x2_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19881,7 +19687,7 @@ pub unsafe fn vld1q_p16_x3(a: *const p16) -> poly16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -19909,7 +19715,7 @@ pub unsafe fn vld1q_p16_x3(a: *const p16) -> poly16x8x3_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -19933,7 +19739,7 @@ pub unsafe fn vld1q_p16_x4(a: *const p16) -> poly16x8x4_t { #[doc = "Load multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20120,7 +19926,7 @@ unsafe fn vld1q_v8f16(a: *const i8, b: i32) -> float16x8_t { #[doc = "Load one single-element structure and Replicate to all lanes (of one register)."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -20144,7 +19950,7 @@ pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -20163,7 +19969,7 @@ pub unsafe fn vld2_dup_f16(a: *const f16) -> float16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -20182,7 +19988,7 @@ pub unsafe fn vld2q_dup_f16(a: *const f16) -> float16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20206,7 +20012,7 @@ pub unsafe fn vld2_dup_f16(a: *const f16) -> float16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20230,7 +20036,7 @@ pub unsafe fn vld2q_dup_f16(a: *const f16) -> float16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20246,7 +20052,7 @@ pub unsafe fn vld2_dup_f32(a: *const f32) -> float32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20262,7 +20068,7 @@ pub unsafe fn vld2q_dup_f32(a: *const f32) -> float32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20278,7 +20084,7 @@ pub unsafe fn vld2_dup_s8(a: *const i8) -> int8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20294,7 +20100,7 @@ pub unsafe fn vld2q_dup_s8(a: *const i8) -> int8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20310,7 +20116,7 @@ pub unsafe fn vld2_dup_s16(a: *const i16) -> int16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20326,7 +20132,7 @@ pub unsafe fn vld2q_dup_s16(a: *const i16) -> int16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20342,7 +20148,7 @@ pub unsafe fn vld2_dup_s32(a: *const i32) -> int32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20358,7 +20164,7 @@ pub unsafe fn vld2q_dup_s32(a: *const i32) -> int32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20377,7 +20183,7 @@ pub unsafe fn vld2_dup_f32(a: *const f32) -> float32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20396,7 +20202,7 @@ pub unsafe fn vld2q_dup_f32(a: *const f32) -> float32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20415,7 +20221,7 @@ pub unsafe fn vld2_dup_s8(a: *const i8) -> int8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20434,7 +20240,7 @@ pub unsafe fn vld2q_dup_s8(a: *const i8) -> int8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20453,7 +20259,7 @@ pub unsafe fn vld2_dup_s16(a: *const i16) -> int16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20472,7 +20278,7 @@ pub unsafe fn vld2q_dup_s16(a: *const i16) -> int16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20491,7 +20297,7 @@ pub unsafe fn vld2_dup_s32(a: *const i32) -> int32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20510,7 +20316,7 @@ pub unsafe fn vld2q_dup_s32(a: *const i32) -> int32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -20533,7 +20339,7 @@ pub unsafe fn vld2_dup_p64(a: *const p64) -> poly64x1x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -20549,7 +20355,7 @@ pub unsafe fn vld2_dup_s64(a: *const i64) -> int64x1x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -20568,7 +20374,7 @@ pub unsafe fn vld2_dup_s64(a: *const i64) -> int64x1x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -20591,7 +20397,7 @@ pub unsafe fn vld2_dup_u64(a: *const u64) -> uint64x1x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20615,7 +20421,7 @@ pub unsafe fn vld2_dup_u8(a: *const u8) -> uint8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20642,7 +20448,7 @@ pub unsafe fn vld2_dup_u8(a: *const u8) -> uint8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20666,7 +20472,7 @@ pub unsafe fn vld2q_dup_u8(a: *const u8) -> uint8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20705,7 +20511,7 @@ pub unsafe fn vld2q_dup_u8(a: *const u8) -> uint8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20729,7 +20535,7 @@ pub unsafe fn vld2_dup_u16(a: *const u16) -> uint16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20756,7 +20562,7 @@ pub unsafe fn vld2_dup_u16(a: *const u16) -> uint16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20780,7 +20586,7 @@ pub unsafe fn vld2q_dup_u16(a: *const u16) -> uint16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20807,7 +20613,7 @@ pub unsafe fn vld2q_dup_u16(a: *const u16) -> uint16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20831,7 +20637,7 @@ pub unsafe fn vld2_dup_u32(a: *const u32) -> uint32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20858,7 +20664,7 @@ pub unsafe fn vld2_dup_u32(a: *const u32) -> uint32x2x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20882,7 +20688,7 @@ pub unsafe fn vld2q_dup_u32(a: *const u32) -> uint32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20909,7 +20715,7 @@ pub unsafe fn vld2q_dup_u32(a: *const u32) -> uint32x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20933,7 +20739,7 @@ pub unsafe fn vld2_dup_p8(a: *const p8) -> poly8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -20960,7 +20766,7 @@ pub unsafe fn vld2_dup_p8(a: *const p8) -> poly8x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -20984,7 +20790,7 @@ pub unsafe fn vld2q_dup_p8(a: *const p8) -> poly8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -21023,7 +20829,7 @@ pub unsafe fn vld2q_dup_p8(a: *const p8) -> poly8x16x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -21047,7 +20853,7 @@ pub unsafe fn vld2_dup_p16(a: *const p16) -> poly16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -21074,7 +20880,7 @@ pub unsafe fn vld2_dup_p16(a: *const p16) -> poly16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -21098,7 +20904,7 @@ pub unsafe fn vld2q_dup_p16(a: *const p16) -> poly16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -21125,7 +20931,7 @@ pub unsafe fn vld2q_dup_p16(a: *const p16) -> poly16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -21144,7 +20950,7 @@ pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -21163,7 +20969,7 @@ pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21187,7 +20993,7 @@ pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t { #[doc = "Load single 2-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21211,7 +21017,7 @@ pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21227,7 +21033,7 @@ pub unsafe fn vld2_f32(a: *const f32) -> float32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21243,7 +21049,7 @@ pub unsafe fn vld2q_f32(a: *const f32) -> float32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21259,7 +21065,7 @@ pub unsafe fn vld2_s8(a: *const i8) -> int8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21275,7 +21081,7 @@ pub unsafe fn vld2q_s8(a: *const i8) -> int8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21291,7 +21097,7 @@ pub unsafe fn vld2_s16(a: *const i16) -> int16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21307,7 +21113,7 @@ pub unsafe fn vld2q_s16(a: *const i16) -> int16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21323,7 +21129,7 @@ pub unsafe fn vld2_s32(a: *const i32) -> int32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21339,7 +21145,7 @@ pub unsafe fn vld2q_s32(a: *const i32) -> int32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21358,7 +21164,7 @@ pub unsafe fn vld2_f32(a: *const f32) -> float32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21377,7 +21183,7 @@ pub unsafe fn vld2q_f32(a: *const f32) -> float32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21396,7 +21202,7 @@ pub unsafe fn vld2_s8(a: *const i8) -> int8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21415,7 +21221,7 @@ pub unsafe fn vld2q_s8(a: *const i8) -> int8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21434,7 +21240,7 @@ pub unsafe fn vld2_s16(a: *const i16) -> int16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21453,7 +21259,7 @@ pub unsafe fn vld2q_s16(a: *const i16) -> int16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21472,7 +21278,7 @@ pub unsafe fn vld2_s32(a: *const i32) -> int32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21491,7 +21297,7 @@ pub unsafe fn vld2q_s32(a: *const i32) -> int32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21517,7 +21323,7 @@ pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21543,7 +21349,7 @@ pub unsafe fn vld2q_lane_f16(a: *const f16, b: float16x8x2_t) - #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21570,7 +21376,7 @@ pub unsafe fn vld2_lane_f16(a: *const f16, b: float16x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21601,7 +21407,7 @@ pub unsafe fn vld2q_lane_f16(a: *const f16, b: float16x8x2_t) - #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21622,7 +21428,7 @@ pub unsafe fn vld2_lane_f32(a: *const f32, b: float32x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21644,7 +21450,7 @@ pub unsafe fn vld2q_lane_f32(a: *const f32, b: float32x4x2_t) - #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21665,7 +21471,7 @@ pub unsafe fn vld2_lane_s8(a: *const i8, b: int8x8x2_t) -> int8 #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21686,7 +21492,7 @@ pub unsafe fn vld2_lane_s16(a: *const i16, b: int16x4x2_t) -> i #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21707,7 +21513,7 @@ pub unsafe fn vld2q_lane_s16(a: *const i16, b: int16x8x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21728,7 +21534,7 @@ pub unsafe fn vld2_lane_s32(a: *const i32, b: int32x2x2_t) -> i #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -21749,7 +21555,7 @@ pub unsafe fn vld2q_lane_s32(a: *const i32, b: int32x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21773,7 +21579,7 @@ pub unsafe fn vld2_lane_f32(a: *const f32, b: float32x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21797,7 +21603,7 @@ pub unsafe fn vld2q_lane_f32(a: *const f32, b: float32x4x2_t) - #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21821,7 +21627,7 @@ pub unsafe fn vld2q_lane_s16(a: *const i16, b: int16x8x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21845,7 +21651,7 @@ pub unsafe fn vld2q_lane_s32(a: *const i32, b: int32x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21864,7 +21670,7 @@ pub unsafe fn vld2_lane_s8(a: *const i8, b: int8x8x2_t) -> int8 #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21888,7 +21694,7 @@ pub unsafe fn vld2_lane_s16(a: *const i16, b: int16x4x2_t) -> i #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -21912,7 +21718,7 @@ pub unsafe fn vld2_lane_s32(a: *const i32, b: int32x2x2_t) -> i #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -21937,7 +21743,7 @@ pub unsafe fn vld2_lane_u8(a: *const u8, b: uint8x8x2_t) -> uin #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -21962,7 +21768,7 @@ pub unsafe fn vld2_lane_u16(a: *const u16, b: uint16x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -21987,7 +21793,7 @@ pub unsafe fn vld2q_lane_u16(a: *const u16, b: uint16x8x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22012,7 +21818,7 @@ pub unsafe fn vld2_lane_u32(a: *const u32, b: uint32x2x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22037,7 +21843,7 @@ pub unsafe fn vld2q_lane_u32(a: *const u32, b: uint32x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22062,7 +21868,7 @@ pub unsafe fn vld2_lane_p8(a: *const p8, b: poly8x8x2_t) -> pol #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22087,7 +21893,7 @@ pub unsafe fn vld2_lane_p16(a: *const p16, b: poly16x4x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22112,7 +21918,7 @@ pub unsafe fn vld2q_lane_p16(a: *const p16, b: poly16x8x2_t) -> #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -22135,7 +21941,7 @@ pub unsafe fn vld2_p64(a: *const p64) -> poly64x1x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -22151,7 +21957,7 @@ pub unsafe fn vld2_s64(a: *const i64) -> int64x1x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22170,7 +21976,7 @@ pub unsafe fn vld2_s64(a: *const i64) -> int64x1x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22193,7 +21999,7 @@ pub unsafe fn vld2_u64(a: *const u64) -> uint64x1x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22217,7 +22023,7 @@ pub unsafe fn vld2_u8(a: *const u8) -> uint8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22244,7 +22050,7 @@ pub unsafe fn vld2_u8(a: *const u8) -> uint8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22268,7 +22074,7 @@ pub unsafe fn vld2q_u8(a: *const u8) -> uint8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22307,7 +22113,7 @@ pub unsafe fn vld2q_u8(a: *const u8) -> uint8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22331,7 +22137,7 @@ pub unsafe fn vld2_u16(a: *const u16) -> uint16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22358,7 +22164,7 @@ pub unsafe fn vld2_u16(a: *const u16) -> uint16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22382,7 +22188,7 @@ pub unsafe fn vld2q_u16(a: *const u16) -> uint16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22409,7 +22215,7 @@ pub unsafe fn vld2q_u16(a: *const u16) -> uint16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22433,7 +22239,7 @@ pub unsafe fn vld2_u32(a: *const u32) -> uint32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22460,7 +22266,7 @@ pub unsafe fn vld2_u32(a: *const u32) -> uint32x2x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22484,7 +22290,7 @@ pub unsafe fn vld2q_u32(a: *const u32) -> uint32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22511,7 +22317,7 @@ pub unsafe fn vld2q_u32(a: *const u32) -> uint32x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22535,7 +22341,7 @@ pub unsafe fn vld2_p8(a: *const p8) -> poly8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22562,7 +22368,7 @@ pub unsafe fn vld2_p8(a: *const p8) -> poly8x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22586,7 +22392,7 @@ pub unsafe fn vld2q_p8(a: *const p8) -> poly8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22625,7 +22431,7 @@ pub unsafe fn vld2q_p8(a: *const p8) -> poly8x16x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22649,7 +22455,7 @@ pub unsafe fn vld2_p16(a: *const p16) -> poly16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22676,7 +22482,7 @@ pub unsafe fn vld2_p16(a: *const p16) -> poly16x4x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -22700,7 +22506,7 @@ pub unsafe fn vld2q_p16(a: *const p16) -> poly16x8x2_t { #[doc = "Load multiple 2-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -22727,7 +22533,7 @@ pub unsafe fn vld2q_p16(a: *const p16) -> poly16x8x2_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22746,7 +22552,7 @@ pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -22765,7 +22571,7 @@ pub unsafe fn vld3q_dup_f16(a: *const f16) -> float16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22789,7 +22595,7 @@ pub unsafe fn vld3_dup_f16(a: *const f16) -> float16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22813,7 +22619,7 @@ pub unsafe fn vld3q_dup_f16(a: *const f16) -> float16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22832,7 +22638,7 @@ pub unsafe fn vld3_dup_f32(a: *const f32) -> float32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22851,7 +22657,7 @@ pub unsafe fn vld3q_dup_f32(a: *const f32) -> float32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22870,7 +22676,7 @@ pub unsafe fn vld3_dup_s8(a: *const i8) -> int8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22889,7 +22695,7 @@ pub unsafe fn vld3q_dup_s8(a: *const i8) -> int8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22908,7 +22714,7 @@ pub unsafe fn vld3_dup_s16(a: *const i16) -> int16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22927,7 +22733,7 @@ pub unsafe fn vld3q_dup_s16(a: *const i16) -> int16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22946,7 +22752,7 @@ pub unsafe fn vld3_dup_s32(a: *const i32) -> int32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22965,7 +22771,7 @@ pub unsafe fn vld3q_dup_s32(a: *const i32) -> int32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -22984,7 +22790,7 @@ pub unsafe fn vld3_dup_s64(a: *const i64) -> int64x1x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23000,7 +22806,7 @@ pub unsafe fn vld3_dup_f32(a: *const f32) -> float32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23016,7 +22822,7 @@ pub unsafe fn vld3q_dup_f32(a: *const f32) -> float32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23032,7 +22838,7 @@ pub unsafe fn vld3_dup_s8(a: *const i8) -> int8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23048,7 +22854,7 @@ pub unsafe fn vld3q_dup_s8(a: *const i8) -> int8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23064,7 +22870,7 @@ pub unsafe fn vld3_dup_s16(a: *const i16) -> int16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23080,7 +22886,7 @@ pub unsafe fn vld3q_dup_s16(a: *const i16) -> int16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23096,7 +22902,7 @@ pub unsafe fn vld3_dup_s32(a: *const i32) -> int32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -23112,7 +22918,7 @@ pub unsafe fn vld3q_dup_s32(a: *const i32) -> int32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -23135,7 +22941,7 @@ pub unsafe fn vld3_dup_p64(a: *const p64) -> poly64x1x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -23151,7 +22957,7 @@ pub unsafe fn vld3_dup_s64(a: *const i64) -> int64x1x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -23174,7 +22980,7 @@ pub unsafe fn vld3_dup_u64(a: *const u64) -> uint64x1x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23198,7 +23004,7 @@ pub unsafe fn vld3_dup_u8(a: *const u8) -> uint8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23226,7 +23032,7 @@ pub unsafe fn vld3_dup_u8(a: *const u8) -> uint8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23250,7 +23056,7 @@ pub unsafe fn vld3q_dup_u8(a: *const u8) -> uint8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23296,7 +23102,7 @@ pub unsafe fn vld3q_dup_u8(a: *const u8) -> uint8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23320,7 +23126,7 @@ pub unsafe fn vld3_dup_u16(a: *const u16) -> uint16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23348,7 +23154,7 @@ pub unsafe fn vld3_dup_u16(a: *const u16) -> uint16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23372,7 +23178,7 @@ pub unsafe fn vld3q_dup_u16(a: *const u16) -> uint16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23400,7 +23206,7 @@ pub unsafe fn vld3q_dup_u16(a: *const u16) -> uint16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23424,7 +23230,7 @@ pub unsafe fn vld3_dup_u32(a: *const u32) -> uint32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23452,7 +23258,7 @@ pub unsafe fn vld3_dup_u32(a: *const u32) -> uint32x2x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23476,7 +23282,7 @@ pub unsafe fn vld3q_dup_u32(a: *const u32) -> uint32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23504,7 +23310,7 @@ pub unsafe fn vld3q_dup_u32(a: *const u32) -> uint32x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23528,7 +23334,7 @@ pub unsafe fn vld3_dup_p8(a: *const p8) -> poly8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23556,7 +23362,7 @@ pub unsafe fn vld3_dup_p8(a: *const p8) -> poly8x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23580,7 +23386,7 @@ pub unsafe fn vld3q_dup_p8(a: *const p8) -> poly8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23626,7 +23432,7 @@ pub unsafe fn vld3q_dup_p8(a: *const p8) -> poly8x16x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23650,7 +23456,7 @@ pub unsafe fn vld3_dup_p16(a: *const p16) -> poly16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23678,7 +23484,7 @@ pub unsafe fn vld3_dup_p16(a: *const p16) -> poly16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -23702,7 +23508,7 @@ pub unsafe fn vld3q_dup_p16(a: *const p16) -> poly16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -23730,7 +23536,7 @@ pub unsafe fn vld3q_dup_p16(a: *const p16) -> poly16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -23749,7 +23555,7 @@ pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -23768,7 +23574,7 @@ pub unsafe fn vld3q_f16(a: *const f16) -> float16x8x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -23792,7 +23598,7 @@ pub unsafe fn vld3_f16(a: *const f16) -> float16x4x3_t { #[doc = "Load single 3-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -23816,7 +23622,7 @@ pub unsafe fn vld3q_f16(a: *const f16) -> float16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23835,7 +23641,7 @@ pub unsafe fn vld3_f32(a: *const f32) -> float32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23854,7 +23660,7 @@ pub unsafe fn vld3q_f32(a: *const f32) -> float32x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23873,7 +23679,7 @@ pub unsafe fn vld3_s8(a: *const i8) -> int8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23892,7 +23698,7 @@ pub unsafe fn vld3q_s8(a: *const i8) -> int8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23911,7 +23717,7 @@ pub unsafe fn vld3_s16(a: *const i16) -> int16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23930,7 +23736,7 @@ pub unsafe fn vld3q_s16(a: *const i16) -> int16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23949,7 +23755,7 @@ pub unsafe fn vld3_s32(a: *const i32) -> int32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23968,7 +23774,7 @@ pub unsafe fn vld3q_s32(a: *const i32) -> int32x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -23984,7 +23790,7 @@ pub unsafe fn vld3_f32(a: *const f32) -> float32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24000,7 +23806,7 @@ pub unsafe fn vld3q_f32(a: *const f32) -> float32x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24016,7 +23822,7 @@ pub unsafe fn vld3_s8(a: *const i8) -> int8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24032,7 +23838,7 @@ pub unsafe fn vld3q_s8(a: *const i8) -> int8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24048,7 +23854,7 @@ pub unsafe fn vld3_s16(a: *const i16) -> int16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24064,7 +23870,7 @@ pub unsafe fn vld3q_s16(a: *const i16) -> int16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24080,7 +23886,7 @@ pub unsafe fn vld3_s32(a: *const i32) -> int32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24096,7 +23902,7 @@ pub unsafe fn vld3q_s32(a: *const i32) -> int32x4x3_t { #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -24123,7 +23929,7 @@ pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -24150,7 +23956,7 @@ pub unsafe fn vld3q_lane_f16(a: *const f16, b: float16x8x3_t) - #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24182,7 +23988,7 @@ pub unsafe fn vld3_lane_f16(a: *const f16, b: float16x4x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24214,7 +24020,7 @@ pub unsafe fn vld3q_lane_f16(a: *const f16, b: float16x8x3_t) - #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24241,7 +24047,7 @@ pub unsafe fn vld3_lane_f32(a: *const f32, b: float32x2x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24268,7 +24074,7 @@ pub unsafe fn vld3q_lane_f32(a: *const f32, b: float32x4x3_t) - #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24293,7 +24099,7 @@ pub unsafe fn vld3_lane_f32(a: *const f32, b: float32x2x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24320,7 +24126,7 @@ pub unsafe fn vld3_lane_s8(a: *const i8, b: int8x8x3_t) -> int8 #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24347,7 +24153,7 @@ pub unsafe fn vld3_lane_s16(a: *const i16, b: int16x4x3_t) -> i #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24374,7 +24180,7 @@ pub unsafe fn vld3q_lane_s16(a: *const i16, b: int16x8x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24401,7 +24207,7 @@ pub unsafe fn vld3_lane_s32(a: *const i32, b: int32x2x3_t) -> i #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -24428,7 +24234,7 @@ pub unsafe fn vld3q_lane_s32(a: *const i32, b: int32x4x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24453,7 +24259,7 @@ pub unsafe fn vld3_lane_s8(a: *const i8, b: int8x8x3_t) -> int8 #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24478,7 +24284,7 @@ pub unsafe fn vld3_lane_s16(a: *const i16, b: int16x4x3_t) -> i #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24503,7 +24309,7 @@ pub unsafe fn vld3q_lane_s16(a: *const i16, b: int16x8x3_t) -> #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24528,7 +24334,7 @@ pub unsafe fn vld3_lane_s32(a: *const i32, b: int32x2x3_t) -> i #[doc = "Load multiple 3-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24553,7 +24359,7 @@ pub unsafe fn vld3q_lane_s32(a: *const i32, b: int32x4x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24578,7 +24384,7 @@ pub unsafe fn vld3_lane_u8(a: *const u8, b: uint8x8x3_t) -> uin #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24603,7 +24409,7 @@ pub unsafe fn vld3_lane_u16(a: *const u16, b: uint16x4x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24628,7 +24434,7 @@ pub unsafe fn vld3q_lane_u16(a: *const u16, b: uint16x8x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24653,7 +24459,7 @@ pub unsafe fn vld3_lane_u32(a: *const u32, b: uint32x2x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24678,7 +24484,7 @@ pub unsafe fn vld3q_lane_u32(a: *const u32, b: uint32x4x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24703,7 +24509,7 @@ pub unsafe fn vld3_lane_p8(a: *const p8, b: poly8x8x3_t) -> pol #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24728,7 +24534,7 @@ pub unsafe fn vld3_lane_p16(a: *const p16, b: poly16x4x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24753,7 +24559,7 @@ pub unsafe fn vld3q_lane_p16(a: *const p16, b: poly16x8x3_t) -> #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -24776,7 +24582,7 @@ pub unsafe fn vld3_p64(a: *const p64) -> poly64x1x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -24795,7 +24601,7 @@ pub unsafe fn vld3_s64(a: *const i64) -> int64x1x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -24811,7 +24617,7 @@ pub unsafe fn vld3_s64(a: *const i64) -> int64x1x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -24834,7 +24640,7 @@ pub unsafe fn vld3_u64(a: *const u64) -> uint64x1x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -24858,7 +24664,7 @@ pub unsafe fn vld3_u8(a: *const u8) -> uint8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -24886,7 +24692,7 @@ pub unsafe fn vld3_u8(a: *const u8) -> uint8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -24910,7 +24716,7 @@ pub unsafe fn vld3q_u8(a: *const u8) -> uint8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -24956,7 +24762,7 @@ pub unsafe fn vld3q_u8(a: *const u8) -> uint8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -24980,7 +24786,7 @@ pub unsafe fn vld3_u16(a: *const u16) -> uint16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25008,7 +24814,7 @@ pub unsafe fn vld3_u16(a: *const u16) -> uint16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25032,7 +24838,7 @@ pub unsafe fn vld3q_u16(a: *const u16) -> uint16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25060,7 +24866,7 @@ pub unsafe fn vld3q_u16(a: *const u16) -> uint16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25084,7 +24890,7 @@ pub unsafe fn vld3_u32(a: *const u32) -> uint32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25112,7 +24918,7 @@ pub unsafe fn vld3_u32(a: *const u32) -> uint32x2x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25136,7 +24942,7 @@ pub unsafe fn vld3q_u32(a: *const u32) -> uint32x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25164,7 +24970,7 @@ pub unsafe fn vld3q_u32(a: *const u32) -> uint32x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25188,7 +24994,7 @@ pub unsafe fn vld3_p8(a: *const p8) -> poly8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25216,7 +25022,7 @@ pub unsafe fn vld3_p8(a: *const p8) -> poly8x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25240,7 +25046,7 @@ pub unsafe fn vld3q_p8(a: *const p8) -> poly8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25286,7 +25092,7 @@ pub unsafe fn vld3q_p8(a: *const p8) -> poly8x16x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25310,7 +25116,7 @@ pub unsafe fn vld3_p16(a: *const p16) -> poly16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25338,7 +25144,7 @@ pub unsafe fn vld3_p16(a: *const p16) -> poly16x4x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25362,7 +25168,7 @@ pub unsafe fn vld3q_p16(a: *const p16) -> poly16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25390,7 +25196,7 @@ pub unsafe fn vld3q_p16(a: *const p16) -> poly16x8x3_t { #[doc = "Load multiple 3-element structures to three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25415,7 +25221,7 @@ pub unsafe fn vld3q_lane_f32(a: *const f32, b: float32x4x3_t) - #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] @@ -25433,7 +25239,7 @@ pub unsafe fn vld4_dup_f16(a: *const f16) -> float16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] @@ -25451,7 +25257,7 @@ pub unsafe fn vld4q_dup_f16(a: *const f16) -> float16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -25474,7 +25280,7 @@ pub unsafe fn vld4_dup_f16(a: *const f16) -> float16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -25497,7 +25303,7 @@ pub unsafe fn vld4q_dup_f16(a: *const f16) -> float16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25513,7 +25319,7 @@ pub unsafe fn vld4_dup_f32(a: *const f32) -> float32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25529,7 +25335,7 @@ pub unsafe fn vld4q_dup_f32(a: *const f32) -> float32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25545,7 +25351,7 @@ pub unsafe fn vld4_dup_s8(a: *const i8) -> int8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25561,7 +25367,7 @@ pub unsafe fn vld4q_dup_s8(a: *const i8) -> int8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25577,7 +25383,7 @@ pub unsafe fn vld4_dup_s16(a: *const i16) -> int16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25593,7 +25399,7 @@ pub unsafe fn vld4q_dup_s16(a: *const i16) -> int16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25609,7 +25415,7 @@ pub unsafe fn vld4_dup_s32(a: *const i32) -> int32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25625,7 +25431,7 @@ pub unsafe fn vld4q_dup_s32(a: *const i32) -> int32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25644,7 +25450,7 @@ pub unsafe fn vld4_dup_f32(a: *const f32) -> float32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25663,7 +25469,7 @@ pub unsafe fn vld4q_dup_f32(a: *const f32) -> float32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25682,7 +25488,7 @@ pub unsafe fn vld4_dup_s8(a: *const i8) -> int8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25701,7 +25507,7 @@ pub unsafe fn vld4q_dup_s8(a: *const i8) -> int8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25720,7 +25526,7 @@ pub unsafe fn vld4_dup_s16(a: *const i16) -> int16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25739,7 +25545,7 @@ pub unsafe fn vld4q_dup_s16(a: *const i16) -> int16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25758,7 +25564,7 @@ pub unsafe fn vld4_dup_s32(a: *const i32) -> int32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25777,7 +25583,7 @@ pub unsafe fn vld4q_dup_s32(a: *const i32) -> int32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -25796,7 +25602,7 @@ pub unsafe fn vld4_dup_s64(a: *const i64) -> int64x1x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -25819,7 +25625,7 @@ pub unsafe fn vld4_dup_p64(a: *const p64) -> poly64x1x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -25835,7 +25641,7 @@ pub unsafe fn vld4_dup_s64(a: *const i64) -> int64x1x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -25858,7 +25664,7 @@ pub unsafe fn vld4_dup_u64(a: *const u64) -> uint64x1x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25882,7 +25688,7 @@ pub unsafe fn vld4_dup_u8(a: *const u8) -> uint8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25911,7 +25717,7 @@ pub unsafe fn vld4_dup_u8(a: *const u8) -> uint8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -25935,7 +25741,7 @@ pub unsafe fn vld4q_dup_u8(a: *const u8) -> uint8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -25988,7 +25794,7 @@ pub unsafe fn vld4q_dup_u8(a: *const u8) -> uint8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26012,7 +25818,7 @@ pub unsafe fn vld4_dup_u16(a: *const u16) -> uint16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26041,7 +25847,7 @@ pub unsafe fn vld4_dup_u16(a: *const u16) -> uint16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26065,7 +25871,7 @@ pub unsafe fn vld4q_dup_u16(a: *const u16) -> uint16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26094,7 +25900,7 @@ pub unsafe fn vld4q_dup_u16(a: *const u16) -> uint16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26118,7 +25924,7 @@ pub unsafe fn vld4_dup_u32(a: *const u32) -> uint32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26147,7 +25953,7 @@ pub unsafe fn vld4_dup_u32(a: *const u32) -> uint32x2x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26171,7 +25977,7 @@ pub unsafe fn vld4q_dup_u32(a: *const u32) -> uint32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26200,7 +26006,7 @@ pub unsafe fn vld4q_dup_u32(a: *const u32) -> uint32x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26224,7 +26030,7 @@ pub unsafe fn vld4_dup_p8(a: *const p8) -> poly8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26253,7 +26059,7 @@ pub unsafe fn vld4_dup_p8(a: *const p8) -> poly8x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26277,7 +26083,7 @@ pub unsafe fn vld4q_dup_p8(a: *const p8) -> poly8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26330,7 +26136,7 @@ pub unsafe fn vld4q_dup_p8(a: *const p8) -> poly8x16x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26354,7 +26160,7 @@ pub unsafe fn vld4_dup_p16(a: *const p16) -> poly16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26383,7 +26189,7 @@ pub unsafe fn vld4_dup_p16(a: *const p16) -> poly16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -26407,7 +26213,7 @@ pub unsafe fn vld4q_dup_p16(a: *const p16) -> poly16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_dup_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -26436,7 +26242,7 @@ pub unsafe fn vld4q_dup_p16(a: *const p16) -> poly16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] @@ -26454,7 +26260,7 @@ pub unsafe fn vld4_f16(a: *const f16) -> float16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg(target_arch = "arm")] @@ -26472,7 +26278,7 @@ pub unsafe fn vld4q_f16(a: *const f16) -> float16x8x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -26495,7 +26301,7 @@ pub unsafe fn vld4_f16(a: *const f16) -> float16x4x4_t { #[doc = "Load single 4-element structure and replicate to all lanes of two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -26518,7 +26324,7 @@ pub unsafe fn vld4q_f16(a: *const f16) -> float16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26537,7 +26343,7 @@ pub unsafe fn vld4_f32(a: *const f32) -> float32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26556,7 +26362,7 @@ pub unsafe fn vld4q_f32(a: *const f32) -> float32x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26575,7 +26381,7 @@ pub unsafe fn vld4_s8(a: *const i8) -> int8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26594,7 +26400,7 @@ pub unsafe fn vld4q_s8(a: *const i8) -> int8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26613,7 +26419,7 @@ pub unsafe fn vld4_s16(a: *const i16) -> int16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26632,7 +26438,7 @@ pub unsafe fn vld4q_s16(a: *const i16) -> int16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26651,7 +26457,7 @@ pub unsafe fn vld4_s32(a: *const i32) -> int32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26670,7 +26476,7 @@ pub unsafe fn vld4q_s32(a: *const i32) -> int32x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26686,7 +26492,7 @@ pub unsafe fn vld4_f32(a: *const f32) -> float32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26702,7 +26508,7 @@ pub unsafe fn vld4q_f32(a: *const f32) -> float32x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26718,7 +26524,7 @@ pub unsafe fn vld4_s8(a: *const i8) -> int8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26734,7 +26540,7 @@ pub unsafe fn vld4q_s8(a: *const i8) -> int8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26750,7 +26556,7 @@ pub unsafe fn vld4_s16(a: *const i16) -> int16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26766,7 +26572,7 @@ pub unsafe fn vld4q_s16(a: *const i16) -> int16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26782,7 +26588,7 @@ pub unsafe fn vld4_s32(a: *const i32) -> int32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26798,7 +26604,7 @@ pub unsafe fn vld4q_s32(a: *const i32) -> int32x4x4_t { #[doc = "Load multiple 4-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26826,7 +26632,7 @@ pub unsafe fn vld4_lane_f16(a: *const f16, b: float16x4x4_t) -> #[doc = "Load multiple 4-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -26854,7 +26660,7 @@ pub unsafe fn vld4q_lane_f16(a: *const f16, b: float16x8x4_t) - #[doc = "Load multiple 4-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -26886,7 +26692,7 @@ pub unsafe fn vld4_lane_f16(a: *const f16, b: float16x4x4_t) -> #[doc = "Load multiple 4-element structures to two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr( @@ -26918,7 +26724,7 @@ pub unsafe fn vld4q_lane_f16(a: *const f16, b: float16x8x4_t) - #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26946,7 +26752,7 @@ pub unsafe fn vld4_lane_f32(a: *const f32, b: float32x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -26974,7 +26780,7 @@ pub unsafe fn vld4q_lane_f32(a: *const f32, b: float32x4x4_t) - #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27002,7 +26808,7 @@ pub unsafe fn vld4_lane_s8(a: *const i8, b: int8x8x4_t) -> int8 #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27030,7 +26836,7 @@ pub unsafe fn vld4_lane_s16(a: *const i16, b: int16x4x4_t) -> i #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27058,7 +26864,7 @@ pub unsafe fn vld4q_lane_s16(a: *const i16, b: int16x8x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27086,7 +26892,7 @@ pub unsafe fn vld4_lane_s32(a: *const i32, b: int32x2x4_t) -> i #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27114,7 +26920,7 @@ pub unsafe fn vld4q_lane_s32(a: *const i32, b: int32x4x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27140,7 +26946,7 @@ pub unsafe fn vld4_lane_f32(a: *const f32, b: float32x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27166,7 +26972,7 @@ pub unsafe fn vld4q_lane_f32(a: *const f32, b: float32x4x4_t) - #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27192,7 +26998,7 @@ pub unsafe fn vld4_lane_s8(a: *const i8, b: int8x8x4_t) -> int8 #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27218,7 +27024,7 @@ pub unsafe fn vld4_lane_s16(a: *const i16, b: int16x4x4_t) -> i #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27244,7 +27050,7 @@ pub unsafe fn vld4q_lane_s16(a: *const i16, b: int16x8x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27270,7 +27076,7 @@ pub unsafe fn vld4_lane_s32(a: *const i32, b: int32x2x4_t) -> i #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27296,7 +27102,7 @@ pub unsafe fn vld4q_lane_s32(a: *const i32, b: int32x4x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27321,7 +27127,7 @@ pub unsafe fn vld4_lane_u8(a: *const u8, b: uint8x8x4_t) -> uin #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27346,7 +27152,7 @@ pub unsafe fn vld4_lane_u16(a: *const u16, b: uint16x4x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27371,7 +27177,7 @@ pub unsafe fn vld4q_lane_u16(a: *const u16, b: uint16x8x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27396,7 +27202,7 @@ pub unsafe fn vld4_lane_u32(a: *const u32, b: uint32x2x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27421,7 +27227,7 @@ pub unsafe fn vld4q_lane_u32(a: *const u32, b: uint32x4x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27446,7 +27252,7 @@ pub unsafe fn vld4_lane_p8(a: *const p8, b: poly8x8x4_t) -> pol #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27471,7 +27277,7 @@ pub unsafe fn vld4_lane_p16(a: *const p16, b: poly16x4x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27496,7 +27302,7 @@ pub unsafe fn vld4q_lane_p16(a: *const p16, b: poly16x8x4_t) -> #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -27519,7 +27325,7 @@ pub unsafe fn vld4_p64(a: *const p64) -> poly64x1x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -27538,7 +27344,7 @@ pub unsafe fn vld4_s64(a: *const i64) -> int64x1x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -27554,7 +27360,7 @@ pub unsafe fn vld4_s64(a: *const i64) -> int64x1x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -27577,7 +27383,7 @@ pub unsafe fn vld4_u64(a: *const u64) -> uint64x1x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27601,7 +27407,7 @@ pub unsafe fn vld4_u8(a: *const u8) -> uint8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27630,7 +27436,7 @@ pub unsafe fn vld4_u8(a: *const u8) -> uint8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27654,7 +27460,7 @@ pub unsafe fn vld4q_u8(a: *const u8) -> uint8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27707,7 +27513,7 @@ pub unsafe fn vld4q_u8(a: *const u8) -> uint8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27731,7 +27537,7 @@ pub unsafe fn vld4_u16(a: *const u16) -> uint16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27760,7 +27566,7 @@ pub unsafe fn vld4_u16(a: *const u16) -> uint16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27784,7 +27590,7 @@ pub unsafe fn vld4q_u16(a: *const u16) -> uint16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27813,7 +27619,7 @@ pub unsafe fn vld4q_u16(a: *const u16) -> uint16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27837,7 +27643,7 @@ pub unsafe fn vld4_u32(a: *const u32) -> uint32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27866,7 +27672,7 @@ pub unsafe fn vld4_u32(a: *const u32) -> uint32x2x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27890,7 +27696,7 @@ pub unsafe fn vld4q_u32(a: *const u32) -> uint32x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27919,7 +27725,7 @@ pub unsafe fn vld4q_u32(a: *const u32) -> uint32x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27943,7 +27749,7 @@ pub unsafe fn vld4_p8(a: *const p8) -> poly8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -27972,7 +27778,7 @@ pub unsafe fn vld4_p8(a: *const p8) -> poly8x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -27996,7 +27802,7 @@ pub unsafe fn vld4q_p8(a: *const p8) -> poly8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -28049,7 +27855,7 @@ pub unsafe fn vld4q_p8(a: *const p8) -> poly8x16x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -28073,7 +27879,7 @@ pub unsafe fn vld4_p16(a: *const p16) -> poly16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -28102,7 +27908,7 @@ pub unsafe fn vld4_p16(a: *const p16) -> poly16x4x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "little")] #[target_feature(enable = "neon")] @@ -28126,7 +27932,7 @@ pub unsafe fn vld4q_p16(a: *const p16) -> poly16x8x4_t { #[doc = "Load multiple 4-element structures to four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_endian = "big")] #[target_feature(enable = "neon")] @@ -28155,7 +27961,7 @@ pub unsafe fn vld4q_p16(a: *const p16) -> poly16x8x4_t { #[doc = "Store SIMD&FP register (immediate offset)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vldrq_p128)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -42759,13 +42565,13 @@ pub fn vrecpsq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42782,13 +42588,13 @@ pub fn vreinterpret_f32_f16(a: float16x4_t) -> float32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42809,13 +42615,13 @@ pub fn vreinterpret_f32_f16(a: float16x4_t) -> float32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42832,13 +42638,13 @@ pub fn vreinterpret_s8_f16(a: float16x4_t) -> int8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42859,13 +42665,13 @@ pub fn vreinterpret_s8_f16(a: float16x4_t) -> int8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42882,13 +42688,13 @@ pub fn vreinterpret_s16_f16(a: float16x4_t) -> int16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42909,13 +42715,13 @@ pub fn vreinterpret_s16_f16(a: float16x4_t) -> int16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42932,13 +42738,13 @@ pub fn vreinterpret_s32_f16(a: float16x4_t) -> int32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42959,13 +42765,13 @@ pub fn vreinterpret_s32_f16(a: float16x4_t) -> int32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -42982,13 +42788,13 @@ pub fn vreinterpret_s64_f16(a: float16x4_t) -> int64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43006,13 +42812,13 @@ pub fn vreinterpret_s64_f16(a: float16x4_t) -> int64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43029,13 +42835,13 @@ pub fn vreinterpret_u8_f16(a: float16x4_t) -> uint8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43056,13 +42862,13 @@ pub fn vreinterpret_u8_f16(a: float16x4_t) -> uint8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43079,13 +42885,13 @@ pub fn vreinterpret_u16_f16(a: float16x4_t) -> uint16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43106,13 +42912,13 @@ pub fn vreinterpret_u16_f16(a: float16x4_t) -> uint16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43129,13 +42935,13 @@ pub fn vreinterpret_u32_f16(a: float16x4_t) -> uint32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43156,13 +42962,13 @@ pub fn vreinterpret_u32_f16(a: float16x4_t) -> uint32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43179,13 +42985,13 @@ pub fn vreinterpret_u64_f16(a: float16x4_t) -> uint64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43203,13 +43009,13 @@ pub fn vreinterpret_u64_f16(a: float16x4_t) -> uint64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43226,13 +43032,13 @@ pub fn vreinterpret_p8_f16(a: float16x4_t) -> poly8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43253,13 +43059,13 @@ pub fn vreinterpret_p8_f16(a: float16x4_t) -> poly8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43276,13 +43082,13 @@ pub fn vreinterpret_p16_f16(a: float16x4_t) -> poly16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43303,13 +43109,13 @@ pub fn vreinterpret_p16_f16(a: float16x4_t) -> poly16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43326,13 +43132,13 @@ pub fn vreinterpretq_f32_f16(a: float16x8_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43353,13 +43159,13 @@ pub fn vreinterpretq_f32_f16(a: float16x8_t) -> float32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43376,13 +43182,13 @@ pub fn vreinterpretq_s8_f16(a: float16x8_t) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43407,13 +43213,13 @@ pub fn vreinterpretq_s8_f16(a: float16x8_t) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43430,13 +43236,13 @@ pub fn vreinterpretq_s16_f16(a: float16x8_t) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43457,13 +43263,13 @@ pub fn vreinterpretq_s16_f16(a: float16x8_t) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43480,13 +43286,13 @@ pub fn vreinterpretq_s32_f16(a: float16x8_t) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43507,13 +43313,13 @@ pub fn vreinterpretq_s32_f16(a: float16x8_t) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43530,13 +43336,13 @@ pub fn vreinterpretq_s64_f16(a: float16x8_t) -> int64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43557,13 +43363,13 @@ pub fn vreinterpretq_s64_f16(a: float16x8_t) -> int64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43580,13 +43386,13 @@ pub fn vreinterpretq_u8_f16(a: float16x8_t) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43611,13 +43417,13 @@ pub fn vreinterpretq_u8_f16(a: float16x8_t) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43634,13 +43440,13 @@ pub fn vreinterpretq_u16_f16(a: float16x8_t) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43661,13 +43467,13 @@ pub fn vreinterpretq_u16_f16(a: float16x8_t) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43684,13 +43490,13 @@ pub fn vreinterpretq_u32_f16(a: float16x8_t) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43711,13 +43517,13 @@ pub fn vreinterpretq_u32_f16(a: float16x8_t) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43734,13 +43540,13 @@ pub fn vreinterpretq_u64_f16(a: float16x8_t) -> uint64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43761,13 +43567,13 @@ pub fn vreinterpretq_u64_f16(a: float16x8_t) -> uint64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43784,13 +43590,13 @@ pub fn vreinterpretq_p8_f16(a: float16x8_t) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43815,13 +43621,13 @@ pub fn vreinterpretq_p8_f16(a: float16x8_t) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43838,13 +43644,13 @@ pub fn vreinterpretq_p16_f16(a: float16x8_t) -> poly16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43865,13 +43671,13 @@ pub fn vreinterpretq_p16_f16(a: float16x8_t) -> poly16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43888,13 +43694,13 @@ pub fn vreinterpret_f16_f32(a: float32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43915,13 +43721,13 @@ pub fn vreinterpret_f16_f32(a: float32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43938,13 +43744,13 @@ pub fn vreinterpretq_f16_f32(a: float32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43965,13 +43771,13 @@ pub fn vreinterpretq_f16_f32(a: float32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -43988,13 +43794,13 @@ pub fn vreinterpret_f16_s8(a: int8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44015,13 +43821,13 @@ pub fn vreinterpret_f16_s8(a: int8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44038,13 +43844,13 @@ pub fn vreinterpretq_f16_s8(a: int8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44066,13 +43872,13 @@ pub fn vreinterpretq_f16_s8(a: int8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44089,13 +43895,13 @@ pub fn vreinterpret_f16_s16(a: int16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44116,13 +43922,13 @@ pub fn vreinterpret_f16_s16(a: int16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44139,13 +43945,13 @@ pub fn vreinterpretq_f16_s16(a: int16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44166,13 +43972,13 @@ pub fn vreinterpretq_f16_s16(a: int16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44189,13 +43995,13 @@ pub fn vreinterpret_f16_s32(a: int32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44216,13 +44022,13 @@ pub fn vreinterpret_f16_s32(a: int32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44239,13 +44045,13 @@ pub fn vreinterpretq_f16_s32(a: int32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44266,13 +44072,13 @@ pub fn vreinterpretq_f16_s32(a: int32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44289,13 +44095,13 @@ pub fn vreinterpret_f16_s64(a: int64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_s64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44315,13 +44121,13 @@ pub fn vreinterpret_f16_s64(a: int64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44338,13 +44144,13 @@ pub fn vreinterpretq_f16_s64(a: int64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_s64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44365,13 +44171,13 @@ pub fn vreinterpretq_f16_s64(a: int64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44388,13 +44194,13 @@ pub fn vreinterpret_f16_u8(a: uint8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44415,13 +44221,13 @@ pub fn vreinterpret_f16_u8(a: uint8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44438,13 +44244,13 @@ pub fn vreinterpretq_f16_u8(a: uint8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44466,13 +44272,13 @@ pub fn vreinterpretq_f16_u8(a: uint8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44489,13 +44295,13 @@ pub fn vreinterpret_f16_u16(a: uint16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44516,13 +44322,13 @@ pub fn vreinterpret_f16_u16(a: uint16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44539,13 +44345,13 @@ pub fn vreinterpretq_f16_u16(a: uint16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44566,13 +44372,13 @@ pub fn vreinterpretq_f16_u16(a: uint16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44589,13 +44395,13 @@ pub fn vreinterpret_f16_u32(a: uint32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44616,13 +44422,13 @@ pub fn vreinterpret_f16_u32(a: uint32x2_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u32)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44639,13 +44445,13 @@ pub fn vreinterpretq_f16_u32(a: uint32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u32)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44666,13 +44472,13 @@ pub fn vreinterpretq_f16_u32(a: uint32x4_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44689,13 +44495,13 @@ pub fn vreinterpret_f16_u64(a: uint64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_u64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44715,13 +44521,13 @@ pub fn vreinterpret_f16_u64(a: uint64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44738,13 +44544,13 @@ pub fn vreinterpretq_f16_u64(a: uint64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_u64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44765,13 +44571,13 @@ pub fn vreinterpretq_f16_u64(a: uint64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44788,13 +44594,13 @@ pub fn vreinterpret_f16_p8(a: poly8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44815,13 +44621,13 @@ pub fn vreinterpret_f16_p8(a: poly8x8_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p8)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44838,13 +44644,13 @@ pub fn vreinterpretq_f16_p8(a: poly8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p8)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44866,13 +44672,13 @@ pub fn vreinterpretq_f16_p8(a: poly8x16_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44889,13 +44695,13 @@ pub fn vreinterpret_f16_p16(a: poly16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44916,13 +44722,13 @@ pub fn vreinterpret_f16_p16(a: poly16x4_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44939,13 +44745,13 @@ pub fn vreinterpretq_f16_p16(a: poly16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44966,13 +44772,13 @@ pub fn vreinterpretq_f16_p16(a: poly16x8_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p128)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -44989,13 +44795,13 @@ pub fn vreinterpretq_f16_p128(a: p128) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p128)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45015,13 +44821,13 @@ pub fn vreinterpretq_f16_p128(a: p128) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45038,13 +44844,13 @@ pub fn vreinterpret_p64_f16(a: float16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45062,13 +44868,13 @@ pub fn vreinterpret_p64_f16(a: float16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45085,13 +44891,13 @@ pub fn vreinterpretq_p128_f16(a: float16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45109,13 +44915,13 @@ pub fn vreinterpretq_p128_f16(a: float16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_f16)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45132,13 +44938,13 @@ pub fn vreinterpretq_p64_f16(a: float16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_f16)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45159,13 +44965,13 @@ pub fn vreinterpretq_p64_f16(a: float16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45182,13 +44988,13 @@ pub fn vreinterpret_f16_p64(a: poly64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_p64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45208,13 +45014,13 @@ pub fn vreinterpret_f16_p64(a: poly64x1_t) -> float16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p64)"] #[inline(always)] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -45231,13 +45037,13 @@ pub fn vreinterpretq_f16_p64(a: poly64x2_t) -> float16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_p64)"] #[inline(always)] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), assert_instr(nop) )] +#[target_feature(enable = "neon,fp16")] #[cfg_attr( not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION") @@ -65084,7 +64890,7 @@ pub fn vsriq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65102,7 +64908,7 @@ pub unsafe fn vst1_f16(ptr: *mut f16, a: float16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65120,7 +64926,7 @@ pub unsafe fn vst1q_f16(ptr: *mut f16, a: float16x8_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65138,7 +64944,7 @@ pub unsafe fn vst1_f16_x2(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65156,7 +64962,7 @@ pub unsafe fn vst1q_f16_x2(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65176,7 +64982,7 @@ pub unsafe fn vst1_f16_x2(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65196,7 +65002,7 @@ pub unsafe fn vst1q_f16_x2(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65214,7 +65020,7 @@ pub unsafe fn vst1_f16_x3(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65232,7 +65038,7 @@ pub unsafe fn vst1q_f16_x3(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65252,7 +65058,7 @@ pub unsafe fn vst1_f16_x3(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65272,7 +65078,7 @@ pub unsafe fn vst1q_f16_x3(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65297,7 +65103,7 @@ pub unsafe fn vst1_f16_x4(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65322,7 +65128,7 @@ pub unsafe fn vst1q_f16_x4(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65348,7 +65154,7 @@ pub unsafe fn vst1_f16_x4(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(not(target_arch = "arm"))] #[cfg_attr(test, assert_instr(st1))] @@ -65374,7 +65180,7 @@ pub unsafe fn vst1q_f16_x4(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65388,7 +65194,7 @@ pub unsafe fn vst1_f32(ptr: *mut f32, a: float32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65402,7 +65208,7 @@ pub unsafe fn vst1q_f32(ptr: *mut f32, a: float32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65416,7 +65222,7 @@ pub unsafe fn vst1_s8(ptr: *mut i8, a: int8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65430,7 +65236,7 @@ pub unsafe fn vst1q_s8(ptr: *mut i8, a: int8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65444,7 +65250,7 @@ pub unsafe fn vst1_s16(ptr: *mut i16, a: int16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65458,7 +65264,7 @@ pub unsafe fn vst1q_s16(ptr: *mut i16, a: int16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65472,7 +65278,7 @@ pub unsafe fn vst1_s32(ptr: *mut i32, a: int32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65486,7 +65292,7 @@ pub unsafe fn vst1q_s32(ptr: *mut i32, a: int32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65500,7 +65306,7 @@ pub unsafe fn vst1_s64(ptr: *mut i64, a: int64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65514,7 +65320,7 @@ pub unsafe fn vst1q_s64(ptr: *mut i64, a: int64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65528,7 +65334,7 @@ pub unsafe fn vst1_u8(ptr: *mut u8, a: uint8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65542,7 +65348,7 @@ pub unsafe fn vst1q_u8(ptr: *mut u8, a: uint8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65556,7 +65362,7 @@ pub unsafe fn vst1_u16(ptr: *mut u16, a: uint16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65570,7 +65376,7 @@ pub unsafe fn vst1q_u16(ptr: *mut u16, a: uint16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65584,7 +65390,7 @@ pub unsafe fn vst1_u32(ptr: *mut u32, a: uint32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65598,7 +65404,7 @@ pub unsafe fn vst1q_u32(ptr: *mut u32, a: uint32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65612,7 +65418,7 @@ pub unsafe fn vst1_u64(ptr: *mut u64, a: uint64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65626,7 +65432,7 @@ pub unsafe fn vst1q_u64(ptr: *mut u64, a: uint64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65640,7 +65446,7 @@ pub unsafe fn vst1_p8(ptr: *mut p8, a: poly8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65654,7 +65460,7 @@ pub unsafe fn vst1q_p8(ptr: *mut p8, a: poly8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65668,7 +65474,7 @@ pub unsafe fn vst1_p16(ptr: *mut p16, a: poly16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65682,7 +65488,7 @@ pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65696,7 +65502,7 @@ pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -65710,7 +65516,7 @@ pub unsafe fn vst1q_p64(ptr: *mut p64, a: poly64x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -65726,7 +65532,7 @@ pub unsafe fn vst1_f32_x2(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -65742,7 +65548,7 @@ pub unsafe fn vst1q_f32_x2(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65761,7 +65567,7 @@ pub unsafe fn vst1_f32_x2(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65780,7 +65586,7 @@ pub unsafe fn vst1q_f32_x2(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65799,7 +65605,7 @@ pub unsafe fn vst1_f32_x3(a: *mut f32, b: float32x2x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65818,7 +65624,7 @@ pub unsafe fn vst1q_f32_x3(a: *mut f32, b: float32x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -65840,7 +65646,7 @@ pub unsafe fn vst1_f32_x4(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -65862,7 +65668,7 @@ pub unsafe fn vst1q_f32_x4(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65887,7 +65693,7 @@ pub unsafe fn vst1_f32_x4(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_f32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -65912,7 +65718,7 @@ pub unsafe fn vst1q_f32_x4(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65932,7 +65738,7 @@ pub unsafe fn vst1_lane_f16(a: *mut f16, b: float16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65952,7 +65758,7 @@ pub unsafe fn vst1q_lane_f16(a: *mut f16, b: float16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -65977,7 +65783,7 @@ pub unsafe fn vst1_lane_f32(a: *mut f32, b: float32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66002,7 +65808,7 @@ pub unsafe fn vst1q_lane_f32(a: *mut f32, b: float32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66027,7 +65833,7 @@ pub unsafe fn vst1_lane_s8(a: *mut i8, b: int8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66052,7 +65858,7 @@ pub unsafe fn vst1q_lane_s8(a: *mut i8, b: int8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66077,7 +65883,7 @@ pub unsafe fn vst1_lane_s16(a: *mut i16, b: int16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66102,7 +65908,7 @@ pub unsafe fn vst1q_lane_s16(a: *mut i16, b: int16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66127,7 +65933,7 @@ pub unsafe fn vst1_lane_s32(a: *mut i32, b: int32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66152,7 +65958,7 @@ pub unsafe fn vst1q_lane_s32(a: *mut i32, b: int32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66177,7 +65983,7 @@ pub unsafe fn vst1q_lane_s64(a: *mut i64, b: int64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66202,7 +66008,7 @@ pub unsafe fn vst1_lane_u8(a: *mut u8, b: uint8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66227,7 +66033,7 @@ pub unsafe fn vst1q_lane_u8(a: *mut u8, b: uint8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66252,7 +66058,7 @@ pub unsafe fn vst1_lane_u16(a: *mut u16, b: uint16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66277,7 +66083,7 @@ pub unsafe fn vst1q_lane_u16(a: *mut u16, b: uint16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66302,7 +66108,7 @@ pub unsafe fn vst1_lane_u32(a: *mut u32, b: uint32x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66327,7 +66133,7 @@ pub unsafe fn vst1q_lane_u32(a: *mut u32, b: uint32x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66352,7 +66158,7 @@ pub unsafe fn vst1q_lane_u64(a: *mut u64, b: uint64x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66377,7 +66183,7 @@ pub unsafe fn vst1_lane_p8(a: *mut p8, b: poly8x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66402,7 +66208,7 @@ pub unsafe fn vst1q_lane_p8(a: *mut p8, b: poly8x16_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66427,7 +66233,7 @@ pub unsafe fn vst1_lane_p16(a: *mut p16, b: poly16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66452,7 +66258,7 @@ pub unsafe fn vst1q_lane_p16(a: *mut p16, b: poly16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -66477,7 +66283,7 @@ pub unsafe fn vst1_lane_p64(a: *mut p64, b: poly64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66502,7 +66308,7 @@ pub unsafe fn vst1_lane_s64(a: *mut i64, b: int64x1_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_lane_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -66527,7 +66333,7 @@ pub unsafe fn vst1_lane_u64(a: *mut u64, b: uint64x1_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66550,7 +66356,7 @@ pub unsafe fn vst1_p64_x2(a: *mut p64, b: poly64x1x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66573,7 +66379,7 @@ pub unsafe fn vst1_p64_x3(a: *mut p64, b: poly64x1x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66596,7 +66402,7 @@ pub unsafe fn vst1_p64_x4(a: *mut p64, b: poly64x1x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66619,7 +66425,7 @@ pub unsafe fn vst1q_p64_x2(a: *mut p64, b: poly64x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66642,7 +66448,7 @@ pub unsafe fn vst1q_p64_x3(a: *mut p64, b: poly64x2x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,aes")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] @@ -66665,7 +66471,7 @@ pub unsafe fn vst1q_p64_x4(a: *mut p64, b: poly64x2x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66684,7 +66490,7 @@ pub unsafe fn vst1_s8_x2(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66703,7 +66509,7 @@ pub unsafe fn vst1q_s8_x2(a: *mut i8, b: int8x16x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66722,7 +66528,7 @@ pub unsafe fn vst1_s16_x2(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66741,7 +66547,7 @@ pub unsafe fn vst1q_s16_x2(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66760,7 +66566,7 @@ pub unsafe fn vst1_s32_x2(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66779,7 +66585,7 @@ pub unsafe fn vst1q_s32_x2(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66798,7 +66604,7 @@ pub unsafe fn vst1_s64_x2(a: *mut i64, b: int64x1x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66817,7 +66623,7 @@ pub unsafe fn vst1q_s64_x2(a: *mut i64, b: int64x2x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66833,7 +66639,7 @@ pub unsafe fn vst1_s8_x2(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66849,7 +66655,7 @@ pub unsafe fn vst1q_s8_x2(a: *mut i8, b: int8x16x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66865,7 +66671,7 @@ pub unsafe fn vst1_s16_x2(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66881,7 +66687,7 @@ pub unsafe fn vst1q_s16_x2(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66897,7 +66703,7 @@ pub unsafe fn vst1_s32_x2(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66913,7 +66719,7 @@ pub unsafe fn vst1q_s32_x2(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66929,7 +66735,7 @@ pub unsafe fn vst1_s64_x2(a: *mut i64, b: int64x1x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -66945,7 +66751,7 @@ pub unsafe fn vst1q_s64_x2(a: *mut i64, b: int64x2x2_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66964,7 +66770,7 @@ pub unsafe fn vst1_s8_x3(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -66983,7 +66789,7 @@ pub unsafe fn vst1q_s8_x3(a: *mut i8, b: int8x16x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67002,7 +66808,7 @@ pub unsafe fn vst1_s16_x3(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67021,7 +66827,7 @@ pub unsafe fn vst1q_s16_x3(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67040,7 +66846,7 @@ pub unsafe fn vst1_s32_x3(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67059,7 +66865,7 @@ pub unsafe fn vst1q_s32_x3(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67078,7 +66884,7 @@ pub unsafe fn vst1_s64_x3(a: *mut i64, b: int64x1x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67097,7 +66903,7 @@ pub unsafe fn vst1q_s64_x3(a: *mut i64, b: int64x2x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67113,7 +66919,7 @@ pub unsafe fn vst1_s8_x3(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67129,7 +66935,7 @@ pub unsafe fn vst1q_s8_x3(a: *mut i8, b: int8x16x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67145,7 +66951,7 @@ pub unsafe fn vst1_s16_x3(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67161,7 +66967,7 @@ pub unsafe fn vst1q_s16_x3(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67177,7 +66983,7 @@ pub unsafe fn vst1_s32_x3(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67193,7 +66999,7 @@ pub unsafe fn vst1q_s32_x3(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67209,7 +67015,7 @@ pub unsafe fn vst1_s64_x3(a: *mut i64, b: int64x1x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon,v7")] #[cfg(target_arch = "arm")] @@ -67225,7 +67031,7 @@ pub unsafe fn vst1q_s64_x3(a: *mut i64, b: int64x2x3_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67244,7 +67050,7 @@ pub unsafe fn vst1_s8_x4(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67263,7 +67069,7 @@ pub unsafe fn vst1q_s8_x4(a: *mut i8, b: int8x16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67282,7 +67088,7 @@ pub unsafe fn vst1_s16_x4(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67301,7 +67107,7 @@ pub unsafe fn vst1q_s16_x4(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67320,7 +67126,7 @@ pub unsafe fn vst1_s32_x4(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67339,7 +67145,7 @@ pub unsafe fn vst1q_s32_x4(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67358,7 +67164,7 @@ pub unsafe fn vst1_s64_x4(a: *mut i64, b: int64x1x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -67377,7 +67183,7 @@ pub unsafe fn vst1q_s64_x4(a: *mut i64, b: int64x2x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67393,7 +67199,7 @@ pub unsafe fn vst1_s8_x4(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67409,7 +67215,7 @@ pub unsafe fn vst1q_s8_x4(a: *mut i8, b: int8x16x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67425,7 +67231,7 @@ pub unsafe fn vst1_s16_x4(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67441,7 +67247,7 @@ pub unsafe fn vst1q_s16_x4(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67457,7 +67263,7 @@ pub unsafe fn vst1_s32_x4(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67473,7 +67279,7 @@ pub unsafe fn vst1q_s32_x4(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67489,7 +67295,7 @@ pub unsafe fn vst1_s64_x4(a: *mut i64, b: int64x1x4_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_s64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -67505,7 +67311,7 @@ pub unsafe fn vst1q_s64_x4(a: *mut i64, b: int64x2x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67528,7 +67334,7 @@ pub unsafe fn vst1_u8_x2(a: *mut u8, b: uint8x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67551,7 +67357,7 @@ pub unsafe fn vst1_u8_x3(a: *mut u8, b: uint8x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67574,7 +67380,7 @@ pub unsafe fn vst1_u8_x4(a: *mut u8, b: uint8x8x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67597,7 +67403,7 @@ pub unsafe fn vst1q_u8_x2(a: *mut u8, b: uint8x16x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67620,7 +67426,7 @@ pub unsafe fn vst1q_u8_x3(a: *mut u8, b: uint8x16x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67643,7 +67449,7 @@ pub unsafe fn vst1q_u8_x4(a: *mut u8, b: uint8x16x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67666,7 +67472,7 @@ pub unsafe fn vst1_u16_x2(a: *mut u16, b: uint16x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67689,7 +67495,7 @@ pub unsafe fn vst1_u16_x3(a: *mut u16, b: uint16x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67712,7 +67518,7 @@ pub unsafe fn vst1_u16_x4(a: *mut u16, b: uint16x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67735,7 +67541,7 @@ pub unsafe fn vst1q_u16_x2(a: *mut u16, b: uint16x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67758,7 +67564,7 @@ pub unsafe fn vst1q_u16_x3(a: *mut u16, b: uint16x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67781,7 +67587,7 @@ pub unsafe fn vst1q_u16_x4(a: *mut u16, b: uint16x8x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67804,7 +67610,7 @@ pub unsafe fn vst1_u32_x2(a: *mut u32, b: uint32x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67827,7 +67633,7 @@ pub unsafe fn vst1_u32_x3(a: *mut u32, b: uint32x2x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67850,7 +67656,7 @@ pub unsafe fn vst1_u32_x4(a: *mut u32, b: uint32x2x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u32_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67873,7 +67679,7 @@ pub unsafe fn vst1q_u32_x2(a: *mut u32, b: uint32x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u32_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67896,7 +67702,7 @@ pub unsafe fn vst1q_u32_x3(a: *mut u32, b: uint32x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u32_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67919,7 +67725,7 @@ pub unsafe fn vst1q_u32_x4(a: *mut u32, b: uint32x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67942,7 +67748,7 @@ pub unsafe fn vst1_u64_x2(a: *mut u64, b: uint64x1x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67965,7 +67771,7 @@ pub unsafe fn vst1_u64_x3(a: *mut u64, b: uint64x1x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_u64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -67988,7 +67794,7 @@ pub unsafe fn vst1_u64_x4(a: *mut u64, b: uint64x1x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u64_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68011,7 +67817,7 @@ pub unsafe fn vst1q_u64_x2(a: *mut u64, b: uint64x2x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u64_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68034,7 +67840,7 @@ pub unsafe fn vst1q_u64_x3(a: *mut u64, b: uint64x2x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_u64_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68057,7 +67863,7 @@ pub unsafe fn vst1q_u64_x4(a: *mut u64, b: uint64x2x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68080,7 +67886,7 @@ pub unsafe fn vst1_p8_x2(a: *mut p8, b: poly8x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68103,7 +67909,7 @@ pub unsafe fn vst1_p8_x3(a: *mut p8, b: poly8x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68126,7 +67932,7 @@ pub unsafe fn vst1_p8_x4(a: *mut p8, b: poly8x8x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p8_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68149,7 +67955,7 @@ pub unsafe fn vst1q_p8_x2(a: *mut p8, b: poly8x16x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p8_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68172,7 +67978,7 @@ pub unsafe fn vst1q_p8_x3(a: *mut p8, b: poly8x16x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p8_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68195,7 +68001,7 @@ pub unsafe fn vst1q_p8_x4(a: *mut p8, b: poly8x16x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68218,7 +68024,7 @@ pub unsafe fn vst1_p16_x2(a: *mut p16, b: poly16x4x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68241,7 +68047,7 @@ pub unsafe fn vst1_p16_x3(a: *mut p16, b: poly16x4x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68264,7 +68070,7 @@ pub unsafe fn vst1_p16_x4(a: *mut p16, b: poly16x4x4_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p16_x2)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68287,7 +68093,7 @@ pub unsafe fn vst1q_p16_x2(a: *mut p16, b: poly16x8x2_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p16_x3)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68310,7 +68116,7 @@ pub unsafe fn vst1q_p16_x3(a: *mut p16, b: poly16x8x3_t) { #[doc = "Store multiple single-element structures to one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p16_x4)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68473,7 +68279,7 @@ unsafe fn vst1q_v8i16(addr: *const i8, val: int16x8_t) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_v4f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68491,7 +68297,7 @@ unsafe fn vst1_v4f16(addr: *const i8, val: float16x4_t, align: i32) { #[doc = "Store multiple single-element structures from one, two, three, or four registers."] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_v8f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -68509,7 +68315,7 @@ unsafe fn vst1q_v8f16(addr: *const i8, val: float16x8_t, align: i32) { #[doc = "Store multiple single-element structures from one, two, three, or four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_lane_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -68534,7 +68340,7 @@ pub unsafe fn vst1q_lane_p64(a: *mut p64, b: poly64x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68555,7 +68361,7 @@ pub unsafe fn vst2_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68576,7 +68382,7 @@ pub unsafe fn vst2q_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -68595,7 +68401,7 @@ pub unsafe fn vst2_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -68614,7 +68420,7 @@ pub unsafe fn vst2q_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68633,7 +68439,7 @@ pub unsafe fn vst2_f32(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68652,7 +68458,7 @@ pub unsafe fn vst2q_f32(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68671,7 +68477,7 @@ pub unsafe fn vst2_s8(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68690,7 +68496,7 @@ pub unsafe fn vst2q_s8(a: *mut i8, b: int8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68709,7 +68515,7 @@ pub unsafe fn vst2_s16(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68728,7 +68534,7 @@ pub unsafe fn vst2q_s16(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68747,7 +68553,7 @@ pub unsafe fn vst2_s32(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68766,7 +68572,7 @@ pub unsafe fn vst2q_s32(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68782,7 +68588,7 @@ pub unsafe fn vst2_f32(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68798,7 +68604,7 @@ pub unsafe fn vst2q_f32(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68814,7 +68620,7 @@ pub unsafe fn vst2_s8(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68830,7 +68636,7 @@ pub unsafe fn vst2q_s8(a: *mut i8, b: int8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68846,7 +68652,7 @@ pub unsafe fn vst2_s16(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68862,7 +68668,7 @@ pub unsafe fn vst2q_s16(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68878,7 +68684,7 @@ pub unsafe fn vst2_s32(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -68894,7 +68700,7 @@ pub unsafe fn vst2q_s32(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68917,7 +68723,7 @@ pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -68940,7 +68746,7 @@ pub unsafe fn vst2q_lane_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -68961,7 +68767,7 @@ pub unsafe fn vst2_lane_f16(a: *mut f16, b: float16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -68982,7 +68788,7 @@ pub unsafe fn vst2q_lane_f16(a: *mut f16, b: float16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69003,7 +68809,7 @@ pub unsafe fn vst2_lane_f32(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69024,7 +68830,7 @@ pub unsafe fn vst2q_lane_f32(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69045,7 +68851,7 @@ pub unsafe fn vst2_lane_s8(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69066,7 +68872,7 @@ pub unsafe fn vst2_lane_s16(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69087,7 +68893,7 @@ pub unsafe fn vst2q_lane_s16(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69108,7 +68914,7 @@ pub unsafe fn vst2_lane_s32(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69129,7 +68935,7 @@ pub unsafe fn vst2q_lane_s32(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69147,7 +68953,7 @@ pub unsafe fn vst2_lane_f32(a: *mut f32, b: float32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69165,7 +68971,7 @@ pub unsafe fn vst2q_lane_f32(a: *mut f32, b: float32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69183,7 +68989,7 @@ pub unsafe fn vst2_lane_s8(a: *mut i8, b: int8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69201,7 +69007,7 @@ pub unsafe fn vst2_lane_s16(a: *mut i16, b: int16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69219,7 +69025,7 @@ pub unsafe fn vst2q_lane_s16(a: *mut i16, b: int16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69237,7 +69043,7 @@ pub unsafe fn vst2_lane_s32(a: *mut i32, b: int32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69255,7 +69061,7 @@ pub unsafe fn vst2q_lane_s32(a: *mut i32, b: int32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69280,7 +69086,7 @@ pub unsafe fn vst2_lane_u8(a: *mut u8, b: uint8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69305,7 +69111,7 @@ pub unsafe fn vst2_lane_u16(a: *mut u16, b: uint16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69330,7 +69136,7 @@ pub unsafe fn vst2q_lane_u16(a: *mut u16, b: uint16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69355,7 +69161,7 @@ pub unsafe fn vst2_lane_u32(a: *mut u32, b: uint32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69380,7 +69186,7 @@ pub unsafe fn vst2q_lane_u32(a: *mut u32, b: uint32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69405,7 +69211,7 @@ pub unsafe fn vst2_lane_p8(a: *mut p8, b: poly8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69430,7 +69236,7 @@ pub unsafe fn vst2_lane_p16(a: *mut p16, b: poly16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69455,7 +69261,7 @@ pub unsafe fn vst2q_lane_p16(a: *mut p16, b: poly16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -69478,7 +69284,7 @@ pub unsafe fn vst2_p64(a: *mut p64, b: poly64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69494,7 +69300,7 @@ pub unsafe fn vst2_s64(a: *mut i64, b: int64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69513,7 +69319,7 @@ pub unsafe fn vst2_s64(a: *mut i64, b: int64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69536,7 +69342,7 @@ pub unsafe fn vst2_u64(a: *mut u64, b: uint64x1x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69559,7 +69365,7 @@ pub unsafe fn vst2_u8(a: *mut u8, b: uint8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69582,7 +69388,7 @@ pub unsafe fn vst2q_u8(a: *mut u8, b: uint8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69605,7 +69411,7 @@ pub unsafe fn vst2_u16(a: *mut u16, b: uint16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69628,7 +69434,7 @@ pub unsafe fn vst2q_u16(a: *mut u16, b: uint16x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69651,7 +69457,7 @@ pub unsafe fn vst2_u32(a: *mut u32, b: uint32x2x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69674,7 +69480,7 @@ pub unsafe fn vst2q_u32(a: *mut u32, b: uint32x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69697,7 +69503,7 @@ pub unsafe fn vst2_p8(a: *mut p8, b: poly8x8x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69720,7 +69526,7 @@ pub unsafe fn vst2q_p8(a: *mut p8, b: poly8x16x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69743,7 +69549,7 @@ pub unsafe fn vst2_p16(a: *mut p16, b: poly16x4x2_t) { #[doc = "Store multiple 2-element structures from two registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst2q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -69766,7 +69572,7 @@ pub unsafe fn vst2q_p16(a: *mut p16, b: poly16x8x2_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -69785,7 +69591,7 @@ pub unsafe fn vst3_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -69804,7 +69610,7 @@ pub unsafe fn vst3q_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69825,7 +69631,7 @@ pub unsafe fn vst3_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69846,7 +69652,7 @@ pub unsafe fn vst3q_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69862,7 +69668,7 @@ pub unsafe fn vst3_f32(a: *mut f32, b: float32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69878,7 +69684,7 @@ pub unsafe fn vst3q_f32(a: *mut f32, b: float32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69894,7 +69700,7 @@ pub unsafe fn vst3_s8(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69910,7 +69716,7 @@ pub unsafe fn vst3q_s8(a: *mut i8, b: int8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69926,7 +69732,7 @@ pub unsafe fn vst3_s16(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69942,7 +69748,7 @@ pub unsafe fn vst3q_s16(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69958,7 +69764,7 @@ pub unsafe fn vst3_s32(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -69974,7 +69780,7 @@ pub unsafe fn vst3q_s32(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -69993,7 +69799,7 @@ pub unsafe fn vst3_f32(a: *mut f32, b: float32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70012,7 +69818,7 @@ pub unsafe fn vst3q_f32(a: *mut f32, b: float32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70031,7 +69837,7 @@ pub unsafe fn vst3_s8(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70050,7 +69856,7 @@ pub unsafe fn vst3q_s8(a: *mut i8, b: int8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70069,7 +69875,7 @@ pub unsafe fn vst3_s16(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70088,7 +69894,7 @@ pub unsafe fn vst3q_s16(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70107,7 +69913,7 @@ pub unsafe fn vst3_s32(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70126,7 +69932,7 @@ pub unsafe fn vst3q_s32(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -70154,7 +69960,7 @@ pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -70182,7 +69988,7 @@ pub unsafe fn vst3q_lane_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70205,7 +70011,7 @@ pub unsafe fn vst3_lane_f16(a: *mut f16, b: float16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70228,7 +70034,7 @@ pub unsafe fn vst3q_lane_f16(a: *mut f16, b: float16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70253,7 +70059,7 @@ pub unsafe fn vst3_lane_f32(a: *mut f32, b: float32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70278,7 +70084,7 @@ pub unsafe fn vst3q_lane_f32(a: *mut f32, b: float32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70296,7 +70102,7 @@ pub unsafe fn vst3_lane_s8(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70321,7 +70127,7 @@ pub unsafe fn vst3_lane_s16(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70346,7 +70152,7 @@ pub unsafe fn vst3q_lane_s16(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70371,7 +70177,7 @@ pub unsafe fn vst3_lane_s32(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70396,7 +70202,7 @@ pub unsafe fn vst3q_lane_s32(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70417,7 +70223,7 @@ pub unsafe fn vst3_lane_f32(a: *mut f32, b: float32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70438,7 +70244,7 @@ pub unsafe fn vst3q_lane_f32(a: *mut f32, b: float32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70459,7 +70265,7 @@ pub unsafe fn vst3_lane_s8(a: *mut i8, b: int8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70480,7 +70286,7 @@ pub unsafe fn vst3_lane_s16(a: *mut i16, b: int16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70501,7 +70307,7 @@ pub unsafe fn vst3q_lane_s16(a: *mut i16, b: int16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70522,7 +70328,7 @@ pub unsafe fn vst3_lane_s32(a: *mut i32, b: int32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70543,7 +70349,7 @@ pub unsafe fn vst3q_lane_s32(a: *mut i32, b: int32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70568,7 +70374,7 @@ pub unsafe fn vst3_lane_u8(a: *mut u8, b: uint8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70593,7 +70399,7 @@ pub unsafe fn vst3_lane_u16(a: *mut u16, b: uint16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70618,7 +70424,7 @@ pub unsafe fn vst3q_lane_u16(a: *mut u16, b: uint16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70643,7 +70449,7 @@ pub unsafe fn vst3_lane_u32(a: *mut u32, b: uint32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70668,7 +70474,7 @@ pub unsafe fn vst3q_lane_u32(a: *mut u32, b: uint32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70693,7 +70499,7 @@ pub unsafe fn vst3_lane_p8(a: *mut p8, b: poly8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70718,7 +70524,7 @@ pub unsafe fn vst3_lane_p16(a: *mut p16, b: poly16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70743,7 +70549,7 @@ pub unsafe fn vst3q_lane_p16(a: *mut p16, b: poly16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -70766,7 +70572,7 @@ pub unsafe fn vst3_p64(a: *mut p64, b: poly64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -70785,7 +70591,7 @@ pub unsafe fn vst3_s64(a: *mut i64, b: int64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -70801,7 +70607,7 @@ pub unsafe fn vst3_s64(a: *mut i64, b: int64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70824,7 +70630,7 @@ pub unsafe fn vst3_u64(a: *mut u64, b: uint64x1x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70847,7 +70653,7 @@ pub unsafe fn vst3_u8(a: *mut u8, b: uint8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70870,7 +70676,7 @@ pub unsafe fn vst3q_u8(a: *mut u8, b: uint8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70893,7 +70699,7 @@ pub unsafe fn vst3_u16(a: *mut u16, b: uint16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70916,7 +70722,7 @@ pub unsafe fn vst3q_u16(a: *mut u16, b: uint16x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70939,7 +70745,7 @@ pub unsafe fn vst3_u32(a: *mut u32, b: uint32x2x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70962,7 +70768,7 @@ pub unsafe fn vst3q_u32(a: *mut u32, b: uint32x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -70985,7 +70791,7 @@ pub unsafe fn vst3_p8(a: *mut p8, b: poly8x8x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -71008,7 +70814,7 @@ pub unsafe fn vst3q_p8(a: *mut p8, b: poly8x16x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -71031,7 +70837,7 @@ pub unsafe fn vst3_p16(a: *mut p16, b: poly16x4x3_t) { #[doc = "Store multiple 3-element structures from three registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -71054,7 +70860,7 @@ pub unsafe fn vst3q_p16(a: *mut p16, b: poly16x8x3_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -71080,7 +70886,7 @@ pub unsafe fn vst4_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -71106,7 +70912,7 @@ pub unsafe fn vst4q_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71127,7 +70933,7 @@ pub unsafe fn vst4_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71148,7 +70954,7 @@ pub unsafe fn vst4q_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71171,7 +70977,7 @@ pub unsafe fn vst4_f32(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71194,7 +71000,7 @@ pub unsafe fn vst4q_f32(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71210,7 +71016,7 @@ pub unsafe fn vst4_s8(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71233,7 +71039,7 @@ pub unsafe fn vst4q_s8(a: *mut i8, b: int8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71256,7 +71062,7 @@ pub unsafe fn vst4_s16(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71279,7 +71085,7 @@ pub unsafe fn vst4q_s16(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71302,7 +71108,7 @@ pub unsafe fn vst4_s32(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71325,7 +71131,7 @@ pub unsafe fn vst4q_s32(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71344,7 +71150,7 @@ pub unsafe fn vst4_f32(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71363,7 +71169,7 @@ pub unsafe fn vst4q_f32(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71382,7 +71188,7 @@ pub unsafe fn vst4_s8(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71401,7 +71207,7 @@ pub unsafe fn vst4q_s8(a: *mut i8, b: int8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71420,7 +71226,7 @@ pub unsafe fn vst4_s16(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71439,7 +71245,7 @@ pub unsafe fn vst4q_s16(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71458,7 +71264,7 @@ pub unsafe fn vst4_s32(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71477,7 +71283,7 @@ pub unsafe fn vst4q_s32(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -71506,7 +71312,7 @@ pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] @@ -71535,7 +71341,7 @@ pub unsafe fn vst4q_lane_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71565,7 +71371,7 @@ pub unsafe fn vst4_lane_f16(a: *mut f16, b: float16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_f16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71595,7 +71401,7 @@ pub unsafe fn vst4q_lane_f16(a: *mut f16, b: float16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71621,7 +71427,7 @@ pub unsafe fn vst4_lane_f32(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71647,7 +71453,7 @@ pub unsafe fn vst4q_lane_f32(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71673,7 +71479,7 @@ pub unsafe fn vst4_lane_s8(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71699,7 +71505,7 @@ pub unsafe fn vst4_lane_s16(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71725,7 +71531,7 @@ pub unsafe fn vst4q_lane_s16(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71751,7 +71557,7 @@ pub unsafe fn vst4_lane_s32(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -71777,7 +71583,7 @@ pub unsafe fn vst4q_lane_s32(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71805,7 +71611,7 @@ pub unsafe fn vst4_lane_f32(a: *mut f32, b: float32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_f32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71833,7 +71639,7 @@ pub unsafe fn vst4q_lane_f32(a: *mut f32, b: float32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71854,7 +71660,7 @@ pub unsafe fn vst4_lane_s8(a: *mut i8, b: int8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71882,7 +71688,7 @@ pub unsafe fn vst4_lane_s16(a: *mut i16, b: int16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71910,7 +71716,7 @@ pub unsafe fn vst4q_lane_s16(a: *mut i16, b: int16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71938,7 +71744,7 @@ pub unsafe fn vst4_lane_s32(a: *mut i32, b: int32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_s32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -71966,7 +71772,7 @@ pub unsafe fn vst4q_lane_s32(a: *mut i32, b: int32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -71991,7 +71797,7 @@ pub unsafe fn vst4_lane_u8(a: *mut u8, b: uint8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72016,7 +71822,7 @@ pub unsafe fn vst4_lane_u16(a: *mut u16, b: uint16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72041,7 +71847,7 @@ pub unsafe fn vst4q_lane_u16(a: *mut u16, b: uint16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72066,7 +71872,7 @@ pub unsafe fn vst4_lane_u32(a: *mut u32, b: uint32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72091,7 +71897,7 @@ pub unsafe fn vst4q_lane_u32(a: *mut u32, b: uint32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72116,7 +71922,7 @@ pub unsafe fn vst4_lane_p8(a: *mut p8, b: poly8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72141,7 +71947,7 @@ pub unsafe fn vst4_lane_p16(a: *mut p16, b: poly16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_lane_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72166,7 +71972,7 @@ pub unsafe fn vst4q_lane_p16(a: *mut p16, b: poly16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_p64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[target_feature(enable = "neon,aes")] @@ -72189,7 +71995,7 @@ pub unsafe fn vst4_p64(a: *mut p64, b: poly64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[cfg(target_arch = "arm")] #[target_feature(enable = "neon,v7")] @@ -72212,7 +72018,7 @@ pub unsafe fn vst4_s64(a: *mut i64, b: int64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_s64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg(not(target_arch = "arm"))] @@ -72231,7 +72037,7 @@ pub unsafe fn vst4_s64(a: *mut i64, b: int64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_u64)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72254,7 +72060,7 @@ pub unsafe fn vst4_u64(a: *mut u64, b: uint64x1x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72277,7 +72083,7 @@ pub unsafe fn vst4_u8(a: *mut u8, b: uint8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_u8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72300,7 +72106,7 @@ pub unsafe fn vst4q_u8(a: *mut u8, b: uint8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72323,7 +72129,7 @@ pub unsafe fn vst4_u16(a: *mut u16, b: uint16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_u16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72346,7 +72152,7 @@ pub unsafe fn vst4q_u16(a: *mut u16, b: uint16x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72369,7 +72175,7 @@ pub unsafe fn vst4_u32(a: *mut u32, b: uint32x2x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_u32)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72392,7 +72198,7 @@ pub unsafe fn vst4q_u32(a: *mut u32, b: uint32x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72415,7 +72221,7 @@ pub unsafe fn vst4_p8(a: *mut p8, b: poly8x8x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_p8)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72438,7 +72244,7 @@ pub unsafe fn vst4q_p8(a: *mut p8, b: poly8x16x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72461,7 +72267,7 @@ pub unsafe fn vst4_p16(a: *mut p16, b: poly16x4x4_t) { #[doc = "Store multiple 4-element structures from four registers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst4q_p16)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -72484,7 +72290,7 @@ pub unsafe fn vst4q_p16(a: *mut p16, b: poly16x8x4_t) { #[doc = "Store SIMD&FP register (immediate offset)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vstrq_p128)"] #[doc = "## Safety"] -#[doc = " * Neon intrinsic unsafe"] +#[doc = " * Neon instrinsic unsafe"] #[inline(always)] #[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] @@ -73589,47 +73395,6 @@ pub fn vsudotq_lane_s32(a: int32x4_t, b: int8x16_t, c: uint8x8_ simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) } } -#[doc = "Dot product index form with signed and unsigned integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsudot_laneq_s32)"] -#[inline(always)] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsudot, LANE = 1))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sudot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vsudot_laneq_s32(a: int32x2_t, b: int8x8_t, c: uint8x16_t) -> int32x2_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - vusdot_s32(a, transmute(c), b) - } -} -#[doc = "Dot product index form with signed and unsigned integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsudotq_laneq_s32)"] -#[inline(always)] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsudot, LANE = 1))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sudot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vsudotq_laneq_s32(a: int32x4_t, b: int8x16_t, c: uint8x16_t) -> int32x4_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: uint32x4_t = transmute(c); - let c: uint32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - vusdotq_s32(a, transmute(c), b) - } -} #[doc = "Table look-up"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtbl1)"] #[inline(always)] @@ -75632,103 +75397,6 @@ pub fn vusdotq_lane_s32(a: int32x4_t, b: uint8x16_t, c: int8x8_ simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) } } -#[doc = "Dot product index form with unsigned and signed integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdot_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vusdot, LANE = 3))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(usdot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vusdot_laneq_s32(a: int32x2_t, b: uint8x8_t, c: int8x16_t) -> int32x2_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - vusdot_s32(a, b, transmute(c)) - } -} -#[doc = "Dot product index form with unsigned and signed integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdot_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vusdot, LANE = 3))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(usdot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vusdot_laneq_s32(a: int32x2_t, b: uint8x8_t, c: int8x16_t) -> int32x2_t { - static_assert_uimm_bits!(LANE, 2); - let a: int32x2_t = unsafe { simd_shuffle!(a, a, [1, 0]) }; - let b: uint8x8_t = unsafe { simd_shuffle!(b, b, [7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: int8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]); - let ret_val: int32x2_t = vusdot_s32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [1, 0]) - } -} -#[doc = "Dot product index form with unsigned and signed integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdotq_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "little")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vusdot, LANE = 3))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(usdot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vusdotq_laneq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t { - static_assert_uimm_bits!(LANE, 2); - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - vusdotq_s32(a, b, transmute(c)) - } -} -#[doc = "Dot product index form with unsigned and signed integers"] -#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdotq_laneq_s32)"] -#[inline(always)] -#[cfg(target_endian = "big")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vusdot, LANE = 3))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(usdot, LANE = 3) -)] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")] -pub fn vusdotq_laneq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t { - static_assert_uimm_bits!(LANE, 2); - let a: int32x4_t = unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }; - let b: uint8x16_t = - unsafe { simd_shuffle!(b, b, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - let c: int8x16_t = - unsafe { simd_shuffle!(c, c, [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]) }; - unsafe { - let c: int32x4_t = transmute(c); - let c: int32x4_t = - simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]); - let ret_val: int32x4_t = vusdotq_s32(a, b, transmute(c)); - simd_shuffle!(ret_val, ret_val, [3, 2, 1, 0]) - } -} #[doc = "Dot product vector form with unsigned and signed integers"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vusdot_s32)"] #[inline(always)] diff --git a/library/stdarch/crates/core_arch/src/x86/avx.rs b/library/stdarch/crates/core_arch/src/x86/avx.rs index 7b4b210bacf4c..c8cddad2efa6c 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx.rs @@ -3363,7 +3363,6 @@ unsafe extern "C" { #[cfg(test)] mod tests { use crate::core_arch::assert_eq_const as assert_eq; - use crate::core_arch::simd::*; use crate::hint::black_box; use crate::ptr; use stdarch_test::simd_test; @@ -3459,7 +3458,7 @@ mod tests { } #[simd_test(enable = "avx")] - fn test_mm256_max_pd() { + unsafe fn test_mm256_max_pd() { let a = _mm256_setr_pd(1., 4., 5., 8.); let b = _mm256_setr_pd(2., 3., 6., 7.); let r = _mm256_max_pd(a, b); @@ -3469,22 +3468,23 @@ mod tests { // > value in the second operand (source operand) is returned. let w = _mm256_max_pd(_mm256_set1_pd(0.0), _mm256_set1_pd(-0.0)); let x = _mm256_max_pd(_mm256_set1_pd(-0.0), _mm256_set1_pd(0.0)); - let wu = _mm256_castpd_si256(w).as_u64x4(); - let xu = _mm256_castpd_si256(x).as_u64x4(); - assert_eq!(wu, u64x4::splat(0x8000_0000_0000_0000u64)); - assert_eq!(xu, u64x4::splat(0u64)); + let wu: [u64; 4] = transmute(w); + let xu: [u64; 4] = transmute(x); + assert_eq!(wu, [0x8000_0000_0000_0000u64; 4]); + assert_eq!(xu, [0u64; 4]); // > If only one value is a NaN (SNaN or QNaN) for this instruction, the // > second operand (source operand), either a NaN or a valid // > floating-point value, is written to the result. let y = _mm256_max_pd(_mm256_set1_pd(f64::NAN), _mm256_set1_pd(0.0)); let z = _mm256_max_pd(_mm256_set1_pd(0.0), _mm256_set1_pd(f64::NAN)); - assert_eq_m256d(y, _mm256_set1_pd(0.0)); - let zf = *z.as_f64x4().as_array(); + let yf: [f64; 4] = transmute(y); + let zf: [f64; 4] = transmute(z); + assert_eq!(yf, [0.0; 4]); assert!(zf.iter().all(|f| f.is_nan()), "{:?}", zf); } #[simd_test(enable = "avx")] - fn test_mm256_max_ps() { + unsafe fn test_mm256_max_ps() { let a = _mm256_setr_ps(1., 4., 5., 8., 9., 12., 13., 16.); let b = _mm256_setr_ps(2., 3., 6., 7., 10., 11., 14., 15.); let r = _mm256_max_ps(a, b); @@ -3494,22 +3494,23 @@ mod tests { // > value in the second operand (source operand) is returned. let w = _mm256_max_ps(_mm256_set1_ps(0.0), _mm256_set1_ps(-0.0)); let x = _mm256_max_ps(_mm256_set1_ps(-0.0), _mm256_set1_ps(0.0)); - let wu = _mm256_castps_si256(w).as_u32x8(); - let xu = _mm256_castps_si256(x).as_u32x8(); - assert_eq!(wu, u32x8::splat(0x8000_0000u32)); - assert_eq!(xu, u32x8::splat(0u32)); + let wu: [u32; 8] = transmute(w); + let xu: [u32; 8] = transmute(x); + assert_eq!(wu, [0x8000_0000u32; 8]); + assert_eq!(xu, [0u32; 8]); // > If only one value is a NaN (SNaN or QNaN) for this instruction, the // > second operand (source operand), either a NaN or a valid // > floating-point value, is written to the result. let y = _mm256_max_ps(_mm256_set1_ps(f32::NAN), _mm256_set1_ps(0.0)); let z = _mm256_max_ps(_mm256_set1_ps(0.0), _mm256_set1_ps(f32::NAN)); - assert_eq_m256(y, _mm256_set1_ps(0.0)); - let zf = *z.as_f32x8().as_array(); + let yf: [f32; 8] = transmute(y); + let zf: [f32; 8] = transmute(z); + assert_eq!(yf, [0.0; 8]); assert!(zf.iter().all(|f| f.is_nan()), "{:?}", zf); } #[simd_test(enable = "avx")] - fn test_mm256_min_pd() { + unsafe fn test_mm256_min_pd() { let a = _mm256_setr_pd(1., 4., 5., 8.); let b = _mm256_setr_pd(2., 3., 6., 7.); let r = _mm256_min_pd(a, b); @@ -3519,22 +3520,23 @@ mod tests { // > value in the second operand (source operand) is returned. let w = _mm256_min_pd(_mm256_set1_pd(0.0), _mm256_set1_pd(-0.0)); let x = _mm256_min_pd(_mm256_set1_pd(-0.0), _mm256_set1_pd(0.0)); - let wu = _mm256_castpd_si256(w).as_u64x4(); - let xu = _mm256_castpd_si256(x).as_u64x4(); - assert_eq!(wu, u64x4::splat(0x8000_0000_0000_0000u64)); - assert_eq!(xu, u64x4::splat(0u64)); + let wu: [u64; 4] = transmute(w); + let xu: [u64; 4] = transmute(x); + assert_eq!(wu, [0x8000_0000_0000_0000u64; 4]); + assert_eq!(xu, [0u64; 4]); // > If only one value is a NaN (SNaN or QNaN) for this instruction, the // > second operand (source operand), either a NaN or a valid // > floating-point value, is written to the result. let y = _mm256_min_pd(_mm256_set1_pd(f64::NAN), _mm256_set1_pd(0.0)); let z = _mm256_min_pd(_mm256_set1_pd(0.0), _mm256_set1_pd(f64::NAN)); - assert_eq_m256d(y, _mm256_set1_pd(0.0)); - let zf = *z.as_f64x4().as_array(); + let yf: [f64; 4] = transmute(y); + let zf: [f64; 4] = transmute(z); + assert_eq!(yf, [0.0; 4]); assert!(zf.iter().all(|f| f.is_nan()), "{:?}", zf); } #[simd_test(enable = "avx")] - fn test_mm256_min_ps() { + unsafe fn test_mm256_min_ps() { let a = _mm256_setr_ps(1., 4., 5., 8., 9., 12., 13., 16.); let b = _mm256_setr_ps(2., 3., 6., 7., 10., 11., 14., 15.); let r = _mm256_min_ps(a, b); @@ -3544,17 +3546,18 @@ mod tests { // > value in the second operand (source operand) is returned. let w = _mm256_min_ps(_mm256_set1_ps(0.0), _mm256_set1_ps(-0.0)); let x = _mm256_min_ps(_mm256_set1_ps(-0.0), _mm256_set1_ps(0.0)); - let wu = _mm256_castps_si256(w).as_u32x8(); - let xu = _mm256_castps_si256(x).as_u32x8(); - assert_eq!(wu, u32x8::splat(0x8000_0000u32)); - assert_eq!(xu, u32x8::splat(0u32)); + let wu: [u32; 8] = transmute(w); + let xu: [u32; 8] = transmute(x); + assert_eq!(wu, [0x8000_0000u32; 8]); + assert_eq!(xu, [0u32; 8]); // > If only one value is a NaN (SNaN or QNaN) for this instruction, the // > second operand (source operand), either a NaN or a valid // > floating-point value, is written to the result. let y = _mm256_min_ps(_mm256_set1_ps(f32::NAN), _mm256_set1_ps(0.0)); let z = _mm256_min_ps(_mm256_set1_ps(0.0), _mm256_set1_ps(f32::NAN)); - assert_eq_m256(y, _mm256_set1_ps(0.0)); - let zf = *z.as_f32x8().as_array(); + let yf: [f32; 8] = transmute(y); + let zf: [f32; 8] = transmute(z); + assert_eq!(yf, [0.0; 8]); assert!(zf.iter().all(|f| f.is_nan()), "{:?}", zf); } @@ -4238,203 +4241,183 @@ mod tests { } #[simd_test(enable = "avx")] - const fn test_mm256_load_pd() { + const unsafe fn test_mm256_load_pd() { let a = _mm256_setr_pd(1., 2., 3., 4.); let p = ptr::addr_of!(a) as *const f64; - let r = unsafe { _mm256_load_pd(p) }; + let r = _mm256_load_pd(p); let e = _mm256_setr_pd(1., 2., 3., 4.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_store_pd() { + const unsafe fn test_mm256_store_pd() { let a = _mm256_setr_pd(1., 2., 3., 4.); let mut r = _mm256_undefined_pd(); - unsafe { - _mm256_store_pd(ptr::addr_of_mut!(r) as *mut f64, a); - } + _mm256_store_pd(ptr::addr_of_mut!(r) as *mut f64, a); assert_eq_m256d(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_load_ps() { + const unsafe fn test_mm256_load_ps() { let a = _mm256_setr_ps(4., 3., 2., 5., 8., 9., 64., 50.); let p = ptr::addr_of!(a) as *const f32; - let r = unsafe { _mm256_load_ps(p) }; + let r = _mm256_load_ps(p); let e = _mm256_setr_ps(4., 3., 2., 5., 8., 9., 64., 50.); assert_eq_m256(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_store_ps() { + const unsafe fn test_mm256_store_ps() { let a = _mm256_setr_ps(4., 3., 2., 5., 8., 9., 64., 50.); let mut r = _mm256_undefined_ps(); - unsafe { - _mm256_store_ps(ptr::addr_of_mut!(r) as *mut f32, a); - } + _mm256_store_ps(ptr::addr_of_mut!(r) as *mut f32, a); assert_eq_m256(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_loadu_pd() { + const unsafe fn test_mm256_loadu_pd() { let a = &[1.0f64, 2., 3., 4.]; let p = a.as_ptr(); - let r = unsafe { _mm256_loadu_pd(black_box(p)) }; + let r = _mm256_loadu_pd(black_box(p)); let e = _mm256_setr_pd(1., 2., 3., 4.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_storeu_pd() { + const unsafe fn test_mm256_storeu_pd() { let a = _mm256_set1_pd(9.); let mut r = _mm256_undefined_pd(); - unsafe { - _mm256_storeu_pd(ptr::addr_of_mut!(r) as *mut f64, a); - } + _mm256_storeu_pd(ptr::addr_of_mut!(r) as *mut f64, a); assert_eq_m256d(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_loadu_ps() { + const unsafe fn test_mm256_loadu_ps() { let a = &[4., 3., 2., 5., 8., 9., 64., 50.]; let p = a.as_ptr(); - let r = unsafe { _mm256_loadu_ps(black_box(p)) }; + let r = _mm256_loadu_ps(black_box(p)); let e = _mm256_setr_ps(4., 3., 2., 5., 8., 9., 64., 50.); assert_eq_m256(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_storeu_ps() { + const unsafe fn test_mm256_storeu_ps() { let a = _mm256_set1_ps(9.); let mut r = _mm256_undefined_ps(); - unsafe { - _mm256_storeu_ps(ptr::addr_of_mut!(r) as *mut f32, a); - } + _mm256_storeu_ps(ptr::addr_of_mut!(r) as *mut f32, a); assert_eq_m256(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_load_si256() { + const unsafe fn test_mm256_load_si256() { let a = _mm256_setr_epi64x(1, 2, 3, 4); let p = ptr::addr_of!(a); - let r = unsafe { _mm256_load_si256(p) }; + let r = _mm256_load_si256(p); let e = _mm256_setr_epi64x(1, 2, 3, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_store_si256() { + const unsafe fn test_mm256_store_si256() { let a = _mm256_setr_epi64x(1, 2, 3, 4); let mut r = _mm256_undefined_si256(); - unsafe { - _mm256_store_si256(ptr::addr_of_mut!(r), a); - } + _mm256_store_si256(ptr::addr_of_mut!(r), a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_loadu_si256() { + const unsafe fn test_mm256_loadu_si256() { let a = _mm256_setr_epi64x(1, 2, 3, 4); let p = ptr::addr_of!(a); - let r = unsafe { _mm256_loadu_si256(black_box(p)) }; + let r = _mm256_loadu_si256(black_box(p)); let e = _mm256_setr_epi64x(1, 2, 3, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_storeu_si256() { + const unsafe fn test_mm256_storeu_si256() { let a = _mm256_set1_epi8(9); let mut r = _mm256_undefined_si256(); - unsafe { - _mm256_storeu_si256(ptr::addr_of_mut!(r), a); - } + _mm256_storeu_si256(ptr::addr_of_mut!(r), a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx")] - const fn test_mm256_maskload_pd() { + const unsafe fn test_mm256_maskload_pd() { let a = &[1.0f64, 2., 3., 4.]; let p = a.as_ptr(); let mask = _mm256_setr_epi64x(0, !0, 0, !0); - let r = unsafe { _mm256_maskload_pd(black_box(p), mask) }; + let r = _mm256_maskload_pd(black_box(p), mask); let e = _mm256_setr_pd(0., 2., 0., 4.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_maskstore_pd() { + const unsafe fn test_mm256_maskstore_pd() { let mut r = _mm256_set1_pd(0.); let mask = _mm256_setr_epi64x(0, !0, 0, !0); let a = _mm256_setr_pd(1., 2., 3., 4.); - unsafe { - _mm256_maskstore_pd(ptr::addr_of_mut!(r) as *mut f64, mask, a); - } + _mm256_maskstore_pd(ptr::addr_of_mut!(r) as *mut f64, mask, a); let e = _mm256_setr_pd(0., 2., 0., 4.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm_maskload_pd() { + const unsafe fn test_mm_maskload_pd() { let a = &[1.0f64, 2.]; let p = a.as_ptr(); let mask = _mm_setr_epi64x(0, !0); - let r = unsafe { _mm_maskload_pd(black_box(p), mask) }; + let r = _mm_maskload_pd(black_box(p), mask); let e = _mm_setr_pd(0., 2.); assert_eq_m128d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm_maskstore_pd() { + const unsafe fn test_mm_maskstore_pd() { let mut r = _mm_set1_pd(0.); let mask = _mm_setr_epi64x(0, !0); let a = _mm_setr_pd(1., 2.); - unsafe { - _mm_maskstore_pd(ptr::addr_of_mut!(r) as *mut f64, mask, a); - } + _mm_maskstore_pd(ptr::addr_of_mut!(r) as *mut f64, mask, a); let e = _mm_setr_pd(0., 2.); assert_eq_m128d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_maskload_ps() { + const unsafe fn test_mm256_maskload_ps() { let a = &[1.0f32, 2., 3., 4., 5., 6., 7., 8.]; let p = a.as_ptr(); let mask = _mm256_setr_epi32(0, !0, 0, !0, 0, !0, 0, !0); - let r = unsafe { _mm256_maskload_ps(black_box(p), mask) }; + let r = _mm256_maskload_ps(black_box(p), mask); let e = _mm256_setr_ps(0., 2., 0., 4., 0., 6., 0., 8.); assert_eq_m256(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_maskstore_ps() { + const unsafe fn test_mm256_maskstore_ps() { let mut r = _mm256_set1_ps(0.); let mask = _mm256_setr_epi32(0, !0, 0, !0, 0, !0, 0, !0); let a = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); - unsafe { - _mm256_maskstore_ps(ptr::addr_of_mut!(r) as *mut f32, mask, a); - } + _mm256_maskstore_ps(ptr::addr_of_mut!(r) as *mut f32, mask, a); let e = _mm256_setr_ps(0., 2., 0., 4., 0., 6., 0., 8.); assert_eq_m256(r, e); } #[simd_test(enable = "avx")] - const fn test_mm_maskload_ps() { + const unsafe fn test_mm_maskload_ps() { let a = &[1.0f32, 2., 3., 4.]; let p = a.as_ptr(); let mask = _mm_setr_epi32(0, !0, 0, !0); - let r = unsafe { _mm_maskload_ps(black_box(p), mask) }; + let r = _mm_maskload_ps(black_box(p), mask); let e = _mm_setr_ps(0., 2., 0., 4.); assert_eq_m128(r, e); } #[simd_test(enable = "avx")] - const fn test_mm_maskstore_ps() { + const unsafe fn test_mm_maskstore_ps() { let mut r = _mm_set1_ps(0.); let mask = _mm_setr_epi32(0, !0, 0, !0); let a = _mm_setr_ps(1., 2., 3., 4.); - unsafe { - _mm_maskstore_ps(ptr::addr_of_mut!(r) as *mut f32, mask, a); - } + _mm_maskstore_ps(ptr::addr_of_mut!(r) as *mut f32, mask, a); let e = _mm_setr_ps(0., 2., 0., 4.); assert_eq_m128(r, e); } @@ -4464,7 +4447,7 @@ mod tests { } #[simd_test(enable = "avx")] - fn test_mm256_lddqu_si256() { + unsafe fn test_mm256_lddqu_si256() { #[rustfmt::skip] let a = _mm256_setr_epi8( 1, 2, 3, 4, 5, 6, 7, 8, @@ -4473,7 +4456,7 @@ mod tests { 25, 26, 27, 28, 29, 30, 31, 32, ); let p = ptr::addr_of!(a); - let r = unsafe { _mm256_lddqu_si256(black_box(p)) }; + let r = _mm256_lddqu_si256(black_box(p)); #[rustfmt::skip] let e = _mm256_setr_epi8( 1, 2, 3, 4, 5, 6, 7, 8, @@ -4486,19 +4469,17 @@ mod tests { #[simd_test(enable = "avx")] #[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri - fn test_mm256_stream_si256() { + unsafe fn test_mm256_stream_si256() { let a = _mm256_setr_epi64x(1, 2, 3, 4); let mut r = _mm256_undefined_si256(); - unsafe { - _mm256_stream_si256(ptr::addr_of_mut!(r), a); - } + _mm256_stream_si256(ptr::addr_of_mut!(r), a); _mm_sfence(); assert_eq_m256i(r, a); } #[simd_test(enable = "avx")] #[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri - fn test_mm256_stream_pd() { + unsafe fn test_mm256_stream_pd() { #[repr(align(32))] struct Memory { pub data: [f64; 4], @@ -4506,9 +4487,7 @@ mod tests { let a = _mm256_set1_pd(7.0); let mut mem = Memory { data: [-1.0; 4] }; - unsafe { - _mm256_stream_pd(ptr::addr_of_mut!(mem.data[0]), a); - } + _mm256_stream_pd(ptr::addr_of_mut!(mem.data[0]), a); _mm_sfence(); for i in 0..4 { assert_eq!(mem.data[i], get_m256d(a, i)); @@ -4517,7 +4496,7 @@ mod tests { #[simd_test(enable = "avx")] #[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri - fn test_mm256_stream_ps() { + unsafe fn test_mm256_stream_ps() { #[repr(align(32))] struct Memory { pub data: [f32; 8], @@ -4525,9 +4504,7 @@ mod tests { let a = _mm256_set1_ps(7.0); let mut mem = Memory { data: [-1.0; 8] }; - unsafe { - _mm256_stream_ps(ptr::addr_of_mut!(mem.data[0]), a); - } + _mm256_stream_ps(ptr::addr_of_mut!(mem.data[0]), a); _mm_sfence(); for i in 0..8 { assert_eq!(mem.data[i], get_m256(a, i)); @@ -5164,29 +5141,29 @@ mod tests { } #[simd_test(enable = "avx")] - const fn test_mm256_loadu2_m128() { + const unsafe fn test_mm256_loadu2_m128() { let hi = &[5., 6., 7., 8.]; let hiaddr = hi.as_ptr(); let lo = &[1., 2., 3., 4.]; let loaddr = lo.as_ptr(); - let r = unsafe { _mm256_loadu2_m128(hiaddr, loaddr) }; + let r = _mm256_loadu2_m128(hiaddr, loaddr); let e = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); assert_eq_m256(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_loadu2_m128d() { + const unsafe fn test_mm256_loadu2_m128d() { let hi = &[3., 4.]; let hiaddr = hi.as_ptr(); let lo = &[1., 2.]; let loaddr = lo.as_ptr(); - let r = unsafe { _mm256_loadu2_m128d(hiaddr, loaddr) }; + let r = _mm256_loadu2_m128d(hiaddr, loaddr); let e = _mm256_setr_pd(1., 2., 3., 4.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx")] - const fn test_mm256_loadu2_m128i() { + const unsafe fn test_mm256_loadu2_m128i() { #[rustfmt::skip] let hi = _mm_setr_epi8( 17, 18, 19, 20, 21, 22, 23, 24, @@ -5197,9 +5174,7 @@ mod tests { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, ); - let r = unsafe { - _mm256_loadu2_m128i(ptr::addr_of!(hi) as *const _, ptr::addr_of!(lo) as *const _) - }; + let r = _mm256_loadu2_m128i(ptr::addr_of!(hi) as *const _, ptr::addr_of!(lo) as *const _); #[rustfmt::skip] let e = _mm256_setr_epi8( 1, 2, 3, 4, 5, 6, 7, 8, @@ -5211,39 +5186,35 @@ mod tests { } #[simd_test(enable = "avx")] - const fn test_mm256_storeu2_m128() { + const unsafe fn test_mm256_storeu2_m128() { let a = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); let mut hi = _mm_undefined_ps(); let mut lo = _mm_undefined_ps(); - unsafe { - _mm256_storeu2_m128( - ptr::addr_of_mut!(hi) as *mut f32, - ptr::addr_of_mut!(lo) as *mut f32, - a, - ); - } + _mm256_storeu2_m128( + ptr::addr_of_mut!(hi) as *mut f32, + ptr::addr_of_mut!(lo) as *mut f32, + a, + ); assert_eq_m128(hi, _mm_setr_ps(5., 6., 7., 8.)); assert_eq_m128(lo, _mm_setr_ps(1., 2., 3., 4.)); } #[simd_test(enable = "avx")] - const fn test_mm256_storeu2_m128d() { + const unsafe fn test_mm256_storeu2_m128d() { let a = _mm256_setr_pd(1., 2., 3., 4.); let mut hi = _mm_undefined_pd(); let mut lo = _mm_undefined_pd(); - unsafe { - _mm256_storeu2_m128d( - ptr::addr_of_mut!(hi) as *mut f64, - ptr::addr_of_mut!(lo) as *mut f64, - a, - ); - } + _mm256_storeu2_m128d( + ptr::addr_of_mut!(hi) as *mut f64, + ptr::addr_of_mut!(lo) as *mut f64, + a, + ); assert_eq_m128d(hi, _mm_setr_pd(3., 4.)); assert_eq_m128d(lo, _mm_setr_pd(1., 2.)); } #[simd_test(enable = "avx")] - const fn test_mm256_storeu2_m128i() { + const unsafe fn test_mm256_storeu2_m128i() { #[rustfmt::skip] let a = _mm256_setr_epi8( 1, 2, 3, 4, 5, 6, 7, 8, @@ -5253,9 +5224,7 @@ mod tests { ); let mut hi = _mm_undefined_si128(); let mut lo = _mm_undefined_si128(); - unsafe { - _mm256_storeu2_m128i(ptr::addr_of_mut!(hi), ptr::addr_of_mut!(lo), a); - } + _mm256_storeu2_m128i(ptr::addr_of_mut!(hi), ptr::addr_of_mut!(lo), a); #[rustfmt::skip] let e_hi = _mm_setr_epi8( 17, 18, 19, 20, 21, 22, 23, 24, diff --git a/library/stdarch/crates/core_arch/src/x86/avx2.rs b/library/stdarch/crates/core_arch/src/x86/avx2.rs index 6a39a0aaf8feb..6f56e937c6db6 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx2.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx2.rs @@ -4672,89 +4672,81 @@ mod tests { } #[simd_test(enable = "avx2")] - const fn test_mm_maskload_epi32() { + const unsafe fn test_mm_maskload_epi32() { let nums = [1, 2, 3, 4]; let a = &nums as *const i32; let mask = _mm_setr_epi32(-1, 0, 0, -1); - let r = unsafe { _mm_maskload_epi32(a, mask) }; + let r = _mm_maskload_epi32(a, mask); let e = _mm_setr_epi32(1, 0, 0, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx2")] - const fn test_mm256_maskload_epi32() { + const unsafe fn test_mm256_maskload_epi32() { let nums = [1, 2, 3, 4, 5, 6, 7, 8]; let a = &nums as *const i32; let mask = _mm256_setr_epi32(-1, 0, 0, -1, 0, -1, -1, 0); - let r = unsafe { _mm256_maskload_epi32(a, mask) }; + let r = _mm256_maskload_epi32(a, mask); let e = _mm256_setr_epi32(1, 0, 0, 4, 0, 6, 7, 0); assert_eq_m256i(r, e); } #[simd_test(enable = "avx2")] - const fn test_mm_maskload_epi64() { + const unsafe fn test_mm_maskload_epi64() { let nums = [1_i64, 2_i64]; let a = &nums as *const i64; let mask = _mm_setr_epi64x(0, -1); - let r = unsafe { _mm_maskload_epi64(a, mask) }; + let r = _mm_maskload_epi64(a, mask); let e = _mm_setr_epi64x(0, 2); assert_eq_m128i(r, e); } #[simd_test(enable = "avx2")] - const fn test_mm256_maskload_epi64() { + const unsafe fn test_mm256_maskload_epi64() { let nums = [1_i64, 2_i64, 3_i64, 4_i64]; let a = &nums as *const i64; let mask = _mm256_setr_epi64x(0, -1, -1, 0); - let r = unsafe { _mm256_maskload_epi64(a, mask) }; + let r = _mm256_maskload_epi64(a, mask); let e = _mm256_setr_epi64x(0, 2, 3, 0); assert_eq_m256i(r, e); } #[simd_test(enable = "avx2")] - const fn test_mm_maskstore_epi32() { + const unsafe fn test_mm_maskstore_epi32() { let a = _mm_setr_epi32(1, 2, 3, 4); let mut arr = [-1, -1, -1, -1]; let mask = _mm_setr_epi32(-1, 0, 0, -1); - unsafe { - _mm_maskstore_epi32(arr.as_mut_ptr(), mask, a); - } + _mm_maskstore_epi32(arr.as_mut_ptr(), mask, a); let e = [1, -1, -1, 4]; assert_eq!(arr, e); } #[simd_test(enable = "avx2")] - const fn test_mm256_maskstore_epi32() { + const unsafe fn test_mm256_maskstore_epi32() { let a = _mm256_setr_epi32(1, 0x6d726f, 3, 42, 0x777161, 6, 7, 8); let mut arr = [-1, -1, -1, 0x776173, -1, 0x68657265, -1, -1]; let mask = _mm256_setr_epi32(-1, 0, 0, -1, 0, -1, -1, 0); - unsafe { - _mm256_maskstore_epi32(arr.as_mut_ptr(), mask, a); - } + _mm256_maskstore_epi32(arr.as_mut_ptr(), mask, a); let e = [1, -1, -1, 42, -1, 6, 7, -1]; assert_eq!(arr, e); } #[simd_test(enable = "avx2")] - const fn test_mm_maskstore_epi64() { + const unsafe fn test_mm_maskstore_epi64() { let a = _mm_setr_epi64x(1_i64, 2_i64); let mut arr = [-1_i64, -1_i64]; let mask = _mm_setr_epi64x(0, -1); - unsafe { - _mm_maskstore_epi64(arr.as_mut_ptr(), mask, a); - } + _mm_maskstore_epi64(arr.as_mut_ptr(), mask, a); let e = [-1, 2]; assert_eq!(arr, e); } #[simd_test(enable = "avx2")] - const fn test_mm256_maskstore_epi64() { + const unsafe fn test_mm256_maskstore_epi64() { let a = _mm256_setr_epi64x(1_i64, 2_i64, 3_i64, 4_i64); let mut arr = [-1_i64, -1_i64, -1_i64, -1_i64]; let mask = _mm256_setr_epi64x(0, -1, -1, 0); - unsafe { - _mm256_maskstore_epi64(arr.as_mut_ptr(), mask, a); - } + _mm256_maskstore_epi64(arr.as_mut_ptr(), mask, a); let e = [-1, 2, 3, -1]; assert_eq!(arr, e); } @@ -5309,9 +5301,9 @@ mod tests { } #[simd_test(enable = "avx2")] - fn test_mm256_stream_load_si256() { + unsafe fn test_mm256_stream_load_si256() { let a = _mm256_set_epi64x(5, 6, 7, 8); - let r = unsafe { _mm256_stream_load_si256(core::ptr::addr_of!(a) as *const _) }; + let r = _mm256_stream_load_si256(core::ptr::addr_of!(a) as *const _); assert_eq_m256i(a, r); } @@ -5514,98 +5506,88 @@ mod tests { } #[simd_test(enable = "avx2")] - fn test_mm_i32gather_epi32() { + unsafe fn test_mm_i32gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { _mm_i32gather_epi32::<4>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)) }; + let r = _mm_i32gather_epi32::<4>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)); assert_eq_m128i(r, _mm_setr_epi32(0, 16, 32, 48)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i32gather_epi32() { + unsafe fn test_mm_mask_i32gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { - _mm_mask_i32gather_epi32::<4>( - _mm_set1_epi32(256), - arr.as_ptr(), - _mm_setr_epi32(0, 16, 64, 96), - _mm_setr_epi32(-1, -1, -1, 0), - ) - }; + let r = _mm_mask_i32gather_epi32::<4>( + _mm_set1_epi32(256), + arr.as_ptr(), + _mm_setr_epi32(0, 16, 64, 96), + _mm_setr_epi32(-1, -1, -1, 0), + ); assert_eq_m128i(r, _mm_setr_epi32(0, 16, 64, 256)); } #[simd_test(enable = "avx2")] - fn test_mm256_i32gather_epi32() { + unsafe fn test_mm256_i32gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { - _mm256_i32gather_epi32::<4>(arr.as_ptr(), _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4)) - }; + let r = + _mm256_i32gather_epi32::<4>(arr.as_ptr(), _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4)); assert_eq_m256i(r, _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i32gather_epi32() { + unsafe fn test_mm256_mask_i32gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { - _mm256_mask_i32gather_epi32::<4>( - _mm256_set1_epi32(256), - arr.as_ptr(), - _mm256_setr_epi32(0, 16, 64, 96, 0, 0, 0, 0), - _mm256_setr_epi32(-1, -1, -1, 0, 0, 0, 0, 0), - ) - }; + let r = _mm256_mask_i32gather_epi32::<4>( + _mm256_set1_epi32(256), + arr.as_ptr(), + _mm256_setr_epi32(0, 16, 64, 96, 0, 0, 0, 0), + _mm256_setr_epi32(-1, -1, -1, 0, 0, 0, 0, 0), + ); assert_eq_m256i(r, _mm256_setr_epi32(0, 16, 64, 256, 256, 256, 256, 256)); } #[simd_test(enable = "avx2")] - fn test_mm_i32gather_ps() { + unsafe fn test_mm_i32gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { _mm_i32gather_ps::<4>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)) }; + let r = _mm_i32gather_ps::<4>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)); assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 32.0, 48.0)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i32gather_ps() { + unsafe fn test_mm_mask_i32gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { - _mm_mask_i32gather_ps::<4>( - _mm_set1_ps(256.0), - arr.as_ptr(), - _mm_setr_epi32(0, 16, 64, 96), - _mm_setr_ps(-1.0, -1.0, -1.0, 0.0), - ) - }; + let r = _mm_mask_i32gather_ps::<4>( + _mm_set1_ps(256.0), + arr.as_ptr(), + _mm_setr_epi32(0, 16, 64, 96), + _mm_setr_ps(-1.0, -1.0, -1.0, 0.0), + ); assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 64.0, 256.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_i32gather_ps() { + unsafe fn test_mm256_i32gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { - _mm256_i32gather_ps::<4>(arr.as_ptr(), _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4)) - }; + let r = + _mm256_i32gather_ps::<4>(arr.as_ptr(), _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4)); assert_eq_m256(r, _mm256_setr_ps(0.0, 16.0, 32.0, 48.0, 1.0, 2.0, 3.0, 4.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i32gather_ps() { + unsafe fn test_mm256_mask_i32gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { - _mm256_mask_i32gather_ps::<4>( - _mm256_set1_ps(256.0), - arr.as_ptr(), - _mm256_setr_epi32(0, 16, 64, 96, 0, 0, 0, 0), - _mm256_setr_ps(-1.0, -1.0, -1.0, 0.0, 0.0, 0.0, 0.0, 0.0), - ) - }; + let r = _mm256_mask_i32gather_ps::<4>( + _mm256_set1_ps(256.0), + arr.as_ptr(), + _mm256_setr_epi32(0, 16, 64, 96, 0, 0, 0, 0), + _mm256_setr_ps(-1.0, -1.0, -1.0, 0.0, 0.0, 0.0, 0.0, 0.0), + ); assert_eq_m256( r, _mm256_setr_ps(0.0, 16.0, 64.0, 256.0, 256.0, 256.0, 256.0, 256.0), @@ -5613,282 +5595,254 @@ mod tests { } #[simd_test(enable = "avx2")] - fn test_mm_i32gather_epi64() { + unsafe fn test_mm_i32gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { _mm_i32gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 0, 0)) }; + let r = _mm_i32gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 0, 0)); assert_eq_m128i(r, _mm_setr_epi64x(0, 16)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i32gather_epi64() { + unsafe fn test_mm_mask_i32gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { - _mm_mask_i32gather_epi64::<8>( - _mm_set1_epi64x(256), - arr.as_ptr(), - _mm_setr_epi32(16, 16, 16, 16), - _mm_setr_epi64x(-1, 0), - ) - }; + let r = _mm_mask_i32gather_epi64::<8>( + _mm_set1_epi64x(256), + arr.as_ptr(), + _mm_setr_epi32(16, 16, 16, 16), + _mm_setr_epi64x(-1, 0), + ); assert_eq_m128i(r, _mm_setr_epi64x(16, 256)); } #[simd_test(enable = "avx2")] - fn test_mm256_i32gather_epi64() { + unsafe fn test_mm256_i32gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { _mm256_i32gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)) }; + let r = _mm256_i32gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)); assert_eq_m256i(r, _mm256_setr_epi64x(0, 16, 32, 48)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i32gather_epi64() { + unsafe fn test_mm256_mask_i32gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { - _mm256_mask_i32gather_epi64::<8>( - _mm256_set1_epi64x(256), - arr.as_ptr(), - _mm_setr_epi32(0, 16, 64, 96), - _mm256_setr_epi64x(-1, -1, -1, 0), - ) - }; + let r = _mm256_mask_i32gather_epi64::<8>( + _mm256_set1_epi64x(256), + arr.as_ptr(), + _mm_setr_epi32(0, 16, 64, 96), + _mm256_setr_epi64x(-1, -1, -1, 0), + ); assert_eq_m256i(r, _mm256_setr_epi64x(0, 16, 64, 256)); } #[simd_test(enable = "avx2")] - fn test_mm_i32gather_pd() { + unsafe fn test_mm_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { _mm_i32gather_pd::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 0, 0)) }; + let r = _mm_i32gather_pd::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 0, 0)); assert_eq_m128d(r, _mm_setr_pd(0.0, 16.0)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i32gather_pd() { + unsafe fn test_mm_mask_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { - _mm_mask_i32gather_pd::<8>( - _mm_set1_pd(256.0), - arr.as_ptr(), - _mm_setr_epi32(16, 16, 16, 16), - _mm_setr_pd(-1.0, 0.0), - ) - }; + let r = _mm_mask_i32gather_pd::<8>( + _mm_set1_pd(256.0), + arr.as_ptr(), + _mm_setr_epi32(16, 16, 16, 16), + _mm_setr_pd(-1.0, 0.0), + ); assert_eq_m128d(r, _mm_setr_pd(16.0, 256.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_i32gather_pd() { + unsafe fn test_mm256_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { _mm256_i32gather_pd::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)) }; + let r = _mm256_i32gather_pd::<8>(arr.as_ptr(), _mm_setr_epi32(0, 16, 32, 48)); assert_eq_m256d(r, _mm256_setr_pd(0.0, 16.0, 32.0, 48.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i32gather_pd() { + unsafe fn test_mm256_mask_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { - _mm256_mask_i32gather_pd::<8>( - _mm256_set1_pd(256.0), - arr.as_ptr(), - _mm_setr_epi32(0, 16, 64, 96), - _mm256_setr_pd(-1.0, -1.0, -1.0, 0.0), - ) - }; + let r = _mm256_mask_i32gather_pd::<8>( + _mm256_set1_pd(256.0), + arr.as_ptr(), + _mm_setr_epi32(0, 16, 64, 96), + _mm256_setr_pd(-1.0, -1.0, -1.0, 0.0), + ); assert_eq_m256d(r, _mm256_setr_pd(0.0, 16.0, 64.0, 256.0)); } #[simd_test(enable = "avx2")] - fn test_mm_i64gather_epi32() { + unsafe fn test_mm_i64gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { _mm_i64gather_epi32::<4>(arr.as_ptr(), _mm_setr_epi64x(0, 16)) }; + let r = _mm_i64gather_epi32::<4>(arr.as_ptr(), _mm_setr_epi64x(0, 16)); assert_eq_m128i(r, _mm_setr_epi32(0, 16, 0, 0)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i64gather_epi32() { + unsafe fn test_mm_mask_i64gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { - _mm_mask_i64gather_epi32::<4>( - _mm_set1_epi32(256), - arr.as_ptr(), - _mm_setr_epi64x(0, 16), - _mm_setr_epi32(-1, 0, -1, 0), - ) - }; + let r = _mm_mask_i64gather_epi32::<4>( + _mm_set1_epi32(256), + arr.as_ptr(), + _mm_setr_epi64x(0, 16), + _mm_setr_epi32(-1, 0, -1, 0), + ); assert_eq_m128i(r, _mm_setr_epi32(0, 256, 0, 0)); } #[simd_test(enable = "avx2")] - fn test_mm256_i64gather_epi32() { + unsafe fn test_mm256_i64gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = - unsafe { _mm256_i64gather_epi32::<4>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)) }; + let r = _mm256_i64gather_epi32::<4>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)); assert_eq_m128i(r, _mm_setr_epi32(0, 16, 32, 48)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i64gather_epi32() { + unsafe fn test_mm256_mask_i64gather_epi32() { let arr: [i32; 128] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing - let r = unsafe { - _mm256_mask_i64gather_epi32::<4>( - _mm_set1_epi32(256), - arr.as_ptr(), - _mm256_setr_epi64x(0, 16, 64, 96), - _mm_setr_epi32(-1, -1, -1, 0), - ) - }; + let r = _mm256_mask_i64gather_epi32::<4>( + _mm_set1_epi32(256), + arr.as_ptr(), + _mm256_setr_epi64x(0, 16, 64, 96), + _mm_setr_epi32(-1, -1, -1, 0), + ); assert_eq_m128i(r, _mm_setr_epi32(0, 16, 64, 256)); } #[simd_test(enable = "avx2")] - fn test_mm_i64gather_ps() { + unsafe fn test_mm_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { _mm_i64gather_ps::<4>(arr.as_ptr(), _mm_setr_epi64x(0, 16)) }; + let r = _mm_i64gather_ps::<4>(arr.as_ptr(), _mm_setr_epi64x(0, 16)); assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 0.0, 0.0)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i64gather_ps() { + unsafe fn test_mm_mask_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { - _mm_mask_i64gather_ps::<4>( - _mm_set1_ps(256.0), - arr.as_ptr(), - _mm_setr_epi64x(0, 16), - _mm_setr_ps(-1.0, 0.0, -1.0, 0.0), - ) - }; + let r = _mm_mask_i64gather_ps::<4>( + _mm_set1_ps(256.0), + arr.as_ptr(), + _mm_setr_epi64x(0, 16), + _mm_setr_ps(-1.0, 0.0, -1.0, 0.0), + ); assert_eq_m128(r, _mm_setr_ps(0.0, 256.0, 0.0, 0.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_i64gather_ps() { + unsafe fn test_mm256_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = - unsafe { _mm256_i64gather_ps::<4>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)) }; + let r = _mm256_i64gather_ps::<4>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)); assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 32.0, 48.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i64gather_ps() { + unsafe fn test_mm256_mask_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing for f32s - let r = unsafe { - _mm256_mask_i64gather_ps::<4>( - _mm_set1_ps(256.0), - arr.as_ptr(), - _mm256_setr_epi64x(0, 16, 64, 96), - _mm_setr_ps(-1.0, -1.0, -1.0, 0.0), - ) - }; + let r = _mm256_mask_i64gather_ps::<4>( + _mm_set1_ps(256.0), + arr.as_ptr(), + _mm256_setr_epi64x(0, 16, 64, 96), + _mm_setr_ps(-1.0, -1.0, -1.0, 0.0), + ); assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 64.0, 256.0)); } #[simd_test(enable = "avx2")] - fn test_mm_i64gather_epi64() { + unsafe fn test_mm_i64gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { _mm_i64gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi64x(0, 16)) }; + let r = _mm_i64gather_epi64::<8>(arr.as_ptr(), _mm_setr_epi64x(0, 16)); assert_eq_m128i(r, _mm_setr_epi64x(0, 16)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i64gather_epi64() { + unsafe fn test_mm_mask_i64gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { - _mm_mask_i64gather_epi64::<8>( - _mm_set1_epi64x(256), - arr.as_ptr(), - _mm_setr_epi64x(16, 16), - _mm_setr_epi64x(-1, 0), - ) - }; + let r = _mm_mask_i64gather_epi64::<8>( + _mm_set1_epi64x(256), + arr.as_ptr(), + _mm_setr_epi64x(16, 16), + _mm_setr_epi64x(-1, 0), + ); assert_eq_m128i(r, _mm_setr_epi64x(16, 256)); } #[simd_test(enable = "avx2")] - fn test_mm256_i64gather_epi64() { + unsafe fn test_mm256_i64gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = - unsafe { _mm256_i64gather_epi64::<8>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)) }; + let r = _mm256_i64gather_epi64::<8>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)); assert_eq_m256i(r, _mm256_setr_epi64x(0, 16, 32, 48)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i64gather_epi64() { + unsafe fn test_mm256_mask_i64gather_epi64() { let arr: [i64; 128] = core::array::from_fn(|i| i as i64); // A multiplier of 8 is word-addressing for i64s - let r = unsafe { - _mm256_mask_i64gather_epi64::<8>( - _mm256_set1_epi64x(256), - arr.as_ptr(), - _mm256_setr_epi64x(0, 16, 64, 96), - _mm256_setr_epi64x(-1, -1, -1, 0), - ) - }; + let r = _mm256_mask_i64gather_epi64::<8>( + _mm256_set1_epi64x(256), + arr.as_ptr(), + _mm256_setr_epi64x(0, 16, 64, 96), + _mm256_setr_epi64x(-1, -1, -1, 0), + ); assert_eq_m256i(r, _mm256_setr_epi64x(0, 16, 64, 256)); } #[simd_test(enable = "avx2")] - fn test_mm_i64gather_pd() { + unsafe fn test_mm_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { _mm_i64gather_pd::<8>(arr.as_ptr(), _mm_setr_epi64x(0, 16)) }; + let r = _mm_i64gather_pd::<8>(arr.as_ptr(), _mm_setr_epi64x(0, 16)); assert_eq_m128d(r, _mm_setr_pd(0.0, 16.0)); } #[simd_test(enable = "avx2")] - fn test_mm_mask_i64gather_pd() { + unsafe fn test_mm_mask_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { - _mm_mask_i64gather_pd::<8>( - _mm_set1_pd(256.0), - arr.as_ptr(), - _mm_setr_epi64x(16, 16), - _mm_setr_pd(-1.0, 0.0), - ) - }; + let r = _mm_mask_i64gather_pd::<8>( + _mm_set1_pd(256.0), + arr.as_ptr(), + _mm_setr_epi64x(16, 16), + _mm_setr_pd(-1.0, 0.0), + ); assert_eq_m128d(r, _mm_setr_pd(16.0, 256.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_i64gather_pd() { + unsafe fn test_mm256_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = - unsafe { _mm256_i64gather_pd::<8>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)) }; + let r = _mm256_i64gather_pd::<8>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48)); assert_eq_m256d(r, _mm256_setr_pd(0.0, 16.0, 32.0, 48.0)); } #[simd_test(enable = "avx2")] - fn test_mm256_mask_i64gather_pd() { + unsafe fn test_mm256_mask_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing for f64s - let r = unsafe { - _mm256_mask_i64gather_pd::<8>( - _mm256_set1_pd(256.0), - arr.as_ptr(), - _mm256_setr_epi64x(0, 16, 64, 96), - _mm256_setr_pd(-1.0, -1.0, -1.0, 0.0), - ) - }; + let r = _mm256_mask_i64gather_pd::<8>( + _mm256_set1_pd(256.0), + arr.as_ptr(), + _mm256_setr_epi64x(0, 16, 64, 96), + _mm256_setr_pd(-1.0, -1.0, -1.0, 0.0), + ); assert_eq_m256d(r, _mm256_setr_pd(0.0, 16.0, 64.0, 256.0)); } diff --git a/library/stdarch/crates/core_arch/src/x86/avx512bf16.rs b/library/stdarch/crates/core_arch/src/x86/avx512bf16.rs index 66eef063eed8b..83dbc540a0c8a 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512bf16.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512bf16.rs @@ -593,7 +593,7 @@ pub fn _mm_cvtness_sbh(a: f32) -> bf16 { #[cfg(test)] mod tests { - use crate::core_arch::simd::{f32x4, f32x8, f32x16, u16x4, u16x8, u16x16, u16x32}; + use crate::core_arch::simd::u16x4; use crate::{ core_arch::x86::*, mem::{transmute, transmute_copy}, @@ -601,13 +601,13 @@ mod tests { use stdarch_test::simd_test; #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_cvtne2ps_pbh() { + unsafe fn test_mm_cvtne2ps_pbh() { let a_array = [178.125_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-178.125_f32, -10.5_f32, -3.75_f32, -50.25_f32]; - let a = f32x4::from_array(a_array).as_m128(); - let b = f32x4::from_array(b_array).as_m128(); + let a: __m128 = transmute(a_array); + let b: __m128 = transmute(b_array); let c: __m128bh = _mm_cvtne2ps_pbh(a, b); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b1_10000110_0110010, @@ -623,7 +623,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_mask_cvtne2ps_pbh() { + unsafe fn test_mm_mask_cvtne2ps_pbh() { let a_array = [178.125_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-178.125_f32, -10.5_f32, -3.75_f32, -50.25_f32]; #[rustfmt::skip] @@ -637,12 +637,12 @@ mod tests { 0b0_10000000_1110000, 0b0_10000100_1001001, ]; - let src = u16x8::from_array(src_array).as_m128bh(); - let a = f32x4::from_array(a_array).as_m128(); - let b = f32x4::from_array(b_array).as_m128(); + let src: __m128bh = transmute(src_array); + let a: __m128 = transmute(a_array); + let b: __m128 = transmute(b_array); let k: __mmask8 = 0b1111_1111; let c: __m128bh = _mm_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b1_10000110_0110010, @@ -657,20 +657,20 @@ mod tests { assert_eq!(result, expected_result); let k = 0b0000_0000; let c = _mm_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); let expected_result = src_array; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_maskz_cvtne2ps_pbh() { + unsafe fn test_mm_maskz_cvtne2ps_pbh() { let a_array = [178.125_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-178.125_f32, -10.5_f32, -3.75_f32, -50.25_f32]; - let a = f32x4::from_array(a_array).as_m128(); - let b = f32x4::from_array(b_array).as_m128(); + let a: __m128 = transmute(a_array); + let b: __m128 = transmute(b_array); let k: __mmask8 = 0b1111_1111; let c: __m128bh = _mm_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b1_10000110_0110010, @@ -685,7 +685,7 @@ mod tests { assert_eq!(result, expected_result); let k = 0b0011_1100; let c = _mm_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0, @@ -701,7 +701,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_cvtne2ps_pbh() { + unsafe fn test_mm256_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -723,10 +723,10 @@ mod tests { -1000.158_f32, -575.575_f32, ]; - let a = f32x8::from_array(a_array).as_m256(); - let b = f32x8::from_array(b_array).as_m256(); + let a: __m256 = transmute(a_array); + let b: __m256 = transmute(b_array); let c: __m256bh = _mm256_cvtne2ps_pbh(a, b); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b1_10000110_0110010, @@ -750,7 +750,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_mask_cvtne2ps_pbh() { + unsafe fn test_mm256_mask_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -790,12 +790,12 @@ mod tests { 0b0_10000000_1110000, 0b0_10000100_1001001, ]; - let src = u16x16::from_array(src_array).as_m256bh(); - let a = f32x8::from_array(a_array).as_m256(); - let b = f32x8::from_array(b_array).as_m256(); + let src: __m256bh = transmute(src_array); + let a: __m256 = transmute(a_array); + let b: __m256 = transmute(b_array); let k: __mmask16 = 0xffff; let c: __m256bh = _mm256_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b1_10000110_0110010, @@ -818,13 +818,13 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0; let c: __m256bh = _mm256_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); let expected_result = src_array; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_maskz_cvtne2ps_pbh() { + unsafe fn test_mm256_maskz_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -846,11 +846,11 @@ mod tests { -1000.158_f32, -575.575_f32, ]; - let a = f32x8::from_array(a_array).as_m256(); - let b = f32x8::from_array(b_array).as_m256(); + let a: __m256 = transmute(a_array); + let b: __m256 = transmute(b_array); let k: __mmask16 = 0xffff; let c: __m256bh = _mm256_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b1_10000110_0110010, @@ -873,7 +873,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0b0110_1100_0011_0110; let c: __m256bh = _mm256_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0, @@ -897,7 +897,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_cvtne2ps_pbh() { + unsafe fn test_mm512_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -935,10 +935,10 @@ mod tests { -1000.158_f32, -575.575_f32, ]; - let a = f32x16::from_array(a_array).as_m512(); - let b = f32x16::from_array(b_array).as_m512(); + let a: __m512 = transmute(a_array); + let b: __m512 = transmute(b_array); let c: __m512bh = _mm512_cvtne2ps_pbh(a, b); - let result = *c.as_u16x32().as_array(); + let result: [u16; 32] = transmute(c.as_u16x32()); #[rustfmt::skip] let expected_result: [u16; 32] = [ 0b1_10000110_0110010, @@ -978,7 +978,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_mask_cvtne2ps_pbh() { + unsafe fn test_mm512_mask_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1050,12 +1050,12 @@ mod tests { 0b0_10000000_1110000, 0b0_10000100_1001001, ]; - let src = u16x32::from_array(src_array).as_m512bh(); - let a = f32x16::from_array(a_array).as_m512(); - let b = f32x16::from_array(b_array).as_m512(); + let src: __m512bh = transmute(src_array); + let a: __m512 = transmute(a_array); + let b: __m512 = transmute(b_array); let k: __mmask32 = 0xffffffff; let c: __m512bh = _mm512_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x32().as_array(); + let result: [u16; 32] = transmute(c.as_u16x32()); #[rustfmt::skip] let expected_result: [u16; 32] = [ 0b1_10000110_0110010, @@ -1094,13 +1094,13 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask32 = 0; let c: __m512bh = _mm512_mask_cvtne2ps_pbh(src, k, a, b); - let result = *c.as_u16x32().as_array(); + let result: [u16; 32] = transmute(c.as_u16x32()); let expected_result = src_array; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_maskz_cvtne2ps_pbh() { + unsafe fn test_mm512_maskz_cvtne2ps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1138,11 +1138,11 @@ mod tests { -1000.158_f32, -575.575_f32, ]; - let a = f32x16::from_array(a_array).as_m512(); - let b = f32x16::from_array(b_array).as_m512(); + let a: __m512 = transmute(a_array); + let b: __m512 = transmute(b_array); let k: __mmask32 = 0xffffffff; let c: __m512bh = _mm512_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x32().as_array(); + let result: [u16; 32] = transmute(c.as_u16x32()); #[rustfmt::skip] let expected_result: [u16; 32] = [ 0b1_10000110_0110010, @@ -1181,7 +1181,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask32 = 0b1100_1010_1001_0110_1010_0011_0101_0110; let c: __m512bh = _mm512_maskz_cvtne2ps_pbh(k, a, b); - let result = *c.as_u16x32().as_array(); + let result: [u16; 32] = transmute(c.as_u16x32()); #[rustfmt::skip] let expected_result: [u16; 32] = [ 0, @@ -1221,7 +1221,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_cvtneps_pbh() { + unsafe fn test_mm256_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1233,9 +1233,9 @@ mod tests { 1000.158_f32, 575.575_f32, ]; - let a = f32x8::from_array(a_array).as_m256(); + let a: __m256 = transmute(a_array); let c: __m128bh = _mm256_cvtneps_pbh(a); - let result = *c.as_u16x8().as_array(); + let result: [u16; 8] = transmute(c.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b0_10000110_0110010, @@ -1251,7 +1251,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_mask_cvtneps_pbh() { + unsafe fn test_mm256_mask_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1273,11 +1273,11 @@ mod tests { 0b1_10001000_1111010, 0b1_10001000_0010000, ]; - let src = u16x8::from_array(src_array).as_m128bh(); - let a = f32x8::from_array(a_array).as_m256(); + let src: __m128bh = transmute(src_array); + let a: __m256 = transmute(a_array); let k: __mmask8 = 0xff; let b = _mm256_mask_cvtneps_pbh(src, k, a); - let result = *b.as_u16x8().as_array(); + let result: [u16; 8] = transmute(b.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b0_10000110_0110010, @@ -1292,13 +1292,13 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0x0; let b: __m128bh = _mm256_mask_cvtneps_pbh(src, k, a); - let result = *b.as_u16x8().as_array(); + let result: [u16; 8] = transmute(b.as_u16x8()); let expected_result: [u16; 8] = src_array; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_maskz_cvtneps_pbh() { + unsafe fn test_mm256_maskz_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1310,10 +1310,10 @@ mod tests { 1000.158_f32, 575.575_f32, ]; - let a = f32x8::from_array(a_array).as_m256(); + let a: __m256 = transmute(a_array); let k: __mmask8 = 0xff; let b = _mm256_maskz_cvtneps_pbh(k, a); - let result = *b.as_u16x8().as_array(); + let result: [u16; 8] = transmute(b.as_u16x8()); #[rustfmt::skip] let expected_result: [u16; 8] = [ 0b0_10000110_0110010, @@ -1328,14 +1328,14 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0x6; let b: __m128bh = _mm256_maskz_cvtneps_pbh(k, a); - let result = *b.as_u16x8().as_array(); + let result: [u16; 8] = transmute(b.as_u16x8()); let expected_result: [u16; 8] = [0, 0b0_10000010_0101000, 0b0_10000000_1110000, 0, 0, 0, 0, 0]; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_cvtneps_pbh() { + unsafe fn test_mm512_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1355,9 +1355,9 @@ mod tests { 1000.158_f32, 575.575_f32, ]; - let a = f32x16::from_array(a_array).as_m512(); + let a: __m512 = transmute(a_array); let c: __m256bh = _mm512_cvtneps_pbh(a); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b0_10000110_0110010, @@ -1381,7 +1381,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_mask_cvtneps_pbh() { + unsafe fn test_mm512_mask_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1419,11 +1419,11 @@ mod tests { 0b1_10001000_1111010, 0b1_10001000_0010000, ]; - let src = u16x16::from_array(src_array).as_m256bh(); - let a = f32x16::from_array(a_array).as_m512(); + let src: __m256bh = transmute(src_array); + let a: __m512 = transmute(a_array); let k: __mmask16 = 0xffff; let c: __m256bh = _mm512_mask_cvtneps_pbh(src, k, a); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b0_10000110_0110010, @@ -1446,13 +1446,13 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0; let c: __m256bh = _mm512_mask_cvtneps_pbh(src, k, a); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); let expected_result = src_array; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_maskz_cvtneps_pbh() { + unsafe fn test_mm512_maskz_cvtneps_pbh() { #[rustfmt::skip] let a_array = [ 178.125_f32, @@ -1472,10 +1472,10 @@ mod tests { 1000.158_f32, 575.575_f32, ]; - let a = f32x16::from_array(a_array).as_m512(); + let a: __m512 = transmute(a_array); let k: __mmask16 = 0xffff; let c: __m256bh = _mm512_maskz_cvtneps_pbh(k, a); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0b0_10000110_0110010, @@ -1498,7 +1498,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0x653a; let c: __m256bh = _mm512_maskz_cvtneps_pbh(k, a); - let result = *c.as_u16x16().as_array(); + let result: [u16; 16] = transmute(c.as_u16x16()); #[rustfmt::skip] let expected_result: [u16; 16] = [ 0, @@ -1522,74 +1522,74 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_dpbf16_ps() { + unsafe fn test_mm_dpbf16_ps() { let a_array = [8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32]; - let a1 = f32x4::from_array(a_array).as_m128(); - let b1 = f32x4::from_array(b_array).as_m128(); - let src = f32x4::from_array([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]).as_m128(); + let a1: __m128 = transmute(a_array); + let b1: __m128 = transmute(b_array); + let src: __m128 = transmute([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]); let a: __m128bh = _mm_cvtne2ps_pbh(a1, a1); let b: __m128bh = _mm_cvtne2ps_pbh(b1, b1); let c: __m128 = _mm_dpbf16_ps(src, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [-18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32]; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_mask_dpbf16_ps() { + unsafe fn test_mm_mask_dpbf16_ps() { let a_array = [8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32]; - let a1 = f32x4::from_array(a_array).as_m128(); - let b1 = f32x4::from_array(b_array).as_m128(); + let a1: __m128 = transmute(a_array); + let b1: __m128 = transmute(b_array); let k: __mmask8 = 0xf3; - let src = f32x4::from_array([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]).as_m128(); + let src: __m128 = transmute([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]); let a: __m128bh = _mm_cvtne2ps_pbh(a1, a1); let b: __m128bh = _mm_cvtne2ps_pbh(b1, b1); let c: __m128 = _mm_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [-18.0_f32, -52.0_f32, 3.0_f32, 4.0_f32]; assert_eq!(result, expected_result); let k: __mmask8 = 0xff; let c: __m128 = _mm_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [-18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32]; assert_eq!(result, expected_result); let k: __mmask8 = 0; let c: __m128 = _mm_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_maskz_dpbf16_ps() { + unsafe fn test_mm_maskz_dpbf16_ps() { let a_array = [8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32]; let b_array = [-1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32]; - let a1 = f32x4::from_array(a_array).as_m128(); - let b1 = f32x4::from_array(b_array).as_m128(); + let a1: __m128 = transmute(a_array); + let b1: __m128 = transmute(b_array); let k: __mmask8 = 0xf3; - let src = f32x4::from_array([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]).as_m128(); + let src: __m128 = transmute([1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32]); let a: __m128bh = _mm_cvtne2ps_pbh(a1, a1); let b: __m128bh = _mm_cvtne2ps_pbh(b1, b1); let c: __m128 = _mm_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [-18.0_f32, -52.0_f32, 0.0, 0.0]; assert_eq!(result, expected_result); let k: __mmask8 = 0xff; let c: __m128 = _mm_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [-18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32]; assert_eq!(result, expected_result); let k: __mmask8 = 0; let c: __m128 = _mm_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x4().as_array(); + let result: [f32; 4] = transmute(c.as_f32x4()); let expected_result: [f32; 4] = [0.0, 0.0, 0.0, 0.0]; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_dpbf16_ps() { + unsafe fn test_mm256_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1597,16 +1597,16 @@ mod tests { let b_array = [ -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x8::from_array(a_array).as_m256(); - let b1 = f32x8::from_array(b_array).as_m256(); + let a1: __m256 = transmute(a_array); + let b1: __m256 = transmute(b_array); #[rustfmt::skip] - let src = f32x8::from_array([ + let src: __m256 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]).as_m256(); + ]); let a: __m256bh = _mm256_cvtne2ps_pbh(a1, a1); let b: __m256bh = _mm256_cvtne2ps_pbh(b1, b1); let c: __m256 = _mm256_dpbf16_ps(src, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1615,7 +1615,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_mask_dpbf16_ps() { + unsafe fn test_mm256_mask_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1623,17 +1623,17 @@ mod tests { let b_array = [ -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x8::from_array(a_array).as_m256(); - let b1 = f32x8::from_array(b_array).as_m256(); + let a1: __m256 = transmute(a_array); + let b1: __m256 = transmute(b_array); let k: __mmask8 = 0x33; #[rustfmt::skip] - let src = f32x8::from_array([ + let src: __m256 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]).as_m256(); + ]); let a: __m256bh = _mm256_cvtne2ps_pbh(a1, a1); let b: __m256bh = _mm256_cvtne2ps_pbh(b1, b1); let c: __m256 = _mm256_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ -18.0_f32, -52.0_f32, 3.0_f32, 4.0_f32, -18.0_f32, -52.0_f32, 3.0_f32, 4.0_f32, @@ -1641,7 +1641,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0xff; let c: __m256 = _mm256_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1649,7 +1649,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0; let c: __m256 = _mm256_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, @@ -1658,7 +1658,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm256_maskz_dpbf16_ps() { + unsafe fn test_mm256_maskz_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1666,17 +1666,17 @@ mod tests { let b_array = [ -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x8::from_array(a_array).as_m256(); - let b1 = f32x8::from_array(b_array).as_m256(); + let a1: __m256 = transmute(a_array); + let b1: __m256 = transmute(b_array); let k: __mmask8 = 0x33; #[rustfmt::skip] - let src = f32x8::from_array([ + let src: __m256 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]).as_m256(); + ]); let a: __m256bh = _mm256_cvtne2ps_pbh(a1, a1); let b: __m256bh = _mm256_cvtne2ps_pbh(b1, b1); let c: __m256 = _mm256_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ -18.0_f32, -52.0_f32, 0.0, 0.0, -18.0_f32, -52.0_f32, 0.0, 0.0, @@ -1684,7 +1684,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0xff; let c: __m256 = _mm256_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); #[rustfmt::skip] let expected_result: [f32; 8] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1692,13 +1692,13 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask8 = 0; let c: __m256 = _mm256_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x8().as_array(); + let result: [f32; 8] = transmute(c.as_f32x8()); let expected_result: [f32; 8] = [0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0]; assert_eq!(result, expected_result); } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_dpbf16_ps() { + unsafe fn test_mm512_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1708,17 +1708,16 @@ mod tests { -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x16::from_array(a_array).as_m512(); - let b1 = f32x16::from_array(b_array).as_m512(); - let src = f32x16::from_array([ + let a1: __m512 = transmute(a_array); + let b1: __m512 = transmute(b_array); + let src: __m512 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]) - .as_m512(); + ]); let a: __m512bh = _mm512_cvtne2ps_pbh(a1, a1); let b: __m512bh = _mm512_cvtne2ps_pbh(b1, b1); let c: __m512 = _mm512_dpbf16_ps(src, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1728,7 +1727,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_mask_dpbf16_ps() { + unsafe fn test_mm512_mask_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1738,18 +1737,18 @@ mod tests { -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x16::from_array(a_array).as_m512(); - let b1 = f32x16::from_array(b_array).as_m512(); + let a1: __m512 = transmute(a_array); + let b1: __m512 = transmute(b_array); let k: __mmask16 = 0x3333; #[rustfmt::skip] - let src = f32x16::from_array([ + let src: __m512 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]).as_m512(); + ]); let a: __m512bh = _mm512_cvtne2ps_pbh(a1, a1); let b: __m512bh = _mm512_cvtne2ps_pbh(b1, b1); let c: __m512 = _mm512_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ -18.0_f32, -52.0_f32, 3.0_f32, 4.0_f32, -18.0_f32, -52.0_f32, 3.0_f32, 4.0_f32, @@ -1758,7 +1757,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0xffff; let c: __m512 = _mm512_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1767,7 +1766,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0; let c: __m512 = _mm512_mask_dpbf16_ps(src, k, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, @@ -1777,7 +1776,7 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512f")] - fn test_mm512_maskz_dpbf16_ps() { + unsafe fn test_mm512_maskz_dpbf16_ps() { #[rustfmt::skip] let a_array = [ 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, 8.5_f32, 10.5_f32, 3.75_f32, 50.25_f32, @@ -1787,18 +1786,18 @@ mod tests { -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, -1.0_f32, ]; - let a1 = f32x16::from_array(a_array).as_m512(); - let b1 = f32x16::from_array(b_array).as_m512(); + let a1: __m512 = transmute(a_array); + let b1: __m512 = transmute(b_array); let k: __mmask16 = 0x3333; #[rustfmt::skip] - let src = f32x16::from_array([ + let src: __m512 = transmute([ 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, 1.0_f32, 2.0_f32, 3.0_f32, 4.0_f32, - ]).as_m512(); + ]); let a: __m512bh = _mm512_cvtne2ps_pbh(a1, a1); let b: __m512bh = _mm512_cvtne2ps_pbh(b1, b1); let c: __m512 = _mm512_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ -18.0_f32, -52.0_f32, 0.0, 0.0, -18.0_f32, -52.0_f32, 0.0, 0.0, -18.0_f32, -52.0_f32, @@ -1807,7 +1806,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0xffff; let c: __m512 = _mm512_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, -18.0_f32, -52.0_f32, -16.0_f32, -50.0_f32, @@ -1816,7 +1815,7 @@ mod tests { assert_eq!(result, expected_result); let k: __mmask16 = 0; let c: __m512 = _mm512_maskz_dpbf16_ps(k, src, a, b); - let result = *c.as_f32x16().as_array(); + let result: [f32; 16] = transmute(c.as_f32x16()); #[rustfmt::skip] let expected_result: [f32; 16] = [ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, @@ -1944,28 +1943,28 @@ mod tests { } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_cvtneps_pbh() { + unsafe fn test_mm_cvtneps_pbh() { let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); - let r: u16x4 = unsafe { transmute_copy(&_mm_cvtneps_pbh(a)) }; + let r: u16x4 = transmute_copy(&_mm_cvtneps_pbh(a)); let e = u16x4::new(BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR); assert_eq!(r, e); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_mask_cvtneps_pbh() { + unsafe fn test_mm_mask_cvtneps_pbh() { let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); let src = __m128bh([5, 6, 7, 8, !0, !0, !0, !0]); let k = 0b1010; - let r: u16x4 = unsafe { transmute_copy(&_mm_mask_cvtneps_pbh(src, k, a)) }; + let r: u16x4 = transmute_copy(&_mm_mask_cvtneps_pbh(src, k, a)); let e = u16x4::new(5, BF16_TWO, 7, BF16_FOUR); assert_eq!(r, e); } #[simd_test(enable = "avx512bf16,avx512vl")] - fn test_mm_maskz_cvtneps_pbh() { + unsafe fn test_mm_maskz_cvtneps_pbh() { let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); let k = 0b1010; - let r: u16x4 = unsafe { transmute_copy(&_mm_maskz_cvtneps_pbh(k, a)) }; + let r: u16x4 = transmute_copy(&_mm_maskz_cvtneps_pbh(k, a)); let e = u16x4::new(0, BF16_TWO, 0, BF16_FOUR); assert_eq!(r, e); } diff --git a/library/stdarch/crates/core_arch/src/x86/avx512bw.rs b/library/stdarch/crates/core_arch/src/x86/avx512bw.rs index 8e074fdcfa486..6b4b88621efd3 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512bw.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512bw.rs @@ -17098,37 +17098,37 @@ mod tests { } #[simd_test(enable = "avx512bw")] - const fn test_mm512_loadu_epi16() { + const unsafe fn test_mm512_loadu_epi16() { #[rustfmt::skip] let a: [i16; 32] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32]; - let r = unsafe { _mm512_loadu_epi16(&a[0]) }; + let r = _mm512_loadu_epi16(&a[0]); #[rustfmt::skip] let e = _mm512_set_epi16(32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_loadu_epi16() { + const unsafe fn test_mm256_loadu_epi16() { let a: [i16; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; - let r = unsafe { _mm256_loadu_epi16(&a[0]) }; + let r = _mm256_loadu_epi16(&a[0]); let e = _mm256_set_epi16(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_loadu_epi16() { + const unsafe fn test_mm_loadu_epi16() { let a: [i16; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; - let r = unsafe { _mm_loadu_epi16(&a[0]) }; + let r = _mm_loadu_epi16(&a[0]); let e = _mm_set_epi16(8, 7, 6, 5, 4, 3, 2, 1); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_loadu_epi8() { + const unsafe fn test_mm512_loadu_epi8() { #[rustfmt::skip] let a: [i8; 64] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32]; - let r = unsafe { _mm512_loadu_epi8(&a[0]) }; + let r = _mm512_loadu_epi8(&a[0]); #[rustfmt::skip] let e = _mm512_set_epi8(32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); @@ -17136,85 +17136,73 @@ mod tests { } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_loadu_epi8() { + const unsafe fn test_mm256_loadu_epi8() { #[rustfmt::skip] let a: [i8; 32] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32]; - let r = unsafe { _mm256_loadu_epi8(&a[0]) }; + let r = _mm256_loadu_epi8(&a[0]); #[rustfmt::skip] let e = _mm256_set_epi8(32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_loadu_epi8() { + const unsafe fn test_mm_loadu_epi8() { let a: [i8; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; - let r = unsafe { _mm_loadu_epi8(&a[0]) }; + let r = _mm_loadu_epi8(&a[0]); let e = _mm_set_epi8(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_storeu_epi16() { + const unsafe fn test_mm512_storeu_epi16() { let a = _mm512_set1_epi16(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_storeu_epi16(&mut r as *mut _ as *mut i16, a); - } + _mm512_storeu_epi16(&mut r as *mut _ as *mut i16, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_storeu_epi16() { + const unsafe fn test_mm256_storeu_epi16() { let a = _mm256_set1_epi16(9); let mut r = _mm256_set1_epi32(0); - unsafe { - _mm256_storeu_epi16(&mut r as *mut _ as *mut i16, a); - } + _mm256_storeu_epi16(&mut r as *mut _ as *mut i16, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_storeu_epi16() { + const unsafe fn test_mm_storeu_epi16() { let a = _mm_set1_epi16(9); let mut r = _mm_set1_epi32(0); - unsafe { - _mm_storeu_epi16(&mut r as *mut _ as *mut i16, a); - } + _mm_storeu_epi16(&mut r as *mut _ as *mut i16, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_storeu_epi8() { + const unsafe fn test_mm512_storeu_epi8() { let a = _mm512_set1_epi8(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_storeu_epi8(&mut r as *mut _ as *mut i8, a); - } + _mm512_storeu_epi8(&mut r as *mut _ as *mut i8, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_storeu_epi8() { + const unsafe fn test_mm256_storeu_epi8() { let a = _mm256_set1_epi8(9); let mut r = _mm256_set1_epi32(0); - unsafe { - _mm256_storeu_epi8(&mut r as *mut _ as *mut i8, a); - } + _mm256_storeu_epi8(&mut r as *mut _ as *mut i8, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_storeu_epi8() { + const unsafe fn test_mm_storeu_epi8() { let a = _mm_set1_epi8(9); let mut r = _mm_set1_epi32(0); - unsafe { - _mm_storeu_epi8(&mut r as *mut _ as *mut i8, a); - } + _mm_storeu_epi8(&mut r as *mut _ as *mut i8, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_mask_loadu_epi16() { + const unsafe fn test_mm512_mask_loadu_epi16() { let src = _mm512_set1_epi16(42); let a = &[ 1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -17222,54 +17210,52 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b10101010_11001100_11101000_11001010; - let r = unsafe { _mm512_mask_loadu_epi16(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_epi16(src, m, black_box(p)); let e = &[ 42_i16, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, ]; - let e = unsafe { _mm512_loadu_epi16(e.as_ptr()) }; + let e = _mm512_loadu_epi16(e.as_ptr()); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_maskz_loadu_epi16() { + const unsafe fn test_mm512_maskz_loadu_epi16() { let a = &[ 1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; let p = a.as_ptr(); let m = 0b10101010_11001100_11101000_11001010; - let r = unsafe { _mm512_maskz_loadu_epi16(m, black_box(p)) }; + let r = _mm512_maskz_loadu_epi16(m, black_box(p)); let e = &[ 0_i16, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16, 0, 0, 19, 20, 0, 0, 23, 24, 0, 26, 0, 28, 0, 30, 0, 32, ]; - let e = unsafe { _mm512_loadu_epi16(e.as_ptr()) }; + let e = _mm512_loadu_epi16(e.as_ptr()); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_mask_storeu_epi16() { + const unsafe fn test_mm512_mask_storeu_epi16() { let mut r = [42_i16; 32]; let a = &[ 1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; - let a = unsafe { _mm512_loadu_epi16(a.as_ptr()) }; + let a = _mm512_loadu_epi16(a.as_ptr()); let m = 0b10101010_11001100_11101000_11001010; - unsafe { - _mm512_mask_storeu_epi16(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_epi16(r.as_mut_ptr(), m, a); let e = &[ 42_i16, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, ]; - let e = unsafe { _mm512_loadu_epi16(e.as_ptr()) }; - assert_eq_m512i(unsafe { _mm512_loadu_epi16(r.as_ptr()) }, e); + let e = _mm512_loadu_epi16(e.as_ptr()); + assert_eq_m512i(_mm512_loadu_epi16(r.as_ptr()), e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_mask_loadu_epi8() { + const unsafe fn test_mm512_mask_loadu_epi8() { let src = _mm512_set1_epi8(42); let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -17278,18 +17264,18 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b00000000_11111111_11111111_00000000_10101010_11001100_11101000_11001010; - let r = unsafe { _mm512_mask_loadu_epi8(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_epi8(src, m, black_box(p)); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, 42, 42, 42, 42, 42, 42, 42, 42, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 42, 42, 42, 42, 42, 42, 42, 42, ]; - let e = unsafe { _mm512_loadu_epi8(e.as_ptr()) }; + let e = _mm512_loadu_epi8(e.as_ptr()); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_maskz_loadu_epi8() { + const unsafe fn test_mm512_maskz_loadu_epi8() { let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, @@ -17297,81 +17283,77 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b00000000_11111111_11111111_00000000_10101010_11001100_11101000_11001010; - let r = unsafe { _mm512_maskz_loadu_epi8(m, black_box(p)) }; + let r = _mm512_maskz_loadu_epi8(m, black_box(p)); let e = &[ 0_i8, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16, 0, 0, 19, 20, 0, 0, 23, 24, 0, 26, 0, 28, 0, 30, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 0, 0, 0, 0, 0, 0, 0, 0, ]; - let e = unsafe { _mm512_loadu_epi8(e.as_ptr()) }; + let e = _mm512_loadu_epi8(e.as_ptr()); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_mm512_mask_storeu_epi8() { + const unsafe fn test_mm512_mask_storeu_epi8() { let mut r = [42_i8; 64]; let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, ]; - let a = unsafe { _mm512_loadu_epi8(a.as_ptr()) }; + let a = _mm512_loadu_epi8(a.as_ptr()); let m = 0b00000000_11111111_11111111_00000000_10101010_11001100_11101000_11001010; - unsafe { - _mm512_mask_storeu_epi8(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_epi8(r.as_mut_ptr(), m, a); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, 42, 42, 42, 42, 42, 42, 42, 42, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 42, 42, 42, 42, 42, 42, 42, 42, ]; - let e = unsafe { _mm512_loadu_epi8(e.as_ptr()) }; - assert_eq_m512i(unsafe { _mm512_loadu_epi8(r.as_ptr()) }, e); + let e = _mm512_loadu_epi8(e.as_ptr()); + assert_eq_m512i(_mm512_loadu_epi8(r.as_ptr()), e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_mask_loadu_epi16() { + const unsafe fn test_mm256_mask_loadu_epi16() { let src = _mm256_set1_epi16(42); let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm256_mask_loadu_epi16(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_epi16(src, m, black_box(p)); let e = &[ 42_i16, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, ]; - let e = unsafe { _mm256_loadu_epi16(e.as_ptr()) }; + let e = _mm256_loadu_epi16(e.as_ptr()); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_maskz_loadu_epi16() { + const unsafe fn test_mm256_maskz_loadu_epi16() { let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm256_maskz_loadu_epi16(m, black_box(p)) }; + let r = _mm256_maskz_loadu_epi16(m, black_box(p)); let e = &[0_i16, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16]; - let e = unsafe { _mm256_loadu_epi16(e.as_ptr()) }; + let e = _mm256_loadu_epi16(e.as_ptr()); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_mask_storeu_epi16() { + const unsafe fn test_mm256_mask_storeu_epi16() { let mut r = [42_i16; 16]; let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; - let a = unsafe { _mm256_loadu_epi16(a.as_ptr()) }; + let a = _mm256_loadu_epi16(a.as_ptr()); let m = 0b11101000_11001010; - unsafe { - _mm256_mask_storeu_epi16(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_epi16(r.as_mut_ptr(), m, a); let e = &[ 42_i16, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, ]; - let e = unsafe { _mm256_loadu_epi16(e.as_ptr()) }; - assert_eq_m256i(unsafe { _mm256_loadu_epi16(r.as_ptr()) }, e); + let e = _mm256_loadu_epi16(e.as_ptr()); + assert_eq_m256i(_mm256_loadu_epi16(r.as_ptr()), e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_mask_loadu_epi8() { + const unsafe fn test_mm256_mask_loadu_epi8() { let src = _mm256_set1_epi8(42); let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -17379,124 +17361,122 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b10101010_11001100_11101000_11001010; - let r = unsafe { _mm256_mask_loadu_epi8(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_epi8(src, m, black_box(p)); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, ]; - let e = unsafe { _mm256_loadu_epi8(e.as_ptr()) }; + let e = _mm256_loadu_epi8(e.as_ptr()); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_maskz_loadu_epi8() { + const unsafe fn test_mm256_maskz_loadu_epi8() { let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; let p = a.as_ptr(); let m = 0b10101010_11001100_11101000_11001010; - let r = unsafe { _mm256_maskz_loadu_epi8(m, black_box(p)) }; + let r = _mm256_maskz_loadu_epi8(m, black_box(p)); let e = &[ 0_i8, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16, 0, 0, 19, 20, 0, 0, 23, 24, 0, 26, 0, 28, 0, 30, 0, 32, ]; - let e = unsafe { _mm256_loadu_epi8(e.as_ptr()) }; + let e = _mm256_loadu_epi8(e.as_ptr()); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm256_mask_storeu_epi8() { + const unsafe fn test_mm256_mask_storeu_epi8() { let mut r = [42_i8; 32]; let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; - let a = unsafe { _mm256_loadu_epi8(a.as_ptr()) }; + let a = _mm256_loadu_epi8(a.as_ptr()); let m = 0b10101010_11001100_11101000_11001010; - unsafe { - _mm256_mask_storeu_epi8(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_epi8(r.as_mut_ptr(), m, a); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, 42, 42, 19, 20, 42, 42, 23, 24, 42, 26, 42, 28, 42, 30, 42, 32, ]; - let e = unsafe { _mm256_loadu_epi8(e.as_ptr()) }; - assert_eq_m256i(unsafe { _mm256_loadu_epi8(r.as_ptr()) }, e); + let e = _mm256_loadu_epi8(e.as_ptr()); + assert_eq_m256i(_mm256_loadu_epi8(r.as_ptr()), e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_mask_loadu_epi16() { + const unsafe fn test_mm_mask_loadu_epi16() { let src = _mm_set1_epi16(42); let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm_mask_loadu_epi16(src, m, black_box(p)) }; + let r = _mm_mask_loadu_epi16(src, m, black_box(p)); let e = &[42_i16, 2, 42, 4, 42, 42, 7, 8]; - let e = unsafe { _mm_loadu_epi16(e.as_ptr()) }; + let e = _mm_loadu_epi16(e.as_ptr()); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_maskz_loadu_epi16() { + const unsafe fn test_mm_maskz_loadu_epi16() { let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm_maskz_loadu_epi16(m, black_box(p)) }; + let r = _mm_maskz_loadu_epi16(m, black_box(p)); let e = &[0_i16, 2, 0, 4, 0, 0, 7, 8]; - let e = unsafe { _mm_loadu_epi16(e.as_ptr()) }; + let e = _mm_loadu_epi16(e.as_ptr()); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_mask_storeu_epi16() { + const unsafe fn test_mm_mask_storeu_epi16() { let mut r = [42_i16; 8]; let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8]; - let a = unsafe { _mm_loadu_epi16(a.as_ptr()) }; + let a = _mm_loadu_epi16(a.as_ptr()); let m = 0b11001010; - unsafe { _mm_mask_storeu_epi16(r.as_mut_ptr(), m, a) }; + _mm_mask_storeu_epi16(r.as_mut_ptr(), m, a); let e = &[42_i16, 2, 42, 4, 42, 42, 7, 8]; - let e = unsafe { _mm_loadu_epi16(e.as_ptr()) }; - assert_eq_m128i(unsafe { _mm_loadu_epi16(r.as_ptr()) }, e); + let e = _mm_loadu_epi16(e.as_ptr()); + assert_eq_m128i(_mm_loadu_epi16(r.as_ptr()), e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_mask_loadu_epi8() { + const unsafe fn test_mm_mask_loadu_epi8() { let src = _mm_set1_epi8(42); let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm_mask_loadu_epi8(src, m, black_box(p)) }; + let r = _mm_mask_loadu_epi8(src, m, black_box(p)); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, ]; - let e = unsafe { _mm_loadu_epi8(e.as_ptr()) }; + let e = _mm_loadu_epi8(e.as_ptr()); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_maskz_loadu_epi8() { + const unsafe fn test_mm_maskz_loadu_epi8() { let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm_maskz_loadu_epi8(m, black_box(p)) }; + let r = _mm_maskz_loadu_epi8(m, black_box(p)); let e = &[0_i8, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16]; - let e = unsafe { _mm_loadu_epi8(e.as_ptr()) }; + let e = _mm_loadu_epi8(e.as_ptr()); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - const fn test_mm_mask_storeu_epi8() { + const unsafe fn test_mm_mask_storeu_epi8() { let mut r = [42_i8; 16]; let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; - let a = unsafe { _mm_loadu_epi8(a.as_ptr()) }; + let a = _mm_loadu_epi8(a.as_ptr()); let m = 0b11101000_11001010; - unsafe { _mm_mask_storeu_epi8(r.as_mut_ptr(), m, a) }; + _mm_mask_storeu_epi8(r.as_mut_ptr(), m, a); let e = &[ 42_i8, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16, ]; - let e = unsafe { _mm_loadu_epi8(e.as_ptr()) }; - assert_eq_m128i(unsafe { _mm_loadu_epi8(r.as_ptr()) }, e); + let e = _mm_loadu_epi8(e.as_ptr()); + assert_eq_m128i(_mm_loadu_epi8(r.as_ptr()), e); } #[simd_test(enable = "avx512bw")] @@ -20734,40 +20714,36 @@ mod tests { } #[simd_test(enable = "avx512bw")] - const fn test_store_mask64() { + const unsafe fn test_store_mask64() { let a: __mmask64 = 0b11111111_00000000_11111111_00000000_11111111_00000000_11111111_00000000; let mut r = 0; - unsafe { - _store_mask64(&mut r, a); - } + _store_mask64(&mut r, a); assert_eq!(r, a); } #[simd_test(enable = "avx512bw")] - const fn test_store_mask32() { + const unsafe fn test_store_mask32() { let a: __mmask32 = 0b11111111_00000000_11111111_00000000; let mut r = 0; - unsafe { - _store_mask32(&mut r, a); - } + _store_mask32(&mut r, a); assert_eq!(r, a); } #[simd_test(enable = "avx512bw")] - const fn test_load_mask64() { + const unsafe fn test_load_mask64() { let p: __mmask64 = 0b11111111_00000000_11111111_00000000_11111111_00000000_11111111_00000000; - let r = unsafe { _load_mask64(&p) }; + let r = _load_mask64(&p); let e: __mmask64 = 0b11111111_00000000_11111111_00000000_11111111_00000000_11111111_00000000; assert_eq!(r, e); } #[simd_test(enable = "avx512bw")] - const fn test_load_mask32() { + const unsafe fn test_load_mask32() { let p: __mmask32 = 0b11111111_00000000_11111111_00000000; - let r = unsafe { _load_mask32(&p) }; + let r = _load_mask32(&p); let e: __mmask32 = 0b11111111_00000000_11111111_00000000; assert_eq!(r, e); } @@ -21187,21 +21163,21 @@ mod tests { } #[simd_test(enable = "avx512bw")] - const fn test_kortest_mask32_u8() { + const unsafe fn test_kortest_mask32_u8() { let a: __mmask32 = 0b0110100101101001_0110100101101001; let b: __mmask32 = 0b1011011010110110_1011011010110110; let mut all_ones: u8 = 0; - let r = unsafe { _kortest_mask32_u8(a, b, &mut all_ones) }; + let r = _kortest_mask32_u8(a, b, &mut all_ones); assert_eq!(r, 0); assert_eq!(all_ones, 1); } #[simd_test(enable = "avx512bw")] - const fn test_kortest_mask64_u8() { + const unsafe fn test_kortest_mask64_u8() { let a: __mmask64 = 0b0110100101101001_0110100101101001; let b: __mmask64 = 0b1011011010110110_1011011010110110; let mut all_ones: u8 = 0; - let r = unsafe { _kortest_mask64_u8(a, b, &mut all_ones) }; + let r = _kortest_mask64_u8(a, b, &mut all_ones); assert_eq!(r, 0); assert_eq!(all_ones, 0); } @@ -21323,11 +21299,11 @@ mod tests { } #[simd_test(enable = "avx512bw")] - const fn test_ktest_mask32_u8() { + const unsafe fn test_ktest_mask32_u8() { let a: __mmask32 = 0b0110100100111100_0110100100111100; let b: __mmask32 = 0b1001011011000011_1001011011000011; let mut and_not: u8 = 0; - let r = unsafe { _ktest_mask32_u8(a, b, &mut and_not) }; + let r = _ktest_mask32_u8(a, b, &mut and_not); assert_eq!(r, 1); assert_eq!(and_not, 0); } @@ -21349,11 +21325,11 @@ mod tests { } #[simd_test(enable = "avx512bw")] - const fn test_ktest_mask64_u8() { + const unsafe fn test_ktest_mask64_u8() { let a: __mmask64 = 0b0110100100111100_0110100100111100; let b: __mmask64 = 0b1001011011000011_1001011011000011; let mut and_not: u8 = 0; - let r = unsafe { _ktest_mask64_u8(a, b, &mut and_not) }; + let r = _ktest_mask64_u8(a, b, &mut and_not); assert_eq!(r, 1); assert_eq!(and_not, 0); } @@ -21975,38 +21951,32 @@ mod tests { } #[simd_test(enable = "avx512bw")] - fn test_mm512_mask_cvtsepi16_storeu_epi8() { + unsafe fn test_mm512_mask_cvtsepi16_storeu_epi8() { let a = _mm512_set1_epi16(i16::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtsepi16_storeu_epi8( - &mut r as *mut _ as *mut i8, - 0b11111111_11111111_11111111_11111111, - a, - ); - } + _mm512_mask_cvtsepi16_storeu_epi8( + &mut r as *mut _ as *mut i8, + 0b11111111_11111111_11111111_11111111, + a, + ); let e = _mm256_set1_epi8(i8::MAX); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm256_mask_cvtsepi16_storeu_epi8() { + unsafe fn test_mm256_mask_cvtsepi16_storeu_epi8() { let a = _mm256_set1_epi16(i16::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm256_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(i8::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm_mask_cvtsepi16_storeu_epi8() { + unsafe fn test_mm_mask_cvtsepi16_storeu_epi8() { let a = _mm_set1_epi16(i16::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, @@ -22016,75 +21986,63 @@ mod tests { } #[simd_test(enable = "avx512bw")] - fn test_mm512_mask_cvtepi16_storeu_epi8() { + unsafe fn test_mm512_mask_cvtepi16_storeu_epi8() { let a = _mm512_set1_epi16(8); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtepi16_storeu_epi8( - &mut r as *mut _ as *mut i8, - 0b11111111_11111111_11111111_11111111, - a, - ); - } + _mm512_mask_cvtepi16_storeu_epi8( + &mut r as *mut _ as *mut i8, + 0b11111111_11111111_11111111_11111111, + a, + ); let e = _mm256_set1_epi8(8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm256_mask_cvtepi16_storeu_epi8() { + unsafe fn test_mm256_mask_cvtepi16_storeu_epi8() { let a = _mm256_set1_epi16(8); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm256_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(8); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm_mask_cvtepi16_storeu_epi8() { + unsafe fn test_mm_mask_cvtepi16_storeu_epi8() { let a = _mm_set1_epi16(8); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 8, 8, 8, 8, 8, 8); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw")] - fn test_mm512_mask_cvtusepi16_storeu_epi8() { + unsafe fn test_mm512_mask_cvtusepi16_storeu_epi8() { let a = _mm512_set1_epi16(i16::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtusepi16_storeu_epi8( - &mut r as *mut _ as *mut i8, - 0b11111111_11111111_11111111_11111111, - a, - ); - } + _mm512_mask_cvtusepi16_storeu_epi8( + &mut r as *mut _ as *mut i8, + 0b11111111_11111111_11111111_11111111, + a, + ); let e = _mm256_set1_epi8(u8::MAX as i8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm256_mask_cvtusepi16_storeu_epi8() { + unsafe fn test_mm256_mask_cvtusepi16_storeu_epi8() { let a = _mm256_set1_epi16(i16::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm256_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(u8::MAX as i8); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512bw,avx512vl")] - fn test_mm_mask_cvtusepi16_storeu_epi8() { + unsafe fn test_mm_mask_cvtusepi16_storeu_epi8() { let a = _mm_set1_epi16(i16::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, diff --git a/library/stdarch/crates/core_arch/src/x86/avx512dq.rs b/library/stdarch/crates/core_arch/src/x86/avx512dq.rs index 9e1a4c0b29558..ebe75cd22d8e5 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512dq.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512dq.rs @@ -7401,25 +7401,27 @@ unsafe extern "C" { mod tests { use super::*; use crate::core_arch::assert_eq_const as assert_eq; - use crate::core_arch::x86::*; use stdarch_test::simd_test; - const OPRND1_64: f64 = f64::from_bits(0x3333333333333333); - const OPRND2_64: f64 = f64::from_bits(0x5555555555555555); + use crate::core_arch::x86::*; + use crate::mem::transmute; + + const OPRND1_64: f64 = unsafe { transmute(0x3333333333333333_u64) }; + const OPRND2_64: f64 = unsafe { transmute(0x5555555555555555_u64) }; - const AND_64: f64 = f64::from_bits(0x1111111111111111); - const ANDN_64: f64 = f64::from_bits(0x4444444444444444); - const OR_64: f64 = f64::from_bits(0x7777777777777777); - const XOR_64: f64 = f64::from_bits(0x6666666666666666); + const AND_64: f64 = unsafe { transmute(0x1111111111111111_u64) }; + const ANDN_64: f64 = unsafe { transmute(0x4444444444444444_u64) }; + const OR_64: f64 = unsafe { transmute(0x7777777777777777_u64) }; + const XOR_64: f64 = unsafe { transmute(0x6666666666666666_u64) }; - const OPRND1_32: f32 = f32::from_bits(0x33333333); - const OPRND2_32: f32 = f32::from_bits(0x55555555); + const OPRND1_32: f32 = unsafe { transmute(0x33333333_u32) }; + const OPRND2_32: f32 = unsafe { transmute(0x55555555_u32) }; - const AND_32: f32 = f32::from_bits(0x11111111); - const ANDN_32: f32 = f32::from_bits(0x44444444); - const OR_32: f32 = f32::from_bits(0x77777777); - const XOR_32: f32 = f32::from_bits(0x66666666); + const AND_32: f32 = unsafe { transmute(0x11111111_u32) }; + const ANDN_32: f32 = unsafe { transmute(0x44444444_u32) }; + const OR_32: f32 = unsafe { transmute(0x77777777_u32) }; + const XOR_32: f32 = unsafe { transmute(0x66666666_u32) }; #[simd_test(enable = "avx512dq,avx512vl")] const fn test_mm_mask_and_pd() { @@ -10021,11 +10023,11 @@ mod tests { } #[simd_test(enable = "avx512dq")] - const fn test_kortest_mask8_u8() { + const unsafe fn test_kortest_mask8_u8() { let a: __mmask8 = 0b01101001; let b: __mmask8 = 0b10110110; let mut all_ones: u8 = 0; - let r = unsafe { _kortest_mask8_u8(a, b, &mut all_ones) }; + let r = _kortest_mask8_u8(a, b, &mut all_ones); assert_eq!(r, 0); assert_eq!(all_ones, 1); } @@ -10047,7 +10049,7 @@ mod tests { } #[simd_test(enable = "avx512dq")] - const fn test_kshiftli_mask8() { + const unsafe fn test_kshiftli_mask8() { let a: __mmask8 = 0b01101001; let r = _kshiftli_mask8::<3>(a); let e: __mmask8 = 0b01001000; @@ -10087,11 +10089,11 @@ mod tests { } #[simd_test(enable = "avx512dq")] - const fn test_ktest_mask8_u8() { + const unsafe fn test_ktest_mask8_u8() { let a: __mmask8 = 0b01101001; let b: __mmask8 = 0b10010110; let mut and_not: u8 = 0; - let r = unsafe { _ktest_mask8_u8(a, b, &mut and_not) }; + let r = _ktest_mask8_u8(a, b, &mut and_not); assert_eq!(r, 1); assert_eq!(and_not, 0); } @@ -10113,11 +10115,11 @@ mod tests { } #[simd_test(enable = "avx512dq")] - const fn test_ktest_mask16_u8() { + const unsafe fn test_ktest_mask16_u8() { let a: __mmask16 = 0b0110100100111100; let b: __mmask16 = 0b1001011011000011; let mut and_not: u8 = 0; - let r = unsafe { _ktest_mask16_u8(a, b, &mut and_not) }; + let r = _ktest_mask16_u8(a, b, &mut and_not); assert_eq!(r, 1); assert_eq!(and_not, 0); } @@ -10139,20 +10141,18 @@ mod tests { } #[simd_test(enable = "avx512dq")] - const fn test_load_mask8() { + const unsafe fn test_load_mask8() { let a: __mmask8 = 0b01101001; - let r = unsafe { _load_mask8(&a) }; + let r = _load_mask8(&a); let e: __mmask8 = 0b01101001; assert_eq!(r, e); } #[simd_test(enable = "avx512dq")] - const fn test_store_mask8() { + const unsafe fn test_store_mask8() { let a: __mmask8 = 0b01101001; let mut r = 0; - unsafe { - _store_mask8(&mut r, a); - } + _store_mask8(&mut r, a); let e: __mmask8 = 0b01101001; assert_eq!(r, e); } diff --git a/library/stdarch/crates/core_arch/src/x86/avx512f.rs b/library/stdarch/crates/core_arch/src/x86/avx512f.rs index 3730496e1ec34..76b7539383839 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512f.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512f.rs @@ -48062,7 +48062,9 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_ternarylogic_epi32() { + unsafe fn test_mm512_ternarylogic_epi32() { + use core::intrinsics::simd::simd_xor; + let a = _mm512_set4_epi32(0b100, 0b110, 0b001, 0b101); let b = _mm512_set4_epi32(0b010, 0b011, 0b001, 0b110); let c = _mm512_set4_epi32(0b001, 0b000, 0b001, 0b111); @@ -48075,7 +48077,7 @@ mod tests { let r = _mm512_ternarylogic_epi32::<0b10010110>(a, b, c); let e = _mm512_set4_epi32(0b111, 0b101, 0b001, 0b100); assert_eq_m512i(r, e); - assert_eq_m512i(r, _mm512_xor_si512(_mm512_xor_si512(a, b), c)); + assert_eq_m512i(r, simd_xor(simd_xor(a, b), c)); // Majority (2 or more bits set). let r = _mm512_ternarylogic_epi32::<0b1110_1000>(a, b, c); @@ -48108,7 +48110,9 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_ternarylogic_epi32() { + unsafe fn test_mm256_ternarylogic_epi32() { + use core::intrinsics::simd::simd_xor; + let _mm256_set4_epi32 = |a, b, c, d| _mm256_setr_epi32(a, b, c, d, a, b, c, d); let a = _mm256_set4_epi32(0b100, 0b110, 0b001, 0b101); @@ -48123,7 +48127,7 @@ mod tests { let r = _mm256_ternarylogic_epi32::<0b10010110>(a, b, c); let e = _mm256_set4_epi32(0b111, 0b101, 0b001, 0b100); assert_eq_m256i(r, e); - assert_eq_m256i(r, _mm256_xor_si256(_mm256_xor_si256(a, b), c)); + assert_eq_m256i(r, simd_xor(simd_xor(a, b), c)); // Majority (2 or more bits set). let r = _mm256_ternarylogic_epi32::<0b1110_1000>(a, b, c); @@ -48156,7 +48160,9 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_ternarylogic_epi32() { + unsafe fn test_mm_ternarylogic_epi32() { + use core::intrinsics::simd::simd_xor; + let a = _mm_setr_epi32(0b100, 0b110, 0b001, 0b101); let b = _mm_setr_epi32(0b010, 0b011, 0b001, 0b110); let c = _mm_setr_epi32(0b001, 0b000, 0b001, 0b111); @@ -48169,7 +48175,7 @@ mod tests { let r = _mm_ternarylogic_epi32::<0b10010110>(a, b, c); let e = _mm_setr_epi32(0b111, 0b101, 0b001, 0b100); assert_eq_m128i(r, e); - assert_eq_m128i(r, _mm_xor_si128(_mm_xor_si128(a, b), c)); + assert_eq_m128i(r, simd_xor(simd_xor(a, b), c)); // Majority (2 or more bits set). let r = _mm_ternarylogic_epi32::<0b1110_1000>(a, b, c); @@ -51441,20 +51447,20 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32gather_ps() { + unsafe fn test_mm512_i32gather_ps() { let arr: [f32; 256] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing #[rustfmt::skip] let index = _mm512_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112, 120, 128, 136, 144, 152, 160, 168, 176); - let r = unsafe { _mm512_i32gather_ps::<4>(index, arr.as_ptr()) }; + let r = _mm512_i32gather_ps::<4>(index, arr.as_ptr()); #[rustfmt::skip] assert_eq_m512(r, _mm512_setr_ps(0., 16., 32., 48., 64., 80., 96., 112., 120., 128., 136., 144., 152., 160., 168., 176.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32gather_ps() { + unsafe fn test_mm512_mask_i32gather_ps() { let arr: [f32; 256] = core::array::from_fn(|i| i as f32); let src = _mm512_set1_ps(2.); let mask = 0b10101010_10101010; @@ -51462,27 +51468,27 @@ mod tests { let index = _mm512_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112, 120, 128, 136, 144, 152, 160, 168, 176); // A multiplier of 4 is word-addressing - let r = unsafe { _mm512_mask_i32gather_ps::<4>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i32gather_ps::<4>(src, mask, index, arr.as_ptr()); #[rustfmt::skip] assert_eq_m512(r, _mm512_setr_ps(2., 16., 2., 48., 2., 80., 2., 112., 2., 128., 2., 144., 2., 160., 2., 176.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32gather_epi32() { + unsafe fn test_mm512_i32gather_epi32() { let arr: [i32; 256] = core::array::from_fn(|i| i as i32); // A multiplier of 4 is word-addressing #[rustfmt::skip] let index = _mm512_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112, 120, 128, 136, 144, 152, 160, 168, 176); - let r = unsafe { _mm512_i32gather_epi32::<4>(index, arr.as_ptr()) }; + let r = _mm512_i32gather_epi32::<4>(index, arr.as_ptr()); #[rustfmt::skip] assert_eq_m512i(r, _mm512_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112, 120, 128, 136, 144, 152, 160, 168, 176)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32gather_epi32() { + unsafe fn test_mm512_mask_i32gather_epi32() { let arr: [i32; 256] = core::array::from_fn(|i| i as i32); let src = _mm512_set1_epi32(2); let mask = 0b10101010_10101010; @@ -51490,7 +51496,7 @@ mod tests { 0, 16, 32, 48, 64, 80, 96, 112, 128, 144, 160, 176, 192, 208, 224, 240, ); // A multiplier of 4 is word-addressing - let r = unsafe { _mm512_mask_i32gather_epi32::<4>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i32gather_epi32::<4>(src, mask, index, arr.as_ptr()); assert_eq_m512i( r, _mm512_setr_epi32(2, 16, 2, 48, 2, 80, 2, 112, 2, 144, 2, 176, 2, 208, 2, 240), @@ -51498,7 +51504,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32scatter_ps() { + unsafe fn test_mm512_i32scatter_ps() { let mut arr = [0f32; 256]; #[rustfmt::skip] let index = _mm512_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112, @@ -51507,9 +51513,7 @@ mod tests { 1., 2., 3., 4., 5., 6., 7., 8., 9., 10., 11., 12., 13., 14., 15., 16., ); // A multiplier of 4 is word-addressing - unsafe { - _mm512_i32scatter_ps::<4>(arr.as_mut_ptr(), index, src); - } + _mm512_i32scatter_ps::<4>(arr.as_mut_ptr(), index, src); let mut expected = [0f32; 256]; for i in 0..16 { expected[i * 16] = (i + 1) as f32; @@ -51518,7 +51522,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32scatter_ps() { + unsafe fn test_mm512_mask_i32scatter_ps() { let mut arr = [0f32; 256]; let mask = 0b10101010_10101010; #[rustfmt::skip] @@ -51528,9 +51532,7 @@ mod tests { 1., 2., 3., 4., 5., 6., 7., 8., 9., 10., 11., 12., 13., 14., 15., 16., ); // A multiplier of 4 is word-addressing - unsafe { - _mm512_mask_i32scatter_ps::<4>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i32scatter_ps::<4>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0f32; 256]; for i in 0..8 { expected[i * 32 + 16] = 2. * (i + 1) as f32; @@ -51539,7 +51541,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32scatter_epi32() { + unsafe fn test_mm512_i32scatter_epi32() { let mut arr = [0i32; 256]; #[rustfmt::skip] @@ -51547,9 +51549,7 @@ mod tests { 128, 144, 160, 176, 192, 208, 224, 240); let src = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); // A multiplier of 4 is word-addressing - unsafe { - _mm512_i32scatter_epi32::<4>(arr.as_mut_ptr(), index, src); - } + _mm512_i32scatter_epi32::<4>(arr.as_mut_ptr(), index, src); let mut expected = [0i32; 256]; for i in 0..16 { expected[i * 16] = (i + 1) as i32; @@ -51558,7 +51558,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32scatter_epi32() { + unsafe fn test_mm512_mask_i32scatter_epi32() { let mut arr = [0i32; 256]; let mask = 0b10101010_10101010; #[rustfmt::skip] @@ -51566,9 +51566,7 @@ mod tests { 128, 144, 160, 176, 192, 208, 224, 240); let src = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); // A multiplier of 4 is word-addressing - unsafe { - _mm512_mask_i32scatter_epi32::<4>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i32scatter_epi32::<4>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0i32; 256]; for i in 0..8 { expected[i * 32 + 16] = 2 * (i + 1) as i32; @@ -52852,31 +52850,29 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_loadu_pd() { + const unsafe fn test_mm512_loadu_pd() { let a = &[4., 3., 2., 5., 8., 9., 64., 50.]; let p = a.as_ptr(); - let r = unsafe { _mm512_loadu_pd(black_box(p)) }; + let r = _mm512_loadu_pd(black_box(p)); let e = _mm512_setr_pd(4., 3., 2., 5., 8., 9., 64., 50.); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_storeu_pd() { + const unsafe fn test_mm512_storeu_pd() { let a = _mm512_set1_pd(9.); let mut r = _mm512_undefined_pd(); - unsafe { - _mm512_storeu_pd(&mut r as *mut _ as *mut f64, a); - } + _mm512_storeu_pd(&mut r as *mut _ as *mut f64, a); assert_eq_m512d(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_loadu_ps() { + const unsafe fn test_mm512_loadu_ps() { let a = &[ 4., 3., 2., 5., 8., 9., 64., 50., -4., -3., -2., -5., -8., -9., -64., -50., ]; let p = a.as_ptr(); - let r = unsafe { _mm512_loadu_ps(black_box(p)) }; + let r = _mm512_loadu_ps(black_box(p)); let e = _mm512_setr_ps( 4., 3., 2., 5., 8., 9., 64., 50., -4., -3., -2., -5., -8., -9., -64., -50., ); @@ -52884,38 +52880,36 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_storeu_ps() { + const unsafe fn test_mm512_storeu_ps() { let a = _mm512_set1_ps(9.); let mut r = _mm512_undefined_ps(); - unsafe { - _mm512_storeu_ps(&mut r as *mut _ as *mut f32, a); - } + _mm512_storeu_ps(&mut r as *mut _ as *mut f32, a); assert_eq_m512(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_loadu_epi32() { + const unsafe fn test_mm512_mask_loadu_epi32() { let src = _mm512_set1_epi32(42); let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_loadu_epi32(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_epi32(src, m, black_box(p)); let e = _mm512_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_loadu_epi32() { + const unsafe fn test_mm512_maskz_loadu_epi32() { let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_loadu_epi32(m, black_box(p)) }; + let r = _mm512_maskz_loadu_epi32(m, black_box(p)); let e = _mm512_setr_epi32(0, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_load_epi32() { + const unsafe fn test_mm512_mask_load_epi32() { #[repr(align(64))] struct Align { data: [i32; 16], // 64 bytes @@ -52926,13 +52920,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_load_epi32(src, m, black_box(p)) }; + let r = _mm512_mask_load_epi32(src, m, black_box(p)); let e = _mm512_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_load_epi32() { + const unsafe fn test_mm512_maskz_load_epi32() { #[repr(align(64))] struct Align { data: [i32; 16], // 64 bytes @@ -52942,25 +52936,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_load_epi32(m, black_box(p)) }; + let r = _mm512_maskz_load_epi32(m, black_box(p)); let e = _mm512_setr_epi32(0, 2, 0, 4, 0, 0, 7, 8, 0, 0, 0, 12, 0, 14, 15, 16); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_storeu_epi32() { + const unsafe fn test_mm512_mask_storeu_epi32() { let mut r = [42_i32; 16]; let a = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); let m = 0b11101000_11001010; - unsafe { - _mm512_mask_storeu_epi32(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_epi32(r.as_mut_ptr(), m, a); let e = _mm512_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16); - assert_eq_m512i(unsafe { _mm512_loadu_epi32(r.as_ptr()) }, e); + assert_eq_m512i(_mm512_loadu_epi32(r.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_store_epi32() { + const unsafe fn test_mm512_mask_store_epi32() { #[repr(align(64))] struct Align { data: [i32; 16], @@ -52968,36 +52960,34 @@ mod tests { let mut r = Align { data: [42; 16] }; let a = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); let m = 0b11101000_11001010; - unsafe { - _mm512_mask_store_epi32(r.data.as_mut_ptr(), m, a); - } + _mm512_mask_store_epi32(r.data.as_mut_ptr(), m, a); let e = _mm512_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8, 42, 42, 42, 12, 42, 14, 15, 16); - assert_eq_m512i(unsafe { _mm512_load_epi32(r.data.as_ptr()) }, e); + assert_eq_m512i(_mm512_load_epi32(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_loadu_epi64() { + const unsafe fn test_mm512_mask_loadu_epi64() { let src = _mm512_set1_epi64(42); let a = &[1_i64, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_mask_loadu_epi64(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_epi64(src, m, black_box(p)); let e = _mm512_setr_epi64(42, 2, 42, 4, 42, 42, 7, 8); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_loadu_epi64() { + const unsafe fn test_mm512_maskz_loadu_epi64() { let a = &[1_i64, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_maskz_loadu_epi64(m, black_box(p)) }; + let r = _mm512_maskz_loadu_epi64(m, black_box(p)); let e = _mm512_setr_epi64(0, 2, 0, 4, 0, 0, 7, 8); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_load_epi64() { + const unsafe fn test_mm512_mask_load_epi64() { #[repr(align(64))] struct Align { data: [i64; 8], // 64 bytes @@ -53008,13 +52998,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_mask_load_epi64(src, m, black_box(p)) }; + let r = _mm512_mask_load_epi64(src, m, black_box(p)); let e = _mm512_setr_epi64(42, 2, 42, 4, 42, 42, 7, 8); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_load_epi64() { + const unsafe fn test_mm512_maskz_load_epi64() { #[repr(align(64))] struct Align { data: [i64; 8], // 64 bytes @@ -53024,25 +53014,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_maskz_load_epi64(m, black_box(p)) }; + let r = _mm512_maskz_load_epi64(m, black_box(p)); let e = _mm512_setr_epi64(0, 2, 0, 4, 0, 0, 7, 8); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_storeu_epi64() { + const unsafe fn test_mm512_mask_storeu_epi64() { let mut r = [42_i64; 8]; let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); let m = 0b11001010; - unsafe { - _mm512_mask_storeu_epi64(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_epi64(r.as_mut_ptr(), m, a); let e = _mm512_setr_epi64(42, 2, 42, 4, 42, 42, 7, 8); - assert_eq_m512i(unsafe { _mm512_loadu_epi64(r.as_ptr()) }, e); + assert_eq_m512i(_mm512_loadu_epi64(r.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_store_epi64() { + const unsafe fn test_mm512_mask_store_epi64() { #[repr(align(64))] struct Align { data: [i64; 8], @@ -53051,15 +53039,13 @@ mod tests { let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); let m = 0b11001010; let p = r.data.as_mut_ptr(); - unsafe { - _mm512_mask_store_epi64(p, m, a); - } + _mm512_mask_store_epi64(p, m, a); let e = _mm512_setr_epi64(42, 2, 42, 4, 42, 42, 7, 8); - assert_eq_m512i(unsafe { _mm512_load_epi64(r.data.as_ptr()) }, e); + assert_eq_m512i(_mm512_load_epi64(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_loadu_ps() { + const unsafe fn test_mm512_mask_loadu_ps() { let src = _mm512_set1_ps(42.0); let a = &[ 1.0_f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, @@ -53067,7 +53053,7 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_loadu_ps(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_ps(src, m, black_box(p)); let e = _mm512_setr_ps( 42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0, 42.0, 42.0, 42.0, 12.0, 42.0, 14.0, 15.0, 16.0, @@ -53076,14 +53062,14 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_loadu_ps() { + const unsafe fn test_mm512_maskz_loadu_ps() { let a = &[ 1.0_f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_loadu_ps(m, black_box(p)) }; + let r = _mm512_maskz_loadu_ps(m, black_box(p)); let e = _mm512_setr_ps( 0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0, 0.0, 0.0, 0.0, 12.0, 0.0, 14.0, 15.0, 16.0, ); @@ -53091,7 +53077,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_load_ps() { + const unsafe fn test_mm512_mask_load_ps() { #[repr(align(64))] struct Align { data: [f32; 16], // 64 bytes @@ -53105,7 +53091,7 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_load_ps(src, m, black_box(p)) }; + let r = _mm512_mask_load_ps(src, m, black_box(p)); let e = _mm512_setr_ps( 42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0, 42.0, 42.0, 42.0, 12.0, 42.0, 14.0, 15.0, 16.0, @@ -53114,7 +53100,7 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_load_ps() { + const unsafe fn test_mm512_maskz_load_ps() { #[repr(align(64))] struct Align { data: [f32; 16], // 64 bytes @@ -53127,7 +53113,7 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_load_ps(m, black_box(p)) }; + let r = _mm512_maskz_load_ps(m, black_box(p)); let e = _mm512_setr_ps( 0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0, 0.0, 0.0, 0.0, 12.0, 0.0, 14.0, 15.0, 16.0, ); @@ -53135,24 +53121,22 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_storeu_ps() { + const unsafe fn test_mm512_mask_storeu_ps() { let mut r = [42_f32; 16]; let a = _mm512_setr_ps( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); let m = 0b11101000_11001010; - unsafe { - _mm512_mask_storeu_ps(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_ps(r.as_mut_ptr(), m, a); let e = _mm512_setr_ps( 42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0, 42.0, 42.0, 42.0, 12.0, 42.0, 14.0, 15.0, 16.0, ); - assert_eq_m512(unsafe { _mm512_loadu_ps(r.as_ptr()) }, e); + assert_eq_m512(_mm512_loadu_ps(r.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_store_ps() { + const unsafe fn test_mm512_mask_store_ps() { #[repr(align(64))] struct Align { data: [f32; 16], @@ -53162,39 +53146,37 @@ mod tests { 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); let m = 0b11101000_11001010; - unsafe { - _mm512_mask_store_ps(r.data.as_mut_ptr(), m, a); - } + _mm512_mask_store_ps(r.data.as_mut_ptr(), m, a); let e = _mm512_setr_ps( 42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0, 42.0, 42.0, 42.0, 12.0, 42.0, 14.0, 15.0, 16.0, ); - assert_eq_m512(unsafe { _mm512_load_ps(r.data.as_ptr()) }, e); + assert_eq_m512(_mm512_load_ps(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_loadu_pd() { + const unsafe fn test_mm512_mask_loadu_pd() { let src = _mm512_set1_pd(42.0); let a = &[1.0_f64, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_mask_loadu_pd(src, m, black_box(p)) }; + let r = _mm512_mask_loadu_pd(src, m, black_box(p)); let e = _mm512_setr_pd(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_loadu_pd() { + const unsafe fn test_mm512_maskz_loadu_pd() { let a = &[1.0_f64, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_maskz_loadu_pd(m, black_box(p)) }; + let r = _mm512_maskz_loadu_pd(m, black_box(p)); let e = _mm512_setr_pd(0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_load_pd() { + const unsafe fn test_mm512_mask_load_pd() { #[repr(align(64))] struct Align { data: [f64; 8], // 64 bytes @@ -53205,13 +53187,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_mask_load_pd(src, m, black_box(p)) }; + let r = _mm512_mask_load_pd(src, m, black_box(p)); let e = _mm512_setr_pd(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_maskz_load_pd() { + const unsafe fn test_mm512_maskz_load_pd() { #[repr(align(64))] struct Align { data: [f64; 8], // 64 bytes @@ -53221,25 +53203,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm512_maskz_load_pd(m, black_box(p)) }; + let r = _mm512_maskz_load_pd(m, black_box(p)); let e = _mm512_setr_pd(0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_storeu_pd() { + const unsafe fn test_mm512_mask_storeu_pd() { let mut r = [42_f64; 8]; let a = _mm512_setr_pd(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let m = 0b11001010; - unsafe { - _mm512_mask_storeu_pd(r.as_mut_ptr(), m, a); - } + _mm512_mask_storeu_pd(r.as_mut_ptr(), m, a); let e = _mm512_setr_pd(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); - assert_eq_m512d(unsafe { _mm512_loadu_pd(r.as_ptr()) }, e); + assert_eq_m512d(_mm512_loadu_pd(r.as_ptr()), e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_mask_store_pd() { + const unsafe fn test_mm512_mask_store_pd() { #[repr(align(64))] struct Align { data: [f64; 8], @@ -53247,36 +53227,34 @@ mod tests { let mut r = Align { data: [42.0; 8] }; let a = _mm512_setr_pd(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let m = 0b11001010; - unsafe { - _mm512_mask_store_pd(r.data.as_mut_ptr(), m, a); - } + _mm512_mask_store_pd(r.data.as_mut_ptr(), m, a); let e = _mm512_setr_pd(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); - assert_eq_m512d(unsafe { _mm512_load_pd(r.data.as_ptr()) }, e); + assert_eq_m512d(_mm512_load_pd(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_loadu_epi32() { + const unsafe fn test_mm256_mask_loadu_epi32() { let src = _mm256_set1_epi32(42); let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_mask_loadu_epi32(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_epi32(src, m, black_box(p)); let e = _mm256_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_loadu_epi32() { + const unsafe fn test_mm256_maskz_loadu_epi32() { let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_maskz_loadu_epi32(m, black_box(p)) }; + let r = _mm256_maskz_loadu_epi32(m, black_box(p)); let e = _mm256_setr_epi32(0, 2, 0, 4, 0, 0, 7, 8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_load_epi32() { + const unsafe fn test_mm256_mask_load_epi32() { #[repr(align(32))] struct Align { data: [i32; 8], // 32 bytes @@ -53287,13 +53265,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_mask_load_epi32(src, m, black_box(p)) }; + let r = _mm256_mask_load_epi32(src, m, black_box(p)); let e = _mm256_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_load_epi32() { + const unsafe fn test_mm256_maskz_load_epi32() { #[repr(align(32))] struct Align { data: [i32; 8], // 32 bytes @@ -53303,25 +53281,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_maskz_load_epi32(m, black_box(p)) }; + let r = _mm256_maskz_load_epi32(m, black_box(p)); let e = _mm256_setr_epi32(0, 2, 0, 4, 0, 0, 7, 8); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_storeu_epi32() { + const unsafe fn test_mm256_mask_storeu_epi32() { let mut r = [42_i32; 8]; let a = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8); let m = 0b11001010; - unsafe { - _mm256_mask_storeu_epi32(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_epi32(r.as_mut_ptr(), m, a); let e = _mm256_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8); - assert_eq_m256i(unsafe { _mm256_loadu_epi32(r.as_ptr()) }, e); + assert_eq_m256i(_mm256_loadu_epi32(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_store_epi32() { + const unsafe fn test_mm256_mask_store_epi32() { #[repr(align(64))] struct Align { data: [i32; 8], @@ -53329,36 +53305,34 @@ mod tests { let mut r = Align { data: [42; 8] }; let a = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8); let m = 0b11001010; - unsafe { - _mm256_mask_store_epi32(r.data.as_mut_ptr(), m, a); - } + _mm256_mask_store_epi32(r.data.as_mut_ptr(), m, a); let e = _mm256_setr_epi32(42, 2, 42, 4, 42, 42, 7, 8); - assert_eq_m256i(unsafe { _mm256_load_epi32(r.data.as_ptr()) }, e); + assert_eq_m256i(_mm256_load_epi32(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_loadu_epi64() { + const unsafe fn test_mm256_mask_loadu_epi64() { let src = _mm256_set1_epi64x(42); let a = &[1_i64, 2, 3, 4]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_mask_loadu_epi64(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_epi64(src, m, black_box(p)); let e = _mm256_setr_epi64x(42, 2, 42, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_loadu_epi64() { + const unsafe fn test_mm256_maskz_loadu_epi64() { let a = &[1_i64, 2, 3, 4]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_maskz_loadu_epi64(m, black_box(p)) }; + let r = _mm256_maskz_loadu_epi64(m, black_box(p)); let e = _mm256_setr_epi64x(0, 2, 0, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_load_epi64() { + const unsafe fn test_mm256_mask_load_epi64() { #[repr(align(32))] struct Align { data: [i64; 4], // 32 bytes @@ -53369,13 +53343,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_mask_load_epi64(src, m, black_box(p)) }; + let r = _mm256_mask_load_epi64(src, m, black_box(p)); let e = _mm256_setr_epi64x(42, 2, 42, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_load_epi64() { + const unsafe fn test_mm256_maskz_load_epi64() { #[repr(align(32))] struct Align { data: [i64; 4], // 32 bytes @@ -53385,25 +53359,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_maskz_load_epi64(m, black_box(p)) }; + let r = _mm256_maskz_load_epi64(m, black_box(p)); let e = _mm256_setr_epi64x(0, 2, 0, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_storeu_epi64() { + const unsafe fn test_mm256_mask_storeu_epi64() { let mut r = [42_i64; 4]; let a = _mm256_setr_epi64x(1, 2, 3, 4); let m = 0b1010; - unsafe { - _mm256_mask_storeu_epi64(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_epi64(r.as_mut_ptr(), m, a); let e = _mm256_setr_epi64x(42, 2, 42, 4); - assert_eq_m256i(unsafe { _mm256_loadu_epi64(r.as_ptr()) }, e); + assert_eq_m256i(_mm256_loadu_epi64(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_store_epi64() { + const unsafe fn test_mm256_mask_store_epi64() { #[repr(align(32))] struct Align { data: [i64; 4], @@ -53411,36 +53383,34 @@ mod tests { let mut r = Align { data: [42; 4] }; let a = _mm256_setr_epi64x(1, 2, 3, 4); let m = 0b1010; - unsafe { - _mm256_mask_store_epi64(r.data.as_mut_ptr(), m, a); - } + _mm256_mask_store_epi64(r.data.as_mut_ptr(), m, a); let e = _mm256_setr_epi64x(42, 2, 42, 4); - assert_eq_m256i(unsafe { _mm256_load_epi64(r.data.as_ptr()) }, e); + assert_eq_m256i(_mm256_load_epi64(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_loadu_ps() { + const unsafe fn test_mm256_mask_loadu_ps() { let src = _mm256_set1_ps(42.0); let a = &[1.0_f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_mask_loadu_ps(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_ps(src, m, black_box(p)); let e = _mm256_setr_ps(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_loadu_ps() { + const unsafe fn test_mm256_maskz_loadu_ps() { let a = &[1.0_f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; let p = a.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_maskz_loadu_ps(m, black_box(p)) }; + let r = _mm256_maskz_loadu_ps(m, black_box(p)); let e = _mm256_setr_ps(0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_load_ps() { + const unsafe fn test_mm256_mask_load_ps() { #[repr(align(32))] struct Align { data: [f32; 8], // 32 bytes @@ -53451,13 +53421,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_mask_load_ps(src, m, black_box(p)) }; + let r = _mm256_mask_load_ps(src, m, black_box(p)); let e = _mm256_setr_ps(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_load_ps() { + const unsafe fn test_mm256_maskz_load_ps() { #[repr(align(32))] struct Align { data: [f32; 8], // 32 bytes @@ -53467,25 +53437,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b11001010; - let r = unsafe { _mm256_maskz_load_ps(m, black_box(p)) }; + let r = _mm256_maskz_load_ps(m, black_box(p)); let e = _mm256_setr_ps(0.0, 2.0, 0.0, 4.0, 0.0, 0.0, 7.0, 8.0); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_storeu_ps() { + const unsafe fn test_mm256_mask_storeu_ps() { let mut r = [42_f32; 8]; let a = _mm256_setr_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let m = 0b11001010; - unsafe { - _mm256_mask_storeu_ps(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_ps(r.as_mut_ptr(), m, a); let e = _mm256_setr_ps(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); - assert_eq_m256(unsafe { _mm256_loadu_ps(r.as_ptr()) }, e); + assert_eq_m256(_mm256_loadu_ps(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_store_ps() { + const unsafe fn test_mm256_mask_store_ps() { #[repr(align(32))] struct Align { data: [f32; 8], @@ -53493,36 +53461,34 @@ mod tests { let mut r = Align { data: [42.0; 8] }; let a = _mm256_setr_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let m = 0b11001010; - unsafe { - _mm256_mask_store_ps(r.data.as_mut_ptr(), m, a); - } + _mm256_mask_store_ps(r.data.as_mut_ptr(), m, a); let e = _mm256_setr_ps(42.0, 2.0, 42.0, 4.0, 42.0, 42.0, 7.0, 8.0); - assert_eq_m256(unsafe { _mm256_load_ps(r.data.as_ptr()) }, e); + assert_eq_m256(_mm256_load_ps(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_loadu_pd() { + const unsafe fn test_mm256_mask_loadu_pd() { let src = _mm256_set1_pd(42.0); let a = &[1.0_f64, 2.0, 3.0, 4.0]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_mask_loadu_pd(src, m, black_box(p)) }; + let r = _mm256_mask_loadu_pd(src, m, black_box(p)); let e = _mm256_setr_pd(42.0, 2.0, 42.0, 4.0); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_loadu_pd() { + const unsafe fn test_mm256_maskz_loadu_pd() { let a = &[1.0_f64, 2.0, 3.0, 4.0]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_maskz_loadu_pd(m, black_box(p)) }; + let r = _mm256_maskz_loadu_pd(m, black_box(p)); let e = _mm256_setr_pd(0.0, 2.0, 0.0, 4.0); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_load_pd() { + const unsafe fn test_mm256_mask_load_pd() { #[repr(align(32))] struct Align { data: [f64; 4], // 32 bytes @@ -53533,13 +53499,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_mask_load_pd(src, m, black_box(p)) }; + let r = _mm256_mask_load_pd(src, m, black_box(p)); let e = _mm256_setr_pd(42.0, 2.0, 42.0, 4.0); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_maskz_load_pd() { + const unsafe fn test_mm256_maskz_load_pd() { #[repr(align(32))] struct Align { data: [f64; 4], // 32 bytes @@ -53549,25 +53515,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm256_maskz_load_pd(m, black_box(p)) }; + let r = _mm256_maskz_load_pd(m, black_box(p)); let e = _mm256_setr_pd(0.0, 2.0, 0.0, 4.0); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_storeu_pd() { + const unsafe fn test_mm256_mask_storeu_pd() { let mut r = [42_f64; 4]; let a = _mm256_setr_pd(1.0, 2.0, 3.0, 4.0); let m = 0b1010; - unsafe { - _mm256_mask_storeu_pd(r.as_mut_ptr(), m, a); - } + _mm256_mask_storeu_pd(r.as_mut_ptr(), m, a); let e = _mm256_setr_pd(42.0, 2.0, 42.0, 4.0); - assert_eq_m256d(unsafe { _mm256_loadu_pd(r.as_ptr()) }, e); + assert_eq_m256d(_mm256_loadu_pd(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_mask_store_pd() { + const unsafe fn test_mm256_mask_store_pd() { #[repr(align(32))] struct Align { data: [f64; 4], @@ -53575,36 +53539,34 @@ mod tests { let mut r = Align { data: [42.0; 4] }; let a = _mm256_setr_pd(1.0, 2.0, 3.0, 4.0); let m = 0b1010; - unsafe { - _mm256_mask_store_pd(r.data.as_mut_ptr(), m, a); - } + _mm256_mask_store_pd(r.data.as_mut_ptr(), m, a); let e = _mm256_setr_pd(42.0, 2.0, 42.0, 4.0); - assert_eq_m256d(unsafe { _mm256_load_pd(r.data.as_ptr()) }, e); + assert_eq_m256d(_mm256_load_pd(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_loadu_epi32() { + const unsafe fn test_mm_mask_loadu_epi32() { let src = _mm_set1_epi32(42); let a = &[1_i32, 2, 3, 4]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_mask_loadu_epi32(src, m, black_box(p)) }; + let r = _mm_mask_loadu_epi32(src, m, black_box(p)); let e = _mm_setr_epi32(42, 2, 42, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_loadu_epi32() { + const unsafe fn test_mm_maskz_loadu_epi32() { let a = &[1_i32, 2, 3, 4]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_maskz_loadu_epi32(m, black_box(p)) }; + let r = _mm_maskz_loadu_epi32(m, black_box(p)); let e = _mm_setr_epi32(0, 2, 0, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_load_epi32() { + const unsafe fn test_mm_mask_load_epi32() { #[repr(align(16))] struct Align { data: [i32; 4], // 32 bytes @@ -53615,13 +53577,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_mask_load_epi32(src, m, black_box(p)) }; + let r = _mm_mask_load_epi32(src, m, black_box(p)); let e = _mm_setr_epi32(42, 2, 42, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_load_epi32() { + const unsafe fn test_mm_maskz_load_epi32() { #[repr(align(16))] struct Align { data: [i32; 4], // 16 bytes @@ -53631,25 +53593,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_maskz_load_epi32(m, black_box(p)) }; + let r = _mm_maskz_load_epi32(m, black_box(p)); let e = _mm_setr_epi32(0, 2, 0, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_storeu_epi32() { + const unsafe fn test_mm_mask_storeu_epi32() { let mut r = [42_i32; 4]; let a = _mm_setr_epi32(1, 2, 3, 4); let m = 0b1010; - unsafe { - _mm_mask_storeu_epi32(r.as_mut_ptr(), m, a); - } + _mm_mask_storeu_epi32(r.as_mut_ptr(), m, a); let e = _mm_setr_epi32(42, 2, 42, 4); - assert_eq_m128i(unsafe { _mm_loadu_epi32(r.as_ptr()) }, e); + assert_eq_m128i(_mm_loadu_epi32(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_store_epi32() { + const unsafe fn test_mm_mask_store_epi32() { #[repr(align(16))] struct Align { data: [i32; 4], // 16 bytes @@ -53657,36 +53617,34 @@ mod tests { let mut r = Align { data: [42; 4] }; let a = _mm_setr_epi32(1, 2, 3, 4); let m = 0b1010; - unsafe { - _mm_mask_store_epi32(r.data.as_mut_ptr(), m, a); - } + _mm_mask_store_epi32(r.data.as_mut_ptr(), m, a); let e = _mm_setr_epi32(42, 2, 42, 4); - assert_eq_m128i(unsafe { _mm_load_epi32(r.data.as_ptr()) }, e); + assert_eq_m128i(_mm_load_epi32(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_loadu_epi64() { + const unsafe fn test_mm_mask_loadu_epi64() { let src = _mm_set1_epi64x(42); let a = &[1_i64, 2]; let p = a.as_ptr(); let m = 0b10; - let r = unsafe { _mm_mask_loadu_epi64(src, m, black_box(p)) }; + let r = _mm_mask_loadu_epi64(src, m, black_box(p)); let e = _mm_setr_epi64x(42, 2); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_loadu_epi64() { + const unsafe fn test_mm_maskz_loadu_epi64() { let a = &[1_i64, 2]; let p = a.as_ptr(); let m = 0b10; - let r = unsafe { _mm_maskz_loadu_epi64(m, black_box(p)) }; + let r = _mm_maskz_loadu_epi64(m, black_box(p)); let e = _mm_setr_epi64x(0, 2); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_load_epi64() { + const unsafe fn test_mm_mask_load_epi64() { #[repr(align(16))] struct Align { data: [i64; 2], // 16 bytes @@ -53695,13 +53653,13 @@ mod tests { let a = Align { data: [1_i64, 2] }; let p = a.data.as_ptr(); let m = 0b10; - let r = unsafe { _mm_mask_load_epi64(src, m, black_box(p)) }; + let r = _mm_mask_load_epi64(src, m, black_box(p)); let e = _mm_setr_epi64x(42, 2); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_load_epi64() { + const unsafe fn test_mm_maskz_load_epi64() { #[repr(align(16))] struct Align { data: [i64; 2], // 16 bytes @@ -53709,25 +53667,23 @@ mod tests { let a = Align { data: [1_i64, 2] }; let p = a.data.as_ptr(); let m = 0b10; - let r = unsafe { _mm_maskz_load_epi64(m, black_box(p)) }; + let r = _mm_maskz_load_epi64(m, black_box(p)); let e = _mm_setr_epi64x(0, 2); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_storeu_epi64() { + const unsafe fn test_mm_mask_storeu_epi64() { let mut r = [42_i64; 2]; let a = _mm_setr_epi64x(1, 2); let m = 0b10; - unsafe { - _mm_mask_storeu_epi64(r.as_mut_ptr(), m, a); - } + _mm_mask_storeu_epi64(r.as_mut_ptr(), m, a); let e = _mm_setr_epi64x(42, 2); - assert_eq_m128i(unsafe { _mm_loadu_epi64(r.as_ptr()) }, e); + assert_eq_m128i(_mm_loadu_epi64(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_store_epi64() { + const unsafe fn test_mm_mask_store_epi64() { #[repr(align(16))] struct Align { data: [i64; 2], // 16 bytes @@ -53735,36 +53691,34 @@ mod tests { let mut r = Align { data: [42; 2] }; let a = _mm_setr_epi64x(1, 2); let m = 0b10; - unsafe { - _mm_mask_store_epi64(r.data.as_mut_ptr(), m, a); - } + _mm_mask_store_epi64(r.data.as_mut_ptr(), m, a); let e = _mm_setr_epi64x(42, 2); - assert_eq_m128i(unsafe { _mm_load_epi64(r.data.as_ptr()) }, e); + assert_eq_m128i(_mm_load_epi64(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_loadu_ps() { + const unsafe fn test_mm_mask_loadu_ps() { let src = _mm_set1_ps(42.0); let a = &[1.0_f32, 2.0, 3.0, 4.0]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_mask_loadu_ps(src, m, black_box(p)) }; + let r = _mm_mask_loadu_ps(src, m, black_box(p)); let e = _mm_setr_ps(42.0, 2.0, 42.0, 4.0); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_loadu_ps() { + const unsafe fn test_mm_maskz_loadu_ps() { let a = &[1.0_f32, 2.0, 3.0, 4.0]; let p = a.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_maskz_loadu_ps(m, black_box(p)) }; + let r = _mm_maskz_loadu_ps(m, black_box(p)); let e = _mm_setr_ps(0.0, 2.0, 0.0, 4.0); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_load_ps() { + const unsafe fn test_mm_mask_load_ps() { #[repr(align(16))] struct Align { data: [f32; 4], // 16 bytes @@ -53775,13 +53729,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_mask_load_ps(src, m, black_box(p)) }; + let r = _mm_mask_load_ps(src, m, black_box(p)); let e = _mm_setr_ps(42.0, 2.0, 42.0, 4.0); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_load_ps() { + const unsafe fn test_mm_maskz_load_ps() { #[repr(align(16))] struct Align { data: [f32; 4], // 16 bytes @@ -53791,25 +53745,23 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b1010; - let r = unsafe { _mm_maskz_load_ps(m, black_box(p)) }; + let r = _mm_maskz_load_ps(m, black_box(p)); let e = _mm_setr_ps(0.0, 2.0, 0.0, 4.0); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_storeu_ps() { + const unsafe fn test_mm_mask_storeu_ps() { let mut r = [42_f32; 4]; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); let m = 0b1010; - unsafe { - _mm_mask_storeu_ps(r.as_mut_ptr(), m, a); - } + _mm_mask_storeu_ps(r.as_mut_ptr(), m, a); let e = _mm_setr_ps(42.0, 2.0, 42.0, 4.0); - assert_eq_m128(unsafe { _mm_loadu_ps(r.as_ptr()) }, e); + assert_eq_m128(_mm_loadu_ps(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_store_ps() { + const unsafe fn test_mm_mask_store_ps() { #[repr(align(16))] struct Align { data: [f32; 4], // 16 bytes @@ -53817,36 +53769,34 @@ mod tests { let mut r = Align { data: [42.0; 4] }; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); let m = 0b1010; - unsafe { - _mm_mask_store_ps(r.data.as_mut_ptr(), m, a); - } + _mm_mask_store_ps(r.data.as_mut_ptr(), m, a); let e = _mm_setr_ps(42.0, 2.0, 42.0, 4.0); - assert_eq_m128(unsafe { _mm_load_ps(r.data.as_ptr()) }, e); + assert_eq_m128(_mm_load_ps(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_loadu_pd() { + const unsafe fn test_mm_mask_loadu_pd() { let src = _mm_set1_pd(42.0); let a = &[1.0_f64, 2.0]; let p = a.as_ptr(); let m = 0b10; - let r = unsafe { _mm_mask_loadu_pd(src, m, black_box(p)) }; + let r = _mm_mask_loadu_pd(src, m, black_box(p)); let e = _mm_setr_pd(42.0, 2.0); assert_eq_m128d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_loadu_pd() { + const unsafe fn test_mm_maskz_loadu_pd() { let a = &[1.0_f64, 2.0]; let p = a.as_ptr(); let m = 0b10; - let r = unsafe { _mm_maskz_loadu_pd(m, black_box(p)) }; + let r = _mm_maskz_loadu_pd(m, black_box(p)); let e = _mm_setr_pd(0.0, 2.0); assert_eq_m128d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_load_pd() { + const unsafe fn test_mm_mask_load_pd() { #[repr(align(16))] struct Align { data: [f64; 2], // 16 bytes @@ -53857,13 +53807,13 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b10; - let r = unsafe { _mm_mask_load_pd(src, m, black_box(p)) }; + let r = _mm_mask_load_pd(src, m, black_box(p)); let e = _mm_setr_pd(42.0, 2.0); assert_eq_m128d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_maskz_load_pd() { + const unsafe fn test_mm_maskz_load_pd() { #[repr(align(16))] struct Align { data: [f64; 2], // 16 bytes @@ -53873,79 +53823,77 @@ mod tests { }; let p = a.data.as_ptr(); let m = 0b10; - let r = unsafe { _mm_maskz_load_pd(m, black_box(p)) }; + let r = _mm_maskz_load_pd(m, black_box(p)); let e = _mm_setr_pd(0.0, 2.0); assert_eq_m128d(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm_mask_load_ss() { + unsafe fn test_mm_mask_load_ss() { #[repr(align(16))] struct Align { data: f32, } let src = _mm_set_ss(2.0); let mem = Align { data: 1.0 }; - let r = unsafe { _mm_mask_load_ss(src, 0b1, &mem.data) }; + let r = _mm_mask_load_ss(src, 0b1, &mem.data); assert_eq_m128(r, _mm_set_ss(1.0)); - let r = unsafe { _mm_mask_load_ss(src, 0b0, &mem.data) }; + let r = _mm_mask_load_ss(src, 0b0, &mem.data); assert_eq_m128(r, _mm_set_ss(2.0)); } #[simd_test(enable = "avx512f")] - fn test_mm_maskz_load_ss() { + unsafe fn test_mm_maskz_load_ss() { #[repr(align(16))] struct Align { data: f32, } let mem = Align { data: 1.0 }; - let r = unsafe { _mm_maskz_load_ss(0b1, &mem.data) }; + let r = _mm_maskz_load_ss(0b1, &mem.data); assert_eq_m128(r, _mm_set_ss(1.0)); - let r = unsafe { _mm_maskz_load_ss(0b0, &mem.data) }; + let r = _mm_maskz_load_ss(0b0, &mem.data); assert_eq_m128(r, _mm_set_ss(0.0)); } #[simd_test(enable = "avx512f")] - fn test_mm_mask_load_sd() { + unsafe fn test_mm_mask_load_sd() { #[repr(align(16))] struct Align { data: f64, } let src = _mm_set_sd(2.0); let mem = Align { data: 1.0 }; - let r = unsafe { _mm_mask_load_sd(src, 0b1, &mem.data) }; + let r = _mm_mask_load_sd(src, 0b1, &mem.data); assert_eq_m128d(r, _mm_set_sd(1.0)); - let r = unsafe { _mm_mask_load_sd(src, 0b0, &mem.data) }; + let r = _mm_mask_load_sd(src, 0b0, &mem.data); assert_eq_m128d(r, _mm_set_sd(2.0)); } #[simd_test(enable = "avx512f")] - fn test_mm_maskz_load_sd() { + unsafe fn test_mm_maskz_load_sd() { #[repr(align(16))] struct Align { data: f64, } let mem = Align { data: 1.0 }; - let r = unsafe { _mm_maskz_load_sd(0b1, &mem.data) }; + let r = _mm_maskz_load_sd(0b1, &mem.data); assert_eq_m128d(r, _mm_set_sd(1.0)); - let r = unsafe { _mm_maskz_load_sd(0b0, &mem.data) }; + let r = _mm_maskz_load_sd(0b0, &mem.data); assert_eq_m128d(r, _mm_set_sd(0.0)); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_storeu_pd() { + const unsafe fn test_mm_mask_storeu_pd() { let mut r = [42_f64; 2]; let a = _mm_setr_pd(1.0, 2.0); let m = 0b10; - unsafe { - _mm_mask_storeu_pd(r.as_mut_ptr(), m, a); - } + _mm_mask_storeu_pd(r.as_mut_ptr(), m, a); let e = _mm_setr_pd(42.0, 2.0); - assert_eq_m128d(unsafe { _mm_loadu_pd(r.as_ptr()) }, e); + assert_eq_m128d(_mm_loadu_pd(r.as_ptr()), e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_mask_store_pd() { + const unsafe fn test_mm_mask_store_pd() { #[repr(align(16))] struct Align { data: [f64; 2], // 16 bytes @@ -53953,46 +53901,36 @@ mod tests { let mut r = Align { data: [42.0; 2] }; let a = _mm_setr_pd(1.0, 2.0); let m = 0b10; - unsafe { - _mm_mask_store_pd(r.data.as_mut_ptr(), m, a); - } + _mm_mask_store_pd(r.data.as_mut_ptr(), m, a); let e = _mm_setr_pd(42.0, 2.0); - assert_eq_m128d(unsafe { _mm_load_pd(r.data.as_ptr()) }, e); + assert_eq_m128d(_mm_load_pd(r.data.as_ptr()), e); } #[simd_test(enable = "avx512f")] - fn test_mm_mask_store_ss() { + unsafe fn test_mm_mask_store_ss() { #[repr(align(16))] struct Align { data: f32, } let a = _mm_set_ss(2.0); let mut mem = Align { data: 1.0 }; - unsafe { - _mm_mask_store_ss(&mut mem.data, 0b1, a); - } + _mm_mask_store_ss(&mut mem.data, 0b1, a); assert_eq!(mem.data, 2.0); - unsafe { - _mm_mask_store_ss(&mut mem.data, 0b0, a); - } + _mm_mask_store_ss(&mut mem.data, 0b0, a); assert_eq!(mem.data, 2.0); } #[simd_test(enable = "avx512f")] - fn test_mm_mask_store_sd() { + unsafe fn test_mm_mask_store_sd() { #[repr(align(16))] struct Align { data: f64, } let a = _mm_set_sd(2.0); let mut mem = Align { data: 1.0 }; - unsafe { - _mm_mask_store_sd(&mut mem.data, 0b1, a); - } + _mm_mask_store_sd(&mut mem.data, 0b1, a); assert_eq!(mem.data, 2.0); - unsafe { - _mm_mask_store_sd(&mut mem.data, 0b0, a); - } + _mm_mask_store_sd(&mut mem.data, 0b0, a); assert_eq!(mem.data, 2.0); } @@ -57993,11 +57931,11 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_kortest_mask16_u8() { + const unsafe fn test_kortest_mask16_u8() { let a: __mmask16 = 0b0110100101101001; let b: __mmask16 = 0b1011011010110110; let mut all_ones: u8 = 0; - let r = unsafe { _kortest_mask16_u8(a, b, &mut all_ones) }; + let r = _kortest_mask16_u8(a, b, &mut all_ones); assert_eq!(r, 0); assert_eq!(all_ones, 1); } @@ -58059,20 +57997,18 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_load_mask16() { + const unsafe fn test_load_mask16() { let a: __mmask16 = 0b1001011011000011; - let r = unsafe { _load_mask16(&a) }; + let r = _load_mask16(&a); let e: __mmask16 = 0b1001011011000011; assert_eq!(r, e); } #[simd_test(enable = "avx512f")] - const fn test_store_mask16() { + const unsafe fn test_store_mask16() { let a: __mmask16 = 0b0110100100111100; let mut r = 0; - unsafe { - _store_mask16(&mut r, a); - } + _store_mask16(&mut r, a); let e: __mmask16 = 0b0110100100111100; assert_eq!(r, e); } @@ -58253,7 +58189,7 @@ mod tests { #[simd_test(enable = "avx512f")] #[cfg_attr(miri, ignore)] - fn test_mm512_stream_ps() { + unsafe fn test_mm512_stream_ps() { #[repr(align(64))] struct Memory { pub data: [f32; 16], // 64 bytes @@ -58261,9 +58197,7 @@ mod tests { let a = _mm512_set1_ps(7.0); let mut mem = Memory { data: [-1.0; 16] }; - unsafe { - _mm512_stream_ps(&mut mem.data[0] as *mut f32, a); - } + _mm512_stream_ps(&mut mem.data[0] as *mut f32, a); _mm_sfence(); for i in 0..16 { assert_eq!(mem.data[i], get_m512(a, i)); @@ -58272,7 +58206,7 @@ mod tests { #[simd_test(enable = "avx512f")] #[cfg_attr(miri, ignore)] - fn test_mm512_stream_pd() { + unsafe fn test_mm512_stream_pd() { #[repr(align(64))] struct Memory { pub data: [f64; 8], @@ -58280,9 +58214,7 @@ mod tests { let a = _mm512_set1_pd(7.0); let mut mem = Memory { data: [-1.0; 8] }; - unsafe { - _mm512_stream_pd(&mut mem.data[0] as *mut f64, a); - } + _mm512_stream_pd(&mut mem.data[0] as *mut f64, a); _mm_sfence(); for i in 0..8 { assert_eq!(mem.data[i], get_m512d(a, i)); @@ -58291,7 +58223,7 @@ mod tests { #[simd_test(enable = "avx512f")] #[cfg_attr(miri, ignore)] - fn test_mm512_stream_si512() { + unsafe fn test_mm512_stream_si512() { #[repr(align(64))] struct Memory { pub data: [i64; 8], @@ -58299,9 +58231,7 @@ mod tests { let a = _mm512_set1_epi32(7); let mut mem = Memory { data: [-1; 8] }; - unsafe { - _mm512_stream_si512(mem.data.as_mut_ptr().cast(), a); - } + _mm512_stream_si512(mem.data.as_mut_ptr().cast(), a); _mm_sfence(); for i in 0..8 { assert_eq!(mem.data[i], get_m512i(a, i)); @@ -58309,9 +58239,9 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_stream_load_si512() { + unsafe fn test_mm512_stream_load_si512() { let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8); - let r = unsafe { _mm512_stream_load_si512(core::ptr::addr_of!(a) as *const _) }; + let r = _mm512_stream_load_si512(core::ptr::addr_of!(a) as *const _); assert_eq_m512i(a, r); } @@ -58628,103 +58558,75 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_compressstoreu_epi32() { + unsafe fn test_mm512_mask_compressstoreu_epi32() { let a = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); let mut r = [0_i32; 16]; - unsafe { - _mm512_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i32; 16]); - unsafe { - _mm512_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b1111000011001010, a); - } + _mm512_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b1111000011001010, a); assert_eq!(&r, &[2, 4, 7, 8, 13, 14, 15, 16, 0, 0, 0, 0, 0, 0, 0, 0]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_compressstoreu_epi32() { + unsafe fn test_mm256_mask_compressstoreu_epi32() { let a = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8); let mut r = [0_i32; 8]; - unsafe { - _mm256_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i32; 8]); - unsafe { - _mm256_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b11001010, a); - } + _mm256_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b11001010, a); assert_eq!(&r, &[2, 4, 7, 8, 0, 0, 0, 0]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_compressstoreu_epi32() { + unsafe fn test_mm_mask_compressstoreu_epi32() { let a = _mm_setr_epi32(1, 2, 3, 4); let mut r = [0_i32; 4]; - unsafe { - _mm_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_epi32(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i32; 4]); - unsafe { - _mm_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b1011, a); - } + _mm_mask_compressstoreu_epi32(r.as_mut_ptr(), 0b1011, a); assert_eq!(&r, &[1, 2, 4, 0]); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_compressstoreu_epi64() { + unsafe fn test_mm512_mask_compressstoreu_epi64() { let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); let mut r = [0_i64; 8]; - unsafe { - _mm512_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i64; 8]); - unsafe { - _mm512_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b11001010, a); - } + _mm512_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b11001010, a); assert_eq!(&r, &[2, 4, 7, 8, 0, 0, 0, 0]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_compressstoreu_epi64() { + unsafe fn test_mm256_mask_compressstoreu_epi64() { let a = _mm256_setr_epi64x(1, 2, 3, 4); let mut r = [0_i64; 4]; - unsafe { - _mm256_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i64; 4]); - unsafe { - _mm256_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b1011, a); - } + _mm256_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b1011, a); assert_eq!(&r, &[1, 2, 4, 0]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_compressstoreu_epi64() { + unsafe fn test_mm_mask_compressstoreu_epi64() { let a = _mm_setr_epi64x(1, 2); let mut r = [0_i64; 2]; - unsafe { - _mm_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_epi64(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i64; 2]); - unsafe { - _mm_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b10, a); - } + _mm_mask_compressstoreu_epi64(r.as_mut_ptr(), 0b10, a); assert_eq!(&r, &[2, 0]); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_compressstoreu_ps() { + unsafe fn test_mm512_mask_compressstoreu_ps() { let a = _mm512_setr_ps( 1_f32, 2_f32, 3_f32, 4_f32, 5_f32, 6_f32, 7_f32, 8_f32, 9_f32, 10_f32, 11_f32, 12_f32, 13_f32, 14_f32, 15_f32, 16_f32, ); let mut r = [0_f32; 16]; - unsafe { - _mm512_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_f32; 16]); - unsafe { - _mm512_mask_compressstoreu_ps(r.as_mut_ptr(), 0b1111000011001010, a); - } + _mm512_mask_compressstoreu_ps(r.as_mut_ptr(), 0b1111000011001010, a); assert_eq!( &r, &[ @@ -58735,16 +58637,12 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_compressstoreu_ps() { + unsafe fn test_mm256_mask_compressstoreu_ps() { let a = _mm256_setr_ps(1_f32, 2_f32, 3_f32, 4_f32, 5_f32, 6_f32, 7_f32, 8_f32); let mut r = [0_f32; 8]; - unsafe { - _mm256_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_f32; 8]); - unsafe { - _mm256_mask_compressstoreu_ps(r.as_mut_ptr(), 0b11001010, a); - } + _mm256_mask_compressstoreu_ps(r.as_mut_ptr(), 0b11001010, a); assert_eq!( &r, &[2_f32, 4_f32, 7_f32, 8_f32, 0_f32, 0_f32, 0_f32, 0_f32] @@ -58752,63 +58650,47 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_compressstoreu_ps() { + unsafe fn test_mm_mask_compressstoreu_ps() { let a = _mm_setr_ps(1_f32, 2_f32, 3_f32, 4_f32); let mut r = [0.; 4]; - unsafe { - _mm_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_ps(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0.; 4]); - unsafe { - _mm_mask_compressstoreu_ps(r.as_mut_ptr(), 0b1011, a); - } + _mm_mask_compressstoreu_ps(r.as_mut_ptr(), 0b1011, a); assert_eq!(&r, &[1_f32, 2_f32, 4_f32, 0_f32]); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_compressstoreu_pd() { + unsafe fn test_mm512_mask_compressstoreu_pd() { let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.); let mut r = [0.; 8]; - unsafe { - _mm512_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0.; 8]); - unsafe { - _mm512_mask_compressstoreu_pd(r.as_mut_ptr(), 0b11001010, a); - } + _mm512_mask_compressstoreu_pd(r.as_mut_ptr(), 0b11001010, a); assert_eq!(&r, &[2., 4., 7., 8., 0., 0., 0., 0.]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_compressstoreu_pd() { + unsafe fn test_mm256_mask_compressstoreu_pd() { let a = _mm256_setr_pd(1., 2., 3., 4.); let mut r = [0.; 4]; - unsafe { - _mm256_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0.; 4]); - unsafe { - _mm256_mask_compressstoreu_pd(r.as_mut_ptr(), 0b1011, a); - } + _mm256_mask_compressstoreu_pd(r.as_mut_ptr(), 0b1011, a); assert_eq!(&r, &[1., 2., 4., 0.]); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_compressstoreu_pd() { + unsafe fn test_mm_mask_compressstoreu_pd() { let a = _mm_setr_pd(1., 2.); let mut r = [0.; 2]; - unsafe { - _mm_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_pd(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0.; 2]); - unsafe { - _mm_mask_compressstoreu_pd(r.as_mut_ptr(), 0b10, a); - } + _mm_mask_compressstoreu_pd(r.as_mut_ptr(), 0b10, a); assert_eq!(&r, &[2., 0.]); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_expand_epi32() { + unsafe fn test_mm512_mask_expand_epi32() { let src = _mm512_set1_epi32(200); let a = _mm512_set_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); let r = _mm512_mask_expand_epi32(src, 0, a); @@ -58944,135 +58826,109 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_loadu_epi32() { + const unsafe fn test_mm512_loadu_epi32() { let a = &[4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50]; let p = a.as_ptr(); - let r = unsafe { _mm512_loadu_epi32(black_box(p)) }; + let r = _mm512_loadu_epi32(black_box(p)); let e = _mm512_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_loadu_epi32() { + const unsafe fn test_mm256_loadu_epi32() { let a = &[4, 3, 2, 5, 8, 9, 64, 50]; let p = a.as_ptr(); - let r = unsafe { _mm256_loadu_epi32(black_box(p)) }; + let r = _mm256_loadu_epi32(black_box(p)); let e = _mm256_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_loadu_epi32() { + const unsafe fn test_mm_loadu_epi32() { let a = &[4, 3, 2, 5]; let p = a.as_ptr(); - let r = unsafe { _mm_loadu_epi32(black_box(p)) }; + let r = _mm_loadu_epi32(black_box(p)); let e = _mm_setr_epi32(4, 3, 2, 5); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtepi32_storeu_epi16() { + unsafe fn test_mm512_mask_cvtepi32_storeu_epi16() { let a = _mm512_set1_epi32(9); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111_11111111, a); - } + _mm512_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111_11111111, a); let e = _mm256_set1_epi16(9); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtepi32_storeu_epi16() { + unsafe fn test_mm256_mask_cvtepi32_storeu_epi16() { let a = _mm256_set1_epi32(9); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtepi32_storeu_epi16() { + unsafe fn test_mm_mask_cvtepi32_storeu_epi16() { let a = _mm_set1_epi32(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtsepi32_storeu_epi16() { + unsafe fn test_mm512_mask_cvtsepi32_storeu_epi16() { let a = _mm512_set1_epi32(i32::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtsepi32_storeu_epi16( - &mut r as *mut _ as *mut i16, - 0b11111111_11111111, - a, - ); - } + _mm512_mask_cvtsepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111_11111111, a); let e = _mm256_set1_epi16(i16::MAX); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtsepi32_storeu_epi16() { + unsafe fn test_mm256_mask_cvtsepi32_storeu_epi16() { let a = _mm256_set1_epi32(i32::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtsepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtsepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(i16::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtsepi32_storeu_epi16() { + unsafe fn test_mm_mask_cvtsepi32_storeu_epi16() { let a = _mm_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtsepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtsepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, i16::MAX, i16::MAX, i16::MAX, i16::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtusepi32_storeu_epi16() { + unsafe fn test_mm512_mask_cvtusepi32_storeu_epi16() { let a = _mm512_set1_epi32(i32::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtusepi32_storeu_epi16( - &mut r as *mut _ as *mut i16, - 0b11111111_11111111, - a, - ); - } + _mm512_mask_cvtusepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111_11111111, a); let e = _mm256_set1_epi16(u16::MAX as i16); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtusepi32_storeu_epi16() { + unsafe fn test_mm256_mask_cvtusepi32_storeu_epi16() { let a = _mm256_set1_epi32(i32::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm256_mask_cvtusepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtusepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(u16::MAX as i16); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtusepi32_storeu_epi16() { + unsafe fn test_mm_mask_cvtusepi32_storeu_epi16() { let a = _mm_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtusepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtusepi32_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16( 0, 0, @@ -59087,56 +58943,46 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtepi32_storeu_epi8() { + unsafe fn test_mm512_mask_cvtepi32_storeu_epi8() { let a = _mm512_set1_epi32(9); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm512_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtepi32_storeu_epi8() { + unsafe fn test_mm256_mask_cvtepi32_storeu_epi8() { let a = _mm256_set1_epi32(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 9, 9, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtepi32_storeu_epi8() { + unsafe fn test_mm_mask_cvtepi32_storeu_epi8() { let a = _mm_set1_epi32(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtsepi32_storeu_epi8() { + unsafe fn test_mm512_mask_cvtsepi32_storeu_epi8() { let a = _mm512_set1_epi32(i32::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm512_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(i8::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtsepi32_storeu_epi8() { + unsafe fn test_mm256_mask_cvtsepi32_storeu_epi8() { let a = _mm256_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -59148,12 +58994,10 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtsepi32_storeu_epi8() { + unsafe fn test_mm_mask_cvtsepi32_storeu_epi8() { let a = _mm_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtsepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -59165,23 +59009,19 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtusepi32_storeu_epi8() { + unsafe fn test_mm512_mask_cvtusepi32_storeu_epi8() { let a = _mm512_set1_epi32(i32::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); - } + _mm512_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a); let e = _mm_set1_epi8(u8::MAX as i8); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtusepi32_storeu_epi8() { + unsafe fn test_mm256_mask_cvtusepi32_storeu_epi8() { let a = _mm256_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -59193,12 +59033,10 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtusepi32_storeu_epi8() { + unsafe fn test_mm_mask_cvtusepi32_storeu_epi8() { let a = _mm_set1_epi32(i32::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtusepi32_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -59210,56 +59048,48 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_storeu_epi32() { + const unsafe fn test_mm512_storeu_epi32() { let a = _mm512_set1_epi32(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_storeu_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm512_storeu_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_storeu_epi32() { + const unsafe fn test_mm256_storeu_epi32() { let a = _mm256_set1_epi32(9); let mut r = _mm256_undefined_si256(); - unsafe { - _mm256_storeu_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm256_storeu_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_storeu_epi32() { + const unsafe fn test_mm_storeu_epi32() { let a = _mm_set1_epi32(9); let mut r = _mm_undefined_si128(); - unsafe { - _mm_storeu_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm_storeu_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_loadu_si512() { + const unsafe fn test_mm512_loadu_si512() { let a = &[4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50]; let p = a.as_ptr().cast(); - let r = unsafe { _mm512_loadu_si512(black_box(p)) }; + let r = _mm512_loadu_si512(black_box(p)); let e = _mm512_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_storeu_si512() { + const unsafe fn test_mm512_storeu_si512() { let a = _mm512_set1_epi32(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_storeu_si512(&mut r as *mut _, a); - } + _mm512_storeu_si512(&mut r as *mut _, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_load_si512() { + const unsafe fn test_mm512_load_si512() { #[repr(align(64))] struct Align { data: [i32; 16], // 64 bytes @@ -59268,23 +59098,21 @@ mod tests { data: [4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50], }; let p = (a.data).as_ptr().cast(); - let r = unsafe { _mm512_load_si512(black_box(p)) }; + let r = _mm512_load_si512(black_box(p)); let e = _mm512_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_store_si512() { + const unsafe fn test_mm512_store_si512() { let a = _mm512_set1_epi32(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_store_si512(&mut r as *mut _, a); - } + _mm512_store_si512(&mut r as *mut _, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_load_epi32() { + const unsafe fn test_mm512_load_epi32() { #[repr(align(64))] struct Align { data: [i32; 16], // 64 bytes @@ -59293,13 +59121,13 @@ mod tests { data: [4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50], }; let p = (a.data).as_ptr(); - let r = unsafe { _mm512_load_epi32(black_box(p)) }; + let r = _mm512_load_epi32(black_box(p)); let e = _mm512_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50, -4, -3, -2, -5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_load_epi32() { + const unsafe fn test_mm256_load_epi32() { #[repr(align(64))] struct Align { data: [i32; 8], @@ -59308,56 +59136,50 @@ mod tests { data: [4, 3, 2, 5, 8, 9, 64, 50], }; let p = (a.data).as_ptr(); - let r = unsafe { _mm256_load_epi32(black_box(p)) }; + let r = _mm256_load_epi32(black_box(p)); let e = _mm256_setr_epi32(4, 3, 2, 5, 8, 9, 64, 50); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_load_epi32() { + const unsafe fn test_mm_load_epi32() { #[repr(align(64))] struct Align { data: [i32; 4], } let a = Align { data: [4, 3, 2, 5] }; let p = (a.data).as_ptr(); - let r = unsafe { _mm_load_epi32(black_box(p)) }; + let r = _mm_load_epi32(black_box(p)); let e = _mm_setr_epi32(4, 3, 2, 5); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_store_epi32() { + const unsafe fn test_mm512_store_epi32() { let a = _mm512_set1_epi32(9); let mut r = _mm512_undefined_epi32(); - unsafe { - _mm512_store_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm512_store_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_store_epi32() { + const unsafe fn test_mm256_store_epi32() { let a = _mm256_set1_epi32(9); let mut r = _mm256_undefined_si256(); - unsafe { - _mm256_store_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm256_store_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_store_epi32() { + const unsafe fn test_mm_store_epi32() { let a = _mm_set1_epi32(9); let mut r = _mm_undefined_si128(); - unsafe { - _mm_store_epi32(&mut r as *mut _ as *mut i32, a); - } + _mm_store_epi32(&mut r as *mut _ as *mut i32, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_load_ps() { + const unsafe fn test_mm512_load_ps() { #[repr(align(64))] struct Align { data: [f32; 16], // 64 bytes @@ -59368,7 +59190,7 @@ mod tests { ], }; let p = (a.data).as_ptr(); - let r = unsafe { _mm512_load_ps(black_box(p)) }; + let r = _mm512_load_ps(black_box(p)); let e = _mm512_setr_ps( 4., 3., 2., 5., 8., 9., 64., 50., -4., -3., -2., -5., -8., -9., -64., -50., ); @@ -59376,12 +59198,10 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_store_ps() { + const unsafe fn test_mm512_store_ps() { let a = _mm512_set1_ps(9.); let mut r = _mm512_undefined_ps(); - unsafe { - _mm512_store_ps(&mut r as *mut _ as *mut f32, a); - } + _mm512_store_ps(&mut r as *mut _ as *mut f32, a); assert_eq_m512(r, a); } @@ -62371,140 +62191,140 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_expandloadu_epi32() { + unsafe fn test_mm512_mask_expandloadu_epi32() { let src = _mm512_set1_epi32(42); let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_expandloadu_epi32(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_epi32(src, m, black_box(p)); let e = _mm512_set_epi32(8, 7, 6, 42, 5, 42, 42, 42, 4, 3, 42, 42, 2, 42, 1, 42); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_maskz_expandloadu_epi32() { + unsafe fn test_mm512_maskz_expandloadu_epi32() { let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_expandloadu_epi32(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_epi32(m, black_box(p)); let e = _mm512_set_epi32(8, 7, 6, 0, 5, 0, 0, 0, 4, 3, 0, 0, 2, 0, 1, 0); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_expandloadu_epi32() { + unsafe fn test_mm256_mask_expandloadu_epi32() { let src = _mm256_set1_epi32(42); let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_mask_expandloadu_epi32(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_epi32(src, m, black_box(p)); let e = _mm256_set_epi32(4, 3, 2, 42, 1, 42, 42, 42); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_maskz_expandloadu_epi32() { + unsafe fn test_mm256_maskz_expandloadu_epi32() { let a = &[1_i32, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_maskz_expandloadu_epi32(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_epi32(m, black_box(p)); let e = _mm256_set_epi32(4, 3, 2, 0, 1, 0, 0, 0); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_expandloadu_epi32() { + unsafe fn test_mm_mask_expandloadu_epi32() { let src = _mm_set1_epi32(42); let a = &[1_i32, 2, 3, 4]; let p = a.as_ptr(); let m = 0b11111000; - let r = unsafe { _mm_mask_expandloadu_epi32(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_epi32(src, m, black_box(p)); let e = _mm_set_epi32(1, 42, 42, 42); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_maskz_expandloadu_epi32() { + unsafe fn test_mm_maskz_expandloadu_epi32() { let a = &[1_i32, 2, 3, 4]; let p = a.as_ptr(); let m = 0b11111000; - let r = unsafe { _mm_maskz_expandloadu_epi32(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_epi32(m, black_box(p)); let e = _mm_set_epi32(1, 0, 0, 0); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_expandloadu_epi64() { + unsafe fn test_mm512_mask_expandloadu_epi64() { let src = _mm512_set1_epi64(42); let a = &[1_i64, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm512_mask_expandloadu_epi64(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_epi64(src, m, black_box(p)); let e = _mm512_set_epi64(4, 3, 2, 42, 1, 42, 42, 42); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_maskz_expandloadu_epi64() { + unsafe fn test_mm512_maskz_expandloadu_epi64() { let a = &[1_i64, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm512_maskz_expandloadu_epi64(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_epi64(m, black_box(p)); let e = _mm512_set_epi64(4, 3, 2, 0, 1, 0, 0, 0); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_expandloadu_epi64() { + unsafe fn test_mm256_mask_expandloadu_epi64() { let src = _mm256_set1_epi64x(42); let a = &[1_i64, 2, 3, 4]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_mask_expandloadu_epi64(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_epi64(src, m, black_box(p)); let e = _mm256_set_epi64x(1, 42, 42, 42); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_maskz_expandloadu_epi64() { + unsafe fn test_mm256_maskz_expandloadu_epi64() { let a = &[1_i64, 2, 3, 4]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_maskz_expandloadu_epi64(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_epi64(m, black_box(p)); let e = _mm256_set_epi64x(1, 0, 0, 0); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_expandloadu_epi64() { + unsafe fn test_mm_mask_expandloadu_epi64() { let src = _mm_set1_epi64x(42); let a = &[1_i64, 2]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_mask_expandloadu_epi64(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_epi64(src, m, black_box(p)); let e = _mm_set_epi64x(42, 42); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_maskz_expandloadu_epi64() { + unsafe fn test_mm_maskz_expandloadu_epi64() { let a = &[1_i64, 2]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_maskz_expandloadu_epi64(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_epi64(m, black_box(p)); let e = _mm_set_epi64x(0, 0); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_expandloadu_ps() { + unsafe fn test_mm512_mask_expandloadu_ps() { let src = _mm512_set1_ps(42.); let a = &[ 1.0f32, 2., 3., 4., 5., 6., 7., 8., 9., 10., 11., 12., 13., 14., 15., 16., ]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_mask_expandloadu_ps(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_ps(src, m, black_box(p)); let e = _mm512_set_ps( 8., 7., 6., 42., 5., 42., 42., 42., 4., 3., 42., 42., 2., 42., 1., 42., ); @@ -62512,13 +62332,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_maskz_expandloadu_ps() { + unsafe fn test_mm512_maskz_expandloadu_ps() { let a = &[ 1.0f32, 2., 3., 4., 5., 6., 7., 8., 9., 10., 11., 12., 13., 14., 15., 16., ]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm512_maskz_expandloadu_ps(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_ps(m, black_box(p)); let e = _mm512_set_ps( 8., 7., 6., 0., 5., 0., 0., 0., 4., 3., 0., 0., 2., 0., 1., 0., ); @@ -62526,106 +62346,106 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_expandloadu_ps() { + unsafe fn test_mm256_mask_expandloadu_ps() { let src = _mm256_set1_ps(42.); let a = &[1.0f32, 2., 3., 4., 5., 6., 7., 8.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_mask_expandloadu_ps(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_ps(src, m, black_box(p)); let e = _mm256_set_ps(4., 3., 2., 42., 1., 42., 42., 42.); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_maskz_expandloadu_ps() { + unsafe fn test_mm256_maskz_expandloadu_ps() { let a = &[1.0f32, 2., 3., 4., 5., 6., 7., 8.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_maskz_expandloadu_ps(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_ps(m, black_box(p)); let e = _mm256_set_ps(4., 3., 2., 0., 1., 0., 0., 0.); assert_eq_m256(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_expandloadu_ps() { + unsafe fn test_mm_mask_expandloadu_ps() { let src = _mm_set1_ps(42.); let a = &[1.0f32, 2., 3., 4.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_mask_expandloadu_ps(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_ps(src, m, black_box(p)); let e = _mm_set_ps(1., 42., 42., 42.); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_maskz_expandloadu_ps() { + unsafe fn test_mm_maskz_expandloadu_ps() { let a = &[1.0f32, 2., 3., 4.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_maskz_expandloadu_ps(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_ps(m, black_box(p)); let e = _mm_set_ps(1., 0., 0., 0.); assert_eq_m128(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_expandloadu_pd() { + unsafe fn test_mm512_mask_expandloadu_pd() { let src = _mm512_set1_pd(42.); let a = &[1.0f64, 2., 3., 4., 5., 6., 7., 8.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm512_mask_expandloadu_pd(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_pd(src, m, black_box(p)); let e = _mm512_set_pd(4., 3., 2., 42., 1., 42., 42., 42.); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_maskz_expandloadu_pd() { + unsafe fn test_mm512_maskz_expandloadu_pd() { let a = &[1.0f64, 2., 3., 4., 5., 6., 7., 8.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm512_maskz_expandloadu_pd(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_pd(m, black_box(p)); let e = _mm512_set_pd(4., 3., 2., 0., 1., 0., 0., 0.); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_expandloadu_pd() { + unsafe fn test_mm256_mask_expandloadu_pd() { let src = _mm256_set1_pd(42.); let a = &[1.0f64, 2., 3., 4.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_mask_expandloadu_pd(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_pd(src, m, black_box(p)); let e = _mm256_set_pd(1., 42., 42., 42.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_maskz_expandloadu_pd() { + unsafe fn test_mm256_maskz_expandloadu_pd() { let a = &[1.0f64, 2., 3., 4.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm256_maskz_expandloadu_pd(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_pd(m, black_box(p)); let e = _mm256_set_pd(1., 0., 0., 0.); assert_eq_m256d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_expandloadu_pd() { + unsafe fn test_mm_mask_expandloadu_pd() { let src = _mm_set1_pd(42.); let a = &[1.0f64, 2.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_mask_expandloadu_pd(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_pd(src, m, black_box(p)); let e = _mm_set_pd(42., 42.); assert_eq_m128d(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_maskz_expandloadu_pd() { + unsafe fn test_mm_maskz_expandloadu_pd() { let a = &[1.0f64, 2.]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_maskz_expandloadu_pd(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_pd(m, black_box(p)); let e = _mm_set_pd(0., 0.); assert_eq_m128d(r, e); } diff --git a/library/stdarch/crates/core_arch/src/x86/avx512fp16.rs b/library/stdarch/crates/core_arch/src/x86/avx512fp16.rs index 27f06691c5500..57d47c0bb010a 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512fp16.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512fp16.rs @@ -16932,6 +16932,7 @@ unsafe extern "C" { mod tests { use crate::core_arch::assert_eq_const as assert_eq; use crate::core_arch::x86::*; + use crate::mem::transmute; use crate::ptr::{addr_of, addr_of_mut}; use stdarch_test::simd_test; @@ -17568,72 +17569,72 @@ mod tests { } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_load_ph() { + const unsafe fn test_mm_load_ph() { let a = _mm_set_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); - let b = unsafe { _mm_load_ph(addr_of!(a).cast()) }; + let b = _mm_load_ph(addr_of!(a).cast()); assert_eq_m128h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm256_load_ph() { + const unsafe fn test_mm256_load_ph() { let a = _mm256_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); - let b = unsafe { _mm256_load_ph(addr_of!(a).cast()) }; + let b = _mm256_load_ph(addr_of!(a).cast()); assert_eq_m256h(a, b); } #[simd_test(enable = "avx512fp16")] - const fn test_mm512_load_ph() { + const unsafe fn test_mm512_load_ph() { let a = _mm512_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0, ); - let b = unsafe { _mm512_load_ph(addr_of!(a).cast()) }; + let b = _mm512_load_ph(addr_of!(a).cast()); assert_eq_m512h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_load_sh() { + const unsafe fn test_mm_load_sh() { let a = _mm_set_sh(1.0); - let b = unsafe { _mm_load_sh(addr_of!(a).cast()) }; + let b = _mm_load_sh(addr_of!(a).cast()); assert_eq_m128h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - fn test_mm_mask_load_sh() { + unsafe fn test_mm_mask_load_sh() { let a = _mm_set_sh(1.0); let src = _mm_set_sh(2.); - let b = unsafe { _mm_mask_load_sh(src, 1, addr_of!(a).cast()) }; + let b = _mm_mask_load_sh(src, 1, addr_of!(a).cast()); assert_eq_m128h(a, b); - let b = unsafe { _mm_mask_load_sh(src, 0, addr_of!(a).cast()) }; + let b = _mm_mask_load_sh(src, 0, addr_of!(a).cast()); assert_eq_m128h(src, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - fn test_mm_maskz_load_sh() { + unsafe fn test_mm_maskz_load_sh() { let a = _mm_set_sh(1.0); - let b = unsafe { _mm_maskz_load_sh(1, addr_of!(a).cast()) }; + let b = _mm_maskz_load_sh(1, addr_of!(a).cast()); assert_eq_m128h(a, b); - let b = unsafe { _mm_maskz_load_sh(0, addr_of!(a).cast()) }; + let b = _mm_maskz_load_sh(0, addr_of!(a).cast()); assert_eq_m128h(_mm_setzero_ph(), b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_loadu_ph() { + const unsafe fn test_mm_loadu_ph() { let array = [1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; - let r = unsafe { _mm_loadu_ph(array.as_ptr()) }; + let r = _mm_loadu_ph(array.as_ptr()); let e = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); assert_eq_m128h(r, e); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm256_loadu_ph() { + const unsafe fn test_mm256_loadu_ph() { let array = [ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ]; - let r = unsafe { _mm256_loadu_ph(array.as_ptr()) }; + let r = _mm256_loadu_ph(array.as_ptr()); let e = _mm256_setr_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); @@ -17641,13 +17642,13 @@ mod tests { } #[simd_test(enable = "avx512fp16")] - const fn test_mm512_loadu_ph() { + const unsafe fn test_mm512_loadu_ph() { let array = [ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0, ]; - let r = unsafe { _mm512_loadu_ph(array.as_ptr()) }; + let r = _mm512_loadu_ph(array.as_ptr()); let e = _mm512_setr_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, @@ -17685,99 +17686,81 @@ mod tests { } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_store_ph() { + const unsafe fn test_mm_store_ph() { let a = _mm_set_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let mut b = _mm_setzero_ph(); - unsafe { - _mm_store_ph(addr_of_mut!(b).cast(), a); - } + _mm_store_ph(addr_of_mut!(b).cast(), a); assert_eq_m128h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm256_store_ph() { + const unsafe fn test_mm256_store_ph() { let a = _mm256_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); let mut b = _mm256_setzero_ph(); - unsafe { - _mm256_store_ph(addr_of_mut!(b).cast(), a); - } + _mm256_store_ph(addr_of_mut!(b).cast(), a); assert_eq_m256h(a, b); } #[simd_test(enable = "avx512fp16")] - const fn test_mm512_store_ph() { + const unsafe fn test_mm512_store_ph() { let a = _mm512_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0, ); let mut b = _mm512_setzero_ph(); - unsafe { - _mm512_store_ph(addr_of_mut!(b).cast(), a); - } + _mm512_store_ph(addr_of_mut!(b).cast(), a); assert_eq_m512h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_store_sh() { + const unsafe fn test_mm_store_sh() { let a = _mm_set_sh(1.0); let mut b = _mm_setzero_ph(); - unsafe { - _mm_store_sh(addr_of_mut!(b).cast(), a); - } + _mm_store_sh(addr_of_mut!(b).cast(), a); assert_eq_m128h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - fn test_mm_mask_store_sh() { + unsafe fn test_mm_mask_store_sh() { let a = _mm_set_sh(1.0); let mut b = _mm_setzero_ph(); - unsafe { - _mm_mask_store_sh(addr_of_mut!(b).cast(), 0, a); - } + _mm_mask_store_sh(addr_of_mut!(b).cast(), 0, a); assert_eq_m128h(_mm_setzero_ph(), b); - unsafe { - _mm_mask_store_sh(addr_of_mut!(b).cast(), 1, a); - } + _mm_mask_store_sh(addr_of_mut!(b).cast(), 1, a); assert_eq_m128h(a, b); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm_storeu_ph() { + const unsafe fn test_mm_storeu_ph() { let a = _mm_set_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0); let mut array = [0.0; 8]; - unsafe { - _mm_storeu_ph(array.as_mut_ptr(), a); - } - assert_eq_m128h(a, unsafe { _mm_loadu_ph(array.as_ptr()) }); + _mm_storeu_ph(array.as_mut_ptr(), a); + assert_eq_m128h(a, _mm_loadu_ph(array.as_ptr())); } #[simd_test(enable = "avx512fp16,avx512vl")] - const fn test_mm256_storeu_ph() { + const unsafe fn test_mm256_storeu_ph() { let a = _mm256_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ); let mut array = [0.0; 16]; - unsafe { - _mm256_storeu_ph(array.as_mut_ptr(), a); - } - assert_eq_m256h(a, unsafe { _mm256_loadu_ph(array.as_ptr()) }); + _mm256_storeu_ph(array.as_mut_ptr(), a); + assert_eq_m256h(a, _mm256_loadu_ph(array.as_ptr())); } #[simd_test(enable = "avx512fp16")] - const fn test_mm512_storeu_ph() { + const unsafe fn test_mm512_storeu_ph() { let a = _mm512_set_ph( 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0, ); let mut array = [0.0; 32]; - unsafe { - _mm512_storeu_ph(array.as_mut_ptr(), a); - } - assert_eq_m512h(a, unsafe { _mm512_loadu_ph(array.as_ptr()) }); + _mm512_storeu_ph(array.as_mut_ptr(), a); + assert_eq_m512h(a, _mm512_loadu_ph(array.as_ptr())); } #[simd_test(enable = "avx512fp16,avx512vl")] @@ -24010,16 +23993,16 @@ mod tests { #[simd_test(enable = "avx512fp16,avx512vl")] const fn test_mm256_reduce_mul_ph() { - let a = _mm256_set1_ph(1.2); + let a = _mm256_set1_ph(2.0); let r = _mm256_reduce_mul_ph(a); - assert_eq!(r, 18.5); + assert_eq!(r, 65536.0); } #[simd_test(enable = "avx512fp16")] const fn test_mm512_reduce_mul_ph() { - let a = _mm512_set1_ph(1.2); + let a = _mm512_set1_ph(2.0); let r = _mm512_reduce_mul_ph(a); - assert_eq!(r, 342.3); + assert_eq!(r, 16777216.0); } #[simd_test(enable = "avx512fp16,avx512vl")] diff --git a/library/stdarch/crates/core_arch/src/x86/avx512vbmi2.rs b/library/stdarch/crates/core_arch/src/x86/avx512vbmi2.rs index 78a50b90c8614..26cef5814e9cc 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512vbmi2.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512vbmi2.rs @@ -3932,7 +3932,7 @@ mod tests { } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_mask_expandloadu_epi16() { + unsafe fn test_mm512_mask_expandloadu_epi16() { let src = _mm512_set1_epi16(42); let a = &[ 1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -3940,7 +3940,7 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111; - let r = unsafe { _mm512_mask_expandloadu_epi16(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_epi16(src, m, black_box(p)); let e = _mm512_set_epi16( 16, 15, 14, 42, 13, 42, 42, 42, 12, 11, 42, 42, 10, 42, 9, 42, 8, 7, 6, 5, 42, 42, 42, 42, 42, 42, 42, 42, 4, 3, 2, 1, @@ -3949,14 +3949,14 @@ mod tests { } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_maskz_expandloadu_epi16() { + unsafe fn test_mm512_maskz_expandloadu_epi16() { let a = &[ 1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111; - let r = unsafe { _mm512_maskz_expandloadu_epi16(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_epi16(m, black_box(p)); let e = _mm512_set_epi16( 16, 15, 14, 0, 13, 0, 0, 0, 12, 11, 0, 0, 10, 0, 9, 0, 8, 7, 6, 5, 0, 0, 0, 0, 0, 0, 0, 0, 4, 3, 2, 1, @@ -3965,49 +3965,49 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_mask_expandloadu_epi16() { + unsafe fn test_mm256_mask_expandloadu_epi16() { let src = _mm256_set1_epi16(42); let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm256_mask_expandloadu_epi16(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_epi16(src, m, black_box(p)); let e = _mm256_set_epi16(8, 7, 6, 42, 5, 42, 42, 42, 4, 3, 42, 42, 2, 42, 1, 42); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_maskz_expandloadu_epi16() { + unsafe fn test_mm256_maskz_expandloadu_epi16() { let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm256_maskz_expandloadu_epi16(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_epi16(m, black_box(p)); let e = _mm256_set_epi16(8, 7, 6, 0, 5, 0, 0, 0, 4, 3, 0, 0, 2, 0, 1, 0); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_mask_expandloadu_epi16() { + unsafe fn test_mm_mask_expandloadu_epi16() { let src = _mm_set1_epi16(42); let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_mask_expandloadu_epi16(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_epi16(src, m, black_box(p)); let e = _mm_set_epi16(4, 3, 2, 42, 1, 42, 42, 42); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_maskz_expandloadu_epi16() { + unsafe fn test_mm_maskz_expandloadu_epi16() { let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8]; let p = a.as_ptr(); let m = 0b11101000; - let r = unsafe { _mm_maskz_expandloadu_epi16(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_epi16(m, black_box(p)); let e = _mm_set_epi16(4, 3, 2, 0, 1, 0, 0, 0); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_mask_expandloadu_epi8() { + unsafe fn test_mm512_mask_expandloadu_epi8() { let src = _mm512_set1_epi8(42); let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -4016,7 +4016,7 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111_11111111_00000000_10101010_01010101; - let r = unsafe { _mm512_mask_expandloadu_epi8(src, m, black_box(p)) }; + let r = _mm512_mask_expandloadu_epi8(src, m, black_box(p)); let e = _mm512_set_epi8( 32, 31, 30, 42, 29, 42, 42, 42, 28, 27, 42, 42, 26, 42, 25, 42, 24, 23, 22, 21, 42, 42, 42, 42, 42, 42, 42, 42, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 42, 42, 42, 42, @@ -4026,7 +4026,7 @@ mod tests { } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_maskz_expandloadu_epi8() { + unsafe fn test_mm512_maskz_expandloadu_epi8() { let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, @@ -4034,7 +4034,7 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111_11111111_00000000_10101010_01010101; - let r = unsafe { _mm512_maskz_expandloadu_epi8(m, black_box(p)) }; + let r = _mm512_maskz_expandloadu_epi8(m, black_box(p)); let e = _mm512_set_epi8( 32, 31, 30, 0, 29, 0, 0, 0, 28, 27, 0, 0, 26, 0, 25, 0, 24, 23, 22, 21, 0, 0, 0, 0, 0, 0, 0, 0, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, @@ -4044,7 +4044,7 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_mask_expandloadu_epi8() { + unsafe fn test_mm256_mask_expandloadu_epi8() { let src = _mm256_set1_epi8(42); let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, @@ -4052,7 +4052,7 @@ mod tests { ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111; - let r = unsafe { _mm256_mask_expandloadu_epi8(src, m, black_box(p)) }; + let r = _mm256_mask_expandloadu_epi8(src, m, black_box(p)); let e = _mm256_set_epi8( 16, 15, 14, 42, 13, 42, 42, 42, 12, 11, 42, 42, 10, 42, 9, 42, 8, 7, 6, 5, 42, 42, 42, 42, 42, 42, 42, 42, 4, 3, 2, 1, @@ -4061,14 +4061,14 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_maskz_expandloadu_epi8() { + unsafe fn test_mm256_maskz_expandloadu_epi8() { let a = &[ 1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, ]; let p = a.as_ptr(); let m = 0b11101000_11001010_11110000_00001111; - let r = unsafe { _mm256_maskz_expandloadu_epi8(m, black_box(p)) }; + let r = _mm256_maskz_expandloadu_epi8(m, black_box(p)); let e = _mm256_set_epi8( 16, 15, 14, 0, 13, 0, 0, 0, 12, 11, 0, 0, 10, 0, 9, 0, 8, 7, 6, 5, 0, 0, 0, 0, 0, 0, 0, 0, 4, 3, 2, 1, @@ -4077,44 +4077,36 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_mask_expandloadu_epi8() { + unsafe fn test_mm_mask_expandloadu_epi8() { let src = _mm_set1_epi8(42); let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm_mask_expandloadu_epi8(src, m, black_box(p)) }; + let r = _mm_mask_expandloadu_epi8(src, m, black_box(p)); let e = _mm_set_epi8(8, 7, 6, 42, 5, 42, 42, 42, 4, 3, 42, 42, 2, 42, 1, 42); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_maskz_expandloadu_epi8() { + unsafe fn test_mm_maskz_expandloadu_epi8() { let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; let p = a.as_ptr(); let m = 0b11101000_11001010; - let r = unsafe { _mm_maskz_expandloadu_epi8(m, black_box(p)) }; + let r = _mm_maskz_expandloadu_epi8(m, black_box(p)); let e = _mm_set_epi8(8, 7, 6, 0, 5, 0, 0, 0, 4, 3, 0, 0, 2, 0, 1, 0); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_mask_compressstoreu_epi16() { + unsafe fn test_mm512_mask_compressstoreu_epi16() { let a = _mm512_set_epi16( 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, ); let mut r = [0_i16; 32]; - unsafe { - _mm512_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i16; 32]); - unsafe { - _mm512_mask_compressstoreu_epi16( - r.as_mut_ptr(), - 0b11110000_11001010_11111111_00000000, - a, - ); - } + _mm512_mask_compressstoreu_epi16(r.as_mut_ptr(), 0b11110000_11001010_11111111_00000000, a); assert_eq!( &r, &[ @@ -4125,52 +4117,40 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_mask_compressstoreu_epi16() { + unsafe fn test_mm256_mask_compressstoreu_epi16() { let a = _mm256_set_epi16(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); let mut r = [0_i16; 16]; - unsafe { - _mm256_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i16; 16]); - unsafe { - _mm256_mask_compressstoreu_epi16(r.as_mut_ptr(), 0b11110000_11001010, a); - } + _mm256_mask_compressstoreu_epi16(r.as_mut_ptr(), 0b11110000_11001010, a); assert_eq!(&r, &[2, 4, 7, 8, 13, 14, 15, 16, 0, 0, 0, 0, 0, 0, 0, 0]); } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_mask_compressstoreu_epi16() { + unsafe fn test_mm_mask_compressstoreu_epi16() { let a = _mm_set_epi16(8, 7, 6, 5, 4, 3, 2, 1); let mut r = [0_i16; 8]; - unsafe { - _mm_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_epi16(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i16; 8]); - unsafe { - _mm_mask_compressstoreu_epi16(r.as_mut_ptr(), 0b11110000, a); - } + _mm_mask_compressstoreu_epi16(r.as_mut_ptr(), 0b11110000, a); assert_eq!(&r, &[5, 6, 7, 8, 0, 0, 0, 0]); } #[simd_test(enable = "avx512vbmi2")] - fn test_mm512_mask_compressstoreu_epi8() { + unsafe fn test_mm512_mask_compressstoreu_epi8() { let a = _mm512_set_epi8( 64, 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, ); let mut r = [0_i8; 64]; - unsafe { - _mm512_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); - } + _mm512_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i8; 64]); - unsafe { - _mm512_mask_compressstoreu_epi8( - r.as_mut_ptr(), - 0b11110000_11001010_11111111_00000000_10101010_01010101_11110000_00001111, - a, - ); - } + _mm512_mask_compressstoreu_epi8( + r.as_mut_ptr(), + 0b11110000_11001010_11111111_00000000_10101010_01010101_11110000_00001111, + a, + ); assert_eq!( &r, &[ @@ -4182,23 +4162,15 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm256_mask_compressstoreu_epi8() { + unsafe fn test_mm256_mask_compressstoreu_epi8() { let a = _mm256_set_epi8( 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, ); let mut r = [0_i8; 32]; - unsafe { - _mm256_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); - } + _mm256_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i8; 32]); - unsafe { - _mm256_mask_compressstoreu_epi8( - r.as_mut_ptr(), - 0b11110000_11001010_11111111_00000000, - a, - ); - } + _mm256_mask_compressstoreu_epi8(r.as_mut_ptr(), 0b11110000_11001010_11111111_00000000, a); assert_eq!( &r, &[ @@ -4209,16 +4181,12 @@ mod tests { } #[simd_test(enable = "avx512vbmi2,avx512vl")] - fn test_mm_mask_compressstoreu_epi8() { + unsafe fn test_mm_mask_compressstoreu_epi8() { let a = _mm_set_epi8(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); let mut r = [0_i8; 16]; - unsafe { - _mm_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); - } + _mm_mask_compressstoreu_epi8(r.as_mut_ptr(), 0, a); assert_eq!(&r, &[0_i8; 16]); - unsafe { - _mm_mask_compressstoreu_epi8(r.as_mut_ptr(), 0b11110000_11001010, a); - } + _mm_mask_compressstoreu_epi8(r.as_mut_ptr(), 0b11110000_11001010, a); assert_eq!(&r, &[2, 4, 7, 8, 13, 14, 15, 16, 0, 0, 0, 0, 0, 0, 0, 0]); } } diff --git a/library/stdarch/crates/core_arch/src/x86/avxneconvert.rs b/library/stdarch/crates/core_arch/src/x86/avxneconvert.rs index 91b6be2b09d78..a53d6d97e8a0c 100644 --- a/library/stdarch/crates/core_arch/src/x86/avxneconvert.rs +++ b/library/stdarch/crates/core_arch/src/x86/avxneconvert.rs @@ -242,127 +242,127 @@ mod tests { const BF16_EIGHT: u16 = 0b0_10000010_0000000; #[simd_test(enable = "avxneconvert")] - fn test_mm_bcstnebf16_ps() { + unsafe fn test_mm_bcstnebf16_ps() { let a = bf16::from_bits(BF16_ONE); - let r = unsafe { _mm_bcstnebf16_ps(addr_of!(a)) }; + let r = _mm_bcstnebf16_ps(addr_of!(a)); let e = _mm_set_ps(1., 1., 1., 1.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_bcstnebf16_ps() { + unsafe fn test_mm256_bcstnebf16_ps() { let a = bf16::from_bits(BF16_ONE); - let r = unsafe { _mm256_bcstnebf16_ps(addr_of!(a)) }; + let r = _mm256_bcstnebf16_ps(addr_of!(a)); let e = _mm256_set_ps(1., 1., 1., 1., 1., 1., 1., 1.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_bcstnesh_ps() { + unsafe fn test_mm_bcstnesh_ps() { let a = 1.0_f16; - let r = unsafe { _mm_bcstnesh_ps(addr_of!(a)) }; + let r = _mm_bcstnesh_ps(addr_of!(a)); let e = _mm_set_ps(1., 1., 1., 1.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_bcstnesh_ps() { + unsafe fn test_mm256_bcstnesh_ps() { let a = 1.0_f16; - let r = unsafe { _mm256_bcstnesh_ps(addr_of!(a)) }; + let r = _mm256_bcstnesh_ps(addr_of!(a)); let e = _mm256_set_ps(1., 1., 1., 1., 1., 1., 1., 1.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_cvtneebf16_ps() { + unsafe fn test_mm_cvtneebf16_ps() { let a = __m128bh([ BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, ]); - let r = unsafe { _mm_cvtneebf16_ps(addr_of!(a)) }; + let r = _mm_cvtneebf16_ps(addr_of!(a)); let e = _mm_setr_ps(1., 3., 5., 7.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_cvtneebf16_ps() { + unsafe fn test_mm256_cvtneebf16_ps() { let a = __m256bh([ BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, ]); - let r = unsafe { _mm256_cvtneebf16_ps(addr_of!(a)) }; + let r = _mm256_cvtneebf16_ps(addr_of!(a)); let e = _mm256_setr_ps(1., 3., 5., 7., 1., 3., 5., 7.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_cvtneeph_ps() { + unsafe fn test_mm_cvtneeph_ps() { let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]); - let r = unsafe { _mm_cvtneeph_ps(addr_of!(a)) }; + let r = _mm_cvtneeph_ps(addr_of!(a)); let e = _mm_setr_ps(1., 3., 5., 7.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_cvtneeph_ps() { + unsafe fn test_mm256_cvtneeph_ps() { let a = __m256h([ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ]); - let r = unsafe { _mm256_cvtneeph_ps(addr_of!(a)) }; + let r = _mm256_cvtneeph_ps(addr_of!(a)); let e = _mm256_setr_ps(1., 3., 5., 7., 9., 11., 13., 15.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_cvtneobf16_ps() { + unsafe fn test_mm_cvtneobf16_ps() { let a = __m128bh([ BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, ]); - let r = unsafe { _mm_cvtneobf16_ps(addr_of!(a)) }; + let r = _mm_cvtneobf16_ps(addr_of!(a)); let e = _mm_setr_ps(2., 4., 6., 8.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_cvtneobf16_ps() { + unsafe fn test_mm256_cvtneobf16_ps() { let a = __m256bh([ BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, ]); - let r = unsafe { _mm256_cvtneobf16_ps(addr_of!(a)) }; + let r = _mm256_cvtneobf16_ps(addr_of!(a)); let e = _mm256_setr_ps(2., 4., 6., 8., 2., 4., 6., 8.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_cvtneoph_ps() { + unsafe fn test_mm_cvtneoph_ps() { let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]); - let r = unsafe { _mm_cvtneoph_ps(addr_of!(a)) }; + let r = _mm_cvtneoph_ps(addr_of!(a)); let e = _mm_setr_ps(2., 4., 6., 8.); assert_eq_m128(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_cvtneoph_ps() { + unsafe fn test_mm256_cvtneoph_ps() { let a = __m256h([ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, ]); - let r = unsafe { _mm256_cvtneoph_ps(addr_of!(a)) }; + let r = _mm256_cvtneoph_ps(addr_of!(a)); let e = _mm256_setr_ps(2., 4., 6., 8., 10., 12., 14., 16.); assert_eq_m256(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm_cvtneps_avx_pbh() { + unsafe fn test_mm_cvtneps_avx_pbh() { let a = _mm_setr_ps(1., 2., 3., 4.); - let r: u16x4 = unsafe { transmute_copy(&_mm_cvtneps_avx_pbh(a)) }; + let r: u16x4 = transmute_copy(&_mm_cvtneps_avx_pbh(a)); let e = u16x4::new(BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR); assert_eq!(r, e); } #[simd_test(enable = "avxneconvert")] - fn test_mm256_cvtneps_avx_pbh() { + unsafe fn test_mm256_cvtneps_avx_pbh() { let a = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); - let r: u16x8 = _mm256_cvtneps_avx_pbh(a).as_u16x8(); + let r: u16x8 = transmute(_mm256_cvtneps_avx_pbh(a)); let e = u16x8::new( BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT, ); diff --git a/library/stdarch/crates/core_arch/src/x86/f16c.rs b/library/stdarch/crates/core_arch/src/x86/f16c.rs index a0bb992bb9d4c..0a26a9ff8d255 100644 --- a/library/stdarch/crates/core_arch/src/x86/f16c.rs +++ b/library/stdarch/crates/core_arch/src/x86/f16c.rs @@ -106,7 +106,7 @@ pub fn _mm256_cvtps_ph(a: __m256) -> __m128i { #[cfg(test)] mod tests { use crate::core_arch::assert_eq_const as assert_eq; - use crate::core_arch::x86::*; + use crate::{core_arch::x86::*, mem::transmute}; use stdarch_test::simd_test; const F16_ONE: i16 = 0x3c00; diff --git a/library/stdarch/crates/core_arch/src/x86/fxsr.rs b/library/stdarch/crates/core_arch/src/x86/fxsr.rs index 08619efe7c9ef..71fd52ca14963 100644 --- a/library/stdarch/crates/core_arch/src/x86/fxsr.rs +++ b/library/stdarch/crates/core_arch/src/x86/fxsr.rs @@ -77,14 +77,12 @@ mod tests { #[simd_test(enable = "fxsr")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_fxsave() { + unsafe fn test_fxsave() { let mut a = FxsaveArea::new(); let mut b = FxsaveArea::new(); - unsafe { - fxsr::_fxsave(a.ptr()); - fxsr::_fxrstor(a.ptr()); - fxsr::_fxsave(b.ptr()); - } + fxsr::_fxsave(a.ptr()); + fxsr::_fxrstor(a.ptr()); + fxsr::_fxsave(b.ptr()); } } diff --git a/library/stdarch/crates/core_arch/src/x86/gfni.rs b/library/stdarch/crates/core_arch/src/x86/gfni.rs index e9ee27a7b823b..681b8ae330d49 100644 --- a/library/stdarch/crates/core_arch/src/x86/gfni.rs +++ b/library/stdarch/crates/core_arch/src/x86/gfni.rs @@ -898,25 +898,25 @@ mod tests { } #[simd_test(enable = "gfni,avx512f")] - fn test_mm512_gf2p8mul_epi8() { + unsafe fn test_mm512_gf2p8mul_epi8() { let (left, right, expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_512 { - let left = unsafe { load_m512i_word(&left, i) }; - let right = unsafe { load_m512i_word(&right, i) }; - let expected = unsafe { load_m512i_word(&expected, i) }; + let left = load_m512i_word(&left, i); + let right = load_m512i_word(&right, i); + let expected = load_m512i_word(&expected, i); let result = _mm512_gf2p8mul_epi8(left, right); assert_eq_m512i(result, expected); } } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_maskz_gf2p8mul_epi8() { + unsafe fn test_mm512_maskz_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_512 { - let left = unsafe { load_m512i_word(&left, i) }; - let right = unsafe { load_m512i_word(&right, i) }; + let left = load_m512i_word(&left, i); + let right = load_m512i_word(&right, i); let result_zero = _mm512_maskz_gf2p8mul_epi8(0, left, right); assert_eq_m512i(result_zero, _mm512_setzero_si512()); let mask_bytes: __mmask64 = 0x0F_0F_0F_0F_FF_FF_00_00; @@ -930,12 +930,12 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_mask_gf2p8mul_epi8() { + unsafe fn test_mm512_mask_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_512 { - let left = unsafe { load_m512i_word(&left, i) }; - let right = unsafe { load_m512i_word(&right, i) }; + let left = load_m512i_word(&left, i); + let right = load_m512i_word(&right, i); let result_left = _mm512_mask_gf2p8mul_epi8(left, 0, left, right); assert_eq_m512i(result_left, left); let mask_bytes: __mmask64 = 0x0F_0F_0F_0F_FF_FF_00_00; @@ -948,25 +948,25 @@ mod tests { } #[simd_test(enable = "gfni,avx")] - fn test_mm256_gf2p8mul_epi8() { + unsafe fn test_mm256_gf2p8mul_epi8() { let (left, right, expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_256 { - let left = unsafe { load_m256i_word(&left, i) }; - let right = unsafe { load_m256i_word(&right, i) }; - let expected = unsafe { load_m256i_word(&expected, i) }; + let left = load_m256i_word(&left, i); + let right = load_m256i_word(&right, i); + let expected = load_m256i_word(&expected, i); let result = _mm256_gf2p8mul_epi8(left, right); assert_eq_m256i(result, expected); } } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_maskz_gf2p8mul_epi8() { + unsafe fn test_mm256_maskz_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_256 { - let left = unsafe { load_m256i_word(&left, i) }; - let right = unsafe { load_m256i_word(&right, i) }; + let left = load_m256i_word(&left, i); + let right = load_m256i_word(&right, i); let result_zero = _mm256_maskz_gf2p8mul_epi8(0, left, right); assert_eq_m256i(result_zero, _mm256_setzero_si256()); let mask_bytes: __mmask32 = 0x0F_F0_FF_00; @@ -980,12 +980,12 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_mask_gf2p8mul_epi8() { + unsafe fn test_mm256_mask_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_256 { - let left = unsafe { load_m256i_word(&left, i) }; - let right = unsafe { load_m256i_word(&right, i) }; + let left = load_m256i_word(&left, i); + let right = load_m256i_word(&right, i); let result_left = _mm256_mask_gf2p8mul_epi8(left, 0, left, right); assert_eq_m256i(result_left, left); let mask_bytes: __mmask32 = 0x0F_F0_FF_00; @@ -998,25 +998,25 @@ mod tests { } #[simd_test(enable = "gfni")] - fn test_mm_gf2p8mul_epi8() { + unsafe fn test_mm_gf2p8mul_epi8() { let (left, right, expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_128 { - let left = unsafe { load_m128i_word(&left, i) }; - let right = unsafe { load_m128i_word(&right, i) }; - let expected = unsafe { load_m128i_word(&expected, i) }; + let left = load_m128i_word(&left, i); + let right = load_m128i_word(&right, i); + let expected = load_m128i_word(&expected, i); let result = _mm_gf2p8mul_epi8(left, right); assert_eq_m128i(result, expected); } } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_maskz_gf2p8mul_epi8() { + unsafe fn test_mm_maskz_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_128 { - let left = unsafe { load_m128i_word(&left, i) }; - let right = unsafe { load_m128i_word(&right, i) }; + let left = load_m128i_word(&left, i); + let right = load_m128i_word(&right, i); let result_zero = _mm_maskz_gf2p8mul_epi8(0, left, right); assert_eq_m128i(result_zero, _mm_setzero_si128()); let mask_bytes: __mmask16 = 0x0F_F0; @@ -1030,12 +1030,12 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_mask_gf2p8mul_epi8() { + unsafe fn test_mm_mask_gf2p8mul_epi8() { let (left, right, _expected) = generate_byte_mul_test_data(); for i in 0..NUM_TEST_WORDS_128 { - let left = unsafe { load_m128i_word(&left, i) }; - let right = unsafe { load_m128i_word(&right, i) }; + let left = load_m128i_word(&left, i); + let right = load_m128i_word(&right, i); let result_left = _mm_mask_gf2p8mul_epi8(left, 0, left, right); assert_eq_m128i(result_left, left); let mask_bytes: __mmask16 = 0x0F_F0; @@ -1048,7 +1048,7 @@ mod tests { } #[simd_test(enable = "gfni,avx512f")] - fn test_mm512_gf2p8affine_epi64_epi8() { + unsafe fn test_mm512_gf2p8affine_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; let constant: i64 = 0; @@ -1061,20 +1061,20 @@ mod tests { let (matrices, vectors, references) = generate_affine_mul_test_data(IDENTITY_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let data = unsafe { load_m512i_word(&bytes, i) }; + let data = load_m512i_word(&bytes, i); let result = _mm512_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m512i(result, data); let result = _mm512_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m512i(result, constant_reference); - let data = unsafe { load_m512i_word(&more_bytes, i) }; + let data = load_m512i_word(&more_bytes, i); let result = _mm512_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m512i(result, data); let result = _mm512_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m512i(result, constant_reference); - let matrix = unsafe { load_m512i_word(&matrices, i) }; - let vector = unsafe { load_m512i_word(&vectors, i) }; - let reference = unsafe { load_m512i_word(&references, i) }; + let matrix = load_m512i_word(&matrices, i); + let vector = load_m512i_word(&vectors, i); + let reference = load_m512i_word(&references, i); let result = _mm512_gf2p8affine_epi64_epi8::(vector, matrix); assert_eq_m512i(result, reference); @@ -1082,13 +1082,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_maskz_gf2p8affine_epi64_epi8() { + unsafe fn test_mm512_maskz_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let matrix = unsafe { load_m512i_word(&matrices, i) }; - let vector = unsafe { load_m512i_word(&vectors, i) }; + let matrix = load_m512i_word(&matrices, i); + let vector = load_m512i_word(&vectors, i); let result_zero = _mm512_maskz_gf2p8affine_epi64_epi8::(0, vector, matrix); assert_eq_m512i(result_zero, _mm512_setzero_si512()); @@ -1104,13 +1104,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_mask_gf2p8affine_epi64_epi8() { + unsafe fn test_mm512_mask_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let left = unsafe { load_m512i_word(&vectors, i) }; - let right = unsafe { load_m512i_word(&matrices, i) }; + let left = load_m512i_word(&vectors, i); + let right = load_m512i_word(&matrices, i); let result_left = _mm512_mask_gf2p8affine_epi64_epi8::(left, 0, left, right); assert_eq_m512i(result_left, left); @@ -1125,7 +1125,7 @@ mod tests { } #[simd_test(enable = "gfni,avx")] - fn test_mm256_gf2p8affine_epi64_epi8() { + unsafe fn test_mm256_gf2p8affine_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; let constant: i64 = 0; @@ -1138,20 +1138,20 @@ mod tests { let (matrices, vectors, references) = generate_affine_mul_test_data(IDENTITY_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let data = unsafe { load_m256i_word(&bytes, i) }; + let data = load_m256i_word(&bytes, i); let result = _mm256_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m256i(result, data); let result = _mm256_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m256i(result, constant_reference); - let data = unsafe { load_m256i_word(&more_bytes, i) }; + let data = load_m256i_word(&more_bytes, i); let result = _mm256_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m256i(result, data); let result = _mm256_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m256i(result, constant_reference); - let matrix = unsafe { load_m256i_word(&matrices, i) }; - let vector = unsafe { load_m256i_word(&vectors, i) }; - let reference = unsafe { load_m256i_word(&references, i) }; + let matrix = load_m256i_word(&matrices, i); + let vector = load_m256i_word(&vectors, i); + let reference = load_m256i_word(&references, i); let result = _mm256_gf2p8affine_epi64_epi8::(vector, matrix); assert_eq_m256i(result, reference); @@ -1159,13 +1159,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_maskz_gf2p8affine_epi64_epi8() { + unsafe fn test_mm256_maskz_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let matrix = unsafe { load_m256i_word(&matrices, i) }; - let vector = unsafe { load_m256i_word(&vectors, i) }; + let matrix = load_m256i_word(&matrices, i); + let vector = load_m256i_word(&vectors, i); let result_zero = _mm256_maskz_gf2p8affine_epi64_epi8::(0, vector, matrix); assert_eq_m256i(result_zero, _mm256_setzero_si256()); @@ -1181,13 +1181,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_mask_gf2p8affine_epi64_epi8() { + unsafe fn test_mm256_mask_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let left = unsafe { load_m256i_word(&vectors, i) }; - let right = unsafe { load_m256i_word(&matrices, i) }; + let left = load_m256i_word(&vectors, i); + let right = load_m256i_word(&matrices, i); let result_left = _mm256_mask_gf2p8affine_epi64_epi8::(left, 0, left, right); assert_eq_m256i(result_left, left); @@ -1202,7 +1202,7 @@ mod tests { } #[simd_test(enable = "gfni")] - fn test_mm_gf2p8affine_epi64_epi8() { + unsafe fn test_mm_gf2p8affine_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; let constant: i64 = 0; @@ -1215,20 +1215,20 @@ mod tests { let (matrices, vectors, references) = generate_affine_mul_test_data(IDENTITY_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let data = unsafe { load_m128i_word(&bytes, i) }; + let data = load_m128i_word(&bytes, i); let result = _mm_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m128i(result, data); let result = _mm_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m128i(result, constant_reference); - let data = unsafe { load_m128i_word(&more_bytes, i) }; + let data = load_m128i_word(&more_bytes, i); let result = _mm_gf2p8affine_epi64_epi8::(data, identity); assert_eq_m128i(result, data); let result = _mm_gf2p8affine_epi64_epi8::(data, constant); assert_eq_m128i(result, constant_reference); - let matrix = unsafe { load_m128i_word(&matrices, i) }; - let vector = unsafe { load_m128i_word(&vectors, i) }; - let reference = unsafe { load_m128i_word(&references, i) }; + let matrix = load_m128i_word(&matrices, i); + let vector = load_m128i_word(&vectors, i); + let reference = load_m128i_word(&references, i); let result = _mm_gf2p8affine_epi64_epi8::(vector, matrix); assert_eq_m128i(result, reference); @@ -1236,13 +1236,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_maskz_gf2p8affine_epi64_epi8() { + unsafe fn test_mm_maskz_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let matrix = unsafe { load_m128i_word(&matrices, i) }; - let vector = unsafe { load_m128i_word(&vectors, i) }; + let matrix = load_m128i_word(&matrices, i); + let vector = load_m128i_word(&vectors, i); let result_zero = _mm_maskz_gf2p8affine_epi64_epi8::(0, vector, matrix); assert_eq_m128i(result_zero, _mm_setzero_si128()); let mask_bytes: __mmask16 = 0x0F_F0; @@ -1257,13 +1257,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_mask_gf2p8affine_epi64_epi8() { + unsafe fn test_mm_mask_gf2p8affine_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let left = unsafe { load_m128i_word(&vectors, i) }; - let right = unsafe { load_m128i_word(&matrices, i) }; + let left = load_m128i_word(&vectors, i); + let right = load_m128i_word(&matrices, i); let result_left = _mm_mask_gf2p8affine_epi64_epi8::(left, 0, left, right); assert_eq_m128i(result_left, left); @@ -1278,7 +1278,7 @@ mod tests { } #[simd_test(enable = "gfni,avx512f")] - fn test_mm512_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm512_gf2p8affineinv_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; const CONSTANT_BYTE: i32 = 0x63; @@ -1288,8 +1288,8 @@ mod tests { let (inputs, results) = generate_inv_tests_data(); for i in 0..NUM_BYTES_WORDS_512 { - let input = unsafe { load_m512i_word(&inputs, i) }; - let reference = unsafe { load_m512i_word(&results, i) }; + let input = load_m512i_word(&inputs, i); + let reference = load_m512i_word(&results, i); let result = _mm512_gf2p8affineinv_epi64_epi8::(input, identity); let remultiplied = _mm512_gf2p8mul_epi8(result, input); assert_eq_m512i(remultiplied, reference); @@ -1300,8 +1300,8 @@ mod tests { generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let vector = unsafe { load_m512i_word(&vectors, i) }; - let matrix = unsafe { load_m512i_word(&matrices, i) }; + let vector = load_m512i_word(&vectors, i); + let matrix = load_m512i_word(&matrices, i); let inv_vec = _mm512_gf2p8affineinv_epi64_epi8::(vector, identity); let reference = _mm512_gf2p8affine_epi64_epi8::(inv_vec, matrix); @@ -1314,21 +1314,21 @@ mod tests { let sbox_matrix = _mm512_set1_epi64(AES_S_BOX_MATRIX); for i in 0..NUM_BYTES_WORDS_512 { - let reference = unsafe { load_m512i_word(&AES_S_BOX, i) }; - let input = unsafe { load_m512i_word(&inputs, i) }; + let reference = load_m512i_word(&AES_S_BOX, i); + let input = load_m512i_word(&inputs, i); let result = _mm512_gf2p8affineinv_epi64_epi8::(input, sbox_matrix); assert_eq_m512i(result, reference); } } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_maskz_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm512_maskz_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let matrix = unsafe { load_m512i_word(&matrices, i) }; - let vector = unsafe { load_m512i_word(&vectors, i) }; + let matrix = load_m512i_word(&matrices, i); + let vector = load_m512i_word(&vectors, i); let result_zero = _mm512_maskz_gf2p8affineinv_epi64_epi8::(0, vector, matrix); assert_eq_m512i(result_zero, _mm512_setzero_si512()); @@ -1344,13 +1344,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw")] - fn test_mm512_mask_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm512_mask_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_512 { - let left = unsafe { load_m512i_word(&vectors, i) }; - let right = unsafe { load_m512i_word(&matrices, i) }; + let left = load_m512i_word(&vectors, i); + let right = load_m512i_word(&matrices, i); let result_left = _mm512_mask_gf2p8affineinv_epi64_epi8::(left, 0, left, right); assert_eq_m512i(result_left, left); @@ -1366,7 +1366,7 @@ mod tests { } #[simd_test(enable = "gfni,avx")] - fn test_mm256_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm256_gf2p8affineinv_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; const CONSTANT_BYTE: i32 = 0x63; @@ -1376,8 +1376,8 @@ mod tests { let (inputs, results) = generate_inv_tests_data(); for i in 0..NUM_BYTES_WORDS_256 { - let input = unsafe { load_m256i_word(&inputs, i) }; - let reference = unsafe { load_m256i_word(&results, i) }; + let input = load_m256i_word(&inputs, i); + let reference = load_m256i_word(&results, i); let result = _mm256_gf2p8affineinv_epi64_epi8::(input, identity); let remultiplied = _mm256_gf2p8mul_epi8(result, input); assert_eq_m256i(remultiplied, reference); @@ -1388,8 +1388,8 @@ mod tests { generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let vector = unsafe { load_m256i_word(&vectors, i) }; - let matrix = unsafe { load_m256i_word(&matrices, i) }; + let vector = load_m256i_word(&vectors, i); + let matrix = load_m256i_word(&matrices, i); let inv_vec = _mm256_gf2p8affineinv_epi64_epi8::(vector, identity); let reference = _mm256_gf2p8affine_epi64_epi8::(inv_vec, matrix); @@ -1402,21 +1402,21 @@ mod tests { let sbox_matrix = _mm256_set1_epi64x(AES_S_BOX_MATRIX); for i in 0..NUM_BYTES_WORDS_256 { - let reference = unsafe { load_m256i_word(&AES_S_BOX, i) }; - let input = unsafe { load_m256i_word(&inputs, i) }; + let reference = load_m256i_word(&AES_S_BOX, i); + let input = load_m256i_word(&inputs, i); let result = _mm256_gf2p8affineinv_epi64_epi8::(input, sbox_matrix); assert_eq_m256i(result, reference); } } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_maskz_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm256_maskz_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let matrix = unsafe { load_m256i_word(&matrices, i) }; - let vector = unsafe { load_m256i_word(&vectors, i) }; + let matrix = load_m256i_word(&matrices, i); + let vector = load_m256i_word(&vectors, i); let result_zero = _mm256_maskz_gf2p8affineinv_epi64_epi8::(0, vector, matrix); assert_eq_m256i(result_zero, _mm256_setzero_si256()); @@ -1432,13 +1432,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm256_mask_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm256_mask_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_256 { - let left = unsafe { load_m256i_word(&vectors, i) }; - let right = unsafe { load_m256i_word(&matrices, i) }; + let left = load_m256i_word(&vectors, i); + let right = load_m256i_word(&matrices, i); let result_left = _mm256_mask_gf2p8affineinv_epi64_epi8::(left, 0, left, right); assert_eq_m256i(result_left, left); @@ -1454,7 +1454,7 @@ mod tests { } #[simd_test(enable = "gfni")] - fn test_mm_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm_gf2p8affineinv_epi64_epi8() { let identity: i64 = 0x01_02_04_08_10_20_40_80; const IDENTITY_BYTE: i32 = 0; const CONSTANT_BYTE: i32 = 0x63; @@ -1464,8 +1464,8 @@ mod tests { let (inputs, results) = generate_inv_tests_data(); for i in 0..NUM_BYTES_WORDS_128 { - let input = unsafe { load_m128i_word(&inputs, i) }; - let reference = unsafe { load_m128i_word(&results, i) }; + let input = load_m128i_word(&inputs, i); + let reference = load_m128i_word(&results, i); let result = _mm_gf2p8affineinv_epi64_epi8::(input, identity); let remultiplied = _mm_gf2p8mul_epi8(result, input); assert_eq_m128i(remultiplied, reference); @@ -1476,8 +1476,8 @@ mod tests { generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let vector = unsafe { load_m128i_word(&vectors, i) }; - let matrix = unsafe { load_m128i_word(&matrices, i) }; + let vector = load_m128i_word(&vectors, i); + let matrix = load_m128i_word(&matrices, i); let inv_vec = _mm_gf2p8affineinv_epi64_epi8::(vector, identity); let reference = _mm_gf2p8affine_epi64_epi8::(inv_vec, matrix); @@ -1490,21 +1490,21 @@ mod tests { let sbox_matrix = _mm_set1_epi64x(AES_S_BOX_MATRIX); for i in 0..NUM_BYTES_WORDS_128 { - let reference = unsafe { load_m128i_word(&AES_S_BOX, i) }; - let input = unsafe { load_m128i_word(&inputs, i) }; + let reference = load_m128i_word(&AES_S_BOX, i); + let input = load_m128i_word(&inputs, i); let result = _mm_gf2p8affineinv_epi64_epi8::(input, sbox_matrix); assert_eq_m128i(result, reference); } } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_maskz_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm_maskz_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let matrix = unsafe { load_m128i_word(&matrices, i) }; - let vector = unsafe { load_m128i_word(&vectors, i) }; + let matrix = load_m128i_word(&matrices, i); + let vector = load_m128i_word(&vectors, i); let result_zero = _mm_maskz_gf2p8affineinv_epi64_epi8::(0, vector, matrix); assert_eq_m128i(result_zero, _mm_setzero_si128()); @@ -1520,13 +1520,13 @@ mod tests { } #[simd_test(enable = "gfni,avx512bw,avx512vl")] - fn test_mm_mask_gf2p8affineinv_epi64_epi8() { + unsafe fn test_mm_mask_gf2p8affineinv_epi64_epi8() { const CONSTANT_BYTE: i32 = 0x63; let (matrices, vectors, _expected) = generate_affine_mul_test_data(CONSTANT_BYTE as u8); for i in 0..NUM_TEST_WORDS_128 { - let left = unsafe { load_m128i_word(&vectors, i) }; - let right = unsafe { load_m128i_word(&matrices, i) }; + let left = load_m128i_word(&vectors, i); + let right = load_m128i_word(&matrices, i); let result_left = _mm_mask_gf2p8affineinv_epi64_epi8::(left, 0, left, right); assert_eq_m128i(result_left, left); diff --git a/library/stdarch/crates/core_arch/src/x86/kl.rs b/library/stdarch/crates/core_arch/src/x86/kl.rs index 7cb52847f50d1..26e5a46c62934 100644 --- a/library/stdarch/crates/core_arch/src/x86/kl.rs +++ b/library/stdarch/crates/core_arch/src/x86/kl.rs @@ -352,47 +352,45 @@ mod tests { use stdarch_test::simd_test; #[target_feature(enable = "kl")] - fn encodekey128() -> [u8; 48] { + unsafe fn encodekey128() -> [u8; 48] { let mut handle = [0; 48]; - let _ = unsafe { _mm_encodekey128_u32(0, _mm_setzero_si128(), handle.as_mut_ptr()) }; + let _ = _mm_encodekey128_u32(0, _mm_setzero_si128(), handle.as_mut_ptr()); handle } #[target_feature(enable = "kl")] - fn encodekey256() -> [u8; 64] { + unsafe fn encodekey256() -> [u8; 64] { let mut handle = [0; 64]; - let _ = unsafe { - _mm_encodekey256_u32( - 0, - _mm_setzero_si128(), - _mm_setzero_si128(), - handle.as_mut_ptr(), - ) - }; + let _ = _mm_encodekey256_u32( + 0, + _mm_setzero_si128(), + _mm_setzero_si128(), + handle.as_mut_ptr(), + ); handle } #[simd_test(enable = "kl")] - fn test_mm_encodekey128_u32() { + unsafe fn test_mm_encodekey128_u32() { encodekey128(); } #[simd_test(enable = "kl")] - fn test_mm_encodekey256_u32() { + unsafe fn test_mm_encodekey256_u32() { encodekey256(); } #[simd_test(enable = "kl")] - fn test_mm_aesenc128kl_u8() { + unsafe fn test_mm_aesenc128kl_u8() { let mut buffer = _mm_setzero_si128(); let key = encodekey128(); for _ in 0..100 { - let status = unsafe { _mm_aesenc128kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesenc128kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { _mm_aesdec128kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesdec128kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } @@ -400,16 +398,16 @@ mod tests { } #[simd_test(enable = "kl")] - fn test_mm_aesdec128kl_u8() { + unsafe fn test_mm_aesdec128kl_u8() { let mut buffer = _mm_setzero_si128(); let key = encodekey128(); for _ in 0..100 { - let status = unsafe { _mm_aesdec128kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesdec128kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { _mm_aesenc128kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesenc128kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } @@ -417,16 +415,16 @@ mod tests { } #[simd_test(enable = "kl")] - fn test_mm_aesenc256kl_u8() { + unsafe fn test_mm_aesenc256kl_u8() { let mut buffer = _mm_setzero_si128(); let key = encodekey256(); for _ in 0..100 { - let status = unsafe { _mm_aesenc256kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesenc256kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { _mm_aesdec256kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesdec256kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } @@ -434,16 +432,16 @@ mod tests { } #[simd_test(enable = "kl")] - fn test_mm_aesdec256kl_u8() { + unsafe fn test_mm_aesdec256kl_u8() { let mut buffer = _mm_setzero_si128(); let key = encodekey256(); for _ in 0..100 { - let status = unsafe { _mm_aesdec256kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesdec256kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { _mm_aesenc256kl_u8(&mut buffer, buffer, key.as_ptr()) }; + let status = _mm_aesenc256kl_u8(&mut buffer, buffer, key.as_ptr()); assert_eq!(status, 0); } @@ -451,20 +449,16 @@ mod tests { } #[simd_test(enable = "widekl")] - fn test_mm_aesencwide128kl_u8() { + unsafe fn test_mm_aesencwide128kl_u8() { let mut buffer = [_mm_setzero_si128(); 8]; let key = encodekey128(); for _ in 0..100 { - let status = unsafe { - _mm_aesencwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesencwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { - _mm_aesdecwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesdecwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } @@ -474,20 +468,16 @@ mod tests { } #[simd_test(enable = "widekl")] - fn test_mm_aesdecwide128kl_u8() { + unsafe fn test_mm_aesdecwide128kl_u8() { let mut buffer = [_mm_setzero_si128(); 8]; let key = encodekey128(); for _ in 0..100 { - let status = unsafe { - _mm_aesdecwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesdecwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { - _mm_aesencwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesencwide128kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } @@ -497,20 +487,16 @@ mod tests { } #[simd_test(enable = "widekl")] - fn test_mm_aesencwide256kl_u8() { + unsafe fn test_mm_aesencwide256kl_u8() { let mut buffer = [_mm_setzero_si128(); 8]; let key = encodekey256(); for _ in 0..100 { - let status = unsafe { - _mm_aesencwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesencwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { - _mm_aesdecwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesdecwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } @@ -520,20 +506,16 @@ mod tests { } #[simd_test(enable = "widekl")] - fn test_mm_aesdecwide256kl_u8() { + unsafe fn test_mm_aesdecwide256kl_u8() { let mut buffer = [_mm_setzero_si128(); 8]; let key = encodekey256(); for _ in 0..100 { - let status = unsafe { - _mm_aesdecwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesdecwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } for _ in 0..100 { - let status = unsafe { - _mm_aesencwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()) - }; + let status = _mm_aesencwide256kl_u8(buffer.as_mut_ptr(), buffer.as_ptr(), key.as_ptr()); assert_eq!(status, 0); } diff --git a/library/stdarch/crates/core_arch/src/x86/rtm.rs b/library/stdarch/crates/core_arch/src/x86/rtm.rs index c88bd6592d784..b37e7571eb8f7 100644 --- a/library/stdarch/crates/core_arch/src/x86/rtm.rs +++ b/library/stdarch/crates/core_arch/src/x86/rtm.rs @@ -120,15 +120,13 @@ mod tests { use crate::core_arch::x86::*; #[simd_test(enable = "rtm")] - fn test_xbegin() { + unsafe fn test_xbegin() { let mut x = 0; for _ in 0..10 { - let code = unsafe { _xbegin() }; + let code = _xbegin(); if code == _XBEGIN_STARTED { x += 1; - unsafe { - _xend(); - } + _xend(); assert_eq!(x, 1); break; } @@ -137,23 +135,19 @@ mod tests { } #[simd_test(enable = "rtm")] - fn test_xabort() { + unsafe fn test_xabort() { const ABORT_CODE: u32 = 42; // aborting outside a transactional region does nothing - unsafe { - _xabort::(); - } + _xabort::(); for _ in 0..10 { let mut x = 0; - let code = unsafe { _xbegin() }; + let code = rtm::_xbegin(); if code == _XBEGIN_STARTED { x += 1; - unsafe { - _xabort::(); - } + rtm::_xabort::(); } else if code & _XABORT_EXPLICIT != 0 { - let test_abort_code = _xabort_code(code); + let test_abort_code = rtm::_xabort_code(code); assert_eq!(test_abort_code, ABORT_CODE); } assert_eq!(x, 0); @@ -161,16 +155,14 @@ mod tests { } #[simd_test(enable = "rtm")] - fn test_xtest() { - assert_eq!(unsafe { _xtest() }, 0); + unsafe fn test_xtest() { + assert_eq!(_xtest(), 0); for _ in 0..10 { - let code = unsafe { _xbegin() }; + let code = rtm::_xbegin(); if code == _XBEGIN_STARTED { - let in_tx = unsafe { _xtest() }; - unsafe { - _xend(); - } + let in_tx = _xtest(); + rtm::_xend(); // putting the assert inside the transaction would abort the transaction on fail // without any output/panic/etc diff --git a/library/stdarch/crates/core_arch/src/x86/sse.rs b/library/stdarch/crates/core_arch/src/x86/sse.rs index b83274e60e72a..38b309c1cb79a 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse.rs @@ -3147,21 +3147,21 @@ mod tests { } #[simd_test(enable = "sse")] - const fn test_mm_load_ss() { + const unsafe fn test_mm_load_ss() { let a = 42.0f32; - let r = unsafe { _mm_load_ss(ptr::addr_of!(a)) }; + let r = _mm_load_ss(ptr::addr_of!(a)); assert_eq_m128(r, _mm_setr_ps(42.0, 0.0, 0.0, 0.0)); } #[simd_test(enable = "sse")] - const fn test_mm_load1_ps() { + const unsafe fn test_mm_load1_ps() { let a = 42.0f32; - let r = unsafe { _mm_load1_ps(ptr::addr_of!(a)) }; + let r = _mm_load1_ps(ptr::addr_of!(a)); assert_eq_m128(r, _mm_setr_ps(42.0, 42.0, 42.0, 42.0)); } #[simd_test(enable = "sse")] - const fn test_mm_load_ps() { + const unsafe fn test_mm_load_ps() { let vals = Memory { data: [1.0f32, 2.0, 3.0, 4.0], }; @@ -3169,21 +3169,21 @@ mod tests { // guaranteed to be aligned to 16 bytes let p = vals.data.as_ptr(); - let r = unsafe { _mm_load_ps(p) }; + let r = _mm_load_ps(p); let e = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); assert_eq_m128(r, e); } #[simd_test(enable = "sse")] - const fn test_mm_loadu_ps() { + const unsafe fn test_mm_loadu_ps() { let vals = &[1.0f32, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]; - let p = unsafe { vals.as_ptr().add(3) }; - let r = unsafe { _mm_loadu_ps(black_box(p)) }; + let p = vals.as_ptr().add(3); + let r = _mm_loadu_ps(black_box(p)); assert_eq_m128(r, _mm_setr_ps(4.0, 5.0, 6.0, 7.0)); } #[simd_test(enable = "sse")] - const fn test_mm_loadr_ps() { + const unsafe fn test_mm_loadr_ps() { let vals = Memory { data: [1.0f32, 2.0, 3.0, 4.0], }; @@ -3191,18 +3191,16 @@ mod tests { // guaranteed to be aligned to 16 bytes let p = vals.data.as_ptr(); - let r = unsafe { _mm_loadr_ps(p) }; + let r = _mm_loadr_ps(p); let e = _mm_setr_ps(4.0, 3.0, 2.0, 1.0); assert_eq_m128(r, e); } #[simd_test(enable = "sse")] - const fn test_mm_store_ss() { + const unsafe fn test_mm_store_ss() { let mut vals = [0.0f32; 8]; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); - unsafe { - _mm_store_ss(vals.as_mut_ptr().add(1), a); - } + _mm_store_ss(vals.as_mut_ptr().add(1), a); assert_eq!(vals[0], 0.0); assert_eq!(vals[1], 1.0); @@ -3210,52 +3208,46 @@ mod tests { } #[simd_test(enable = "sse")] - const fn test_mm_store1_ps() { + const unsafe fn test_mm_store1_ps() { let mut vals = Memory { data: [0.0f32; 4] }; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); // guaranteed to be aligned to 16 bytes let p = vals.data.as_mut_ptr(); - unsafe { - _mm_store1_ps(p, *black_box(&a)); - } + _mm_store1_ps(p, *black_box(&a)); assert_eq!(vals.data, [1.0, 1.0, 1.0, 1.0]); } #[simd_test(enable = "sse")] - const fn test_mm_store_ps() { + const unsafe fn test_mm_store_ps() { let mut vals = Memory { data: [0.0f32; 4] }; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); // guaranteed to be aligned to 16 bytes let p = vals.data.as_mut_ptr(); - unsafe { - _mm_store_ps(p, *black_box(&a)); - } + _mm_store_ps(p, *black_box(&a)); assert_eq!(vals.data, [1.0, 2.0, 3.0, 4.0]); } #[simd_test(enable = "sse")] - const fn test_mm_storer_ps() { + const unsafe fn test_mm_storer_ps() { let mut vals = Memory { data: [0.0f32; 4] }; let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); // guaranteed to be aligned to 16 bytes let p = vals.data.as_mut_ptr(); - unsafe { - _mm_storer_ps(p, *black_box(&a)); - } + _mm_storer_ps(p, *black_box(&a)); assert_eq!(vals.data, [4.0, 3.0, 2.0, 1.0]); } #[simd_test(enable = "sse")] - const fn test_mm_storeu_ps() { + const unsafe fn test_mm_storeu_ps() { #[repr(align(16))] struct Memory8 { data: [f32; 8], @@ -3266,11 +3258,9 @@ mod tests { let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); // guaranteed to be *not* aligned to 16 bytes - let p = unsafe { vals.data.as_mut_ptr().offset(1) }; + let p = vals.data.as_mut_ptr().offset(1); - unsafe { - _mm_storeu_ps(p, *black_box(&a)); - } + _mm_storeu_ps(p, *black_box(&a)); assert_eq!(vals.data, [0.0, 1.0, 2.0, 3.0, 4.0, 0.0, 0.0, 0.0]); } @@ -3325,13 +3315,11 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_ps() { + unsafe fn test_mm_stream_ps() { let a = _mm_set1_ps(7.0); let mut mem = Memory { data: [-1.0; 4] }; - unsafe { - _mm_stream_ps(ptr::addr_of_mut!(mem.data[0]), a); - } + _mm_stream_ps(ptr::addr_of_mut!(mem.data[0]), a); _mm_sfence(); for i in 0..4 { assert_eq!(mem.data[i], get_m128(a, i)); diff --git a/library/stdarch/crates/core_arch/src/x86/sse2.rs b/library/stdarch/crates/core_arch/src/x86/sse2.rs index f339a003df4d1..d712c4f4c5d7a 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse2.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse2.rs @@ -3291,11 +3291,9 @@ mod tests { } #[simd_test(enable = "sse2")] - fn test_mm_clflush() { + unsafe fn test_mm_clflush() { let x = 0_u8; - unsafe { - _mm_clflush(ptr::addr_of!(x)); - } + _mm_clflush(ptr::addr_of!(x)); } #[simd_test(enable = "sse2")] @@ -3727,7 +3725,7 @@ mod tests { } #[simd_test(enable = "sse2")] - fn test_mm_sll_epi16() { + unsafe fn test_mm_sll_epi16() { let a = _mm_setr_epi16(0xCC, -0xCC, 0xDD, -0xDD, 0xEE, -0xEE, 0xFF, -0xFF); let r = _mm_sll_epi16(a, _mm_set_epi64x(0, 4)); assert_eq_m128i( @@ -4073,7 +4071,7 @@ mod tests { } #[simd_test(enable = "sse2")] - fn test_mm_cvtps_epi32() { + unsafe fn test_mm_cvtps_epi32() { let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0); let r = _mm_cvtps_epi32(a); assert_eq_m128i(r, _mm_setr_epi32(1, 2, 3, 4)); @@ -4180,23 +4178,23 @@ mod tests { } #[simd_test(enable = "sse2")] - const fn test_mm_loadl_epi64() { + const unsafe fn test_mm_loadl_epi64() { let a = _mm_setr_epi64x(6, 5); - let r = unsafe { _mm_loadl_epi64(ptr::addr_of!(a)) }; + let r = _mm_loadl_epi64(ptr::addr_of!(a)); assert_eq_m128i(r, _mm_setr_epi64x(6, 0)); } #[simd_test(enable = "sse2")] - const fn test_mm_load_si128() { + const unsafe fn test_mm_load_si128() { let a = _mm_set_epi64x(5, 6); - let r = unsafe { _mm_load_si128(ptr::addr_of!(a) as *const _) }; + let r = _mm_load_si128(ptr::addr_of!(a) as *const _); assert_eq_m128i(a, r); } #[simd_test(enable = "sse2")] - const fn test_mm_loadu_si128() { + const unsafe fn test_mm_loadu_si128() { let a = _mm_set_epi64x(5, 6); - let r = unsafe { _mm_loadu_si128(ptr::addr_of!(a) as *const _) }; + let r = _mm_loadu_si128(ptr::addr_of!(a) as *const _); assert_eq_m128i(a, r); } @@ -4204,7 +4202,7 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_maskmoveu_si128() { + unsafe fn test_mm_maskmoveu_si128() { let a = _mm_set1_epi8(9); #[rustfmt::skip] let mask = _mm_set_epi8( @@ -4212,41 +4210,33 @@ mod tests { 0, 0, 0, 0, 0, 0, 0, 0, ); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_maskmoveu_si128(a, mask, ptr::addr_of_mut!(r) as *mut i8); - } + _mm_maskmoveu_si128(a, mask, ptr::addr_of_mut!(r) as *mut i8); _mm_sfence(); let e = _mm_set_epi8(0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); assert_eq_m128i(r, e); } #[simd_test(enable = "sse2")] - const fn test_mm_store_si128() { + const unsafe fn test_mm_store_si128() { let a = _mm_set1_epi8(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_store_si128(&mut r, a); - } + _mm_store_si128(&mut r, a); assert_eq_m128i(r, a); } #[simd_test(enable = "sse2")] - const fn test_mm_storeu_si128() { + const unsafe fn test_mm_storeu_si128() { let a = _mm_set1_epi8(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_storeu_si128(&mut r, a); - } + _mm_storeu_si128(&mut r, a); assert_eq_m128i(r, a); } #[simd_test(enable = "sse2")] - const fn test_mm_storel_epi64() { + const unsafe fn test_mm_storel_epi64() { let a = _mm_setr_epi64x(2, 9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_storel_epi64(&mut r, a); - } + _mm_storel_epi64(&mut r, a); assert_eq_m128i(r, _mm_setr_epi64x(2, 0)); } @@ -4254,12 +4244,10 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_si128() { + unsafe fn test_mm_stream_si128() { let a = _mm_setr_epi32(1, 2, 3, 4); let mut r = _mm_undefined_si128(); - unsafe { - _mm_stream_si128(ptr::addr_of_mut!(r), a); - } + _mm_stream_si128(ptr::addr_of_mut!(r), a); _mm_sfence(); assert_eq_m128i(r, a); } @@ -4268,12 +4256,10 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_si32() { + unsafe fn test_mm_stream_si32() { let a: i32 = 7; let mut mem = boxed::Box::::new(-1); - unsafe { - _mm_stream_si32(ptr::addr_of_mut!(*mem), a); - } + _mm_stream_si32(ptr::addr_of_mut!(*mem), a); _mm_sfence(); assert_eq!(a, *mem); } @@ -4923,40 +4909,40 @@ mod tests { } #[simd_test(enable = "sse2")] - const fn test_mm_load_pd() { + const unsafe fn test_mm_load_pd() { let mem = Memory { data: [1.0f64, 2.0, 3.0, 4.0], }; let vals = &mem.data; let d = vals.as_ptr(); - let r = unsafe { _mm_load_pd(d) }; + let r = _mm_load_pd(d); assert_eq_m128d(r, _mm_setr_pd(1.0, 2.0)); } #[simd_test(enable = "sse2")] - const fn test_mm_load_sd() { + const unsafe fn test_mm_load_sd() { let a = 1.; let expected = _mm_setr_pd(a, 0.); - let r = unsafe { _mm_load_sd(&a) }; + let r = _mm_load_sd(&a); assert_eq_m128d(r, expected); } #[simd_test(enable = "sse2")] - const fn test_mm_loadh_pd() { + const unsafe fn test_mm_loadh_pd() { let a = _mm_setr_pd(1., 2.); let b = 3.; let expected = _mm_setr_pd(_mm_cvtsd_f64(a), 3.); - let r = unsafe { _mm_loadh_pd(a, &b) }; + let r = _mm_loadh_pd(a, &b); assert_eq_m128d(r, expected); } #[simd_test(enable = "sse2")] - const fn test_mm_loadl_pd() { + const unsafe fn test_mm_loadl_pd() { let a = _mm_setr_pd(1., 2.); let b = 3.; let expected = _mm_setr_pd(3., get_m128d(a, 1)); - let r = unsafe { _mm_loadl_pd(a, &b) }; + let r = _mm_loadl_pd(a, &b); assert_eq_m128d(r, expected); } @@ -4964,7 +4950,7 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_pd() { + unsafe fn test_mm_stream_pd() { #[repr(align(128))] struct Memory { pub data: [f64; 2], @@ -4972,9 +4958,7 @@ mod tests { let a = _mm_set1_pd(7.0); let mut mem = Memory { data: [-1.0; 2] }; - unsafe { - _mm_stream_pd(ptr::addr_of_mut!(mem.data[0]), a); - } + _mm_stream_pd(ptr::addr_of_mut!(mem.data[0]), a); _mm_sfence(); for i in 0..2 { assert_eq!(mem.data[i], get_m128d(a, i)); @@ -4982,154 +4966,132 @@ mod tests { } #[simd_test(enable = "sse2")] - const fn test_mm_store_sd() { + const unsafe fn test_mm_store_sd() { let mut dest = 0.; let a = _mm_setr_pd(1., 2.); - unsafe { - _mm_store_sd(&mut dest, a); - } + _mm_store_sd(&mut dest, a); assert_eq!(dest, _mm_cvtsd_f64(a)); } #[simd_test(enable = "sse2")] - const fn test_mm_store_pd() { + const unsafe fn test_mm_store_pd() { let mut mem = Memory { data: [0.0f64; 4] }; let vals = &mut mem.data; let a = _mm_setr_pd(1.0, 2.0); let d = vals.as_mut_ptr(); - unsafe { - _mm_store_pd(d, *black_box(&a)); - } + _mm_store_pd(d, *black_box(&a)); assert_eq!(vals[0], 1.0); assert_eq!(vals[1], 2.0); } #[simd_test(enable = "sse2")] - const fn test_mm_storeu_pd() { + const unsafe fn test_mm_storeu_pd() { // guaranteed to be aligned to 16 bytes let mut mem = Memory { data: [0.0f64; 4] }; let vals = &mut mem.data; let a = _mm_setr_pd(1.0, 2.0); // so p is *not* aligned to 16 bytes - unsafe { - let p = vals.as_mut_ptr().offset(1); - _mm_storeu_pd(p, *black_box(&a)); - } + let p = vals.as_mut_ptr().offset(1); + _mm_storeu_pd(p, *black_box(&a)); assert_eq!(*vals, [0.0, 1.0, 2.0, 0.0]); } #[simd_test(enable = "sse2")] - const fn test_mm_storeu_si16() { + const unsafe fn test_mm_storeu_si16() { let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8); let mut r = _mm_setr_epi16(9, 10, 11, 12, 13, 14, 15, 16); - unsafe { - _mm_storeu_si16(ptr::addr_of_mut!(r).cast(), a); - } + _mm_storeu_si16(ptr::addr_of_mut!(r).cast(), a); let e = _mm_setr_epi16(1, 10, 11, 12, 13, 14, 15, 16); assert_eq_m128i(r, e); } #[simd_test(enable = "sse2")] - const fn test_mm_storeu_si32() { + const unsafe fn test_mm_storeu_si32() { let a = _mm_setr_epi32(1, 2, 3, 4); let mut r = _mm_setr_epi32(5, 6, 7, 8); - unsafe { - _mm_storeu_si32(ptr::addr_of_mut!(r).cast(), a); - } + _mm_storeu_si32(ptr::addr_of_mut!(r).cast(), a); let e = _mm_setr_epi32(1, 6, 7, 8); assert_eq_m128i(r, e); } #[simd_test(enable = "sse2")] - const fn test_mm_storeu_si64() { + const unsafe fn test_mm_storeu_si64() { let a = _mm_setr_epi64x(1, 2); let mut r = _mm_setr_epi64x(3, 4); - unsafe { - _mm_storeu_si64(ptr::addr_of_mut!(r).cast(), a); - } + _mm_storeu_si64(ptr::addr_of_mut!(r).cast(), a); let e = _mm_setr_epi64x(1, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "sse2")] - const fn test_mm_store1_pd() { + const unsafe fn test_mm_store1_pd() { let mut mem = Memory { data: [0.0f64; 4] }; let vals = &mut mem.data; let a = _mm_setr_pd(1.0, 2.0); let d = vals.as_mut_ptr(); - unsafe { - _mm_store1_pd(d, *black_box(&a)); - } + _mm_store1_pd(d, *black_box(&a)); assert_eq!(vals[0], 1.0); assert_eq!(vals[1], 1.0); } #[simd_test(enable = "sse2")] - const fn test_mm_store_pd1() { + const unsafe fn test_mm_store_pd1() { let mut mem = Memory { data: [0.0f64; 4] }; let vals = &mut mem.data; let a = _mm_setr_pd(1.0, 2.0); let d = vals.as_mut_ptr(); - unsafe { - _mm_store_pd1(d, *black_box(&a)); - } + _mm_store_pd1(d, *black_box(&a)); assert_eq!(vals[0], 1.0); assert_eq!(vals[1], 1.0); } #[simd_test(enable = "sse2")] - const fn test_mm_storer_pd() { + const unsafe fn test_mm_storer_pd() { let mut mem = Memory { data: [0.0f64; 4] }; let vals = &mut mem.data; let a = _mm_setr_pd(1.0, 2.0); let d = vals.as_mut_ptr(); - unsafe { - _mm_storer_pd(d, *black_box(&a)); - } + _mm_storer_pd(d, *black_box(&a)); assert_eq!(vals[0], 2.0); assert_eq!(vals[1], 1.0); } #[simd_test(enable = "sse2")] - const fn test_mm_storeh_pd() { + const unsafe fn test_mm_storeh_pd() { let mut dest = 0.; let a = _mm_setr_pd(1., 2.); - unsafe { - _mm_storeh_pd(&mut dest, a); - } + _mm_storeh_pd(&mut dest, a); assert_eq!(dest, get_m128d(a, 1)); } #[simd_test(enable = "sse2")] - const fn test_mm_storel_pd() { + const unsafe fn test_mm_storel_pd() { let mut dest = 0.; let a = _mm_setr_pd(1., 2.); - unsafe { - _mm_storel_pd(&mut dest, a); - } + _mm_storel_pd(&mut dest, a); assert_eq!(dest, _mm_cvtsd_f64(a)); } #[simd_test(enable = "sse2")] - const fn test_mm_loadr_pd() { + const unsafe fn test_mm_loadr_pd() { let mut mem = Memory { data: [1.0f64, 2.0, 3.0, 4.0], }; let vals = &mut mem.data; let d = vals.as_ptr(); - let r = unsafe { _mm_loadr_pd(d) }; + let r = _mm_loadr_pd(d); assert_eq_m128d(r, _mm_setr_pd(2.0, 1.0)); } #[simd_test(enable = "sse2")] - const fn test_mm_loadu_pd() { + const unsafe fn test_mm_loadu_pd() { // guaranteed to be aligned to 16 bytes let mut mem = Memory { data: [1.0f64, 2.0, 3.0, 4.0], @@ -5137,31 +5099,31 @@ mod tests { let vals = &mut mem.data; // so this will *not* be aligned to 16 bytes - let d = unsafe { vals.as_ptr().offset(1) }; + let d = vals.as_ptr().offset(1); - let r = unsafe { _mm_loadu_pd(d) }; + let r = _mm_loadu_pd(d); let e = _mm_setr_pd(2.0, 3.0); assert_eq_m128d(r, e); } #[simd_test(enable = "sse2")] - const fn test_mm_loadu_si16() { + const unsafe fn test_mm_loadu_si16() { let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8); - let r = unsafe { _mm_loadu_si16(ptr::addr_of!(a) as *const _) }; + let r = _mm_loadu_si16(ptr::addr_of!(a) as *const _); assert_eq_m128i(r, _mm_setr_epi16(1, 0, 0, 0, 0, 0, 0, 0)); } #[simd_test(enable = "sse2")] - const fn test_mm_loadu_si32() { + const unsafe fn test_mm_loadu_si32() { let a = _mm_setr_epi32(1, 2, 3, 4); - let r = unsafe { _mm_loadu_si32(ptr::addr_of!(a) as *const _) }; + let r = _mm_loadu_si32(ptr::addr_of!(a) as *const _); assert_eq_m128i(r, _mm_setr_epi32(1, 0, 0, 0)); } #[simd_test(enable = "sse2")] - const fn test_mm_loadu_si64() { + const unsafe fn test_mm_loadu_si64() { let a = _mm_setr_epi64x(5, 6); - let r = unsafe { _mm_loadu_si64(ptr::addr_of!(a) as *const _) }; + let r = _mm_loadu_si64(ptr::addr_of!(a) as *const _); assert_eq_m128i(r, _mm_setr_epi64x(5, 0)); } @@ -5340,16 +5302,16 @@ mod tests { } #[simd_test(enable = "sse2")] - const fn test_mm_load1_pd() { + const unsafe fn test_mm_load1_pd() { let d = -5.0; - let r = unsafe { _mm_load1_pd(&d) }; + let r = _mm_load1_pd(&d); assert_eq_m128d(r, _mm_setr_pd(d, d)); } #[simd_test(enable = "sse2")] - const fn test_mm_load_pd1() { + const unsafe fn test_mm_load_pd1() { let d = -5.0; - let r = unsafe { _mm_load_pd1(&d) }; + let r = _mm_load_pd1(&d); assert_eq_m128d(r, _mm_setr_pd(d, d)); } diff --git a/library/stdarch/crates/core_arch/src/x86/sse3.rs b/library/stdarch/crates/core_arch/src/x86/sse3.rs index e4c75702544d9..68817856f44ab 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse3.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse3.rs @@ -239,7 +239,7 @@ mod tests { } #[simd_test(enable = "sse3")] - fn test_mm_lddqu_si128() { + unsafe fn test_mm_lddqu_si128() { #[rustfmt::skip] let a = _mm_setr_epi8( 1, 2, 3, 4, @@ -247,7 +247,7 @@ mod tests { 9, 10, 11, 12, 13, 14, 15, 16, ); - let r = unsafe { _mm_lddqu_si128(&a) }; + let r = _mm_lddqu_si128(&a); assert_eq_m128i(a, r); } @@ -273,9 +273,9 @@ mod tests { } #[simd_test(enable = "sse3")] - const fn test_mm_loaddup_pd() { + const unsafe fn test_mm_loaddup_pd() { let d = -5.0; - let r = unsafe { _mm_loaddup_pd(&d) }; + let r = _mm_loaddup_pd(&d); assert_eq_m128d(r, _mm_setr_pd(d, d)); } } diff --git a/library/stdarch/crates/core_arch/src/x86/sse41.rs b/library/stdarch/crates/core_arch/src/x86/sse41.rs index 7ad4306f36f21..a499bf898b809 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse41.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse41.rs @@ -1219,20 +1219,20 @@ mod tests { } #[simd_test(enable = "sse4.1")] - const fn test_mm_blendv_pd() { + const unsafe fn test_mm_blendv_pd() { let a = _mm_set1_pd(0.0); let b = _mm_set1_pd(1.0); - let mask = _mm_castsi128_pd(_mm_setr_epi64x(0, -1)); + let mask = transmute(_mm_setr_epi64x(0, -1)); let r = _mm_blendv_pd(a, b, mask); let e = _mm_setr_pd(0.0, 1.0); assert_eq_m128d(r, e); } #[simd_test(enable = "sse4.1")] - const fn test_mm_blendv_ps() { + const unsafe fn test_mm_blendv_ps() { let a = _mm_set1_ps(0.0); let b = _mm_set1_ps(1.0); - let mask = _mm_castsi128_ps(_mm_setr_epi32(0, -1, 0, -1)); + let mask = transmute(_mm_setr_epi32(0, -1, 0, -1)); let r = _mm_blendv_ps(a, b, mask); let e = _mm_setr_ps(0.0, 1.0, 0.0, 1.0); assert_eq_m128(r, e); @@ -1949,9 +1949,9 @@ mod tests { } #[simd_test(enable = "sse4.1")] - fn test_mm_stream_load_si128() { + unsafe fn test_mm_stream_load_si128() { let a = _mm_set_epi64x(5, 6); - let r = unsafe { _mm_stream_load_si128(core::ptr::addr_of!(a) as *const _) }; + let r = _mm_stream_load_si128(core::ptr::addr_of!(a) as *const _); assert_eq_m128i(a, r); } } diff --git a/library/stdarch/crates/core_arch/src/x86/sse42.rs b/library/stdarch/crates/core_arch/src/x86/sse42.rs index 55e22592637f1..65d1fe4d62339 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse42.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse42.rs @@ -613,7 +613,6 @@ mod tests { use crate::core_arch::assert_eq_const as assert_eq; use stdarch_test::simd_test; - use crate::core_arch::simd::*; use crate::core_arch::x86::*; use std::ptr; @@ -626,7 +625,7 @@ mod tests { assert!(s.len() <= 16); let mut array = [0u8; 16]; array[..s.len()].copy_from_slice(s); - u8x16::from_array(array).as_m128i() + unsafe { transmute(array) } } #[simd_test(enable = "sse4.2")] diff --git a/library/stdarch/crates/core_arch/src/x86/sse4a.rs b/library/stdarch/crates/core_arch/src/x86/sse4a.rs index f36b879a030e3..020baeff152d9 100644 --- a/library/stdarch/crates/core_arch/src/x86/sse4a.rs +++ b/library/stdarch/crates/core_arch/src/x86/sse4a.rs @@ -206,7 +206,7 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_sd() { + unsafe fn test_mm_stream_sd() { let mut mem = MemoryF64 { data: [1.0_f64, 2.0], }; @@ -216,9 +216,7 @@ mod tests { let x = _mm_setr_pd(3.0, 4.0); - unsafe { - _mm_stream_sd(d, x); - } + _mm_stream_sd(d, x); _mm_sfence(); } assert_eq!(mem.data[0], 3.0); @@ -234,7 +232,7 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_ss() { + unsafe fn test_mm_stream_ss() { let mut mem = MemoryF32 { data: [1.0_f32, 2.0, 3.0, 4.0], }; @@ -244,9 +242,7 @@ mod tests { let x = _mm_setr_ps(5.0, 6.0, 7.0, 8.0); - unsafe { - _mm_stream_ss(d, x); - } + _mm_stream_ss(d, x); _mm_sfence(); } assert_eq!(mem.data[0], 5.0); diff --git a/library/stdarch/crates/core_arch/src/x86/xsave.rs b/library/stdarch/crates/core_arch/src/x86/xsave.rs index e22d3580ff463..653eb28c42680 100644 --- a/library/stdarch/crates/core_arch/src/x86/xsave.rs +++ b/library/stdarch/crates/core_arch/src/x86/xsave.rs @@ -197,53 +197,47 @@ mod tests { #[simd_test(enable = "xsave")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsave() { + unsafe fn test_xsave() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsave(a.ptr(), m); - _xrstor(a.ptr(), m); - _xsave(b.ptr(), m); - } + _xsave(a.ptr(), m); + _xrstor(a.ptr(), m); + _xsave(b.ptr(), m); } #[simd_test(enable = "xsave")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xgetbv() { + unsafe fn test_xgetbv() { let xcr_n: u32 = _XCR_XFEATURE_ENABLED_MASK; - let xcr: u64 = unsafe { _xgetbv(xcr_n) }; - let xcr_cpy: u64 = unsafe { _xgetbv(xcr_n) }; + let xcr: u64 = _xgetbv(xcr_n); + let xcr_cpy: u64 = _xgetbv(xcr_n); assert_eq!(xcr, xcr_cpy); } #[simd_test(enable = "xsave,xsaveopt")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsaveopt() { + unsafe fn test_xsaveopt() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsaveopt(a.ptr(), m); - _xrstor(a.ptr(), m); - _xsaveopt(b.ptr(), m); - } + _xsaveopt(a.ptr(), m); + _xrstor(a.ptr(), m); + _xsaveopt(b.ptr(), m); } #[simd_test(enable = "xsave,xsavec")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsavec() { + unsafe fn test_xsavec() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsavec(a.ptr(), m); - _xrstor(a.ptr(), m); - _xsavec(b.ptr(), m); - } + _xsavec(a.ptr(), m); + _xrstor(a.ptr(), m); + _xsavec(b.ptr(), m); } } diff --git a/library/stdarch/crates/core_arch/src/x86_64/amx.rs b/library/stdarch/crates/core_arch/src/x86_64/amx.rs index 4e20e014cf20a..f372f7066d510 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/amx.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/amx.rs @@ -581,297 +581,267 @@ mod tests { } #[simd_test(enable = "amx-tile")] - fn test_tile_loadconfig() { - unsafe { - let config = __tilecfg::default(); - _tile_loadconfig(config.as_ptr()); - _tile_release(); - } + unsafe fn test_tile_loadconfig() { + let config = __tilecfg::default(); + _tile_loadconfig(config.as_ptr()); + _tile_release(); } #[simd_test(enable = "amx-tile")] - fn test_tile_storeconfig() { - unsafe { - let config = __tilecfg::new(1, 0, [32; 8], [8; 8]); - _tile_loadconfig(config.as_ptr()); - let mut _config = __tilecfg::default(); - _tile_storeconfig(_config.as_mut_ptr()); - _tile_release(); - assert_eq!(config, _config); - } + unsafe fn test_tile_storeconfig() { + let config = __tilecfg::new(1, 0, [32; 8], [8; 8]); + _tile_loadconfig(config.as_ptr()); + let mut _config = __tilecfg::default(); + _tile_storeconfig(_config.as_mut_ptr()); + _tile_release(); + assert_eq!(config, _config); } #[simd_test(enable = "amx-tile")] - fn test_tile_zero() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mut out = [[1_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[0; 64]; 16]); - } + unsafe fn test_tile_zero() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mut out = [[1_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[0; 64]; 16]); } #[simd_test(enable = "amx-tile")] - fn test_tile_stored() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mut out = [[1_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[0; 64]; 16]); - } + unsafe fn test_tile_stored() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mut out = [[1_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[0; 64]; 16]); } #[simd_test(enable = "amx-tile")] - fn test_tile_loadd() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mat = [1_i8; 1024]; - _tile_loadd::<0>(&mat as *const i8 as *const u8, 64); - let mut out = [[0_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[1; 64]; 16]); - } + unsafe fn test_tile_loadd() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mat = [1_i8; 1024]; + _tile_loadd::<0>(&mat as *const i8 as *const u8, 64); + let mut out = [[0_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[1; 64]; 16]); } #[simd_test(enable = "amx-tile")] - fn test_tile_stream_loadd() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mat = [1_i8; 1024]; - _tile_stream_loadd::<0>(&mat as *const i8 as *const u8, 64); - let mut out = [[0_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[1; 64]; 16]); - } + unsafe fn test_tile_stream_loadd() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mat = [1_i8; 1024]; + _tile_stream_loadd::<0>(&mat as *const i8 as *const u8, 64); + let mut out = [[0_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[1; 64]; 16]); } #[simd_test(enable = "amx-tile")] - fn test_tile_release() { - unsafe { - _tile_release(); - } + unsafe fn test_tile_release() { + _tile_release(); } #[simd_test(enable = "amx-bf16,avx512f")] - fn test_tile_dpbf16ps() { - unsafe { - _init_amx(); - let bf16_1: u16 = _mm_cvtness_sbh(1.0).to_bits(); - let bf16_2: u16 = _mm_cvtness_sbh(2.0).to_bits(); - let ones: [u8; 1024] = transmute([bf16_1; 512]); - let twos: [u8; 1024] = transmute([bf16_2; 512]); - let mut res = [[0f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dpbf16ps::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[64f32; 16]; 16]); - } + unsafe fn test_tile_dpbf16ps() { + _init_amx(); + let bf16_1: u16 = _mm_cvtness_sbh(1.0).to_bits(); + let bf16_2: u16 = _mm_cvtness_sbh(2.0).to_bits(); + let ones: [u8; 1024] = transmute([bf16_1; 512]); + let twos: [u8; 1024] = transmute([bf16_2; 512]); + let mut res = [[0f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dpbf16ps::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[64f32; 16]; 16]); } #[simd_test(enable = "amx-int8")] - fn test_tile_dpbssd() { - unsafe { - _init_amx(); - let ones = [-1_i8; 1024]; - let twos = [-2_i8; 1024]; - let mut res = [[0_i32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const i8 as *const u8, 64); - _tile_loadd::<2>(&twos as *const i8 as *const u8, 64); - _tile_dpbssd::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[128_i32; 16]; 16]); - } + unsafe fn test_tile_dpbssd() { + _init_amx(); + let ones = [-1_i8; 1024]; + let twos = [-2_i8; 1024]; + let mut res = [[0_i32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const i8 as *const u8, 64); + _tile_loadd::<2>(&twos as *const i8 as *const u8, 64); + _tile_dpbssd::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[128_i32; 16]; 16]); } #[simd_test(enable = "amx-int8")] - fn test_tile_dpbsud() { - unsafe { - _init_amx(); - let ones = [-1_i8; 1024]; - let twos = [2_u8; 1024]; - let mut res = [[0_i32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const i8 as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dpbsud::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[-128_i32; 16]; 16]); - } + unsafe fn test_tile_dpbsud() { + _init_amx(); + let ones = [-1_i8; 1024]; + let twos = [2_u8; 1024]; + let mut res = [[0_i32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const i8 as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dpbsud::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[-128_i32; 16]; 16]); } #[simd_test(enable = "amx-int8")] - fn test_tile_dpbusd() { - unsafe { - _init_amx(); - let ones = [1_u8; 1024]; - let twos = [-2_i8; 1024]; - let mut res = [[0_i32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const i8 as *const u8, 64); - _tile_dpbusd::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[-128_i32; 16]; 16]); - } + unsafe fn test_tile_dpbusd() { + _init_amx(); + let ones = [1_u8; 1024]; + let twos = [-2_i8; 1024]; + let mut res = [[0_i32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const i8 as *const u8, 64); + _tile_dpbusd::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[-128_i32; 16]; 16]); } #[simd_test(enable = "amx-int8")] - fn test_tile_dpbuud() { - unsafe { - _init_amx(); - let ones = [1_u8; 1024]; - let twos = [2_u8; 1024]; - let mut res = [[0_i32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dpbuud::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[128_i32; 16]; 16]); - } + unsafe fn test_tile_dpbuud() { + _init_amx(); + let ones = [1_u8; 1024]; + let twos = [2_u8; 1024]; + let mut res = [[0_i32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dpbuud::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [i32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[128_i32; 16]; 16]); } #[simd_test(enable = "amx-fp16")] - fn test_tile_dpfp16ps() { - unsafe { - _init_amx(); - let ones = [1f16; 512]; - let twos = [2f16; 512]; - let mut res = [[0f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); - _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); - _tile_dpfp16ps::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[64f32; 16]; 16]); - } + unsafe fn test_tile_dpfp16ps() { + _init_amx(); + let ones = [1f16; 512]; + let twos = [2f16; 512]; + let mut res = [[0f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); + _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); + _tile_dpfp16ps::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[64f32; 16]; 16]); } #[simd_test(enable = "amx-complex")] - fn test_tile_cmmimfp16ps() { - unsafe { - _init_amx(); - let ones = [1f16; 512]; - let twos = [2f16; 512]; - let mut res = [[0f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); - _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); - _tile_cmmimfp16ps::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[64f32; 16]; 16]); - } + unsafe fn test_tile_cmmimfp16ps() { + _init_amx(); + let ones = [1f16; 512]; + let twos = [2f16; 512]; + let mut res = [[0f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); + _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); + _tile_cmmimfp16ps::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[64f32; 16]; 16]); } #[simd_test(enable = "amx-complex")] - fn test_tile_cmmrlfp16ps() { - unsafe { - _init_amx(); - let ones = [1f16; 512]; - let twos = [2f16; 512]; - let mut res = [[0f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); - _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); - _tile_cmmrlfp16ps::<0, 1, 2>(); - _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); - _tile_release(); - assert_eq!(res, [[0f32; 16]; 16]); - } + unsafe fn test_tile_cmmrlfp16ps() { + _init_amx(); + let ones = [1f16; 512]; + let twos = [2f16; 512]; + let mut res = [[0f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const f16 as *const u8, 64); + _tile_loadd::<2>(&twos as *const f16 as *const u8, 64); + _tile_cmmrlfp16ps::<0, 1, 2>(); + _tile_stored::<0>(&mut res as *mut [f32; 16] as *mut u8, 64); + _tile_release(); + assert_eq!(res, [[0f32; 16]; 16]); } const BF8_ONE: u8 = 0x3c; @@ -880,245 +850,223 @@ mod tests { const HF8_TWO: u8 = 0x40; #[simd_test(enable = "amx-fp8")] - fn test_tile_dpbf8ps() { - unsafe { - _init_amx(); - let ones = [BF8_ONE; 1024]; - let twos = [BF8_TWO; 1024]; - let mut res = [[0.0_f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dpbf8ps::<0, 1, 2>(); - _tile_stored::<0>(res.as_mut_ptr().cast(), 64); - _tile_release(); - assert_eq!(res, [[128.0_f32; 16]; 16]); - } + unsafe fn test_tile_dpbf8ps() { + _init_amx(); + let ones = [BF8_ONE; 1024]; + let twos = [BF8_TWO; 1024]; + let mut res = [[0.0_f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dpbf8ps::<0, 1, 2>(); + _tile_stored::<0>(res.as_mut_ptr().cast(), 64); + _tile_release(); + assert_eq!(res, [[128.0_f32; 16]; 16]); } #[simd_test(enable = "amx-fp8")] - fn test_tile_dpbhf8ps() { - unsafe { - _init_amx(); - let ones = [BF8_ONE; 1024]; - let twos = [HF8_TWO; 1024]; - let mut res = [[0.0_f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dpbhf8ps::<0, 1, 2>(); - _tile_stored::<0>(res.as_mut_ptr().cast(), 64); - _tile_release(); - assert_eq!(res, [[128.0_f32; 16]; 16]); - } + unsafe fn test_tile_dpbhf8ps() { + _init_amx(); + let ones = [BF8_ONE; 1024]; + let twos = [HF8_TWO; 1024]; + let mut res = [[0.0_f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dpbhf8ps::<0, 1, 2>(); + _tile_stored::<0>(res.as_mut_ptr().cast(), 64); + _tile_release(); + assert_eq!(res, [[128.0_f32; 16]; 16]); } #[simd_test(enable = "amx-fp8")] - fn test_tile_dphbf8ps() { - unsafe { - _init_amx(); - let ones = [HF8_ONE; 1024]; - let twos = [BF8_TWO; 1024]; - let mut res = [[0.0_f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dphbf8ps::<0, 1, 2>(); - _tile_stored::<0>(res.as_mut_ptr().cast(), 64); - _tile_release(); - assert_eq!(res, [[128.0_f32; 16]; 16]); - } + unsafe fn test_tile_dphbf8ps() { + _init_amx(); + let ones = [HF8_ONE; 1024]; + let twos = [BF8_TWO; 1024]; + let mut res = [[0.0_f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dphbf8ps::<0, 1, 2>(); + _tile_stored::<0>(res.as_mut_ptr().cast(), 64); + _tile_release(); + assert_eq!(res, [[128.0_f32; 16]; 16]); } #[simd_test(enable = "amx-fp8")] - fn test_tile_dphf8ps() { - unsafe { - _init_amx(); - let ones = [HF8_ONE; 1024]; - let twos = [HF8_TWO; 1024]; - let mut res = [[0.0_f32; 16]; 16]; - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(&ones as *const u8, 64); - _tile_loadd::<2>(&twos as *const u8, 64); - _tile_dphf8ps::<0, 1, 2>(); - _tile_stored::<0>(res.as_mut_ptr().cast(), 64); - _tile_release(); - assert_eq!(res, [[128.0_f32; 16]; 16]); - } + unsafe fn test_tile_dphf8ps() { + _init_amx(); + let ones = [HF8_ONE; 1024]; + let twos = [HF8_TWO; 1024]; + let mut res = [[0.0_f32; 16]; 16]; + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(&ones as *const u8, 64); + _tile_loadd::<2>(&twos as *const u8, 64); + _tile_dphf8ps::<0, 1, 2>(); + _tile_stored::<0>(res.as_mut_ptr().cast(), 64); + _tile_release(); + assert_eq!(res, [[128.0_f32; 16]; 16]); } #[simd_test(enable = "amx-movrs")] - fn test_tile_loaddrs() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mat = [1_i8; 1024]; - _tile_loaddrs::<0>(&mat as *const i8 as *const u8, 64); - let mut out = [[0_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[1; 64]; 16]); - } + unsafe fn test_tile_loaddrs() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mat = [1_i8; 1024]; + _tile_loaddrs::<0>(&mat as *const i8 as *const u8, 64); + let mut out = [[0_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[1; 64]; 16]); } #[simd_test(enable = "amx-movrs")] - fn test_tile_stream_loaddrs() { - unsafe { - _init_amx(); - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - let mat = [1_i8; 1024]; - _tile_stream_loaddrs::<0>(&mat as *const i8 as *const u8, 64); - let mut out = [[0_i8; 64]; 16]; - _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); - _tile_release(); - assert_eq!(out, [[1; 64]; 16]); - } + unsafe fn test_tile_stream_loaddrs() { + _init_amx(); + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + let mat = [1_i8; 1024]; + _tile_stream_loaddrs::<0>(&mat as *const i8 as *const u8, 64); + let mut out = [[0_i8; 64]; 16]; + _tile_stored::<0>(&mut out as *mut [i8; 64] as *mut u8, 64); + _tile_release(); + assert_eq!(out, [[1; 64]; 16]); } #[simd_test(enable = "amx-avx512,avx10.2")] - fn test_tile_movrow() { - unsafe { - _init_amx(); - let array: [[u8; 64]; 16] = array::from_fn(|i| [i as _; _]); - - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_loadd::<0>(array.as_ptr().cast(), 64); - for i in 0..16 { - let row = _tile_movrow::<0>(i); - assert_eq!(*row.as_u8x64().as_array(), [i as _; _]); - } + unsafe fn test_tile_movrow() { + _init_amx(); + let array: [[u8; 64]; 16] = array::from_fn(|i| [i as _; _]); + + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_loadd::<0>(array.as_ptr().cast(), 64); + for i in 0..16 { + let row = _tile_movrow::<0>(i); + assert_eq!(*row.as_u8x64().as_array(), [i as _; _]); } } #[simd_test(enable = "amx-avx512,avx10.2")] - fn test_tile_cvtrowd2ps() { - unsafe { - _init_amx(); - let array: [[u32; 16]; 16] = array::from_fn(|i| [i as _; _]); - - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_loadd::<0>(array.as_ptr().cast(), 64); - for i in 0..16 { - let row = _tile_cvtrowd2ps::<0>(i); - assert_eq!(*row.as_f32x16().as_array(), [i as _; _]); - } + unsafe fn test_tile_cvtrowd2ps() { + _init_amx(); + let array: [[u32; 16]; 16] = array::from_fn(|i| [i as _; _]); + + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_loadd::<0>(array.as_ptr().cast(), 64); + for i in 0..16 { + let row = _tile_cvtrowd2ps::<0>(i); + assert_eq!(*row.as_f32x16().as_array(), [i as _; _]); } } #[simd_test(enable = "amx-avx512,avx10.2")] - fn test_tile_cvtrowps2phh() { - unsafe { - _init_amx(); - let array: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); - - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_loadd::<0>(array.as_ptr().cast(), 64); - for i in 0..16 { - let row = _tile_cvtrowps2phh::<0>(i); - assert_eq!( - *row.as_f16x32().as_array(), - array::from_fn(|j| if j & 1 == 0 { 0.0 } else { i as _ }) - ); - } + unsafe fn test_tile_cvtrowps2phh() { + _init_amx(); + let array: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); + + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_loadd::<0>(array.as_ptr().cast(), 64); + for i in 0..16 { + let row = _tile_cvtrowps2phh::<0>(i); + assert_eq!( + *row.as_f16x32().as_array(), + array::from_fn(|j| if j & 1 == 0 { 0.0 } else { i as _ }) + ); } } #[simd_test(enable = "amx-avx512,avx10.2")] - fn test_tile_cvtrowps2phl() { - unsafe { - _init_amx(); - let array: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); - - let mut config = __tilecfg::default(); - config.palette = 1; - config.colsb[0] = 64; - config.rows[0] = 16; - _tile_loadconfig(config.as_ptr()); - _tile_loadd::<0>(array.as_ptr().cast(), 64); - for i in 0..16 { - let row = _tile_cvtrowps2phl::<0>(i); - assert_eq!( - *row.as_f16x32().as_array(), - array::from_fn(|j| if j & 1 == 0 { i as _ } else { 0.0 }) - ); - } + unsafe fn test_tile_cvtrowps2phl() { + _init_amx(); + let array: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); + + let mut config = __tilecfg::default(); + config.palette = 1; + config.colsb[0] = 64; + config.rows[0] = 16; + _tile_loadconfig(config.as_ptr()); + _tile_loadd::<0>(array.as_ptr().cast(), 64); + for i in 0..16 { + let row = _tile_cvtrowps2phl::<0>(i); + assert_eq!( + *row.as_f16x32().as_array(), + array::from_fn(|j| if j & 1 == 0 { i as _ } else { 0.0 }) + ); } } #[simd_test(enable = "amx-tf32")] - fn test_tile_mmultf32ps() { - unsafe { - _init_amx(); - let a: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); - let b: [[f32; 16]; 16] = [array::from_fn(|j| j as _); _]; - let mut res = [[0.0; 16]; 16]; - - let mut config = __tilecfg::default(); - config.palette = 1; - (0..=2).for_each(|i| { - config.colsb[i] = 64; - config.rows[i] = 16; - }); - _tile_loadconfig(config.as_ptr()); - _tile_zero::<0>(); - _tile_loadd::<1>(a.as_ptr().cast(), 64); - _tile_loadd::<2>(b.as_ptr().cast(), 64); - _tile_mmultf32ps::<0, 1, 2>(); - _tile_stored::<0>(res.as_mut_ptr().cast(), 64); - _tile_release(); - - let expected = array::from_fn(|i| array::from_fn(|j| 16.0 * i as f32 * j as f32)); - assert_eq!(res, expected); - } + unsafe fn test_tile_mmultf32ps() { + _init_amx(); + let a: [[f32; 16]; 16] = array::from_fn(|i| [i as _; _]); + let b: [[f32; 16]; 16] = [array::from_fn(|j| j as _); _]; + let mut res = [[0.0; 16]; 16]; + + let mut config = __tilecfg::default(); + config.palette = 1; + (0..=2).for_each(|i| { + config.colsb[i] = 64; + config.rows[i] = 16; + }); + _tile_loadconfig(config.as_ptr()); + _tile_zero::<0>(); + _tile_loadd::<1>(a.as_ptr().cast(), 64); + _tile_loadd::<2>(b.as_ptr().cast(), 64); + _tile_mmultf32ps::<0, 1, 2>(); + _tile_stored::<0>(res.as_mut_ptr().cast(), 64); + _tile_release(); + + let expected = array::from_fn(|i| array::from_fn(|j| 16.0 * i as f32 * j as f32)); + assert_eq!(res, expected); } } diff --git a/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs b/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs index 0fd9b09363d4b..368fb0c238e4c 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs @@ -7446,81 +7446,81 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32gather_pd() { + unsafe fn test_mm512_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i32gather_pd::<8>(index, arr.as_ptr()) }; + let r = _mm512_i32gather_pd::<8>(index, arr.as_ptr()); assert_eq_m512d(r, _mm512_setr_pd(0., 16., 32., 48., 64., 80., 96., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32gather_pd() { + unsafe fn test_mm512_mask_i32gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); let src = _mm512_set1_pd(2.); let mask = 0b10101010; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 8 is word-addressing - let r = unsafe { _mm512_mask_i32gather_pd::<8>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i32gather_pd::<8>(src, mask, index, arr.as_ptr()); assert_eq_m512d(r, _mm512_setr_pd(2., 16., 2., 48., 2., 80., 2., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i64gather_pd() { + unsafe fn test_mm512_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); // A multiplier of 8 is word-addressing let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i64gather_pd::<8>(index, arr.as_ptr()) }; + let r = _mm512_i64gather_pd::<8>(index, arr.as_ptr()); assert_eq_m512d(r, _mm512_setr_pd(0., 16., 32., 48., 64., 80., 96., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64gather_pd() { + unsafe fn test_mm512_mask_i64gather_pd() { let arr: [f64; 128] = core::array::from_fn(|i| i as f64); let src = _mm512_set1_pd(2.); let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 8 is word-addressing - let r = unsafe { _mm512_mask_i64gather_pd::<8>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i64gather_pd::<8>(src, mask, index, arr.as_ptr()); assert_eq_m512d(r, _mm512_setr_pd(2., 16., 2., 48., 2., 80., 2., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i64gather_ps() { + unsafe fn test_mm512_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); // A multiplier of 4 is word-addressing #[rustfmt::skip] let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i64gather_ps::<4>(index, arr.as_ptr()) }; + let r = _mm512_i64gather_ps::<4>(index, arr.as_ptr()); assert_eq_m256(r, _mm256_setr_ps(0., 16., 32., 48., 64., 80., 96., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64gather_ps() { + unsafe fn test_mm512_mask_i64gather_ps() { let arr: [f32; 128] = core::array::from_fn(|i| i as f32); let src = _mm256_set1_ps(2.); let mask = 0b10101010; #[rustfmt::skip] let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 4 is word-addressing - let r = unsafe { _mm512_mask_i64gather_ps::<4>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i64gather_ps::<4>(src, mask, index, arr.as_ptr()); assert_eq_m256(r, _mm256_setr_ps(2., 16., 2., 48., 2., 80., 2., 112.)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32gather_epi64() { + unsafe fn test_mm512_i32gather_epi64() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; } // A multiplier of 8 is word-addressing let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i32gather_epi64::<8>(index, arr.as_ptr()) }; + let r = _mm512_i32gather_epi64::<8>(index, arr.as_ptr()); assert_eq_m512i(r, _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32gather_epi64() { + unsafe fn test_mm512_mask_i32gather_epi64() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; @@ -7529,24 +7529,24 @@ mod tests { let mask = 0b10101010; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 8 is word-addressing - let r = unsafe { _mm512_mask_i32gather_epi64::<8>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i32gather_epi64::<8>(src, mask, index, arr.as_ptr()); assert_eq_m512i(r, _mm512_setr_epi64(2, 16, 2, 48, 2, 80, 2, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i64gather_epi64() { + unsafe fn test_mm512_i64gather_epi64() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; } // A multiplier of 8 is word-addressing let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i64gather_epi64::<8>(index, arr.as_ptr()) }; + let r = _mm512_i64gather_epi64::<8>(index, arr.as_ptr()); assert_eq_m512i(r, _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64gather_epi64() { + unsafe fn test_mm512_mask_i64gather_epi64() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; @@ -7555,24 +7555,24 @@ mod tests { let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 8 is word-addressing - let r = unsafe { _mm512_mask_i64gather_epi64::<8>(src, mask, index, arr.as_ptr()) }; + let r = _mm512_mask_i64gather_epi64::<8>(src, mask, index, arr.as_ptr()); assert_eq_m512i(r, _mm512_setr_epi64(2, 16, 2, 48, 2, 80, 2, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i64gather_epi32() { + unsafe fn test_mm512_i64gather_epi32() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; } // A multiplier of 8 is word-addressing let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); - let r = unsafe { _mm512_i64gather_epi32::<8>(index, arr.as_ptr() as *const i32) }; + let r = _mm512_i64gather_epi32::<8>(index, arr.as_ptr() as *const i32); assert_eq_m256i(r, _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64gather_epi32() { + unsafe fn test_mm512_mask_i64gather_epi32() { let mut arr = [0i64; 128]; for i in 0..128i64 { arr[i as usize] = i; @@ -7581,21 +7581,17 @@ mod tests { let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); // A multiplier of 8 is word-addressing - let r = unsafe { - _mm512_mask_i64gather_epi32::<8>(src, mask, index, arr.as_ptr() as *const i32) - }; + let r = _mm512_mask_i64gather_epi32::<8>(src, mask, index, arr.as_ptr() as *const i32); assert_eq_m256i(r, _mm256_setr_epi32(2, 16, 2, 48, 2, 80, 2, 112)); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32scatter_pd() { + unsafe fn test_mm512_i32scatter_pd() { let mut arr = [0f64; 128]; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 8 is word-addressing - unsafe { - _mm512_i32scatter_pd::<8>(arr.as_mut_ptr(), index, src); - } + _mm512_i32scatter_pd::<8>(arr.as_mut_ptr(), index, src); let mut expected = [0f64; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as f64; @@ -7604,15 +7600,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32scatter_pd() { + unsafe fn test_mm512_mask_i32scatter_pd() { let mut arr = [0f64; 128]; let mask = 0b10101010; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 8 is word-addressing - unsafe { - _mm512_mask_i32scatter_pd::<8>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i32scatter_pd::<8>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0f64; 128]; for i in 0..4 { expected[i * 32 + 16] = 2. * (i + 1) as f64; @@ -7621,14 +7615,12 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i64scatter_pd() { + unsafe fn test_mm512_i64scatter_pd() { let mut arr = [0f64; 128]; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 8 is word-addressing - unsafe { - _mm512_i64scatter_pd::<8>(arr.as_mut_ptr(), index, src); - } + _mm512_i64scatter_pd::<8>(arr.as_mut_ptr(), index, src); let mut expected = [0f64; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as f64; @@ -7637,15 +7629,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64scatter_pd() { + unsafe fn test_mm512_mask_i64scatter_pd() { let mut arr = [0f64; 128]; let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 8 is word-addressing - unsafe { - _mm512_mask_i64scatter_pd::<8>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i64scatter_pd::<8>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0f64; 128]; for i in 0..4 { expected[i * 32 + 16] = 2. * (i + 1) as f64; @@ -7654,14 +7644,12 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i64scatter_ps() { + unsafe fn test_mm512_i64scatter_ps() { let mut arr = [0f32; 128]; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 4 is word-addressing - unsafe { - _mm512_i64scatter_ps::<4>(arr.as_mut_ptr(), index, src); - } + _mm512_i64scatter_ps::<4>(arr.as_mut_ptr(), index, src); let mut expected = [0f32; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as f32; @@ -7670,15 +7658,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64scatter_ps() { + unsafe fn test_mm512_mask_i64scatter_ps() { let mut arr = [0f32; 128]; let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.); // A multiplier of 4 is word-addressing - unsafe { - _mm512_mask_i64scatter_ps::<4>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i64scatter_ps::<4>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0f32; 128]; for i in 0..4 { expected[i * 32 + 16] = 2. * (i + 1) as f32; @@ -7687,14 +7673,12 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32scatter_epi64() { + unsafe fn test_mm512_i32scatter_epi64() { let mut arr = [0i64; 128]; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 8 is word-addressing - unsafe { - _mm512_i32scatter_epi64::<8>(arr.as_mut_ptr(), index, src); - } + _mm512_i32scatter_epi64::<8>(arr.as_mut_ptr(), index, src); let mut expected = [0i64; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as i64; @@ -7703,15 +7687,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32scatter_epi64() { + unsafe fn test_mm512_mask_i32scatter_epi64() { let mut arr = [0i64; 128]; let mask = 0b10101010; let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 8 is word-addressing - unsafe { - _mm512_mask_i32scatter_epi64::<8>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i32scatter_epi64::<8>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0i64; 128]; for i in 0..4 { expected[i * 32 + 16] = 2 * (i + 1) as i64; @@ -7720,14 +7702,12 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i64scatter_epi64() { + unsafe fn test_mm512_i64scatter_epi64() { let mut arr = [0i64; 128]; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 8 is word-addressing - unsafe { - _mm512_i64scatter_epi64::<8>(arr.as_mut_ptr(), index, src); - } + _mm512_i64scatter_epi64::<8>(arr.as_mut_ptr(), index, src); let mut expected = [0i64; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as i64; @@ -7736,15 +7716,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64scatter_epi64() { + unsafe fn test_mm512_mask_i64scatter_epi64() { let mut arr = [0i64; 128]; let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 8 is word-addressing - unsafe { - _mm512_mask_i64scatter_epi64::<8>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i64scatter_epi64::<8>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0i64; 128]; for i in 0..4 { expected[i * 32 + 16] = 2 * (i + 1) as i64; @@ -7753,14 +7731,12 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i64scatter_epi32() { + unsafe fn test_mm512_i64scatter_epi32() { let mut arr = [0i32; 128]; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 4 is word-addressing - unsafe { - _mm512_i64scatter_epi32::<4>(arr.as_mut_ptr(), index, src); - } + _mm512_i64scatter_epi32::<4>(arr.as_mut_ptr(), index, src); let mut expected = [0i32; 128]; for i in 0..8 { expected[i * 16] = (i + 1) as i32; @@ -7769,15 +7745,13 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i64scatter_epi32() { + unsafe fn test_mm512_mask_i64scatter_epi32() { let mut arr = [0i32; 128]; let mask = 0b10101010; let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112); let src = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8); // A multiplier of 4 is word-addressing - unsafe { - _mm512_mask_i64scatter_epi32::<4>(arr.as_mut_ptr(), mask, index, src); - } + _mm512_mask_i64scatter_epi32::<4>(arr.as_mut_ptr(), mask, index, src); let mut expected = [0i32; 128]; for i in 0..4 { expected[i * 32 + 16] = 2 * (i + 1) as i32; @@ -7786,640 +7760,559 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_i32logather_epi64() { + unsafe fn test_mm512_i32logather_epi64() { let base_addr: [i64; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); - let r = unsafe { _mm512_i32logather_epi64::<8>(vindex, base_addr.as_ptr()) }; + let r = _mm512_i32logather_epi64::<8>(vindex, base_addr.as_ptr()); let expected = _mm512_setr_epi64(2, 3, 4, 5, 6, 7, 8, 1); assert_eq_m512i(expected, r); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32logather_epi64() { + unsafe fn test_mm512_mask_i32logather_epi64() { let base_addr: [i64; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; let src = _mm512_setr_epi64(9, 10, 11, 12, 13, 14, 15, 16); let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); - let r = unsafe { - _mm512_mask_i32logather_epi64::<8>(src, 0b01010101, vindex, base_addr.as_ptr()) - }; + let r = _mm512_mask_i32logather_epi64::<8>(src, 0b01010101, vindex, base_addr.as_ptr()); let expected = _mm512_setr_epi64(2, 10, 4, 12, 6, 14, 8, 16); assert_eq_m512i(expected, r); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32logather_pd() { + unsafe fn test_mm512_i32logather_pd() { let base_addr: [f64; 8] = [1., 2., 3., 4., 5., 6., 7., 8.]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); - let r = unsafe { _mm512_i32logather_pd::<8>(vindex, base_addr.as_ptr()) }; + let r = _mm512_i32logather_pd::<8>(vindex, base_addr.as_ptr()); let expected = _mm512_setr_pd(2., 3., 4., 5., 6., 7., 8., 1.); assert_eq_m512d(expected, r); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32logather_pd() { + unsafe fn test_mm512_mask_i32logather_pd() { let base_addr: [f64; 8] = [1., 2., 3., 4., 5., 6., 7., 8.]; let src = _mm512_setr_pd(9., 10., 11., 12., 13., 14., 15., 16.); let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); - let r = - unsafe { _mm512_mask_i32logather_pd::<8>(src, 0b01010101, vindex, base_addr.as_ptr()) }; + let r = _mm512_mask_i32logather_pd::<8>(src, 0b01010101, vindex, base_addr.as_ptr()); let expected = _mm512_setr_pd(2., 10., 4., 12., 6., 14., 8., 16.); assert_eq_m512d(expected, r); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32loscatter_epi64() { + unsafe fn test_mm512_i32loscatter_epi64() { let mut base_addr: [i64; 8] = [0; 8]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); let src = _mm512_setr_epi64(2, 3, 4, 5, 6, 7, 8, 1); - unsafe { - _mm512_i32loscatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm512_i32loscatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4, 5, 6, 7, 8]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32loscatter_epi64() { + unsafe fn test_mm512_mask_i32loscatter_epi64() { let mut base_addr: [i64; 8] = [0; 8]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); let src = _mm512_setr_epi64(2, 3, 4, 5, 6, 7, 8, 1); - unsafe { - _mm512_mask_i32loscatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); - } + _mm512_mask_i32loscatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); let expected = [0, 2, 0, 4, 0, 6, 0, 8]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f")] - fn test_mm512_i32loscatter_pd() { + unsafe fn test_mm512_i32loscatter_pd() { let mut base_addr: [f64; 8] = [0.; 8]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); let src = _mm512_setr_pd(2., 3., 4., 5., 6., 7., 8., 1.); - unsafe { - _mm512_i32loscatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm512_i32loscatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4., 5., 6., 7., 8.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_i32loscatter_pd() { + unsafe fn test_mm512_mask_i32loscatter_pd() { let mut base_addr: [f64; 8] = [0.; 8]; let vindex = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0, -1, -1, -1, -1, -1, -1, -1, -1); let src = _mm512_setr_pd(2., 3., 4., 5., 6., 7., 8., 1.); - unsafe { - _mm512_mask_i32loscatter_pd::<8>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); - } + _mm512_mask_i32loscatter_pd::<8>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); let expected = [0., 2., 0., 4., 0., 6., 0., 8.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i32gather_epi32() { + unsafe fn test_mm_mmask_i32gather_epi32() { let base_addr: [i32; 4] = [1, 2, 3, 4]; let src = _mm_setr_epi32(5, 6, 7, 8); let vindex = _mm_setr_epi32(1, 2, 3, 0); - let r = unsafe { _mm_mmask_i32gather_epi32::<4>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i32gather_epi32::<4>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm_setr_epi32(2, 6, 4, 8); assert_eq_m128i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i32gather_epi64() { + unsafe fn test_mm_mmask_i32gather_epi64() { let base_addr: [i64; 2] = [1, 2]; let src = _mm_setr_epi64x(5, 6); let vindex = _mm_setr_epi32(1, 0, -1, -1); - let r = unsafe { _mm_mmask_i32gather_epi64::<8>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i32gather_epi64::<8>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_epi64x(2, 6); assert_eq_m128i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i32gather_pd() { + unsafe fn test_mm_mmask_i32gather_pd() { let base_addr: [f64; 2] = [1., 2.]; let src = _mm_setr_pd(5., 6.); let vindex = _mm_setr_epi32(1, 0, -1, -1); - let r = unsafe { _mm_mmask_i32gather_pd::<8>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i32gather_pd::<8>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_pd(2., 6.); assert_eq_m128d(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i32gather_ps() { + unsafe fn test_mm_mmask_i32gather_ps() { let base_addr: [f32; 4] = [1., 2., 3., 4.]; let src = _mm_setr_ps(5., 6., 7., 8.); let vindex = _mm_setr_epi32(1, 2, 3, 0); - let r = unsafe { _mm_mmask_i32gather_ps::<4>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i32gather_ps::<4>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm_setr_ps(2., 6., 4., 8.); assert_eq_m128(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i64gather_epi32() { + unsafe fn test_mm_mmask_i64gather_epi32() { let base_addr: [i32; 2] = [1, 2]; let src = _mm_setr_epi32(5, 6, 7, 8); let vindex = _mm_setr_epi64x(1, 0); - let r = unsafe { _mm_mmask_i64gather_epi32::<4>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i64gather_epi32::<4>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_epi32(2, 6, 0, 0); assert_eq_m128i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i64gather_epi64() { + unsafe fn test_mm_mmask_i64gather_epi64() { let base_addr: [i64; 2] = [1, 2]; let src = _mm_setr_epi64x(5, 6); let vindex = _mm_setr_epi64x(1, 0); - let r = unsafe { _mm_mmask_i64gather_epi64::<8>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i64gather_epi64::<8>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_epi64x(2, 6); assert_eq_m128i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i64gather_pd() { + unsafe fn test_mm_mmask_i64gather_pd() { let base_addr: [f64; 2] = [1., 2.]; let src = _mm_setr_pd(5., 6.); let vindex = _mm_setr_epi64x(1, 0); - let r = unsafe { _mm_mmask_i64gather_pd::<8>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i64gather_pd::<8>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_pd(2., 6.); assert_eq_m128d(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mmask_i64gather_ps() { + unsafe fn test_mm_mmask_i64gather_ps() { let base_addr: [f32; 2] = [1., 2.]; let src = _mm_setr_ps(5., 6., 7., 8.); let vindex = _mm_setr_epi64x(1, 0); - let r = unsafe { _mm_mmask_i64gather_ps::<4>(src, 0b01, vindex, base_addr.as_ptr()) }; + let r = _mm_mmask_i64gather_ps::<4>(src, 0b01, vindex, base_addr.as_ptr()); let expected = _mm_setr_ps(2., 6., 0., 0.); assert_eq_m128(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i32gather_epi32() { + unsafe fn test_mm256_mmask_i32gather_epi32() { let base_addr: [i32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; let src = _mm256_setr_epi32(9, 10, 11, 12, 13, 14, 15, 16); let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); - let r = unsafe { - _mm256_mmask_i32gather_epi32::<4>(src, 0b01010101, vindex, base_addr.as_ptr()) - }; + let r = _mm256_mmask_i32gather_epi32::<4>(src, 0b01010101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_epi32(2, 10, 4, 12, 6, 14, 8, 16); assert_eq_m256i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i32gather_epi64() { + unsafe fn test_mm256_mmask_i32gather_epi64() { let base_addr: [i64; 4] = [1, 2, 3, 4]; let src = _mm256_setr_epi64x(9, 10, 11, 12); let vindex = _mm_setr_epi32(1, 2, 3, 4); - let r = - unsafe { _mm256_mmask_i32gather_epi64::<8>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i32gather_epi64::<8>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_epi64x(2, 10, 4, 12); assert_eq_m256i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i32gather_pd() { + unsafe fn test_mm256_mmask_i32gather_pd() { let base_addr: [f64; 4] = [1., 2., 3., 4.]; let src = _mm256_setr_pd(9., 10., 11., 12.); let vindex = _mm_setr_epi32(1, 2, 3, 4); - let r = unsafe { _mm256_mmask_i32gather_pd::<8>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i32gather_pd::<8>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_pd(2., 10., 4., 12.); assert_eq_m256d(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i32gather_ps() { + unsafe fn test_mm256_mmask_i32gather_ps() { let base_addr: [f32; 8] = [1., 2., 3., 4., 5., 6., 7., 8.]; let src = _mm256_setr_ps(9., 10., 11., 12., 13., 14., 15., 16.); let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); - let r = - unsafe { _mm256_mmask_i32gather_ps::<4>(src, 0b01010101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i32gather_ps::<4>(src, 0b01010101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_ps(2., 10., 4., 12., 6., 14., 8., 16.); assert_eq_m256(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i64gather_epi32() { + unsafe fn test_mm256_mmask_i64gather_epi32() { let base_addr: [i32; 4] = [1, 2, 3, 4]; let src = _mm_setr_epi32(9, 10, 11, 12); let vindex = _mm256_setr_epi64x(1, 2, 3, 0); - let r = - unsafe { _mm256_mmask_i64gather_epi32::<4>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i64gather_epi32::<4>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm_setr_epi32(2, 10, 4, 12); assert_eq_m128i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i64gather_epi64() { + unsafe fn test_mm256_mmask_i64gather_epi64() { let base_addr: [i64; 4] = [1, 2, 3, 4]; let src = _mm256_setr_epi64x(9, 10, 11, 12); let vindex = _mm256_setr_epi64x(1, 2, 3, 0); - let r = - unsafe { _mm256_mmask_i64gather_epi64::<8>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i64gather_epi64::<8>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_epi64x(2, 10, 4, 12); assert_eq_m256i(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i64gather_pd() { + unsafe fn test_mm256_mmask_i64gather_pd() { let base_addr: [f64; 4] = [1., 2., 3., 4.]; let src = _mm256_setr_pd(9., 10., 11., 12.); let vindex = _mm256_setr_epi64x(1, 2, 3, 0); - let r = unsafe { _mm256_mmask_i64gather_pd::<8>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i64gather_pd::<8>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm256_setr_pd(2., 10., 4., 12.); assert_eq_m256d(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mmask_i64gather_ps() { + unsafe fn test_mm256_mmask_i64gather_ps() { let base_addr: [f32; 4] = [1., 2., 3., 4.]; let src = _mm_setr_ps(9., 10., 11., 12.); let vindex = _mm256_setr_epi64x(1, 2, 3, 0); - let r = unsafe { _mm256_mmask_i64gather_ps::<4>(src, 0b0101, vindex, base_addr.as_ptr()) }; + let r = _mm256_mmask_i64gather_ps::<4>(src, 0b0101, vindex, base_addr.as_ptr()); let expected = _mm_setr_ps(2., 10., 4., 12.); assert_eq_m128(expected, r); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i32scatter_epi32() { + unsafe fn test_mm_i32scatter_epi32() { let mut base_addr: [i32; 4] = [0; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm_setr_epi32(2, 3, 4, 1); - unsafe { - _mm_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i32scatter_epi32() { + unsafe fn test_mm_mask_i32scatter_epi32() { let mut base_addr: [i32; 4] = [0; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm_setr_epi32(2, 3, 4, 1); - unsafe { - _mm_mask_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm_mask_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0, 2, 0, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i32scatter_epi64() { + unsafe fn test_mm_i32scatter_epi64() { let mut base_addr: [i64; 2] = [0; 2]; let vindex = _mm_setr_epi32(1, 0, -1, -1); let src = _mm_setr_epi64x(2, 1); - unsafe { - _mm_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i32scatter_epi64() { + unsafe fn test_mm_mask_i32scatter_epi64() { let mut base_addr: [i64; 2] = [0; 2]; let vindex = _mm_setr_epi32(1, 0, -1, -1); let src = _mm_setr_epi64x(2, 1); - unsafe { - _mm_mask_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i32scatter_pd() { + unsafe fn test_mm_i32scatter_pd() { let mut base_addr: [f64; 2] = [0.; 2]; let vindex = _mm_setr_epi32(1, 0, -1, -1); let src = _mm_setr_pd(2., 1.); - unsafe { - _mm_i32scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i32scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i32scatter_pd() { + unsafe fn test_mm_mask_i32scatter_pd() { let mut base_addr: [f64; 2] = [0.; 2]; let vindex = _mm_setr_epi32(1, 0, -1, -1); let src = _mm_setr_pd(2., 1.); - unsafe { - _mm_mask_i32scatter_pd::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i32scatter_pd::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i32scatter_ps() { + unsafe fn test_mm_i32scatter_ps() { let mut base_addr: [f32; 4] = [0.; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm_setr_ps(2., 3., 4., 1.); - unsafe { - _mm_i32scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i32scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i32scatter_ps() { + unsafe fn test_mm_mask_i32scatter_ps() { let mut base_addr: [f32; 4] = [0.; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm_setr_ps(2., 3., 4., 1.); - unsafe { - _mm_mask_i32scatter_ps::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm_mask_i32scatter_ps::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0., 2., 0., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i64scatter_epi32() { + unsafe fn test_mm_i64scatter_epi32() { let mut base_addr: [i32; 2] = [0; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_epi32(2, 1, -1, -1); - unsafe { - _mm_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i64scatter_epi32() { + unsafe fn test_mm_mask_i64scatter_epi32() { let mut base_addr: [i32; 2] = [0; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_epi32(2, 1, -1, -1); - unsafe { - _mm_mask_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i64scatter_epi64() { + unsafe fn test_mm_i64scatter_epi64() { let mut base_addr: [i64; 2] = [0; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_epi64x(2, 1); - unsafe { - _mm_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i64scatter_epi64() { + unsafe fn test_mm_mask_i64scatter_epi64() { let mut base_addr: [i64; 2] = [0; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_epi64x(2, 1); - unsafe { - _mm_mask_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0, 2]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i64scatter_pd() { + unsafe fn test_mm_i64scatter_pd() { let mut base_addr: [f64; 2] = [0.; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_pd(2., 1.); - unsafe { - _mm_i64scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i64scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i64scatter_pd() { + unsafe fn test_mm_mask_i64scatter_pd() { let mut base_addr: [f64; 2] = [0.; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_pd(2., 1.); - unsafe { - _mm_mask_i64scatter_pd::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i64scatter_pd::<8>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_i64scatter_ps() { + unsafe fn test_mm_i64scatter_ps() { let mut base_addr: [f32; 2] = [0.; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_ps(2., 1., -1., -1.); - unsafe { - _mm_i64scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm_i64scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_i64scatter_ps() { + unsafe fn test_mm_mask_i64scatter_ps() { let mut base_addr: [f32; 2] = [0.; 2]; let vindex = _mm_setr_epi64x(1, 0); let src = _mm_setr_ps(2., 1., -1., -1.); - unsafe { - _mm_mask_i64scatter_ps::<4>(base_addr.as_mut_ptr(), 0b01, vindex, src); - } + _mm_mask_i64scatter_ps::<4>(base_addr.as_mut_ptr(), 0b01, vindex, src); let expected = [0., 2.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i32scatter_epi32() { + unsafe fn test_mm256_i32scatter_epi32() { let mut base_addr: [i32; 8] = [0; 8]; let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); let src = _mm256_setr_epi32(2, 3, 4, 5, 6, 7, 8, 1); - unsafe { - _mm256_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4, 5, 6, 7, 8]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i32scatter_epi32() { + unsafe fn test_mm256_mask_i32scatter_epi32() { let mut base_addr: [i32; 8] = [0; 8]; let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); let src = _mm256_setr_epi32(2, 3, 4, 5, 6, 7, 8, 1); - unsafe { - _mm256_mask_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); - } + _mm256_mask_i32scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); let expected = [0, 2, 0, 4, 0, 6, 0, 8]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i32scatter_epi64() { + unsafe fn test_mm256_i32scatter_epi64() { let mut base_addr: [i64; 4] = [0; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm256_setr_epi64x(2, 3, 4, 1); - unsafe { - _mm256_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i32scatter_epi64() { + unsafe fn test_mm256_mask_i32scatter_epi64() { let mut base_addr: [i64; 4] = [0; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm256_setr_epi64x(2, 3, 4, 1); - unsafe { - _mm256_mask_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i32scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0, 2, 0, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i32scatter_pd() { + unsafe fn test_mm256_i32scatter_pd() { let mut base_addr: [f64; 4] = [0.; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm256_setr_pd(2., 3., 4., 1.); - unsafe { - _mm256_i32scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i32scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i32scatter_pd() { + unsafe fn test_mm256_mask_i32scatter_pd() { let mut base_addr: [f64; 4] = [0.; 4]; let vindex = _mm_setr_epi32(1, 2, 3, 0); let src = _mm256_setr_pd(2., 3., 4., 1.); - unsafe { - _mm256_mask_i32scatter_pd::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i32scatter_pd::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0., 2., 0., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i32scatter_ps() { + unsafe fn test_mm256_i32scatter_ps() { let mut base_addr: [f32; 8] = [0.; 8]; let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); let src = _mm256_setr_ps(2., 3., 4., 5., 6., 7., 8., 1.); - unsafe { - _mm256_i32scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i32scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4., 5., 6., 7., 8.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i32scatter_ps() { + unsafe fn test_mm256_mask_i32scatter_ps() { let mut base_addr: [f32; 8] = [0.; 8]; let vindex = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 0); let src = _mm256_setr_ps(2., 3., 4., 5., 6., 7., 8., 1.); - unsafe { - _mm256_mask_i32scatter_ps::<4>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); - } + _mm256_mask_i32scatter_ps::<4>(base_addr.as_mut_ptr(), 0b01010101, vindex, src); let expected = [0., 2., 0., 4., 0., 6., 0., 8.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i64scatter_epi32() { + unsafe fn test_mm256_i64scatter_epi32() { let mut base_addr: [i32; 4] = [0; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm_setr_epi32(2, 3, 4, 1); - unsafe { - _mm256_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i64scatter_epi32() { + unsafe fn test_mm256_mask_i64scatter_epi32() { let mut base_addr: [i32; 4] = [0; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm_setr_epi32(2, 3, 4, 1); - unsafe { - _mm256_mask_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i64scatter_epi32::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0, 2, 0, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i64scatter_epi64() { + unsafe fn test_mm256_i64scatter_epi64() { let mut base_addr: [i64; 4] = [0; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm256_setr_epi64x(2, 3, 4, 1); - unsafe { - _mm256_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1, 2, 3, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i64scatter_epi64() { + unsafe fn test_mm256_mask_i64scatter_epi64() { let mut base_addr: [i64; 4] = [0; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm256_setr_epi64x(2, 3, 4, 1); - unsafe { - _mm256_mask_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i64scatter_epi64::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0, 2, 0, 4]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i64scatter_pd() { + unsafe fn test_mm256_i64scatter_pd() { let mut base_addr: [f64; 4] = [0.; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm256_setr_pd(2., 3., 4., 1.); - unsafe { - _mm256_i64scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i64scatter_pd::<8>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i64scatter_pd() { + unsafe fn test_mm256_mask_i64scatter_pd() { let mut base_addr: [f64; 4] = [0.; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm256_setr_pd(2., 3., 4., 1.); - unsafe { - _mm256_mask_i64scatter_pd::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i64scatter_pd::<8>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0., 2., 0., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_i64scatter_ps() { + unsafe fn test_mm256_i64scatter_ps() { let mut base_addr: [f32; 4] = [0.; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm_setr_ps(2., 3., 4., 1.); - unsafe { - _mm256_i64scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); - } + _mm256_i64scatter_ps::<4>(base_addr.as_mut_ptr(), vindex, src); let expected = [1., 2., 3., 4.]; assert_eq!(expected, base_addr); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_i64scatter_ps() { + unsafe fn test_mm256_mask_i64scatter_ps() { let mut base_addr: [f32; 4] = [0.; 4]; let vindex = _mm256_setr_epi64x(1, 2, 3, 0); let src = _mm_setr_ps(2., 3., 4., 1.); - unsafe { - _mm256_mask_i64scatter_ps::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); - } + _mm256_mask_i64scatter_ps::<4>(base_addr.as_mut_ptr(), 0b0101, vindex, src); let expected = [0., 2., 0., 4.]; assert_eq!(expected, base_addr); } @@ -12275,116 +12168,100 @@ mod tests { } #[simd_test(enable = "avx512f")] - const fn test_mm512_loadu_epi64() { + const unsafe fn test_mm512_loadu_epi64() { let a = &[4, 3, 2, 5, -8, -9, -64, -50]; let p = a.as_ptr(); - let r = unsafe { _mm512_loadu_epi64(black_box(p)) }; + let r = _mm512_loadu_epi64(black_box(p)); let e = _mm512_setr_epi64(4, 3, 2, 5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_loadu_epi64() { + const unsafe fn test_mm256_loadu_epi64() { let a = &[4, 3, 2, 5]; let p = a.as_ptr(); - let r = unsafe { _mm256_loadu_epi64(black_box(p)) }; + let r = _mm256_loadu_epi64(black_box(p)); let e = _mm256_setr_epi64x(4, 3, 2, 5); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_loadu_epi64() { + const unsafe fn test_mm_loadu_epi64() { let a = &[4, 3]; let p = a.as_ptr(); - let r = unsafe { _mm_loadu_epi64(black_box(p)) }; + let r = _mm_loadu_epi64(black_box(p)); let e = _mm_setr_epi64x(4, 3); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtepi64_storeu_epi16() { + unsafe fn test_mm512_mask_cvtepi64_storeu_epi16() { let a = _mm512_set1_epi64(9); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm512_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtepi64_storeu_epi16() { + unsafe fn test_mm256_mask_cvtepi64_storeu_epi16() { let a = _mm256_set1_epi64x(9); let mut r = _mm_set1_epi16(0); - unsafe { - _mm256_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtepi64_storeu_epi16() { + unsafe fn test_mm_mask_cvtepi64_storeu_epi16() { let a = _mm_set1_epi64x(9); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, 0, 0, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtsepi64_storeu_epi16() { + unsafe fn test_mm512_mask_cvtsepi64_storeu_epi16() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm512_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(i16::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtsepi64_storeu_epi16() { + unsafe fn test_mm256_mask_cvtsepi64_storeu_epi16() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm256_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, i16::MAX, i16::MAX, i16::MAX, i16::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtsepi64_storeu_epi16() { + unsafe fn test_mm_mask_cvtsepi64_storeu_epi16() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtsepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, 0, 0, i16::MAX, i16::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtusepi64_storeu_epi16() { + unsafe fn test_mm512_mask_cvtusepi64_storeu_epi16() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm_undefined_si128(); - unsafe { - _mm512_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm512_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set1_epi16(u16::MAX as i16); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtusepi64_storeu_epi16() { + unsafe fn test_mm256_mask_cvtusepi64_storeu_epi16() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm256_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm256_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16( 0, 0, @@ -12399,56 +12276,46 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtusepi64_storeu_epi16() { + unsafe fn test_mm_mask_cvtusepi64_storeu_epi16() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); - } + _mm_mask_cvtusepi64_storeu_epi16(&mut r as *mut _ as *mut i16, 0b11111111, a); let e = _mm_set_epi16(0, 0, 0, 0, 0, 0, u16::MAX as i16, u16::MAX as i16); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtepi64_storeu_epi8() { + unsafe fn test_mm512_mask_cvtepi64_storeu_epi8() { let a = _mm512_set1_epi64(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm512_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm512_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 9, 9, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtepi64_storeu_epi8() { + unsafe fn test_mm256_mask_cvtepi64_storeu_epi8() { let a = _mm256_set1_epi64x(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtepi64_storeu_epi8() { + unsafe fn test_mm_mask_cvtepi64_storeu_epi8() { let a = _mm_set1_epi64x(9); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtsepi64_storeu_epi8() { + unsafe fn test_mm512_mask_cvtsepi64_storeu_epi8() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm512_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm512_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -12460,12 +12327,10 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtsepi64_storeu_epi8() { + unsafe fn test_mm256_mask_cvtsepi64_storeu_epi8() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -12477,23 +12342,19 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtsepi64_storeu_epi8() { + unsafe fn test_mm_mask_cvtsepi64_storeu_epi8() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtsepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, i8::MAX, i8::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtusepi64_storeu_epi8() { + unsafe fn test_mm512_mask_cvtusepi64_storeu_epi8() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm512_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm512_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -12505,12 +12366,10 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtusepi64_storeu_epi8() { + unsafe fn test_mm256_mask_cvtusepi64_storeu_epi8() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm256_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm256_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -12522,12 +12381,10 @@ mod tests { } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtusepi64_storeu_epi8() { + unsafe fn test_mm_mask_cvtusepi64_storeu_epi8() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi8(0); - unsafe { - _mm_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); - } + _mm_mask_cvtusepi64_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a); #[rustfmt::skip] let e = _mm_set_epi8( 0, 0, 0, 0, @@ -12539,136 +12396,112 @@ mod tests { } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtepi64_storeu_epi32() { + unsafe fn test_mm512_mask_cvtepi64_storeu_epi32() { let a = _mm512_set1_epi64(9); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); - } + _mm512_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); let e = _mm256_set1_epi32(9); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtepi64_storeu_epi32() { + unsafe fn test_mm256_mask_cvtepi64_storeu_epi32() { let a = _mm256_set1_epi64x(9); let mut r = _mm_set1_epi32(0); - unsafe { - _mm256_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); - } + _mm256_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); let e = _mm_set_epi32(9, 9, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtepi64_storeu_epi32() { + unsafe fn test_mm_mask_cvtepi64_storeu_epi32() { let a = _mm_set1_epi64x(9); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); - } + _mm_mask_cvtepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); let e = _mm_set_epi32(0, 0, 9, 9); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtsepi64_storeu_epi32() { + unsafe fn test_mm512_mask_cvtsepi64_storeu_epi32() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); - } + _mm512_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); let e = _mm256_set1_epi32(i32::MAX); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtsepi64_storeu_epi32() { + unsafe fn test_mm256_mask_cvtsepi64_storeu_epi32() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi32(0); - unsafe { - _mm256_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00001111, a); - } + _mm256_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00001111, a); let e = _mm_set1_epi32(i32::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtsepi64_storeu_epi32() { + unsafe fn test_mm_mask_cvtsepi64_storeu_epi32() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00000011, a); - } + _mm_mask_cvtsepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00000011, a); let e = _mm_set_epi32(0, 0, i32::MAX, i32::MAX); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - fn test_mm512_mask_cvtusepi64_storeu_epi32() { + unsafe fn test_mm512_mask_cvtusepi64_storeu_epi32() { let a = _mm512_set1_epi64(i64::MAX); let mut r = _mm256_undefined_si256(); - unsafe { - _mm512_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); - } + _mm512_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b11111111, a); let e = _mm256_set1_epi32(u32::MAX as i32); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm256_mask_cvtusepi64_storeu_epi32() { + unsafe fn test_mm256_mask_cvtusepi64_storeu_epi32() { let a = _mm256_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi32(0); - unsafe { - _mm256_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00001111, a); - } + _mm256_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00001111, a); let e = _mm_set1_epi32(u32::MAX as i32); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - fn test_mm_mask_cvtusepi64_storeu_epi32() { + unsafe fn test_mm_mask_cvtusepi64_storeu_epi32() { let a = _mm_set1_epi64x(i64::MAX); let mut r = _mm_set1_epi16(0); - unsafe { - _mm_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00000011, a); - } + _mm_mask_cvtusepi64_storeu_epi32(&mut r as *mut _ as *mut i32, 0b00000011, a); let e = _mm_set_epi32(0, 0, u32::MAX as i32, u32::MAX as i32); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_storeu_epi64() { + const unsafe fn test_mm512_storeu_epi64() { let a = _mm512_set1_epi64(9); let mut r = _mm512_set1_epi64(0); - unsafe { - _mm512_storeu_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm512_storeu_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_storeu_epi64() { + const unsafe fn test_mm256_storeu_epi64() { let a = _mm256_set1_epi64x(9); let mut r = _mm256_set1_epi64x(0); - unsafe { - _mm256_storeu_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm256_storeu_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_storeu_epi64() { + const unsafe fn test_mm_storeu_epi64() { let a = _mm_set1_epi64x(9); let mut r = _mm_set1_epi64x(0); - unsafe { - _mm_storeu_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm_storeu_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_load_epi64() { + const unsafe fn test_mm512_load_epi64() { #[repr(align(64))] struct Align { data: [i64; 8], // 64 bytes @@ -12677,69 +12510,63 @@ mod tests { data: [4, 3, 2, 5, -8, -9, -64, -50], }; let p = (a.data).as_ptr(); - let r = unsafe { _mm512_load_epi64(black_box(p)) }; + let r = _mm512_load_epi64(black_box(p)); let e = _mm512_setr_epi64(4, 3, 2, 5, -8, -9, -64, -50); assert_eq_m512i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_load_epi64() { + const unsafe fn test_mm256_load_epi64() { #[repr(align(64))] struct Align { data: [i64; 4], } let a = Align { data: [4, 3, 2, 5] }; let p = (a.data).as_ptr(); - let r = unsafe { _mm256_load_epi64(black_box(p)) }; + let r = _mm256_load_epi64(black_box(p)); let e = _mm256_set_epi64x(5, 2, 3, 4); assert_eq_m256i(r, e); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_load_epi64() { + const unsafe fn test_mm_load_epi64() { #[repr(align(64))] struct Align { data: [i64; 2], } let a = Align { data: [4, 3] }; let p = (a.data).as_ptr(); - let r = unsafe { _mm_load_epi64(black_box(p)) }; + let r = _mm_load_epi64(black_box(p)); let e = _mm_set_epi64x(3, 4); assert_eq_m128i(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_store_epi64() { + const unsafe fn test_mm512_store_epi64() { let a = _mm512_set1_epi64(9); let mut r = _mm512_set1_epi64(0); - unsafe { - _mm512_store_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm512_store_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m512i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm256_store_epi64() { + const unsafe fn test_mm256_store_epi64() { let a = _mm256_set1_epi64x(9); let mut r = _mm256_set1_epi64x(0); - unsafe { - _mm256_store_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm256_store_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m256i(r, a); } #[simd_test(enable = "avx512f,avx512vl")] - const fn test_mm_store_epi64() { + const unsafe fn test_mm_store_epi64() { let a = _mm_set1_epi64x(9); let mut r = _mm_set1_epi64x(0); - unsafe { - _mm_store_epi64(&mut r as *mut _ as *mut i64, a); - } + _mm_store_epi64(&mut r as *mut _ as *mut i64, a); assert_eq_m128i(r, a); } #[simd_test(enable = "avx512f")] - const fn test_mm512_load_pd() { + const unsafe fn test_mm512_load_pd() { #[repr(align(64))] struct Align { data: [f64; 8], // 64 bytes @@ -12748,18 +12575,16 @@ mod tests { data: [4., 3., 2., 5., -8., -9., -64., -50.], }; let p = (a.data).as_ptr(); - let r = unsafe { _mm512_load_pd(black_box(p)) }; + let r = _mm512_load_pd(black_box(p)); let e = _mm512_setr_pd(4., 3., 2., 5., -8., -9., -64., -50.); assert_eq_m512d(r, e); } #[simd_test(enable = "avx512f")] - const fn test_mm512_store_pd() { + const unsafe fn test_mm512_store_pd() { let a = _mm512_set1_pd(9.); let mut r = _mm512_undefined_pd(); - unsafe { - _mm512_store_pd(&mut r as *mut _ as *mut f64, a); - } + _mm512_store_pd(&mut r as *mut _ as *mut f64, a); assert_eq_m512d(r, a); } diff --git a/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs b/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs index 28bf1951167a5..a24b44fb1f7e3 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs @@ -77,14 +77,12 @@ mod tests { #[simd_test(enable = "fxsr")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_fxsave64() { + unsafe fn test_fxsave64() { let mut a = FxsaveArea::new(); let mut b = FxsaveArea::new(); - unsafe { - fxsr::_fxsave64(a.ptr()); - fxsr::_fxrstor64(a.ptr()); - fxsr::_fxsave64(b.ptr()); - } + fxsr::_fxsave64(a.ptr()); + fxsr::_fxrstor64(a.ptr()); + fxsr::_fxsave64(b.ptr()); } } diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse2.rs b/library/stdarch/crates/core_arch/src/x86_64/sse2.rs index 08dabf053d428..b156af078a320 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/sse2.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/sse2.rs @@ -204,12 +204,10 @@ mod tests { // Miri cannot support this until it is clear how it fits in the Rust memory model // (non-temporal store) #[cfg_attr(miri, ignore)] - fn test_mm_stream_si64() { + unsafe fn test_mm_stream_si64() { let a: i64 = 7; let mut mem = boxed::Box::::new(-1); - unsafe { - _mm_stream_si64(ptr::addr_of_mut!(*mem), a); - } + _mm_stream_si64(ptr::addr_of_mut!(*mem), a); _mm_sfence(); assert_eq!(a, *mem); } diff --git a/library/stdarch/crates/core_arch/src/x86_64/xsave.rs b/library/stdarch/crates/core_arch/src/x86_64/xsave.rs index 30a7123315e5f..fa1454a822e31 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/xsave.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/xsave.rs @@ -132,43 +132,37 @@ mod tests { #[simd_test(enable = "xsave")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsave64() { + unsafe fn test_xsave64() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsave64(a.ptr(), m); - _xrstor64(a.ptr(), m); - _xsave64(b.ptr(), m); - } + _xsave64(a.ptr(), m); + _xrstor64(a.ptr(), m); + _xsave64(b.ptr(), m); } #[simd_test(enable = "xsave,xsaveopt")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsaveopt64() { + unsafe fn test_xsaveopt64() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsaveopt64(a.ptr(), m); - _xrstor64(a.ptr(), m); - _xsaveopt64(b.ptr(), m); - } + _xsaveopt64(a.ptr(), m); + _xrstor64(a.ptr(), m); + _xsaveopt64(b.ptr(), m); } #[simd_test(enable = "xsave,xsavec")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri - fn test_xsavec64() { + unsafe fn test_xsavec64() { let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers let mut a = XsaveArea::new(); let mut b = XsaveArea::new(); - unsafe { - _xsavec64(a.ptr(), m); - _xrstor64(a.ptr(), m); - _xsavec64(b.ptr(), m); - } + _xsavec64(a.ptr(), m); + _xrstor64(a.ptr(), m); + _xsavec64(b.ptr(), m); } } diff --git a/library/stdarch/crates/intrinsic-test/missing_aarch64.txt b/library/stdarch/crates/intrinsic-test/missing_aarch64.txt index 3c1ac59e910e9..814756cefa406 100644 --- a/library/stdarch/crates/intrinsic-test/missing_aarch64.txt +++ b/library/stdarch/crates/intrinsic-test/missing_aarch64.txt @@ -1,43 +1,3 @@ -# Not supported by qemu (will throw illegal instruction) -vamax_f16 -vamaxq_f16 -vamin_f16 -vaminq_f16 -vscale_f16 -vscale_f32 -vscaleq_f16 -vscaleq_f32 -vscaleq_f64 -vluti2_lane_p16 -vluti2_lane_p8 -vluti2_lane_s16 -vluti2_lane_s8 -vluti2_lane_u16 -vluti2_lane_u8 -vluti2q_lane_p16 -vluti2q_lane_p8 -vluti2q_lane_s16 -vluti2q_lane_s8 -vluti2q_lane_u16 -vluti2_laneq_f16 -vluti2_lane_f16 -vluti2_laneq_f16 -vluti2_laneq_p16 -vluti2_laneq_p8 -vluti2_laneq_s16 -vluti2_laneq_s8 -vluti2_laneq_u16 -vluti2_laneq_u8 -vluti2q_lane_f16 -vluti2q_laneq_f16 -vluti2q_laneq_p16 -vluti2q_laneq_p8 -vluti2q_laneq_s16 -vluti2q_laneq_s8 -vluti2q_laneq_u16 -vluti2q_laneq_u8 -vluti2q_lane_u8 - # Not implemented in stdarch yet vbfdot_f32 vbfdot_lane_f32 @@ -70,6 +30,18 @@ vrnd32x_f64 vrnd32z_f64 vrnd64x_f64 vrnd64z_f64 +vluti2_lane_p16 +vluti2_lane_p8 +vluti2_lane_s16 +vluti2_lane_s8 +vluti2_lane_u16 +vluti2_lane_u8 +vluti2q_lane_p16 +vluti2q_lane_p8 +vluti2q_lane_s16 +vluti2q_lane_s8 +vluti2q_lane_u16 +vluti2q_lane_u8 vluti4q_lane_f16_x2 vluti4q_lane_p16_x2 vluti4q_lane_p8 diff --git a/library/stdarch/crates/intrinsic-test/missing_aarch64_be.txt b/library/stdarch/crates/intrinsic-test/missing_aarch64_be.txt index f3c4ffa3d0640..1fa8fb7f1693e 100644 --- a/library/stdarch/crates/intrinsic-test/missing_aarch64_be.txt +++ b/library/stdarch/crates/intrinsic-test/missing_aarch64_be.txt @@ -38,45 +38,6 @@ vusdotq_lane_s32 vusdotq_laneq_s32 # Below are in common to missing_aarch64.txt -# Not supported by qemu (will throw illegal instruction) -vamax_f16 -vamaxq_f16 -vamin_f16 -vaminq_f16 -vscale_f16 -vscale_f32 -vscaleq_f16 -vscaleq_f32 -vscaleq_f64 -vluti2_lane_p16 -vluti2_lane_p8 -vluti2_lane_s16 -vluti2_lane_s8 -vluti2_lane_u16 -vluti2_lane_u8 -vluti2q_lane_p16 -vluti2q_lane_p8 -vluti2q_lane_s16 -vluti2q_lane_s8 -vluti2q_lane_u16 -vluti2_laneq_f16 -vluti2_lane_f16 -vluti2_laneq_f16 -vluti2_laneq_p16 -vluti2_laneq_p8 -vluti2_laneq_s16 -vluti2_laneq_s8 -vluti2_laneq_u16 -vluti2_laneq_u8 -vluti2q_lane_f16 -vluti2q_laneq_f16 -vluti2q_laneq_p16 -vluti2q_laneq_p8 -vluti2q_laneq_s16 -vluti2q_laneq_s8 -vluti2q_laneq_u16 -vluti2q_laneq_u8 -vluti2q_lane_u8 # Not implemented in stdarch yet vbfdot_f32 @@ -110,6 +71,18 @@ vrnd32x_f64 vrnd32z_f64 vrnd64x_f64 vrnd64z_f64 +vluti2_lane_p16 +vluti2_lane_p8 +vluti2_lane_s16 +vluti2_lane_s8 +vluti2_lane_u16 +vluti2_lane_u8 +vluti2q_lane_p16 +vluti2q_lane_p8 +vluti2q_lane_s16 +vluti2q_lane_s8 +vluti2q_lane_u16 +vluti2q_lane_u8 vluti4q_lane_f16_x2 vluti4q_lane_p16_x2 vluti4q_lane_p8 diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml index a9bc377924dd0..a951343e01835 100644 --- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml +++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml @@ -66,14 +66,6 @@ neon-unstable-feat-lut: &neon-unstable-feat-lut aarch64-stable-jscvt: &aarch64-stable-jscvt FnCall: [stable, ['feature = "stdarch_aarch64_jscvt"', 'since = "CURRENT_RUSTC_VERSION"']] -# #[unstable(feature = "stdarch_neon_feat_lrcpc3", issue = "none")] -neon-unstable-feat-lrcpc3: &neon-unstable-feat-lrcpc3 - FnCall: [unstable, ['feature = "stdarch_neon_feat_lrcpc3"', 'issue = "none"']] - -# #[unstable(feature = "stdarch_neon_fp8", issue = "none")] -neon-unstable-fp8: &neon-unstable-fp8 - FnCall: [unstable, ['feature = "stdarch_neon_fp8"', 'issue = "none"']] - # #[cfg(target_endian = "little")] little-endian: &little-endian FnCall: [cfg, ['target_endian = "little"']] @@ -4406,116 +4398,6 @@ intrinsics: - - FnCall: [transmute, [a]] - FnCall: [transmute, [b]] - - name: "vldap1{neon_type[1].lane_nox}" - doc: "Load-acquire RCpc one single-element structure to one lane of one register" - arguments: ["ptr: {type[0]}", "src: {type[1]}"] - static_defs: ["const LANE: i32"] - return_type: "{type[1]}" - safety: - unsafe: [neon] - attr: - - FnCall: [target_feature, ['enable = "neon,rcpc3"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [ldap1, 'LANE = 0']]}]] - - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-unstable-feat-lrcpc3 - types: - - ['*const i64', int64x1_t, 'static_assert!', 'LANE == 0'] - - ['*const i64', int64x2_t,'static_assert_uimm_bits!', 'LANE, 1'] - compose: - - FnCall: ['{type[2]}', ['{type[3]}']] - - Let: - - "atomic_src" - - FnCall: ["crate::sync::atomic::AtomicI64::from_ptr", ['ptr as *mut i64']] - - Identifier: [';', Symbol] - - FnCall: - - simd_insert! - - - src - - "LANE as u32" - - MethodCall: - - "atomic_src" - - load - - ["crate::sync::atomic::Ordering::Acquire"] - - - name: "vldap1{neon_type[1].lane_nox}" - doc: "Load-acquire RCpc one single-element structure to one lane of one register" - arguments: ["ptr: {type[0]}","src: {type[1]}"] - static_defs: ["const LANE: i32"] - return_type: "{type[1]}" - safety: - unsafe: [neon] - attr: - - FnCall: [rustc_legacy_const_generics, ["2"]] - - FnCall: [target_feature, ['enable = "neon,rcpc3"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [ldap1, 'LANE = 0']]}]] - - *neon-unstable-feat-lrcpc3 - types: - - ['*const u64', uint64x1_t,'static_assert!', 'LANE == 0',''] - #- ['*const f64', float64x1_t,'static_assert!', 'LANE == 0',''] # Fails due to bad IR gen from rust - - ['*const p64', poly64x1_t,'static_assert!', 'LANE == 0',''] - - ['*const u64', uint64x2_t,'static_assert_uimm_bits!', 'LANE, 1','q'] - - ['*const f64', float64x2_t,'static_assert_uimm_bits!', 'LANE, 1','q'] - - ['*const p64', poly64x2_t,'static_assert_uimm_bits!', 'LANE, 1','q'] - compose: - - FnCall: ['{type[2]}', ['{type[3]}']] - - FnCall: - - transmute - - - FnCall: - - 'vldap1{type[4]}_lane_s64::' - - - "ptr as *mut i64" - - FnCall: [transmute,[src]] - - - name: "vstl1{neon_type[1].lane_nox}" - doc: "Store-Release a single-element structure from one lane of one register." - arguments: ["ptr: {type[0]}", "val: {neon_type[1]}"] - static_defs: ["const LANE: i32"] - safety: safe - attr: - - FnCall: [target_feature, ['enable = "neon,rcpc3"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [stl1, 'LANE = 0']]}]] - - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-unstable-feat-lrcpc3 - types: - - ['*mut i64', int64x1_t,'static_assert!', 'LANE == 0'] - - ['*mut i64', int64x2_t,'static_assert_uimm_bits!', 'LANE, 1'] - compose: - - FnCall: ['{type[2]}', ['{type[3]}']] - - Let: - - "atomic_dst" - - "ptr as *mut crate::sync::atomic::AtomicI64" - - Identifier: [';', Symbol] - - Let: - - "lane" - - i64 - - FnCall: [simd_extract!, [val, 'LANE as u32']] - - MethodCall: - - "(*atomic_dst)" - - store - - [FnCall: [transmute, [lane]],"crate::sync::atomic::Ordering::Release"] - - - name: "vstl1{neon_type[1].lane_nox}" - doc: "Store-Release a single-element structure from one lane of one register." - arguments: ["ptr: {type[0]}", "val: {neon_type[1]}"] - static_defs: ["const LANE: i32"] - safety: safe - attr: - - FnCall: [target_feature, ['enable = "neon,rcpc3"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [stl1, 'LANE = 0']]}]] - - FnCall: [rustc_legacy_const_generics, ["2"]] - - *neon-unstable-feat-lrcpc3 - types: - - ['*mut u64', uint64x1_t, 'static_assert!', 'LANE == 0',''] - - ['*mut f64', float64x1_t,'static_assert!', 'LANE == 0',''] - - ['*mut p64', poly64x1_t, 'static_assert!', 'LANE == 0',''] - - ['*mut u64', uint64x2_t ,'static_assert_uimm_bits!', 'LANE, 1','q'] - - ['*mut f64', float64x2_t,'static_assert_uimm_bits!', 'LANE, 1','q'] - - ['*mut p64', poly64x2_t ,'static_assert_uimm_bits!', 'LANE, 1','q'] - compose: - - FnCall: ['{type[2]}', ['{type[3]}']] - - FnCall: - - "vstl1{type[4]}_lane_s64::" - - - "ptr as *mut i64" - - FnCall: [transmute, [val]] - - name: "vst1{neon_type[1].lane_nox}" doc: "Store multiple single-element structures from one, two, three, or four registers" arguments: ["a: {type[0]}", "b: {neon_type[1]}"] @@ -5199,6 +5081,56 @@ intrinsics: arch: aarch64,arm64ec - FnCall: ['_vst4{neon_type[1].lane_nox}', ['b.0', 'b.1', 'b.2', 'b.3', 'LANE as i64', 'a as _']] + - name: "vusdot{neon_type[0].laneq_nox}" + doc: "Dot product index form with unsigned and signed integers" + arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] + return_type: "{neon_type[0]}" + attr: + - *neon-i8mm + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [usdot, 'LANE = 3']]}]] + - FnCall: [rustc_legacy_const_generics, ['3']] + - FnCall: [unstable, ['feature = "stdarch_neon_i8mm"', 'issue = "117223"']] + static_defs: ["const LANE: i32"] + safety: safe + types: + - [int32x2_t, uint8x8_t, int8x16_t, '[LANE as u32, LANE as u32]',''] + - [int32x4_t, uint8x16_t, int8x16_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] + compose: + - FnCall: [static_assert_uimm_bits!, [LANE, '2']] + - Let: [c, int32x4_t, {FnCall: ['vreinterpretq_s32_s8', [c]]}] + - Let: [c, "{neon_type[0]}", {FnCall: [simd_shuffle!, [c, c, "{type[3]}"]]}] + - FnCall: ["vusdot{neon_type[0].no}", [a, b, {FnCall: ['vreinterpret{type[4]}_s8_s32', [c]]}]] + + - name: "vsudot{neon_type[0].laneq_nox}" + doc: "Dot product index form with signed and unsigned integers" + arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] + return_type: "{neon_type[0]}" + attr: + - *neon-i8mm + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [sudot, 'LANE = 3']]}]] + - FnCall: [rustc_legacy_const_generics, ['3']] + - FnCall: [unstable, ['feature = "stdarch_neon_i8mm"', 'issue = "117223"']] + static_defs: ["const LANE: i32"] + safety: safe + types: + - [int32x2_t, int8x8_t, uint8x16_t, '[LANE as u32, LANE as u32]', uint32x2_t] + - [int32x4_t, int8x16_t, uint8x16_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]', uint32x4_t] + compose: + - FnCall: [static_assert_uimm_bits!, [LANE, 2]] + - Let: + - c + - uint32x4_t + - FnCall: [transmute, [c]] + - Let: + - c + - "{type[4]}" + - FnCall: [simd_shuffle!, [c, c, "{type[3]}"]] + - FnCall: + - "vusdot{neon_type[0].no}" + - - a + - FnCall: [transmute, [c]] + - b + - name: "vmul{neon_type.no}" doc: Multiply arguments: ["a: {neon_type}", "b: {neon_type}"] @@ -6620,6 +6552,7 @@ intrinsics: - Let: [c, "{neon_type[0]}", {FnCall: [simd_shuffle!, [c, c, "{type[2]}"]]}] - FnCall: ["vcmla{neon_type[0].rot270}", [a, b, c]] + - name: "vcmla{neon_type[0].rot270_lane}" doc: Floating-point complex multiply accumulate arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}", "c: {neon_type[1]}"] @@ -6641,6 +6574,66 @@ intrinsics: - Let: [c, "{neon_type[0]}", {FnCall: [simd_shuffle!, [c, c, "{type[2]}"]]}] - FnCall: ["vcmla{neon_type[0].rot270}", [a, b, c]] + - name: "vdot{neon_type[0].laneq_nox}" + doc: Dot product arithmetic (indexed) + arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] + return_type: "{neon_type[0]}" + static_defs: ["const LANE: i32"] + attr: + - FnCall: [target_feature, ['enable = "neon,dotprod"']] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [sdot, 'LANE = 0']]}]] + - FnCall: [rustc_legacy_const_generics, ['3']] + - FnCall: [unstable, ['feature = "stdarch_neon_dotprod"', 'issue = "117224"']] + safety: safe + types: + - [int32x2_t, int8x8_t, int8x16_t, int32x4_t, '[LANE as u32, LANE as u32]', ''] + - [int32x4_t, int8x16_t, int8x16_t, int32x4_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] + compose: + - FnCall: [static_assert_uimm_bits!, [LANE, '2']] + - Let: + - c + - "{neon_type[3]}" + - FnCall: ['vreinterpretq_{neon_type[0]}_{neon_type[1]}', [c]] + - Let: + - c + - "{neon_type[0]}" + - FnCall: [simd_shuffle!, [c, c, '{type[4]}']] + - FnCall: + - "vdot{neon_type[0].no}" + - - a + - b + - FnCall: ['vreinterpret{type[5]}_{neon_type[1]}_{neon_type[0]}', [c]] + + - name: "vdot{neon_type[0].laneq_nox}" + doc: Dot product arithmetic (indexed) + arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] + return_type: "{neon_type[0]}" + static_defs: ["const LANE: i32"] + attr: + - FnCall: [target_feature, ['enable = "neon,dotprod"']] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [udot, 'LANE = 0']]}]] + - FnCall: [rustc_legacy_const_generics, ['3']] + - FnCall: [unstable, ['feature = "stdarch_neon_dotprod"', 'issue = "117224"']] + safety: safe + types: + - [uint32x2_t, uint8x8_t, uint8x16_t, uint32x4_t, '[LANE as u32, LANE as u32]',''] + - [uint32x4_t, uint8x16_t, uint8x16_t, uint32x4_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] + compose: + - FnCall: [static_assert_uimm_bits!, [LANE, '2']] + - Let: + - c + - "{neon_type[3]}" + - FnCall: ['vreinterpretq_{neon_type[0]}_{neon_type[1]}', [c]] + - Let: + - c + - "{neon_type[0]}" + - FnCall: [simd_shuffle!, [c, c, '{type[4]}']] + - FnCall: + - "vdot{neon_type[0].no}" + - - a + - b + - FnCall: ['vreinterpret{type[5]}_{neon_type[1]}_{neon_type[0]}', [c]] + - name: "vmax{neon_type.no}" doc: Maximum (vector) arguments: ["a: {neon_type}", "b: {neon_type}"] @@ -13973,12 +13966,10 @@ intrinsics: return_type: "{neon_type}" attr: - FnCall: [target_feature, ['enable = "neon,faminmax"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [famax]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop]]}]] - FnCall: [unstable, ['feature = "faminmax"', 'issue = "137933"']] safety: safe types: - - float16x4_t - - float16x8_t - float32x2_t - float32x4_t - float64x2_t @@ -13995,12 +13986,10 @@ intrinsics: return_type: "{neon_type}" attr: - FnCall: [target_feature, ['enable = "neon,faminmax"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [famin]]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop]]}]] - FnCall: [unstable, ['feature = "faminmax"', 'issue = "137933"']] safety: safe types: - - float16x4_t - - float16x8_t - float32x2_t - float32x4_t - float64x2_t @@ -14041,101 +14030,36 @@ intrinsics: arch: aarch64,arm64ec - FnCall: ['_vluti2{neon_type[0].lane_nox}', [a, b, LANE]] - - name: "vluti2{neon_type[0].laneq_nox}" - doc: "Lookup table read with 2-bit indices" - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] - return_type: "{neon_type[2]}" - attr: - - FnCall: [target_feature, ['enable = {type[4]}']] - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop, 'INDEX = 1']]}]] - - *neon-unstable-feat-lut - - FnCall: [rustc_legacy_const_generics, ['2']] - static_defs: ["const INDEX: i32"] - safety: - unsafe: [neon] - types: - - [int8x8_t, uint8x16_t, int8x16_t, 'INDEX >= 0 && INDEX <= 3', '"neon,lut"'] - - [int8x16_t, uint8x16_t, int8x16_t, 'INDEX >= 0 && INDEX <= 3', '"neon,lut"'] - - [int16x4_t, uint8x16_t, int16x8_t, 'INDEX >= 0 && INDEX <= 7', '"neon,lut"'] - - [int16x8_t, uint8x16_t, int16x8_t, 'INDEX >= 0 && INDEX <= 7', '"neon,lut"'] - compose: - - FnCall: ['static_assert!', ['{type[3]}']] - - LLVMLink: - name: "vluti2{neon_type[0].laneq_nox}" - arguments: - - 'a: {neon_type[0]}' - - 'b: {neon_type[1]}' - - 'n: i32' - links: - - link: "llvm.aarch64.neon.vluti2.laneq.{neon_type[2]}.{neon_type[0]}" - arch: aarch64,arm64ec - - FnCall: ['_vluti2{neon_type[0].laneq_nox}', [a, b, INDEX]] - - name: "vluti2{neon_type[0].lane_nox}" doc: "Lookup table read with 2-bit indices" arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[2]}" attr: - FnCall: [target_feature, ['enable = "neon,lut"']] - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop, 'INDEX = 1']]}]] - - *neon-unstable-feat-lut - - FnCall: [rustc_legacy_const_generics, ['2']] - static_defs: ["const INDEX: i32"] - safety: - unsafe: [neon] - types: - - [uint8x8_t, uint8x8_t, uint8x16_t, 'INDEX >= 0 && INDEX <= 1', 'int8x8_t'] - - [uint8x16_t, uint8x8_t, uint8x16_t, 'INDEX >= 0 && INDEX <= 1', 'int8x16_t'] - - [poly8x8_t, uint8x8_t, poly8x16_t, 'INDEX >= 0 && INDEX <= 1', 'int8x8_t'] - - [poly8x16_t, uint8x8_t, poly8x16_t, 'INDEX >= 0 && INDEX <= 1', 'int8x16_t'] - - [uint16x4_t, uint8x8_t, uint16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x4_t'] - - [uint16x8_t, uint8x8_t, uint16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x8_t'] - - [poly16x4_t, uint8x8_t, poly16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x4_t'] - - [poly16x8_t, uint8x8_t, poly16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x8_t'] - - [float16x4_t, uint8x8_t, float16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x4_t'] - - [float16x8_t, uint8x8_t, float16x8_t, 'INDEX >= 0 && INDEX <= 3', 'int16x8_t'] - compose: - - FnCall: ['static_assert!', ['{type[3]}']] - - FnCall: - - transmute - - - FnCall: - - 'vluti2{neon_type[4].lane_nox}::' - - - FnCall: [transmute, [a]] - - b - - - name: "vluti2{neon_type[0].laneq_nox}" - doc: "Lookup table read with 2-bit indices" - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] - return_type: "{neon_type[2]}" - attr: - - FnCall: [target_feature, ['enable = "neon,lut"']] - - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop, 'INDEX = 1']]}]] + - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [nop, 'LANE = 1']]}]] - *neon-unstable-feat-lut - FnCall: [rustc_legacy_const_generics, ['2']] - static_defs: ["const INDEX: i32"] + static_defs: ["const LANE: i32"] safety: unsafe: [neon] types: - - [uint8x8_t, uint8x16_t, uint8x16_t, 'INDEX >= 0 && INDEX <= 3', 'int8x8_t'] - - [uint8x16_t, uint8x16_t, uint8x16_t, 'INDEX >= 0 && INDEX <= 3', 'int8x16_t'] - - [poly8x8_t, uint8x16_t, poly8x16_t, 'INDEX >= 0 && INDEX <= 3', 'int8x8_t'] - - [poly8x16_t, uint8x16_t, poly8x16_t, 'INDEX >= 0 && INDEX <= 3', 'int8x16_t'] - - [uint16x4_t, uint8x16_t, uint16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x4_t'] - - [uint16x8_t, uint8x16_t, uint16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x8_t'] - - [poly16x4_t, uint8x16_t, poly16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x4_t'] - - [poly16x8_t, uint8x16_t, poly16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x8_t'] - - [float16x4_t, uint8x16_t, float16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x4_t'] - - [float16x8_t, uint8x16_t, float16x8_t, 'INDEX >= 0 && INDEX <= 7', 'int16x8_t'] + - [uint8x8_t, uint8x8_t, uint8x16_t, 'LANE >= 0 && LANE <= 1', 'int8x8_t'] + - [uint8x16_t, uint8x8_t, uint8x16_t, 'LANE >= 0 && LANE <= 1', 'int8x16_t'] + - [poly8x8_t, uint8x8_t, poly8x16_t, 'LANE >= 0 && LANE <= 1', 'int8x8_t'] + - [poly8x16_t, uint8x8_t, poly8x16_t, 'LANE >= 0 && LANE <= 1', 'int8x16_t'] + - [uint16x4_t, uint8x8_t, uint16x8_t, 'LANE >= 0 && LANE <= 3', 'int16x4_t'] + - [uint16x8_t, uint8x8_t, uint16x8_t, 'LANE >= 0 && LANE <= 3', 'int16x8_t'] + - [poly16x4_t, uint8x8_t, poly16x8_t, 'LANE >= 0 && LANE <= 3', 'int16x4_t'] + - [poly16x8_t, uint8x8_t, poly16x8_t, 'LANE >= 0 && LANE <= 3', 'int16x8_t'] compose: - FnCall: ['static_assert!', ['{type[3]}']] - FnCall: - transmute - - FnCall: - - 'vluti2{neon_type[4].laneq_nox}::' + - 'vluti2{neon_type[4].lane_nox}::' - - FnCall: [transmute, [a]] - b - - name: "vluti4{neon_type[0].lane_nox}" doc: "Lookup table read with 4-bit indices" arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"] @@ -14344,28 +14268,6 @@ intrinsics: - - FnCall: [transmute, [a]] - b - - name: "vscale{neon_type[0].no}" - doc: "Multi-vector floating-point adjust exponent" - arguments: ["vn: {type[0]}", "vm: {type[1]}"] - return_type: "{type[0]}" - attr: - - *neon-unstable-fp8 - - FnCall: [target_feature, ['enable = "neon,fp8"']] - - FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env= "msvc"']]}]]}, {FnCall: [assert_instr, [fscale]]}]] - safety: safe - types: - - [float16x4_t, int16x4_t] - - [float16x8_t, int16x8_t] - - [float32x2_t, int32x2_t] - - [float32x4_t, int32x4_t] - - [float64x2_t, int64x2_t] - compose: - - LLVMLink: - name: "vscale{neon_type[0].no}" - links: - - link: "llvm.aarch64.neon.fp8.fscale.{neon_type[0]}" - arch: aarch64,arm64ec - - name: "__jcvt" doc: "Floating-point JavaScript convert to signed fixed-point, rounding toward zero" arguments: ["a: {type}"] diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml index 52748a4cc056d..c7a333d7f75ec 100644 --- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml +++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml @@ -7096,132 +7096,6 @@ intrinsics: - FnCall: [simd_cast, [b]] - FnCall: [simd_sub, [c, d]] - - name: "vusdot{neon_type[0].laneq_nox}" - doc: "Dot product index form with unsigned and signed integers" - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] - return_type: "{neon_type[0]}" - big_endian_inverse: true # TODO: Remove this attribute, and replace transmute with vreinterpret when https://github.com/llvm/llvm-project/pull/169337 is merged, LLVM inlining issue causing assertion failure. - attr: - - *neon-v8 - - *neon-i8mm - - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vusdot, 'LANE = 3']]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [usdot, 'LANE = 3']]}]] - - FnCall: [rustc_legacy_const_generics, ['3']] - - FnCall: [unstable, ['feature = "stdarch_neon_i8mm"', 'issue = "117223"']] - static_defs: ["const LANE: i32"] - safety: safe - types: - - [int32x2_t, uint8x8_t, int8x16_t, '[LANE as u32, LANE as u32]',''] - - [int32x4_t, uint8x16_t, int8x16_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] - compose: - - FnCall: [static_assert_uimm_bits!, [LANE, '2']] - - Let: [c, int32x4_t, {FnCall: [transmute, [c]]}] - - Let: [c, "{neon_type[0]}", {FnCall: [simd_shuffle!, [c, c, "{type[3]}"]]}] - - FnCall: ["vusdot{neon_type[0].no}", [a, b, {FnCall: [transmute, [c]]}]] - #- FnCall: ["vusdot{neon_type[0].no}", [a, b, {FnCall: ['vreinterpret{type[4]}_s8_s32', [c]]}]] - - - name: "vsudot{neon_type[0].laneq_nox}" - doc: "Dot product index form with signed and unsigned integers" - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] - return_type: "{neon_type[0]}" - attr: - - *neon-v8 - - *neon-i8mm - - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vsudot, 'LANE = 1']]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [sudot, 'LANE = 3']]}]] - - FnCall: [rustc_legacy_const_generics, ['3']] - - FnCall: [unstable, ['feature = "stdarch_neon_i8mm"', 'issue = "117223"']] - static_defs: ["const LANE: i32"] - safety: safe - types: - - [int32x2_t, int8x8_t, uint8x16_t, '[LANE as u32, LANE as u32]', uint32x2_t] - - [int32x4_t, int8x16_t, uint8x16_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]', uint32x4_t] - compose: - - FnCall: [static_assert_uimm_bits!, [LANE, 2]] - - Let: - - c - - uint32x4_t - - FnCall: [transmute, [c]] - - Let: - - c - - "{type[4]}" - - FnCall: [simd_shuffle!, [c, c, "{type[3]}"]] - - FnCall: - - "vusdot{neon_type[0].no}" - - - a - - FnCall: [transmute, [c]] - - b - - - name: "vdot{neon_type[0].laneq_nox}" - doc: Dot product arithmetic (indexed) - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] - return_type: "{neon_type[0]}" - static_defs: ["const LANE: i32"] - big_endian_inverse: true # TODO: Remove this attribute, and replace transmute with vreinterpret when https://github.com/llvm/llvm-project/pull/169337 is merged, LLVM inlining issue causing assertion failure. - attr: - - *neon-v8 - - FnCall: [target_feature, ['enable = "neon,dotprod"']] - - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vsdot, 'LANE = 0']]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [sdot, 'LANE = 0']]}]] - - FnCall: [rustc_legacy_const_generics, ['3']] - - FnCall: [unstable, ['feature = "stdarch_neon_dotprod"', 'issue = "117224"']] - safety: safe - types: - - [int32x2_t, int8x8_t, int8x16_t, int32x4_t, '[LANE as u32, LANE as u32]', ''] - - [int32x4_t, int8x16_t, int8x16_t, int32x4_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] - compose: - - FnCall: [static_assert_uimm_bits!, [LANE, '2']] - - Let: - - c - - "{neon_type[3]}" - - FnCall: [transmute, [c]] - #- FnCall: ['vreinterpretq_{neon_type[0]}_{neon_type[1]}', [c]] - - Let: - - c - - "{neon_type[0]}" - - FnCall: [simd_shuffle!, [c, c, '{type[4]}']] - - FnCall: - - "vdot{neon_type[0].no}" - - - a - - b - - FnCall: [transmute, [c]] - #- FnCall: ['vreinterpret{type[5]}_{neon_type[1]}_{neon_type[0]}', [c]] - - - name: "vdot{neon_type[0].laneq_nox}" - doc: Dot product arithmetic (indexed) - arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"] - return_type: "{neon_type[0]}" - static_defs: ["const LANE: i32"] - big_endian_inverse: true # TODO: Remove this attribute, and replace transmute with vreinterpret when https://github.com/llvm/llvm-project/pull/169337 is merged, LLVM inlining issue causing assertion failure. - attr: - - *neon-v8 - - FnCall: [target_feature, ['enable = "neon,dotprod"']] - - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vudot, 'LANE = 0']]}]] - - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [udot, 'LANE = 0']]}]] - - FnCall: [rustc_legacy_const_generics, ['3']] - - FnCall: [unstable, ['feature = "stdarch_neon_dotprod"', 'issue = "117224"']] - safety: safe - types: - - [uint32x2_t, uint8x8_t, uint8x16_t, uint32x4_t, '[LANE as u32, LANE as u32]',''] - - [uint32x4_t, uint8x16_t, uint8x16_t, uint32x4_t, '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]','q'] - compose: - - FnCall: [static_assert_uimm_bits!, [LANE, '2']] - - Let: - - c - - "{neon_type[3]}" - - FnCall: [transmute, [c]] - #- FnCall: ['vreinterpretq_{neon_type[0]}_{neon_type[1]}', [c]] - - Let: - - c - - "{neon_type[0]}" - - FnCall: [simd_shuffle!, [c, c, '{type[4]}']] - - FnCall: - - "vdot{neon_type[0].no}" - - - a - - b - - FnCall: [transmute, [c]] - #- FnCall: ['vreinterpret{type[5]}_{neon_type[1]}_{neon_type[0]}', [c]] - - name: "vdot{neon_type[0].no}" doc: Dot product arithmetic (vector) arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[1]}"] @@ -8911,6 +8785,7 @@ intrinsics: - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] + - *neon-fp16 - *neon-not-arm-stable-fp16 - *neon-cfg-arm-unstable - *target-not-arm64ec @@ -8974,6 +8849,7 @@ intrinsics: - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] + - *neon-fp16 - *neon-not-arm-stable-fp16 - *neon-cfg-arm-unstable - *target-not-arm64ec diff --git a/library/stdarch/crates/stdarch-gen-arm/src/intrinsic.rs b/library/stdarch/crates/stdarch-gen-arm/src/intrinsic.rs index ce427d54b3552..71301c5ba6cea 100644 --- a/library/stdarch/crates/stdarch-gen-arm/src/intrinsic.rs +++ b/library/stdarch/crates/stdarch-gen-arm/src/intrinsic.rs @@ -840,7 +840,7 @@ impl fmt::Display for UnsafetyComment { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { match self { Self::Custom(s) => s.fmt(f), - Self::Neon => write!(f, "Neon intrinsic unsafe"), + Self::Neon => write!(f, "Neon instrinsic unsafe"), Self::Uninitialized => write!( f, "This creates an uninitialized value, and may be unsound (like \ diff --git a/library/stdarch/intrinsics_data/arm_intrinsics.json b/library/stdarch/intrinsics_data/arm_intrinsics.json index bce85d19a10f1..19c655cd6d24e 100644 --- a/library/stdarch/intrinsics_data/arm_intrinsics.json +++ b/library/stdarch/intrinsics_data/arm_intrinsics.json @@ -223,141 +223,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vscale_f16", - "arguments": [ - "float16x4_t a", - "int16x4_t b" - ], - "return_type": { - "value": "float16x4_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.4H" - }, - "b": { - "register": "Vm.4H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FSCALE" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vscaleq_f16", - "arguments": [ - "float16x8_t a", - "int16x8_t b" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FSCALE" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vscale_f32", - "arguments": [ - "float32x2_t a", - "int32x2_t b" - ], - "return_type": { - "value": "float32x2_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.2S" - }, - "b": { - "register": "Vm.2S" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FSCALE" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vscaleq_f32", - "arguments": [ - "float32x4_t a", - "int32x4_t b" - ], - "return_type": { - "value": "float32x4_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.4S" - }, - "b": { - "register": "Vm.4S" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FSCALE" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vscaleq_f64", - "arguments": [ - "float64x2_t a", - "int64x2_t b" - ], - "return_type": { - "value": "float64x2_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.2D" - }, - "b": { - "register": "Vm.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FSCALE" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vaba_s16", @@ -34868,230 +34733,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vldap1_lane_u64", - "arguments": [ - "uint64_t const * ptr", - "uint64x1_t src", - "const int lane" - ], - "return_type": { - "value": "uint64x1_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1_lane_s64", - "arguments": [ - "int64_t const * ptr", - "int64x1_t src", - "const int lane" - ], - "return_type": { - "value": "int64x1_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1q_lane_u64", - "arguments": [ - "uint64_t const * ptr", - "uint64x2_t src", - "const int lane" - ], - "return_type": { - "value": "uint64x2_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1q_lane_s64", - "arguments": [ - "int64_t const * ptr", - "int64x2_t src", - "const int lane" - ], - "return_type": { - "value": "int64x2_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1_lane_p64", - "arguments": [ - "poly64_t const * ptr", - "poly64x1_t src", - "const int lane" - ], - "return_type": { - "value": "poly64x1_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1q_lane_p64", - "arguments": [ - "poly64_t const * ptr", - "poly64x2_t src", - "const int lane" - ], - "return_type": { - "value": "poly64x2_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vldap1q_lane_f64", - "arguments": [ - "float64_t const * ptr", - "float64x2_t src", - "const int lane" - ], - "return_type": { - "value": "float64x2_t" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "src": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LDAP1" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vld1_dup_f16", @@ -109552,262 +109193,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vstl1_lane_f64", - "arguments": [ - "float64_t * ptr", - "float64x1_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1q_lane_f64", - "arguments": [ - "float64_t * ptr", - "float64x2_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1_lane_p64", - "arguments": [ - "poly64_t * ptr", - "poly64x1_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1q_lane_p64", - "arguments": [ - "poly64_t * ptr", - "poly64x2_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1_lane_u64", - "arguments": [ - "uint64_t * ptr", - "uint64x1_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1q_lane_u64", - "arguments": [ - "uint64_t * ptr", - "uint64x2_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1_lane_s64", - "arguments": [ - "int64_t * ptr", - "int64x1_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 0 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.1D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vstl1q_lane_s64", - "arguments": [ - "int64_t * ptr", - "int64x2_t val", - "const int lane" - ], - "return_type": { - "value": "void" - }, - "Arguments_Preparation": { - "lane": { - "minimum": 0, - "maximum": 1 - }, - "ptr": { - "register": "Xn" - }, - "val": { - "register": "Vt.2D" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "STL1" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vsub_f16", @@ -119297,60 +118682,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vamin_f16", - "arguments": [ - "float16x4_t a", - "float16x4_t b" - ], - "return_type": { - "value": "float16x4_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.4H" - }, - "b": { - "register": "Vm.4H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FAMIN" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vaminq_f16", - "arguments": [ - "float16x8_t a", - "float16x8_t b" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FAMIN" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vamin_f32", @@ -119432,60 +118763,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vamax_f16", - "arguments": [ - "float16x4_t a", - "float16x4_t b" - ], - "return_type": { - "value": "float16x4_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.4H" - }, - "b": { - "register": "Vm.4H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FAMAX" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vamaxq_f16", - "arguments": [ - "float16x8_t a", - "float16x8_t b" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "FAMAX" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vamax_f32", @@ -119567,531 +118844,6 @@ ] ] }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_lane_f16", - "arguments": [ - "float16x4_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_lane_s16", - "arguments": [ - "int16x4_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "int16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_lane_u16", - "arguments": [ - "uint16x4_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "uint16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "lane": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_lane_p16", - "arguments": [ - "poly16x4_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "poly16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_laneq_f16", - "arguments": [ - "float16x4_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_laneq_s16", - "arguments": [ - "int16x4_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "int16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_laneq_u16", - "arguments": [ - "uint16x4_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "uint16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2_laneq_p16", - "arguments": [ - "poly16x4_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "poly16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_lane_f16", - "arguments": [ - "float16x8_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_lane_s16", - "arguments": [ - "int16x8_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "int16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_lane_u16", - "arguments": [ - "uint16x8_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "uint16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_lane_p16", - "arguments": [ - "poly16x8_t a", - "uint8x8_t b", - "const int index" - ], - "return_type": { - "value": "poly16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_f16", - "arguments": [ - "float16x8_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "float16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_s16", - "arguments": [ - "int16x8_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "int16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_u16", - "arguments": [ - "uint16x8_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "uint16x8_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.8H" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 7 - }, - "r": { - "register": "Vd.8H" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, { "SIMD_ISA": "Neon", "name": "vluti2_lane_u8", @@ -120110,7 +118862,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120145,7 +118897,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120180,7 +118932,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120215,7 +118967,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120250,7 +119002,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120285,7 +119037,7 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 1 }, @@ -120304,63 +119056,28 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2_laneq_u8", - "arguments": [ - "uint8x8_t a", - "uint8x16_t b", - "const int index" - ], - "return_type": { - "value": "uint8x16_t" - }, - "Arguments_Preparation": { - "a": { - "register": "Vn.16B" - }, - "b": { - "register": "Vm" - }, - "index": { - "minimum": 0, - "maximum": 3 - }, - "r": { - "register": "Vd.16B" - } - }, - "Architectures": [ - "A64" - ], - "instructions": [ - [ - "LUTI2" - ] - ] - }, - { - "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_u8", + "name": "vluti2_lane_u16", "arguments": [ - "uint8x16_t a", - "uint8x16_t b", - "const int index" + "uint16x4_t a", + "uint8x8_t b", + "const int lane" ], "return_type": { - "value": "uint8x16_t" + "value": "uint16x8_t" }, "Arguments_Preparation": { "a": { - "register": "Vn.16B" + "register": "Vn.8H" }, "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 3 }, "r": { - "register": "Vd.16B" + "register": "Vd.8H" } }, "Architectures": [ @@ -120374,28 +119091,28 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2_laneq_s8", + "name": "vluti2q_lane_u16", "arguments": [ - "int8x8_t a", - "uint8x16_t b", - "const int index" + "uint16x8_t a", + "uint8x8_t b", + "const int lane" ], "return_type": { - "value": "int8x16_t" + "value": "uint16x8_t" }, "Arguments_Preparation": { "a": { - "register": "Vn.16B" + "register": "Vn.8H" }, "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 3 }, "r": { - "register": "Vd.16B" + "register": "Vd.8H" } }, "Architectures": [ @@ -120409,28 +119126,28 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_s8", + "name": "vluti2_lane_s16", "arguments": [ - "int8x16_t a", - "uint8x16_t b", - "const int index" + "int16x4_t a", + "uint8x8_t b", + "const int lane" ], "return_type": { - "value": "int8x16_t" + "value": "int16x8_t" }, "Arguments_Preparation": { "a": { - "register": "Vn.16B" + "register": "Vn.8H" }, "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 3 }, "r": { - "register": "Vd.16B" + "register": "Vd.8H" } }, "Architectures": [ @@ -120444,28 +119161,28 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2_laneq_p8", + "name": "vluti2q_lane_s16", "arguments": [ - "poly8x8_t a", - "uint8x16_t b", - "const int index" + "int16x8_t a", + "uint8x8_t b", + "const int lane" ], "return_type": { - "value": "poly8x16_t" + "value": "int16x8_t" }, "Arguments_Preparation": { "a": { - "register": "Vn.16B" + "register": "Vn.8H" }, "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 3 }, "r": { - "register": "Vd.16B" + "register": "Vd.8H" } }, "Architectures": [ @@ -120479,28 +119196,28 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_p8", + "name": "vluti2_lane_p16", "arguments": [ - "poly8x16_t a", - "uint8x16_t b", - "const int index" + "poly16x4_t a", + "uint8x8_t b", + "const int lane" ], "return_type": { - "value": "poly8x16_t" + "value": "poly16x8_t" }, "Arguments_Preparation": { "a": { - "register": "Vn.16B" + "register": "Vn.8H" }, "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, "maximum": 3 }, "r": { - "register": "Vd.16B" + "register": "Vd.8H" } }, "Architectures": [ @@ -120514,11 +119231,11 @@ }, { "SIMD_ISA": "Neon", - "name": "vluti2q_laneq_p16", + "name": "vluti2q_lane_p16", "arguments": [ "poly16x8_t a", - "uint8x16_t b", - "const int index" + "uint8x8_t b", + "const int lane" ], "return_type": { "value": "poly16x8_t" @@ -120530,9 +119247,9 @@ "b": { "register": "Vm" }, - "index": { + "lane": { "minimum": 0, - "maximum": 7 + "maximum": 3 }, "r": { "register": "Vd.8H" diff --git a/library/sysroot/Cargo.toml b/library/sysroot/Cargo.toml index b2069ef6a613b..a188680829166 100644 --- a/library/sysroot/Cargo.toml +++ b/library/sysroot/Cargo.toml @@ -25,6 +25,7 @@ backtrace = ["std/backtrace"] backtrace-trace-only = ["std/backtrace-trace-only"] compiler-builtins-c = ["std/compiler-builtins-c"] compiler-builtins-mem = ["std/compiler-builtins-mem"] +compiler-builtins-no-f16-f128 = ["std/compiler-builtins-no-f16-f128"] debug_refcell = ["std/debug_refcell"] llvm-libunwind = ["std/llvm-libunwind"] system-llvm-libunwind = ["std/system-llvm-libunwind"] diff --git a/src/bootstrap/src/core/build_steps/test.rs b/src/bootstrap/src/core/build_steps/test.rs index 61015a141e461..844251f2c64db 100644 --- a/src/bootstrap/src/core/build_steps/test.rs +++ b/src/bootstrap/src/core/build_steps/test.rs @@ -1299,19 +1299,19 @@ impl Step for Tidy { /// for the `dev` or `nightly` channels. fn run(self, builder: &Builder<'_>) { let mut cmd = builder.tool_cmd(Tool::Tidy); - cmd.arg(format!("--root-path={}", &builder.src.display())); - cmd.arg(format!("--cargo-path={}", &builder.initial_cargo.display())); - cmd.arg(format!("--output-dir={}", &builder.out.display())); + cmd.arg(&builder.src); + cmd.arg(&builder.initial_cargo); + cmd.arg(&builder.out); // Tidy is heavily IO constrained. Still respect `-j`, but use a higher limit if `jobs` hasn't been configured. let jobs = builder.config.jobs.unwrap_or_else(|| { 8 * std::thread::available_parallelism().map_or(1, std::num::NonZeroUsize::get) as u32 }); - cmd.arg(format!("--concurrency={jobs}")); + cmd.arg(jobs.to_string()); // pass the path to the yarn command used for installing js deps. if let Some(yarn) = &builder.config.yarn { - cmd.arg(format!("--npm-path={}", yarn.display())); + cmd.arg(yarn); } else { - cmd.arg("--npm-path=yarn"); + cmd.arg("yarn"); } if builder.is_verbose() { cmd.arg("--verbose"); diff --git a/src/ci/citool/Cargo.toml b/src/ci/citool/Cargo.toml index 0b1f2fe79bf75..b394c6fbefffc 100644 --- a/src/ci/citool/Cargo.toml +++ b/src/ci/citool/Cargo.toml @@ -5,7 +5,7 @@ edition = "2024" [dependencies] anyhow = "1" -askama = "0.15.4" +askama = "0.15.2" clap = { version = "4.5", features = ["derive"] } csv = "1" diff = "0.1" diff --git a/src/doc/rustc-dev-guide/.github/workflows/ci.yml b/src/doc/rustc-dev-guide/.github/workflows/ci.yml index bdb70f215f830..f2f2f7ed14858 100644 --- a/src/doc/rustc-dev-guide/.github/workflows/ci.yml +++ b/src/doc/rustc-dev-guide/.github/workflows/ci.yml @@ -14,7 +14,7 @@ jobs: if: github.repository == 'rust-lang/rustc-dev-guide' runs-on: ubuntu-latest env: - MDBOOK_VERSION: 0.5.2 + MDBOOK_VERSION: 0.5.1 MDBOOK_LINKCHECK2_VERSION: 0.11.0 MDBOOK_MERMAID_VERSION: 0.17.0 MDBOOK_OUTPUT__LINKCHECK__FOLLOW_WEB_LINKS: ${{ github.event_name != 'pull_request' }} diff --git a/src/doc/rustc-dev-guide/book.toml b/src/doc/rustc-dev-guide/book.toml index 5712a364f7602..15a597e5addbe 100644 --- a/src/doc/rustc-dev-guide/book.toml +++ b/src/doc/rustc-dev-guide/book.toml @@ -57,39 +57,11 @@ cache-timeout = 90000 warning-policy = "error" [output.html.redirect] -"/borrow_check.html" = "borrow-check.html" -"/borrow_check/drop_check.html" = "/borrow-check/drop-check.html" -"/borrow_check/moves_and_initialization.html" = "/borrow-check/moves-and-initialization.html" -"/borrow_check/moves_and_initialization/move_paths.html" = "/borrow-check/moves-and-initialization/move-paths.html" -"/borrow_check/opaque-types-region-inference-restrictions.html" = "/borrow-check/opaque-types-region-inference-restrictions.html" -"/borrow_check/region_inference.html" = "/borrow-check/region-inference.html" -"/borrow_check/region_inference/closure_constraints.html" = "/borrow-check/region-inference/closure-constraints.html" -"/borrow_check/region_inference/constraint_propagation.html" = "/borrow-check/region-inference/constraint-propagation.html" -"/borrow_check/region_inference/error_reporting.html" = "/borrow-check/region-inference/error-reporting.html" -"/borrow_check/region_inference/lifetime_parameters.html" = "/borrow-check/region-inference/lifetime-parameters.html" -"/borrow_check/region_inference/member_constraints.html" = "/borrow-check/region-inference/member-constraints.html" -"/borrow_check/region_inference/placeholders_and_universes.html" = "/borrow-check/region-inference/placeholders-and-universes.html" -"/borrow_check/two_phase_borrows.html" = "/borrow-check/two-phase-borrows.html" -"/borrow_check/type_check.html" = "/borrow-check/type-check.html" "/compiletest.html" = "tests/compiletest.html" -"/diagnostics/diagnostic-codes.html" = "error-codes.html" "/diagnostics/sessiondiagnostic.html" = "diagnostic-structs.html" -"/early_late_parameters.html" = "early-late-parameters.html" -"/generic_parameters_summary.html" = "generic-parameters-summary.html" -"/implementing_new_features.html" = "implementing-new-features.html" +"/diagnostics/diagnostic-codes.html" = "error-codes.html" "/miri.html" = "const-eval/interpret.html" -"/profiling/with_perf.html" = "with-perf.html" -"/profiling/with_rustc_perf.html" = "with-rustc-perf.html" -"/profiling/wpa_profiling.html" = "wpa-profiling.html" -"/stabilization_guide.html" = "stabilization-guide.html" -"/stabilization_report_template.html" = "stabilization-report-template.html" "/tests/fuchsia.html" = "ecosystem-test-jobs/fuchsia.html" "/tests/headers.html" = "directives.html" "/tests/integration.html" = "ecosystem.html" "/tests/rust-for-linux.html" = "ecosystem-test-jobs/rust-for-linux.html" -"/ty_module/binders.html" = "/ty-module/binders.html" -"/ty_module/early_binder.html" = "/ty-module/early-binder.html" -"/ty_module/generic_arguments.html" = "/ty-module/generic-arguments.html" -"/ty_module/instantiating_binders.html" = "/ty-module/instantiating-binders.html" -"/ty_module/param_ty_const_regions.html" = "/ty-module/param-ty-const-regions.html" -"/typing_parameter_envs.html" = "typing-parameter-envs.html" diff --git a/src/doc/rustc-dev-guide/ci/sembr/src/main.rs b/src/doc/rustc-dev-guide/ci/sembr/src/main.rs index 6720267e14f3b..6f4ce4415f04a 100644 --- a/src/doc/rustc-dev-guide/ci/sembr/src/main.rs +++ b/src/doc/rustc-dev-guide/ci/sembr/src/main.rs @@ -24,7 +24,7 @@ static REGEX_IGNORE_END: LazyLock = static REGEX_IGNORE_LINK_TARGETS: LazyLock = LazyLock::new(|| Regex::new(r"^\[.+\]: ").unwrap()); static REGEX_SPLIT: LazyLock = - LazyLock::new(|| Regex::new(r"([^\.\d\-\*]\.|[^r\~]\?|!)\s").unwrap()); + LazyLock::new(|| Regex::new(r"([^\.\d\-\*]\.|[^r]\?|!)\s").unwrap()); // list elements, numbered (1.) or not (- and *) static REGEX_LIST_ENTRY: LazyLock = LazyLock::new(|| Regex::new(r"^\s*(\d\.|\-|\*|\d\))\s+").unwrap()); @@ -83,8 +83,6 @@ fn ignore(line: &str, in_code_block: bool) -> bool { || line.contains(" etc.") || line.contains("i.e.") || line.contains("et. al") - || line.contains("") || line.contains('|') || line.trim_start().starts_with('>') || line.starts_with('#') @@ -206,7 +204,6 @@ git log main.. compiler o? whatever r? @reviewer r? @reviewer -~? diagnostic "; let expected = " # some. heading @@ -239,7 +236,6 @@ o? whatever r? @reviewer r? @reviewer -~? diagnostic "; assert_eq!(expected, comply(original)); } @@ -267,11 +263,6 @@ leave the text alone ``` - ignore -html comment closing - handle the indented well @@ -298,11 +289,6 @@ leave the text alone ``` - ignore -html comment closing - handle the indented well [a target]: https://example.com diff --git a/src/doc/rustc-dev-guide/rust-version b/src/doc/rustc-dev-guide/rust-version index 795271ee0ef03..b53a66c667517 100644 --- a/src/doc/rustc-dev-guide/rust-version +++ b/src/doc/rustc-dev-guide/rust-version @@ -1 +1 @@ -370143facfb348ad3b29749c0393402d76b280c3 +44a5b55557c26353f388400d7da95527256fe260 diff --git a/src/doc/rustc-dev-guide/src/SUMMARY.md b/src/doc/rustc-dev-guide/src/SUMMARY.md index 5342c54607b77..daaaef42d9096 100644 --- a/src/doc/rustc-dev-guide/src/SUMMARY.md +++ b/src/doc/rustc-dev-guide/src/SUMMARY.md @@ -39,9 +39,9 @@ - [Debugging the compiler](./compiler-debugging.md) - [Using the tracing/logging instrumentation](./tracing.md) - [Profiling the compiler](./profiling.md) - - [with the linux perf tool](./profiling/with-perf.md) - - [with Windows Performance Analyzer](./profiling/wpa-profiling.md) - - [with the Rust benchmark suite](./profiling/with-rustc-perf.md) + - [with the linux perf tool](./profiling/with_perf.md) + - [with Windows Performance Analyzer](./profiling/wpa_profiling.md) + - [with the Rust benchmark suite](./profiling/with_rustc_perf.md) - [crates.io dependencies](./crates-io.md) # Contributing to Rust @@ -51,11 +51,11 @@ - [Using Git](./git.md) - [Mastering @rustbot](./rustbot.md) - [Walkthrough: a typical contribution](./walkthrough.md) -- [Implementing new language features](./implementing-new-features.md) +- [Implementing new language features](./implementing_new_features.md) - [Stability guarantees](./stability-guarantees.md) - [Stability attributes](./stability.md) -- [Stabilizing language features](./stabilization-guide.md) - - [Stabilization report template](./stabilization-report-template.md) +- [Stabilizing language features](./stabilization_guide.md) + - [Stabilization report template](./stabilization_report_template.md) - [Feature Gates](./feature-gates.md) - [Coding conventions](./conventions.md) - [Procedures for breaking changes](./bug-fix-procedure.md) @@ -106,7 +106,6 @@ - [GPU offload internals](./offload/internals.md) - [Installation](./offload/installation.md) - [Usage](./offload/usage.md) - - [Contributing](./offload/contributing.md) - [Autodiff internals](./autodiff/internals.md) - [Installation](./autodiff/installation.md) - [How to debug](./autodiff/debugging.md) @@ -155,17 +154,17 @@ # Analysis - [Prologue](./part-4-intro.md) -- [Generic parameter definitions](./generic-parameters-summary.md) - - [`EarlyBinder` and instantiating parameters](./ty-module/early-binder.md) -- [Binders and Higher ranked regions](./ty-module/binders.md) - - [Instantiating binders](./ty-module/instantiating-binders.md) -- [Early vs Late bound parameters](./early-late-parameters.md) +- [Generic parameter definitions](./generic_parameters_summary.md) + - [`EarlyBinder` and instantiating parameters](./ty_module/early_binder.md) +- [Binders and Higher ranked regions](./ty_module/binders.md) + - [Instantiating binders](./ty_module/instantiating_binders.md) +- [Early vs Late bound parameters](./early_late_parameters.md) - [The `ty` module: representing types](./ty.md) - - [ADTs and Generic Arguments](./ty-module/generic-arguments.md) - - [Parameter types/consts/regions](./ty-module/param-ty-const-regions.md) + - [ADTs and Generic Arguments](./ty_module/generic_arguments.md) + - [Parameter types/consts/regions](./ty_module/param_ty_const_regions.md) - [`TypeFolder` and `TypeFoldable`](./ty-fold.md) - [Aliases and Normalization](./normalization.md) -- [Typing/Param Envs](./typing-parameter-envs.md) +- [Typing/Param Envs](./typing_parameter_envs.md) - [Type inference](./type-inference.md) - [Trait solving](./traits/resolution.md) - [Higher-ranked trait bounds](./traits/hrtb.md) @@ -198,25 +197,25 @@ - [Opaque types](./opaque-types-type-alias-impl-trait.md) - [Inference details](./opaque-types-impl-trait-inference.md) - [Return Position Impl Trait In Trait](./return-position-impl-trait-in-trait.md) - - [Region inference restrictions](./borrow-check/opaque-types-region-inference-restrictions.md) -- [Const traits and const condition checking](./effects.md) + - [Region inference restrictions][opaque-infer] +- [Const condition checking](./effects.md) - [Pattern and exhaustiveness checking](./pat-exhaustive-checking.md) - [Unsafety checking](./unsafety-checking.md) - [MIR dataflow](./mir/dataflow.md) - [Drop elaboration](./mir/drop-elaboration.md) -- [The borrow checker](./borrow-check.md) - - [Tracking moves and initialization](./borrow-check/moves-and-initialization.md) - - [Move paths](./borrow-check/moves-and-initialization/move-paths.md) - - [MIR type checker](./borrow-check/type-check.md) - - [Drop check](./borrow-check/drop-check.md) - - [Region inference](./borrow-check/region-inference.md) - - [Constraint propagation](./borrow-check/region-inference/constraint-propagation.md) - - [Lifetime parameters](./borrow-check/region-inference/lifetime-parameters.md) - - [Member constraints](./borrow-check/region-inference/member-constraints.md) - - [Placeholders and universes](./borrow-check/region-inference/placeholders-and-universes.md) - - [Closure constraints](./borrow-check/region-inference/closure-constraints.md) - - [Error reporting](./borrow-check/region-inference/error-reporting.md) - - [Two-phase-borrows](./borrow-check/two-phase-borrows.md) +- [The borrow checker](./borrow_check.md) + - [Tracking moves and initialization](./borrow_check/moves_and_initialization.md) + - [Move paths](./borrow_check/moves_and_initialization/move_paths.md) + - [MIR type checker](./borrow_check/type_check.md) + - [Drop check](./borrow_check/drop_check.md) + - [Region inference](./borrow_check/region_inference.md) + - [Constraint propagation](./borrow_check/region_inference/constraint_propagation.md) + - [Lifetime parameters](./borrow_check/region_inference/lifetime_parameters.md) + - [Member constraints](./borrow_check/region_inference/member_constraints.md) + - [Placeholders and universes][pau] + - [Closure constraints](./borrow_check/region_inference/closure_constraints.md) + - [Error reporting](./borrow_check/region_inference/error_reporting.md) + - [Two-phase-borrows](./borrow_check/two_phase_borrows.md) - [Closure capture inference](./closure.md) - [Async closures/"coroutine-closures"](coroutine-closures.md) @@ -264,3 +263,8 @@ [Appendix E: Bibliography](./appendix/bibliography.md) [Appendix Z: HumorRust](./appendix/humorust.md) + +--- + +[pau]: ./borrow_check/region_inference/placeholders_and_universes.md +[opaque-infer]: ./borrow_check/opaque-types-region-inference-restrictions.md diff --git a/src/doc/rustc-dev-guide/src/appendix/background.md b/src/doc/rustc-dev-guide/src/appendix/background.md index e76285080394d..d36927e82f748 100644 --- a/src/doc/rustc-dev-guide/src/appendix/background.md +++ b/src/doc/rustc-dev-guide/src/appendix/background.md @@ -243,7 +243,8 @@ use in lambda calculus evaluation (see [this Wikipedia article][wikideb] for more). In `rustc`, we use de Bruijn indices to [represent generic types][sub]. [wikideb]: https://en.wikipedia.org/wiki/De_Bruijn_index -[sub]: ../ty-module/generic-arguments.md +[sub]: ../ty_module/generic_arguments.md + Here is a basic example of how de Bruijn indices might be used for closures (we don't actually do this in `rustc` though!): diff --git a/src/doc/rustc-dev-guide/src/appendix/code-index.md b/src/doc/rustc-dev-guide/src/appendix/code-index.md index 3e1eed17eba64..bf9d3bd465645 100644 --- a/src/doc/rustc-dev-guide/src/appendix/code-index.md +++ b/src/doc/rustc-dev-guide/src/appendix/code-index.md @@ -39,5 +39,5 @@ Item | Kind | Short description | Chapter | [Emitting Diagnostics]: ../diagnostics.html [Macro expansion]: ../macro-expansion.html [Name resolution]: ../name-resolution.html -[Parameter Environment]: ../typing-parameter-envs.html +[Parameter Environment]: ../typing_parameter_envs.html [Trait Solving: Goals and Clauses]: ../traits/goals-and-clauses.html#domain-goals diff --git a/src/doc/rustc-dev-guide/src/appendix/glossary.md b/src/doc/rustc-dev-guide/src/appendix/glossary.md index 43935b12a2383..901fb68c0513f 100644 --- a/src/doc/rustc-dev-guide/src/appendix/glossary.md +++ b/src/doc/rustc-dev-guide/src/appendix/glossary.md @@ -53,10 +53,10 @@ Term | Meaning normalize | A general term for converting to a more canonical form, but in the case of rustc typically refers to [associated type normalization](../traits/goals-and-clauses.md#normalizeprojection---type). newtype | A wrapper around some other type (e.g., `struct Foo(T)` is a "newtype" for `T`). This is commonly used in Rust to give a stronger type for indices. niche | Invalid bit patterns for a type _that can be used_ for layout optimizations. Some types cannot have certain bit patterns. For example, the `NonZero*` integers or the reference `&T` cannot be represented by a 0 bitstring. This means the compiler can perform layout optimizations by taking advantage of the invalid "niche value". An example application for this is the [*Discriminant elision on `Option`-like enums*](https://rust-lang.github.io/unsafe-code-guidelines/layout/enums.html#discriminant-elision-on-option-like-enums), which allows using a type's niche as the ["tag"](#tag) for an `enum` without requiring a separate field. -NLL | Short for [non-lexical lifetimes](../borrow-check/region-inference.md), this is an extension to Rust's borrowing system to make it be based on the control-flow graph. +NLL | Short for [non-lexical lifetimes](../borrow_check/region_inference.md), this is an extension to Rust's borrowing system to make it be based on the control-flow graph. node-id or `NodeId` | An index identifying a particular node in the AST or HIR; gradually being phased out and replaced with `HirId`. See [the HIR chapter for more](../hir.md#identifiers-in-the-hir). obligation | Something that must be proven by the trait system. ([see more](../traits/resolution.md)) -placeholder | **NOTE: skolemization is deprecated by placeholder** a way of handling subtyping around "for-all" types (e.g., `for<'a> fn(&'a u32)`) as well as solving higher-ranked trait bounds (e.g., `for<'a> T: Trait<'a>`). See [the chapter on placeholder and universes](../borrow-check/region-inference/placeholders-and-universes.md) for more details. +placeholder | **NOTE: skolemization is deprecated by placeholder** a way of handling subtyping around "for-all" types (e.g., `for<'a> fn(&'a u32)`) as well as solving higher-ranked trait bounds (e.g., `for<'a> T: Trait<'a>`). See [the chapter on placeholder and universes](../borrow_check/region_inference/placeholders_and_universes.md) for more details. point | Used in the NLL analysis to refer to some particular location in the MIR; typically used to refer to a node in the control-flow graph. projection | A general term for a "relative path", e.g. `x.f` is a "field projection", and `T::Item` is an ["associated type projection"](../traits/goals-and-clauses.md#trait-ref). promoted constants | Constants extracted from a function and lifted to static scope; see [this section](../mir/index.md#promoted) for more details. diff --git a/src/doc/rustc-dev-guide/src/autodiff/installation.md b/src/doc/rustc-dev-guide/src/autodiff/installation.md index e05fdc1160f2f..5300c12459a19 100644 --- a/src/doc/rustc-dev-guide/src/autodiff/installation.md +++ b/src/doc/rustc-dev-guide/src/autodiff/installation.md @@ -28,7 +28,6 @@ You can then run our test cases: ./x test --stage 1 tests/codegen-llvm/autodiff ./x test --stage 1 tests/pretty/autodiff ./x test --stage 1 tests/ui/autodiff -./x test --stage 1 tests/run-make/autodiff ./x test --stage 1 tests/ui/feature-gates/feature-gate-autodiff.rs ``` diff --git a/src/doc/rustc-dev-guide/src/borrow_check.md b/src/doc/rustc-dev-guide/src/borrow_check.md new file mode 100644 index 0000000000000..f206da42a82ca --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check.md @@ -0,0 +1,59 @@ +# MIR borrow check + +The borrow check is Rust's "secret sauce" – it is tasked with +enforcing a number of properties: + +- That all variables are initialized before they are used. +- That you can't move the same value twice. +- That you can't move a value while it is borrowed. +- That you can't access a place while it is mutably borrowed (except through + the reference). +- That you can't mutate a place while it is immutably borrowed. +- etc + +The borrow checker operates on the MIR. An older implementation operated on the +HIR. Doing borrow checking on MIR has several advantages: + +- The MIR is *far* less complex than the HIR; the radical desugaring + helps prevent bugs in the borrow checker. (If you're curious, you + can see + [a list of bugs that the MIR-based borrow checker fixes here][47366].) +- Even more importantly, using the MIR enables ["non-lexical lifetimes"][nll], + which are regions derived from the control-flow graph. + +[47366]: https://github.com/rust-lang/rust/issues/47366 +[nll]: https://rust-lang.github.io/rfcs/2094-nll.html + +### Major phases of the borrow checker + +The borrow checker source is found in +[the `rustc_borrowck` crate][b_c]. The main entry point is +the [`mir_borrowck`] query. + +[b_c]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/index.html +[`mir_borrowck`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/fn.mir_borrowck.html + +- We first create a **local copy** of the MIR. In the coming steps, + we will modify this copy in place to modify the types and things to + include references to the new regions that we are computing. +- We then invoke [`replace_regions_in_mir`] to modify our local MIR. + Among other things, this function will replace all of the [regions](./appendix/glossary.md#region) + in the MIR with fresh [inference variables](./appendix/glossary.md#inf-var). +- Next, we perform a number of + [dataflow analyses](./appendix/background.md#dataflow) that + compute what data is moved and when. +- We then do a [second type check](borrow_check/type_check.md) across the MIR: + the purpose of this type check is to determine all of the constraints between + different regions. +- Next, we do [region inference](borrow_check/region_inference.md), which computes + the values of each region — basically, the points in the control-flow graph where + each lifetime must be valid according to the constraints we collected. +- At this point, we can compute the "borrows in scope" at each point. +- Finally, we do a second walk over the MIR, looking at the actions it + does and reporting errors. For example, if we see a statement like + `*a + 1`, then we would check that the variable `a` is initialized + and that it is not mutably borrowed, as either of those would + require an error to be reported. Doing this check requires the results of all + the previous analyses. + +[`replace_regions_in_mir`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/nll/fn.replace_regions_in_mir.html diff --git a/src/doc/rustc-dev-guide/src/borrow_check/drop_check.md b/src/doc/rustc-dev-guide/src/borrow_check/drop_check.md new file mode 100644 index 0000000000000..5190c0bd18710 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/drop_check.md @@ -0,0 +1,156 @@ +# Drop Check + +We generally require the type of locals to be well-formed whenever the +local is used. This includes proving the where-bounds of the local and +also requires all regions used by it to be live. + +The only exception to this is when implicitly dropping values when they +go out of scope. This does not necessarily require the value to be live: + +```rust +fn main() { + let x = vec![]; + { + let y = String::from("I am temporary"); + x.push(&y); + } + // `x` goes out of scope here, after the reference to `y` + // is invalidated. This means that while dropping `x` its type + // is not well-formed as it contain regions which are not live. +} +``` + +This is only sound if dropping the value does not try to access any dead +region. We check this by requiring the type of the value to be +drop-live. +The requirements for which are computed in `fn dropck_outlives`. + +The rest of this section uses the following type definition for a type +which requires its region parameter to be live: + +```rust +struct PrintOnDrop<'a>(&'a str); +impl<'a> Drop for PrintOnDrop<'_> { + fn drop(&mut self) { + println!("{}", self.0); + } +} +``` + +## How values are dropped + +At its core, a value of type `T` is dropped by executing its "drop +glue". Drop glue is compiler generated and first calls `::drop` and then recursively calls the drop glue of any recursively +owned values. + +- If `T` has an explicit `Drop` impl, call `::drop`. +- Regardless of whether `T` implements `Drop`, recurse into all values + *owned* by `T`: + - references, raw pointers, function pointers, function items, trait + objects[^traitobj], and scalars do not own anything. + - tuples, slices, and arrays consider their elements to be owned. + For arrays of length zero we do not own any value of the element + type. + - all fields (of all variants) of ADTs are considered owned. We + consider all variants for enums. The exception here is + `ManuallyDrop` which is not considered to own `U`. + `PhantomData` also does not own anything. + closures and generators own their captured upvars. + +Whether a type has drop glue is returned by [`fn +Ty::needs_drop`](https://github.com/rust-lang/rust/blob/320b412f9c55bf480d26276ff0ab480e4ecb29c0/compiler/rustc_middle/src/ty/util.rs#L1086-L1108). + +### Partially dropping a local + +For types which do not implement `Drop` themselves, we can also +partially move parts of the value before dropping the rest. In this case +only the drop glue for the not-yet moved values is called, e.g. + +```rust +fn main() { + let mut x = (PrintOnDrop("third"), PrintOnDrop("first")); + drop(x.1); + println!("second") +} +``` + +During MIR building we assume that a local may get dropped whenever it +goes out of scope *as long as its type needs drop*. Computing the exact +drop glue for a variable happens **after** borrowck in the +`ElaborateDrops` pass. This means that even if some part of the local +have been dropped previously, dropck still requires this value to be +live. This is the case even if we completely moved a local. + +```rust +fn main() { + let mut x; + { + let temp = String::from("I am temporary"); + x = PrintOnDrop(&temp); + drop(x); + } +} //~ ERROR `temp` does not live long enough. +``` + +It should be possible to add some amount of drop elaboration before +borrowck, allowing this example to compile. There is an unstable feature +to move drop elaboration before const checking: +[#73255](https://github.com/rust-lang/rust/issues/73255). Such a feature +gate does not exist for doing some drop elaboration before borrowck, +although there's a [relevant +MCP](https://github.com/rust-lang/compiler-team/issues/558). + +[^traitobj]: you can consider trait objects to have a builtin `Drop` +implementation which directly uses the `drop_in_place` provided by the +vtable. This `Drop` implementation requires all its generic parameters +to be live. + +### `dropck_outlives` + +There are two distinct "liveness" computations that we perform: + +* a value `v` is *use-live* at location `L` if it may be "used" later; a + *use* here is basically anything that is not a *drop* +* a value `v` is *drop-live* at location `L` if it maybe dropped later + +When things are *use-live*, their entire type must be valid at `L`. When +they are *drop-live*, all regions that are required by dropck must be +valid at `L`. The values dropped in the MIR are *places*. + +The constraints computed by `dropck_outlives` for a type closely match +the generated drop glue for that type. Unlike drop glue, +`dropck_outlives` cares about the types of owned values, not the values +itself. For a value of type `T` + +- if `T` has an explicit `Drop`, require all generic arguments to be + live, unless they are marked with `#[may_dangle]` in which case they + are fully ignored +- regardless of whether `T` has an explicit `Drop`, recurse into all + types *owned* by `T` + - references, raw pointers, function pointers, function items, trait + objects[^traitobj], and scalars do not own anything. + - tuples, slices and arrays consider their element type to be owned. + **For arrays we currently do not check whether their length is + zero**. + - all fields (of all variants) of ADTs are considered owned. The + exception here is `ManuallyDrop` which is not considered to own + `U`. **We consider `PhantomData` to own `U`**. + - closures and generators own their captured upvars. + +The sections marked in bold are cases where `dropck_outlives` considers +types to be owned which are ignored by `Ty::needs_drop`. We only rely on +`dropck_outlives` if `Ty::needs_drop` for the containing local returned +`true`.This means liveness requirements can change depending on whether +a type is contained in a larger local. **This is inconsistent, and +should be fixed: an example [for +arrays](https://play.rust-lang.org/?version=stable&mode=debug&edition=2021&gist=8b5f5f005a03971b22edb1c20c5e6cbe) +and [for +`PhantomData`](https://play.rust-lang.org/?version=stable&mode=debug&edition=2021&gist=44c6e2b1fae826329fd54c347603b6c8).**[^core] + +One possible way these inconsistencies can be fixed is by MIR building +to be more pessimistic, probably by making `Ty::needs_drop` weaker, or +alternatively, changing `dropck_outlives` to be more precise, requiring +fewer regions to be live. + +[^core]: This is the core assumption of [#110288](https://github.com/rust-lang/rust/issues/110288) and [RFC 3417](https://github.com/rust-lang/rfcs/pull/3417). diff --git a/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization.md b/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization.md new file mode 100644 index 0000000000000..043db2f5354e5 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization.md @@ -0,0 +1,50 @@ +# Tracking moves and initialization + +Part of the borrow checker's job is to track which variables are +"initialized" at any given point in time -- this also requires +figuring out where moves occur and tracking those. + +## Initialization and moves + +From a user's perspective, initialization -- giving a variable some +value -- and moves -- transferring ownership to another place -- might +seem like distinct topics. Indeed, our borrow checker error messages +often talk about them differently. But **within the borrow checker**, +they are not nearly as separate. Roughly speaking, the borrow checker +tracks the set of "initialized places" at any point in the source +code. Assigning to a previously uninitialized local variable adds it +to that set; moving from a local variable removes it from that set. + +Consider this example: + +```rust,ignore +fn foo() { + let a: Vec; + + // a is not initialized yet + + a = vec![22]; + + // a is initialized here + + std::mem::drop(a); // a is moved here + + // a is no longer initialized here + + let l = a.len(); //~ ERROR +} +``` + +Here you can see that `a` starts off as uninitialized; once it is +assigned, it becomes initialized. But when `drop(a)` is called, that +moves `a` into the call, and hence it becomes uninitialized again. + +## Subsections + +To make it easier to peruse, this section is broken into a number of +subsections: + +- [Move paths](./moves_and_initialization/move_paths.html) the + *move path* concept that we use to track which local variables (or parts of + local variables, in some cases) are initialized. +- TODO *Rest not yet written* =) diff --git a/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization/move_paths.md b/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization/move_paths.md new file mode 100644 index 0000000000000..9ed4e67f6253f --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/moves_and_initialization/move_paths.md @@ -0,0 +1,137 @@ +# Move paths + +In reality, it's not enough to track initialization at the granularity +of local variables. Rust also allows us to do moves and initialization +at the field granularity: + +```rust,ignore +fn foo() { + let a: (Vec, Vec) = (vec![22], vec![44]); + + // a.0 and a.1 are both initialized + + let b = a.0; // moves a.0 + + // a.0 is not initialized, but a.1 still is + + let c = a.0; // ERROR + let d = a.1; // OK +} +``` + +To handle this, we track initialization at the granularity of a **move +path**. A [`MovePath`] represents some location that the user can +initialize, move, etc. So e.g. there is a move-path representing the +local variable `a`, and there is a move-path representing `a.0`. Move +paths roughly correspond to the concept of a [`Place`] from MIR, but +they are indexed in ways that enable us to do move analysis more +efficiently. + +[`MovePath`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePath.html +[`Place`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.Place.html + +## Move path indices + +Although there is a [`MovePath`] data structure, they are never referenced +directly. Instead, all the code passes around *indices* of type +[`MovePathIndex`]. If you need to get information about a move path, you use +this index with the [`move_paths` field of the `MoveData`][move_paths]. For +example, to convert a [`MovePathIndex`] `mpi` into a MIR [`Place`], you might +access the [`MovePath::place`] field like so: + +```rust,ignore +move_data.move_paths[mpi].place +``` + +[move_paths]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MoveData.html#structfield.move_paths +[`MovePath::place`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePath.html#structfield.place +[`MovePathIndex`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePathIndex.html + +## Building move paths + +One of the first things we do in the MIR borrow check is to construct +the set of move paths. This is done as part of the +[`MoveData::gather_moves`] function. This function uses a MIR visitor +called [`MoveDataBuilder`] to walk the MIR and look at how each [`Place`] +within is accessed. For each such [`Place`], it constructs a +corresponding [`MovePathIndex`]. It also records when/where that +particular move path is moved/initialized, but we'll get to that in a +later section. + +[`MoveDataBuilder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/builder/struct.MoveDataBuilder.html +[`MoveData::gather_moves`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MoveData.html#method.gather_moves + +### Illegal move paths + +We don't actually create a move-path for **every** [`Place`] that gets +used. In particular, if it is illegal to move from a [`Place`], then +there is no need for a [`MovePathIndex`]. Some examples: + +- You cannot move an individual element of an array, so if we have e.g. `foo: [String; 3]`, + there would be no move-path for `foo[1]`. +- You cannot move from inside of a borrowed reference, so if we have e.g. `foo: &String`, + there would be no move-path for `*foo`. + +These rules are enforced by the [`move_path_for`] function, which +converts a [`Place`] into a [`MovePathIndex`] -- in error cases like +those just discussed, the function returns an `Err`. This in turn +means we don't have to bother tracking whether those places are +initialized (which lowers overhead). + +[`move_path_for`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/builder/struct.MoveDataBuilder.html#method.move_path_for + +## Projections + +Instead of using [`PlaceElem`], projections in move paths are stored as [`MoveSubPath`]s. +Projections that can't be moved out of and projections that can be skipped are not represented. + +Subslice projections of arrays (produced by slice patterns) are special; they're turned into +multiple [`ConstantIndex`] subpaths, one for each element in the subslice. + +[`PlaceElem`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/type.PlaceElem.html +[`MoveSubPath`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/enum.MoveSubPath.html +[`ConstantIndex`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/enum.MoveSubPath.html#variant.ConstantIndex + +## Looking up a move-path + +If you have a [`Place`] and you would like to convert it to a [`MovePathIndex`], you +can do that using the [`MovePathLookup`] structure found in the [`rev_lookup`] field +of [`MoveData`]. There are two different methods: + +[`MoveData`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MoveData.html +[`MovePathLookup`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePathLookup.html +[`rev_lookup`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MoveData.html#structfield.rev_lookup + +- [`find_local`], which takes a [`mir::Local`] representing a local + variable. This is the easier method, because we **always** create a + [`MovePathIndex`] for every local variable. +- [`find`], which takes an arbitrary [`Place`]. This method is a bit + more annoying to use, precisely because we don't have a + [`MovePathIndex`] for **every** [`Place`] (as we just discussed in + the "illegal move paths" section). Therefore, [`find`] returns a + [`LookupResult`] indicating the closest path it was able to find + that exists (e.g., for `foo[1]`, it might return just the path for + `foo`). + +[`find`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePathLookup.html#method.find +[`find_local`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MovePathLookup.html#method.find_local +[`mir::Local`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.Local.html +[`LookupResult`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/enum.LookupResult.html + +## Cross-references + +As we noted above, move-paths are stored in a big vector and +referenced via their [`MovePathIndex`]. However, within this vector, +they are also structured into a tree. So for example if you have the +[`MovePathIndex`] for `a.b.c`, you can go to its parent move-path +`a.b`. You can also iterate over all children paths: so, from `a.b`, +you might iterate to find the path `a.b.c` (here you are iterating +just over the paths that are **actually referenced** in the source, +not all **possible** paths that could have been referenced). These +references are used for example in the +[`find_in_move_path_or_its_descendants`] function, which determines +whether a move-path (e.g., `a.b`) or any child of that move-path +(e.g.,`a.b.c`) matches a given predicate. + +[`Place`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.Place.html +[`find_in_move_path_or_its_descendants`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/move_paths/struct.MoveData.html#method.find_in_move_path_or_its_descendants diff --git a/src/doc/rustc-dev-guide/src/borrow_check/opaque-types-region-inference-restrictions.md b/src/doc/rustc-dev-guide/src/borrow_check/opaque-types-region-inference-restrictions.md new file mode 100644 index 0000000000000..9877dfc61e9ce --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/opaque-types-region-inference-restrictions.md @@ -0,0 +1,264 @@ +# Opaque types region inference restrictions + +In this chapter we discuss the various restrictions we impose on the generic arguments of +opaque types when defining their hidden types +`Opaque<'a, 'b, .., A, B, ..> := SomeHiddenType`. + +These restrictions are implemented in borrow checking ([Source][source-borrowck-opaque]) +as it is the final step opaque types inference. + +[source-borrowck-opaque]: https://github.com/rust-lang/rust/blob/435b5255148617128f0a9b17bacd3cc10e032b23/compiler/rustc_borrowck/src/region_infer/opaque_types.rs + +## Background: type and const generic arguments +For type arguments, two restrictions are necessary: each type argument must be +(1) a type parameter and +(2) is unique among the generic arguments. +The same is applied to const arguments. + +Example of case (1): +```rust +type Opaque = impl Sized; + +// `T` is a type parameter. +// Opaque := (); +fn good() -> Opaque {} + +// `()` is not a type parameter. +// Opaque<()> := (); +fn bad() -> Opaque<()> {} //~ ERROR +``` + +Example of case (2): +```rust +type Opaque = impl Sized; + +// `T` and `U` are unique in the generic args. +// Opaque := T; +fn good(t: T, _u: U) -> Opaque { t } + +// `T` appears twice in the generic args. +// Opaque := T; +fn bad(t: T) -> Opaque { t } //~ ERROR +``` +**Motivation:** In the first case `Opaque<()> := ()`, the hidden type is ambiguous because +it is compatible with two different interpretaions: `Opaque := X` and `Opaque := ()`. +Similarly for the second case `Opaque := T`, it is ambiguous whether it should be +interpreted as `Opaque := X` or as `Opaque := Y`. +Because of this ambiguity, both cases are rejected as invalid defining uses. + +## Uniqueness restriction + +Each lifetime argument must be unique in the arguments list and must not be `'static`. +This is in order to avoid an ambiguity with hidden type inference similar to the case of +type parameters. +For example, the invalid defining use below `Opaque<'static> := Inv<'static>` is compatible with +both `Opaque<'x> := Inv<'static>` and `Opaque<'x> := Inv<'x>`. + +```rust +type Opaque<'x> = impl Sized + 'x; +type Inv<'a> = Option<*mut &'a ()>; + +fn good<'a>() -> Opaque<'a> { Inv::<'static>::None } + +fn bad() -> Opaque<'static> { Inv::<'static>::None } +//~^ ERROR +``` + +```rust +type Opaque<'x, 'y> = impl Trait<'x, 'y>; + +fn good<'a, 'b>() -> Opaque<'a, 'b> {} + +fn bad<'a>() -> Opaque<'a, 'a> {} +//~^ ERROR +``` + +**Semantic lifetime equality:** +One complexity with lifetimes compared to type parameters is that +two lifetimes that are syntactically different may be semantically equal. +Therefore, we need to be cautious when verifying that the lifetimes are unique. + +```rust +// This is also invalid because `'a` is *semantically* equal to `'static`. +fn still_bad_1<'a: 'static>() -> Opaque<'a> {} +//~^ Should error! + +// This is also invalid because `'a` and `'b` are *semantically* equal. +fn still_bad_2<'a: 'b, 'b: 'a>() -> Opaque<'a, 'b> {} +//~^ Should error! +``` + +## An exception to uniqueness rule + +An exception to the uniqueness rule above is when the bounds at the opaque type's definition require +a lifetime parameter to be equal to another one or to the `'static` lifetime. +```rust +// The definition requires `'x` to be equal to `'static`. +type Opaque<'x: 'static> = impl Sized + 'x; + +fn good() -> Opaque<'static> {} +``` + +**Motivation:** an attempt to implement the uniqueness restriction for RPITs resulted in a +[breakage found by crater]( https://github.com/rust-lang/rust/pull/112842#issuecomment-1610057887). +This can be mitigated by this exception to the rule. +An example of the code that would otherwise break: +```rust +struct Type<'a>(&'a ()); +impl<'a> Type<'a> { + // `'b == 'a` + fn do_stuff<'b: 'a>(&'b self) -> impl Trait<'a, 'b> {} +} +``` + +**Why this is correct:** for such a defining use like `Opaque<'a, 'a> := &'a str`, +it can be interpreted in either way—either as `Opaque<'x, 'y> := &'x str` or as +`Opaque<'x, 'y> := &'y str` and it wouldn't matter because every use of `Opaque` +will guarantee that both parameters are equal as per the well-formedness rules. + +## Universal lifetimes restriction + +Only universally quantified lifetimes are allowed in the opaque type arguments. +This includes lifetime parameters and placeholders. + +```rust +type Opaque<'x> = impl Sized + 'x; + +fn test<'a>() -> Opaque<'a> { + // `Opaque<'empty> := ()` + let _: Opaque<'_> = (); + //~^ ERROR +} +``` + +**Motivation:** +This makes the lifetime and type arguments behave consistently but this is only as a bonus. +The real reason behind this restriction is purely technical, as the [member constraints] algorithm +faces a fundamental limitation: +When encountering an opaque type definition `Opaque<'?1> := &'?2 u8`, +a member constraint `'?2 member-of ['static, '?1]` is registered. +In order for the algorithm to pick the right choice, the *complete* set of "outlives" relationships +between the choice regions `['static, '?1]` must already be known *before* doing the region +inference. This can be satisfied only if each choice region is either: +1. a universal region, i.e. `RegionKind::Re{EarlyParam,LateParam,Placeholder,Static}`, +because the relations between universal regions are completely known, prior to region inference, +from the explicit and implied bounds. +1. or an existential region that is "strictly equal" to a universal region. +Strict lifetime equality is defined below and is required here because it is the only type of +equality that can be evaluated prior to full region inference. + +**Strict lifetime equality:** +We say that two lifetimes are strictly equal if there are bidirectional outlives constraints +between them. In NLL terms, this means the lifetimes are part of the same [SCC]. +Importantly this type of equality can be evaluated prior to full region inference +(but of course after constraint collection). +The other type of equality is when region inference ends up giving two lifetimes variables +the same value even if they are not strictly equal. +See [#113971] for how we used to conflate the difference. + +[#113971]: https://github.com/rust-lang/rust/issues/113971 +[SCC]: https://en.wikipedia.org/wiki/Strongly_connected_component +[member constraints]: ./region_inference/member_constraints.md + +**interaction with "once modulo regions" restriction** +In the example above, note the opaque type in the signature is `Opaque<'a>` and the one in the +invalid defining use is `Opaque<'empty>`. +In the proposed MiniTAIT plan, namely the ["once modulo regions"][#116935] rule, +we already disallow this. +Although it might appear that "universal lifetimes" restriction becomes redundant as it logically +follows from "MiniTAIT" restrictions, the subsequent related discussion on lifetime equality and +closures remains relevant. + +[#116935]: https://github.com/rust-lang/rust/pull/116935 + + +## Closure restrictions + +When the opaque type is defined in a closure/coroutine/inline-const body, universal lifetimes that +are "external" to the closure are not allowed in the opaque type arguments. +External regions are defined in [`RegionClassification::External`][source-external-region] + +[source-external-region]: https://github.com/rust-lang/rust/blob/caf730043232affb6b10d1393895998cb4968520/compiler/rustc_borrowck/src/universal_regions.rs#L201. + +Example: (This one happens to compile in the current nightly but more practical examples are +already rejected with confusing errors.) +```rust +type Opaque<'x> = impl Sized + 'x; + +fn test<'a>() -> Opaque<'a> { + let _ = || { + // `'a` is external to the closure + let _: Opaque<'a> = (); + //~^ Should be an error! + }; + () +} +``` + +**Motivation:** +In closure bodies, external lifetimes, although being categorized as "universal" lifetimes, +behave more like existential lifetimes in that the relations between them are not known ahead of +time, instead their values are inferred just like existential lifetimes and the requirements are +propagated back to the parent fn. This breaks the member constraints algorithm as described above: +> In order for the algorithm to pick the right choice, the complete set of “outlives” relationships +between the choice regions `['static, '?1]` must already be known before doing the region inference + +Here is an example that details how : + +```rust +type Opaque<'x, 'y> = impl Sized; + +// +fn test<'a, 'b>(s: &'a str) -> impl FnOnce() -> Opaque<'a, 'b> { + move || { s } + //~^ ERROR hidden type for `Opaque<'_, '_>` captures lifetime that does not appear in bounds +} + +// The above closure body is desugared into something like: +fn test::{closure#0}(_upvar: &'?8 str) -> Opaque<'?6, '?7> { + return _upvar +} + +// where `['?8, '?6, ?7]` are universal lifetimes *external* to the closure. +// There are no known relations between them *inside* the closure. +// But in the parent fn it is known that `'?6: '?8`. +// +// When encountering an opaque definition `Opaque<'?6, '?7> := &'8 str`, +// The member constraints algorithm does not know enough to safely make `?8 = '?6`. +// For this reason, it errors with a sensible message: +// "hidden type captures lifetime that does not appear in bounds". +``` + +Without these restrictions, error messages are confusing and, more importantly, there is a risk that +we accept code that would likely break in the future because member constraints are super broken +in closures. + +**Output types:** +I believe the most common scenario where this causes issues in real-world code is with +closure/async-block output types. It is worth noting that there is a discrepancy between closures +and async blocks that further demonstrates this issue and is attributed to the +[hack of `replace_opaque_types_with_inference_vars`][source-replace-opaques], +which is applied to futures only. + +[source-replace-opaques]: https://github.com/rust-lang/rust/blob/9cf18e98f82d85fa41141391d54485b8747da46f/compiler/rustc_hir_typeck/src/closure.rs#L743 + +```rust +type Opaque<'x> = impl Sized + 'x; +fn test<'a>() -> impl FnOnce() -> Opaque<'a> { + // Output type of the closure is Opaque<'a> + // -> hidden type definition happens *inside* the closure + // -> rejected. + move || {} + //~^ ERROR expected generic lifetime parameter, found `'_` +} +``` +```rust +use std::future::Future; +type Opaque<'x> = impl Sized + 'x; +fn test<'a>() -> impl Future> { + // Output type of the async block is unit `()` + // -> hidden type definition happens in the parent fn + // -> accepted. + async move {} +} +``` diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference.md new file mode 100644 index 0000000000000..ba67bec45b65e --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference.md @@ -0,0 +1,234 @@ +# Region inference (NLL) + +The MIR-based region checking code is located in [the `rustc_mir::borrow_check` +module][nll]. + +[nll]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/index.html + +The MIR-based region analysis consists of two major functions: + +- [`replace_regions_in_mir`], invoked first, has two jobs: + - First, it finds the set of regions that appear within the + signature of the function (e.g., `'a` in `fn foo<'a>(&'a u32) { + ... }`). These are called the "universal" or "free" regions – in + particular, they are the regions that [appear free][fvb] in the + function body. + - Second, it replaces all the regions from the function body with + fresh inference variables. This is because (presently) those + regions are the results of lexical region inference and hence are + not of much interest. The intention is that – eventually – they + will be "erased regions" (i.e., no information at all), since we + won't be doing lexical region inference at all. +- [`compute_regions`], invoked second: this is given as argument the + results of move analysis. It has the job of computing values for all + the inference variables that `replace_regions_in_mir` introduced. + - To do that, it first runs the [MIR type checker]. This is + basically a normal type-checker but specialized to MIR, which is + much simpler than full Rust, of course. Running the MIR type + checker will however create various [constraints][cp] between region + variables, indicating their potential values and relationships to + one another. + - After this, we perform [constraint propagation][cp] by creating a + [`RegionInferenceContext`] and invoking its [`solve`] + method. + - The [NLL RFC] also includes fairly thorough (and hopefully readable) + coverage. + +[cp]: ./region_inference/constraint_propagation.md +[fvb]: ../appendix/background.md#free-vs-bound +[`replace_regions_in_mir`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/nll/fn.replace_regions_in_mir.html +[`compute_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/nll/fn.compute_regions.html +[`RegionInferenceContext`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html +[`solve`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.solve +[NLL RFC]: https://rust-lang.github.io/rfcs/2094-nll.html +[MIR type checker]: ./type_check.md + +## Universal regions + +The [`UniversalRegions`] type represents a collection of _universal_ regions +corresponding to some MIR `DefId`. It is constructed in +[`replace_regions_in_mir`] when we replace all regions with fresh inference +variables. [`UniversalRegions`] contains indices for all the free regions in +the given MIR along with any relationships that are _known_ to hold between +them (e.g. implied bounds, where clauses, etc.). + +For example, given the MIR for the following function: + +```rust +fn foo<'a>(x: &'a u32) { + // ... +} +``` + +we would create a universal region for `'a` and one for `'static`. There may +also be some complications for handling closures, but we will ignore those for +the moment. + +TODO: write about _how_ these regions are computed. + +[`UniversalRegions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/universal_regions/struct.UniversalRegions.html + + + +## Region variables + +The value of a region can be thought of as a **set**. This set contains all +points in the MIR where the region is valid along with any regions that are +outlived by this region (e.g. if `'a: 'b`, then `end('b)` is in the set for +`'a`); we call the domain of this set a `RegionElement`. In the code, the value +for all regions is maintained in [the `rustc_borrowck::region_infer` module][ri]. +For each region we maintain a set storing what elements are present in its value (to make this +efficient, we give each kind of element an index, the `RegionElementIndex`, and +use sparse bitsets). + +[ri]: https://github.com/rust-lang/rust/tree/HEAD/compiler/rustc_borrowck/src/region_infer + +The kinds of region elements are as follows: + +- Each **[`location`]** in the MIR control-flow graph: a location is just + the pair of a basic block and an index. This identifies the point + **on entry** to the statement with that index (or the terminator, if + the index is equal to `statements.len()`). +- There is an element `end('a)` for each universal region `'a`, + corresponding to some portion of the caller's (or caller's caller, + etc) control-flow graph. +- Similarly, there is an element denoted `end('static)` corresponding + to the remainder of program execution after this function returns. +- There is an element `!1` for each placeholder region `!1`. This + corresponds (intuitively) to some unknown set of other elements – + for details on placeholders, see the section + [placeholders and universes](region_inference/placeholders_and_universes.md). + +## Constraints + +Before we can infer the value of regions, we need to collect +constraints on the regions. The full set of constraints is described +in [the section on constraint propagation][cp], but the two most +common sorts of constraints are: + +1. Outlives constraints. These are constraints that one region outlives another + (e.g. `'a: 'b`). Outlives constraints are generated by the [MIR type + checker]. +2. Liveness constraints. Each region needs to be live at points where it can be + used. + +## Inference Overview + +So how do we compute the contents of a region? This process is called _region +inference_. The high-level idea is pretty simple, but there are some details we +need to take care of. + +Here is the high-level idea: we start off each region with the MIR locations we +know must be in it from the liveness constraints. From there, we use all of the +outlives constraints computed from the type checker to _propagate_ the +constraints: for each region `'a`, if `'a: 'b`, then we add all elements of +`'b` to `'a`, including `end('b)`. This all happens in +[`propagate_constraints`]. + +Then, we will check for errors. We first check that type tests are satisfied by +calling [`check_type_tests`]. This checks constraints like `T: 'a`. Second, we +check that universal regions are not "too big". This is done by calling +[`check_universal_regions`]. This checks that for each region `'a` if `'a` +contains the element `end('b)`, then we must already know that `'a: 'b` holds +(e.g. from a where clause). If we don't already know this, that is an error... +well, almost. There is some special handling for closures that we will discuss +later. + +### Example + +Consider the following example: + +```rust,ignore +fn foo<'a, 'b>(x: &'a usize) -> &'b usize { + x +} +``` + +Clearly, this should not compile because we don't know if `'a` outlives `'b` +(if it doesn't then the return value could be a dangling reference). + +Let's back up a bit. We need to introduce some free inference variables (as is +done in [`replace_regions_in_mir`]). This example doesn't use the exact regions +produced, but it (hopefully) is enough to get the idea across. + +```rust,ignore +fn foo<'a, 'b>(x: &'a /* '#1 */ usize) -> &'b /* '#3 */ usize { + x // '#2, location L1 +} +``` + +Some notation: `'#1`, `'#3`, and `'#2` represent the universal regions for the +argument, return value, and the expression `x`, respectively. Additionally, I +will call the location of the expression `x` `L1`. + +So now we can use the liveness constraints to get the following starting points: + +Region | Contents +--------|---------- +'#1 | +'#2 | `L1` +'#3 | `L1` + +Now we use the outlives constraints to expand each region. Specifically, we +know that `'#2: '#3` ... + +Region | Contents +--------|---------- +'#1 | `L1` +'#2 | `L1, end('#3) // add contents of '#3 and end('#3)` +'#3 | `L1` + +... and `'#1: '#2`, so ... + +Region | Contents +--------|---------- +'#1 | `L1, end('#2), end('#3) // add contents of '#2 and end('#2)` +'#2 | `L1, end('#3)` +'#3 | `L1` + +Now, we need to check that no regions were too big (we don't have any type +tests to check in this case). Notice that `'#1` now contains `end('#3)`, but +we have no `where` clause or implied bound to say that `'a: 'b`... that's an +error! + +### Some details + +The [`RegionInferenceContext`] type contains all of the information needed to +do inference, including the universal regions from [`replace_regions_in_mir`] and +the constraints computed for each region. It is constructed just after we +compute the liveness constraints. + +Here are some of the fields of the struct: + +- [`constraints`]: contains all the outlives constraints. +- [`liveness_constraints`]: contains all the liveness constraints. +- [`universal_regions`]: contains the `UniversalRegions` returned by + [`replace_regions_in_mir`]. +- [`universal_region_relations`]: contains relations known to be true about + universal regions. For example, if we have a where clause that `'a: 'b`, that + relation is assumed to be true while borrow checking the implementation (it + is checked at the caller), so `universal_region_relations` would contain `'a: + 'b`. +- [`type_tests`]: contains some constraints on types that we must check after + inference (e.g. `T: 'a`). +- [`closure_bounds_mapping`]: used for propagating region constraints from + closures back out to the creator of the closure. + +[`constraints`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.constraints +[`liveness_constraints`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.liveness_constraints +[`location`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.Location.html +[`universal_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.universal_regions +[`universal_region_relations`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.universal_region_relations +[`type_tests`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.type_tests +[`closure_bounds_mapping`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.closure_bounds_mapping + +TODO: should we discuss any of the others fields? What about the SCCs? + +Ok, now that we have constructed a `RegionInferenceContext`, we can do +inference. This is done by calling the [`solve`] method on the context. This +is where we call [`propagate_constraints`] and then check the resulting type +tests and universal regions, as discussed above. + +[`propagate_constraints`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.propagate_constraints +[`check_type_tests`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.check_type_tests +[`check_universal_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.check_universal_regions diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/closure_constraints.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/closure_constraints.md new file mode 100644 index 0000000000000..b95c9f72306be --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/closure_constraints.md @@ -0,0 +1,43 @@ +# Propagating closure constraints + +When we are checking the type tests and universal regions, we may come +across a constraint that we can't prove yet if we are in a closure +body! However, the necessary constraints may actually hold (we just +don't know it yet). Thus, if we are inside a closure, we just collect +all the constraints we can't prove yet and return them. Later, when we +are borrow check the MIR node that created the closure, we can also +check that these constraints hold. At that time, if we can't prove +they hold, we report an error. + +## How this is implemented + +While borrow-checking a closure inside of `RegionInferenceContext::solve` we separately try to propagate type-outlives and region-outlives constraints to the parent if we're unable to prove them locally. + +### Region-outlive constraints + +If `RegionInferenceContext::check_universal_regions` fails to prove some outlives constraint `'longer_fr: 'shorter_fr`, we try to propagate it in `fn try_propagate_universal_region_error`. Both these universal regions are either local to the closure or an external region. + +In case `'longer_fr` is a local universal region, we search for the largest external region `'fr_minus` which is outlived by `'longer_fr`, i.e. `'longer_fr: 'fr_minus`. In case there are multiple such regions, we pick the `mutual_immediate_postdominator`: the fixpoint of repeatedly computing the GLB of all GLBs, see [TransitiveRelation::postdom_upper_bound](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_data_structures/transitive_relation/struct.TransitiveRelation.html#method.postdom_upper_bound) for more details. + +If `'fr_minus` exists we require it to outlive all non-local upper bounds of `'shorter_fr`. There will always be at least one non-local upper bound `'static`. + +### Type-outlive constraints + +Type-outlives constraints are proven in `check_type_tests`. This happens after computing the outlives graph, which is now immutable. + +For all type tests we fail to prove via `fn eval_verify_bound` inside of the closure we call `try_promote_type_test`. A `TypeTest` represents a type-outlives bound `generic_kind: lower_bound` together with a `verify_bound`. If the `VerifyBound` holds for the `lower_bound`, the constraint is satisfied. `try_promote_type_test` does not care about the ` verify_bound`. + +It starts by calling `fn try_promote_type_test_subject`. This function takes the `GenericKind` and tries to transform it to a `ClosureOutlivesSubject` which is no longer references anything local to the closure. This is done by replacing all free regions in that type with either `'static` or region parameters which are equal to that free region. This operation fails if the `generic_kind` contains a region which cannot be replaced. + +We then promote the `lower_bound` into the context of the caller. If the lower bound is equal to a placeholder, we replace it with `'static` + +We then look at all universal regions `uv` which are required to be outlived by `lower_bound`, i.e. for which borrow checking added region constraints. For each of these we then emit a `ClosureOutlivesRequirement` for all non-local universal regions which are known to outlive `uv`. + +As we've already built the region graph of the closure at this point and separately check that it is consistent, we are also able to assume the outlive constraints `uv: lower_bound` here. + +So if we have a type-outlives bounds we can't prove, e.g. `T: 'local_infer`, we use the region graph to go to universal variables `'a` with `'a: local_infer`. In case `'a` are local, we then use the assumed outlived constraints to go to non-local ones. + +We then store the list of promoted type tests in the `BorrowCheckResults`. +We then apply them in while borrow-checking its parent in `TypeChecker::prove_closure_bounds`. + +TODO: explain how exactly that works :3 diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/constraint_propagation.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/constraint_propagation.md new file mode 100644 index 0000000000000..c3f8c03cb29f5 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/constraint_propagation.md @@ -0,0 +1,222 @@ +# Constraint propagation + +The main work of the region inference is **constraint propagation**, +which is done in the [`propagate_constraints`] function. There are +three sorts of constraints that are used in NLL, and we'll explain how +`propagate_constraints` works by "layering" those sorts of constraints +on one at a time (each of them is fairly independent from the others): + +- liveness constraints (`R live at E`), which arise from liveness; +- outlives constraints (`R1: R2`), which arise from subtyping; +- [member constraints][m_c] (`member R_m of [R_c...]`), which arise from impl Trait. + +[`propagate_constraints`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.propagate_constraints +[m_c]: ./member_constraints.md + +In this chapter, we'll explain the "heart" of constraint propagation, +covering both liveness and outlives constraints. + +## Notation and high-level concepts + +Conceptually, region inference is a "fixed-point" computation. It is +given some set of constraints `{C}` and it computes a set of values +`Values: R -> {E}` that maps each region `R` to a set of elements +`{E}` (see [here][riv] for more notes on region elements): + +- Initially, each region is mapped to an empty set, so `Values(R) = + {}` for all regions `R`. +- Next, we process the constraints repeatedly until a fixed-point is reached: + - For each constraint C: + - Update `Values` as needed to satisfy the constraint + +[riv]: ../region_inference.md#region-variables + +As a simple example, if we have a liveness constraint `R live at E`, +then we can apply `Values(R) = Values(R) union {E}` to make the +constraint be satisfied. Similarly, if we have an outlives constraints +`R1: R2`, we can apply `Values(R1) = Values(R1) union Values(R2)`. +(Member constraints are more complex and we discuss them [in this section][m_c].) + +In practice, however, we are a bit more clever. Instead of applying +the constraints in a loop, we can analyze the constraints and figure +out the correct order to apply them, so that we only have to apply +each constraint once in order to find the final result. + +Similarly, in the implementation, the `Values` set is stored in the +`scc_values` field, but they are indexed not by a *region* but by a +*strongly connected component* (SCC). SCCs are an optimization that +avoids a lot of redundant storage and computation. They are explained +in the section on outlives constraints. + +## Liveness constraints + +A **liveness constraint** arises when some variable whose type +includes a region R is live at some [point] P. This simply means that +the value of R must include the point P. Liveness constraints are +computed by the MIR type checker. + +[point]: ../../appendix/glossary.md#point + +A liveness constraint `R live at E` is satisfied if `E` is a member of +`Values(R)`. So to "apply" such a constraint to `Values`, we just have +to compute `Values(R) = Values(R) union {E}`. + +The liveness values are computed in the type-check and passed to the +region inference upon creation in the `liveness_constraints` argument. +These are not represented as individual constraints like `R live at E` +though; instead, we store a (sparse) bitset per region variable (of +type [`LivenessValues`]). This way we only need a single bit for each +liveness constraint. + +[`liveness_constraints`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.liveness_constraints +[`LivenessValues`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/values/struct.LivenessValues.html + +One thing that is worth mentioning: All lifetime parameters are always +considered to be live over the entire function body. This is because +they correspond to some portion of the *caller's* execution, and that +execution clearly includes the time spent in this function, since the +caller is waiting for us to return. + +## Outlives constraints + +An outlives constraint `'a: 'b` indicates that the value of `'a` must +be a **superset** of the value of `'b`. That is, an outlives +constraint `R1: R2` is satisfied if `Values(R1)` is a superset of +`Values(R2)`. So to "apply" such a constraint to `Values`, we just +have to compute `Values(R1) = Values(R1) union Values(R2)`. + +One observation that follows from this is that if you have `R1: R2` +and `R2: R1`, then `R1 = R2` must be true. Similarly, if you have: + +```txt +R1: R2 +R2: R3 +R3: R4 +R4: R1 +``` + +then `R1 = R2 = R3 = R4` follows. We take advantage of this to make things +much faster, as described shortly. + +In the code, the set of outlives constraints is given to the region +inference context on creation in a parameter of type +[`OutlivesConstraintSet`]. The constraint set is basically just a list of `'a: +'b` constraints. + +### The outlives constraint graph and SCCs + +In order to work more efficiently with outlives constraints, they are +[converted into the form of a graph][graph-fn], where the nodes of the +graph are region variables (`'a`, `'b`) and each constraint `'a: 'b` +induces an edge `'a -> 'b`. This conversion happens in the +[`RegionInferenceContext::new`] function that creates the inference +context. + +[`OutlivesConstraintSet`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/constraints/struct.OutlivesConstraintSet.html +[graph-fn]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/constraints/struct.OutlivesConstraintSet.html#method.graph +[`RegionInferenceContext::new`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.new + +When using a graph representation, we can detect regions that must be equal +by looking for cycles. That is, if you have a constraint like + +```txt +'a: 'b +'b: 'c +'c: 'd +'d: 'a +``` + +then this will correspond to a cycle in the graph containing the +elements `'a...'d`. + +Therefore, one of the first things that we do in propagating region +values is to compute the **strongly connected components** (SCCs) in +the constraint graph. The result is stored in the [`constraint_sccs`] +field. You can then easily find the SCC that a region `r` is a part of +by invoking `constraint_sccs.scc(r)`. + +Working in terms of SCCs allows us to be more efficient: if we have a +set of regions `'a...'d` that are part of a single SCC, we don't have +to compute/store their values separately. We can just store one value +**for the SCC**, since they must all be equal. + +If you look over the region inference code, you will see that a number +of fields are defined in terms of SCCs. For example, the +[`scc_values`] field stores the values of each SCC. To get the value +of a specific region `'a` then, we first figure out the SCC that the +region is a part of, and then find the value of that SCC. + +[`constraint_sccs`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.constraint_sccs +[`scc_values`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#structfield.scc_values + +When we compute SCCs, we not only figure out which regions are a +member of each SCC, we also figure out the edges between them. So for example +consider this set of outlives constraints: + +```txt +'a: 'b +'b: 'a + +'a: 'c + +'c: 'd +'d: 'c +``` + +Here we have two SCCs: S0 contains `'a` and `'b`, and S1 contains `'c` +and `'d`. But these SCCs are not independent: because `'a: 'c`, that +means that `S0: S1` as well. That is -- the value of `S0` must be a +superset of the value of `S1`. One crucial thing is that this graph of +SCCs is always a DAG -- that is, it never has cycles. This is because +all the cycles have been removed to form the SCCs themselves. + +### Applying liveness constraints to SCCs + +The liveness constraints that come in from the type-checker are +expressed in terms of regions -- that is, we have a map like +`Liveness: R -> {E}`. But we want our final result to be expressed +in terms of SCCs -- we can integrate these liveness constraints very +easily just by taking the union: + +```txt +for each region R: + let S be the SCC that contains R + Values(S) = Values(S) union Liveness(R) +``` + +In the region inferencer, this step is done in [`RegionInferenceContext::new`]. + +### Applying outlives constraints + +Once we have computed the DAG of SCCs, we use that to structure out +entire computation. If we have an edge `S1 -> S2` between two SCCs, +that means that `Values(S1) >= Values(S2)` must hold. So, to compute +the value of `S1`, we first compute the values of each successor `S2`. +Then we simply union all of those values together. To use a +quasi-iterator-like notation: + +```txt +Values(S1) = + s1.successors() + .map(|s2| Values(s2)) + .union() +``` + +In the code, this work starts in the [`propagate_constraints`] +function, which iterates over all the SCCs. For each SCC `S1`, we +compute its value by first computing the value of its +successors. Since SCCs form a DAG, we don't have to be concerned about +cycles, though we do need to keep a set around to track whether we +have already processed a given SCC or not. For each successor `S2`, once +we have computed `S2`'s value, we can union those elements into the +value for `S1`. (Although we have to be careful in this process to +properly handle [higher-ranked +placeholders](./placeholders_and_universes.html). Note that the value +for `S1` already contains the liveness constraints, since they were +added in [`RegionInferenceContext::new`]. + +Once that process is done, we now have the "minimal value" for `S1`, +taking into account all of the liveness and outlives +constraints. However, in order to complete the process, we must also +consider [member constraints][m_c], which are described in [a later +section][m_c]. diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/error_reporting.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/error_reporting.md new file mode 100644 index 0000000000000..79b3e077c7bca --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/error_reporting.md @@ -0,0 +1,3 @@ +# Reporting region errors + +TODO: we should discuss how to generate errors from the results of these analyses. diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/lifetime_parameters.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/lifetime_parameters.md new file mode 100644 index 0000000000000..2d337dbc020f6 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/lifetime_parameters.md @@ -0,0 +1,125 @@ +# Universal regions + +"Universal regions" is the name that the code uses to refer to "named +lifetimes" -- e.g., lifetime parameters and `'static`. The name +derives from the fact that such lifetimes are "universally quantified" +(i.e., we must make sure the code is true for all values of those +lifetimes). It is worth spending a bit of discussing how lifetime +parameters are handled during region inference. Consider this example: + +```rust,ignore +fn foo<'a, 'b>(x: &'a u32, y: &'b u32) -> &'b u32 { + x +} +``` + +This example is intended not to compile, because we are returning `x`, +which has type `&'a u32`, but our signature promises that we will +return a `&'b u32` value. But how are lifetimes like `'a` and `'b` +integrated into region inference, and how this error wind up being +detected? + +## Universal regions and their relationships to one another + +Early on in region inference, one of the first things we do is to +construct a [`UniversalRegions`] struct. This struct tracks the +various universal regions in scope on a particular function. We also +create a [`UniversalRegionRelations`] struct, which tracks their +relationships to one another. So if you have e.g. `where 'a: 'b`, then +the [`UniversalRegionRelations`] struct would track that `'a: 'b` is +known to hold (which could be tested with the [`outlives`] function). + +[`UniversalRegions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/universal_regions/struct.UniversalRegions.html +[`UniversalRegionRelations`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/type_check/free_region_relations/struct.UniversalRegionRelations.html +[`outlives`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/type_check/free_region_relations/struct.UniversalRegionRelations.html#method.outlives + +## Everything is a region variable + +One important aspect of how NLL region inference works is that **all +lifetimes** are represented as numbered variables. This means that the +only variant of [`region_kind::RegionKind`] that we use is the [`ReVar`] +variant. These region variables are broken into two major categories, +based on their index: + +[`region_kind::RegionKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_type_ir/region_kind/enum.RegionKind.html +[`ReVar`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_type_ir/region_kind/enum.RegionKind.html#variant.ReVar + +- 0..N: universal regions -- the ones we are discussing here. In this + case, the code must be correct with respect to any value of those + variables that meets the declared relationships. +- N..M: existential regions -- inference variables where the region + inferencer is tasked with finding *some* suitable value. + +In fact, the universal regions can be further subdivided based on +where they were brought into scope (see the [`RegionClassification`] +type). These subdivisions are not important for the topics discussed +here, but become important when we consider [closure constraint +propagation](./closure_constraints.html), so we discuss them there. + +[`RegionClassification`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/universal_regions/enum.RegionClassification.html#variant.Local + +## Universal lifetimes as the elements of a region's value + +As noted previously, the value that we infer for each region is a set +`{E}`. The elements of this set can be points in the control-flow +graph, but they can also be an element `end('a)` corresponding to each +universal lifetime `'a`. If the value for some region `R0` includes +`end('a`), then this implies that `R0` must extend until the end of `'a` +in the caller. + +## The "value" of a universal region + +During region inference, we compute a value for each universal region +in the same way as we compute values for other regions. This value +represents, effectively, the **lower bound** on that universal region +-- the things that it must outlive. We now describe how we use this +value to check for errors. + +## Liveness and universal regions + +All universal regions have an initial liveness constraint that +includes the entire function body. This is because lifetime parameters +are defined in the caller and must include the entirety of the +function call that invokes this particular function. In addition, each +universal region `'a` includes itself (that is, `end('a)`) in its +liveness constraint (i.e., `'a` must extend until the end of +itself). In the code, these liveness constraints are setup in +[`init_free_and_bound_regions`]. + +[`init_free_and_bound_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.init_free_and_bound_regions + +## Propagating outlives constraints for universal regions + +So, consider the first example of this section: + +```rust,ignore +fn foo<'a, 'b>(x: &'a u32, y: &'b u32) -> &'b u32 { + x +} +``` + +Here, returning `x` requires that `&'a u32 <: &'b u32`, which gives +rise to an outlives constraint `'a: 'b`. Combined with our default liveness +constraints we get: + +```txt +'a live at {B, end('a)} // B represents the "function body" +'b live at {B, end('b)} +'a: 'b +``` + +When we process the `'a: 'b` constraint, therefore, we will add +`end('b)` into the value for `'a`, resulting in a final value of `{B, +end('a), end('b)}`. + +## Detecting errors + +Once we have finished constraint propagation, we then enforce a +constraint that if some universal region `'a` includes an element +`end('b)`, then `'a: 'b` must be declared in the function's bounds. If +not, as in our example, that is an error. This check is done in the +[`check_universal_regions`] function, which simply iterates over all +universal regions, inspects their final value, and tests against the +declared [`UniversalRegionRelations`]. + +[`check_universal_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/region_infer/struct.RegionInferenceContext.html#method.check_universal_regions diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/member_constraints.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/member_constraints.md new file mode 100644 index 0000000000000..2804c97724f5a --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/member_constraints.md @@ -0,0 +1,191 @@ +# Member constraints + +A member constraint `'m member of ['c_1..'c_N]` expresses that the +region `'m` must be *equal* to some **choice regions** `'c_i` (for +some `i`). These constraints cannot be expressed by users, but they +arise from `impl Trait` due to its lifetime capture rules. Consider a +function such as the following: + +```rust,ignore +fn make(a: &'a u32, b: &'b u32) -> impl Trait<'a, 'b> { .. } +``` + +Here, the true return type (often called the "hidden type") is only +permitted to capture the lifetimes `'a` or `'b`. You can kind of see +this more clearly by desugaring that `impl Trait` return type into its +more explicit form: + +```rust,ignore +type MakeReturn<'x, 'y> = impl Trait<'x, 'y>; +fn make(a: &'a u32, b: &'b u32) -> MakeReturn<'a, 'b> { .. } +``` + +Here, the idea is that the hidden type must be some type that could +have been written in place of the `impl Trait<'x, 'y>` -- but clearly +such a type can only reference the regions `'x` or `'y` (or +`'static`!), as those are the only names in scope. This limitation is +then translated into a restriction to only access `'a` or `'b` because +we are returning `MakeReturn<'a, 'b>`, where `'x` and `'y` have been +replaced with `'a` and `'b` respectively. + +## Detailed example + +To help us explain member constraints in more detail, let's spell out +the `make` example in a bit more detail. First off, let's assume that +you have some dummy trait: + +```rust,ignore +trait Trait<'a, 'b> { } +impl Trait<'_, '_> for T { } +``` + +and this is the `make` function (in desugared form): + +```rust,ignore +type MakeReturn<'x, 'y> = impl Trait<'x, 'y>; +fn make(a: &'a u32, b: &'b u32) -> MakeReturn<'a, 'b> { + (a, b) +} +``` + +What happens in this case is that the return type will be `(&'0 u32, &'1 u32)`, +where `'0` and `'1` are fresh region variables. We will have the following +region constraints: + +```txt +'0 live at {L} +'1 live at {L} +'a: '0 +'b: '1 +'0 member of ['a, 'b, 'static] +'1 member of ['a, 'b, 'static] +``` + +Here the "liveness set" `{L}` corresponds to that subset of the body +where `'0` and `'1` are live -- basically the point from where the +return tuple is constructed to where it is returned (in fact, `'0` and +`'1` might have slightly different liveness sets, but that's not very +interesting to the point we are illustrating here). + +The `'a: '0` and `'b: '1` constraints arise from subtyping. When we +construct the `(a, b)` value, it will be assigned type `(&'0 u32, &'1 +u32)` -- the region variables reflect that the lifetimes of these +references could be made smaller. For this value to be created from +`a` and `b`, however, we do require that: + +```txt +(&'a u32, &'b u32) <: (&'0 u32, &'1 u32) +``` + +which means in turn that `&'a u32 <: &'0 u32` and hence that `'a: '0` +(and similarly that `&'b u32 <: &'1 u32`, `'b: '1`). + +Note that if we ignore member constraints, the value of `'0` would be +inferred to some subset of the function body (from the liveness +constraints, which we did not write explicitly). It would never become +`'a`, because there is no need for it too -- we have a constraint that +`'a: '0`, but that just puts a "cap" on how *large* `'0` can grow to +become. Since we compute the *minimal* value that we can, we are happy +to leave `'0` as being just equal to the liveness set. This is where +member constraints come in. + +## Choices are always lifetime parameters + +At present, the "choice" regions from a member constraint are always lifetime +parameters from the current function. As of October 2021, +this falls out from the placement of impl Trait, though in the future it may not +be the case. We take some advantage of this fact, as it simplifies the current +code. In particular, we don't have to consider a case like `'0 member of ['1, +'static]`, in which the value of both `'0` and `'1` are being inferred and hence +changing. See [rust-lang/rust#61773][#61773] for more information. + +[#61773]: https://github.com/rust-lang/rust/issues/61773 + +## Applying member constraints + +Member constraints are a bit more complex than other forms of +constraints. This is because they have a "or" quality to them -- that +is, they describe multiple choices that we must select from. E.g., in +our example constraint `'0 member of ['a, 'b, 'static]`, it might be +that `'0` is equal to `'a`, `'b`, *or* `'static`. How can we pick the +correct one? What we currently do is to look for a *minimal choice* +-- if we find one, then we will grow `'0` to be equal to that minimal +choice. To find that minimal choice, we take two factors into +consideration: lower and upper bounds. + +### Lower bounds + +The *lower bounds* are those lifetimes that `'0` *must outlive* -- +i.e., that `'0` must be larger than. In fact, when it comes time to +apply member constraints, we've already *computed* the lower bounds of +`'0` because we computed its minimal value (or at least, the lower +bounds considering everything but member constraints). + +Let `LB` be the current value of `'0`. We know then that `'0: LB` must +hold, whatever the final value of `'0` is. Therefore, we can rule out +any choice `'choice` where `'choice: LB` does not hold. + +Unfortunately, in our example, this is not very helpful. The lower +bound for `'0` will just be the liveness set `{L}`, and we know that +all the lifetime parameters outlive that set. So we are left with the +same set of choices here. (But in other examples, particularly those +with different variance, lower bound constraints may be relevant.) + +### Upper bounds + +The *upper bounds* are those lifetimes that *must outlive* `'0` -- +i.e., that `'0` must be *smaller* than. In our example, this would be +`'a`, because we have the constraint that `'a: '0`. In more complex +examples, the chain may be more indirect. + +We can use upper bounds to rule out members in a very similar way to +lower bounds. If UB is some upper bound, then we know that `UB: +'0` must hold, so we can rule out any choice `'choice` where `UB: +'choice` does not hold. + +In our example, we would be able to reduce our choice set from `['a, +'b, 'static]` to just `['a]`. This is because `'0` has an upper bound +of `'a`, and neither `'a: 'b` nor `'a: 'static` is known to hold. + +(For notes on how we collect upper bounds in the implementation, see +[the section below](#collecting).) + +### Minimal choice + +After applying lower and upper bounds, we can still sometimes have +multiple possibilities. For example, imagine a variant of our example +using types with the opposite variance. In that case, we would have +the constraint `'0: 'a` instead of `'a: '0`. Hence the current value +of `'0` would be `{L, 'a}`. Using this as a lower bound, we would be +able to narrow down the member choices to `['a, 'static]` because `'b: +'a` is not known to hold (but `'a: 'a` and `'static: 'a` do hold). We +would not have any upper bounds, so that would be our final set of choices. + +In that case, we apply the **minimal choice** rule -- basically, if +one of our choices if smaller than the others, we can use that. In +this case, we would opt for `'a` (and not `'static`). + +This choice is consistent with the general 'flow' of region +propagation, which always aims to compute a minimal value for the +region being inferred. However, it is somewhat arbitrary. + + + +### Collecting upper bounds in the implementation + +In practice, computing upper bounds is a bit inconvenient, because our +data structures are setup for the opposite. What we do is to compute +the **reverse SCC graph** (we do this lazily and cache the result) -- +that is, a graph where `'a: 'b` induces an edge `SCC('b) -> +SCC('a)`. Like the normal SCC graph, this is a DAG. We can then do a +depth-first search starting from `SCC('0)` in this graph. This will +take us to all the SCCs that must outlive `'0`. + +One wrinkle is that, as we walk the "upper bound" SCCs, their values +will not yet have been fully computed. However, we **have** already +applied their liveness constraints, so we have some information about +their value. In particular, for any regions representing lifetime +parameters, their value will contain themselves (i.e., the initial +value for `'a` includes `'a` and the value for `'b` contains `'b`). So +we can collect all of the lifetime parameters that are reachable, +which is precisely what we are interested in. diff --git a/src/doc/rustc-dev-guide/src/borrow_check/region_inference/placeholders_and_universes.md b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/placeholders_and_universes.md new file mode 100644 index 0000000000000..11fd2a5fc7db8 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/region_inference/placeholders_and_universes.md @@ -0,0 +1,440 @@ +# Placeholders and universes + +From time to time we have to reason about regions that we can't +concretely know. For example, consider this program: + +```rust,ignore +// A function that needs a static reference +fn foo(x: &'static u32) { } + +fn bar(f: for<'a> fn(&'a u32)) { + // ^^^^^^^^^^^^^^^^^^^ a function that can accept **any** reference + let x = 22; + f(&x); +} + +fn main() { + bar(foo); +} +``` + +This program ought not to type-check: `foo` needs a static reference +for its argument, and `bar` wants to be given a function that +accepts **any** reference (so it can call it with something on its +stack, for example). But *how* do we reject it and *why*? + +## Subtyping and Placeholders + +When we type-check `main`, and in particular the call `bar(foo)`, we +are going to wind up with a subtyping relationship like this one: + +```text +fn(&'static u32) <: for<'a> fn(&'a u32) +---------------- ------------------- +the type of `foo` the type `bar` expects +``` + +We handle this sort of subtyping by taking the variables that are +bound in the supertype and replacing them with +[universally quantified](../../appendix/background.md#quantified) +representatives, denoted like `!1` here. We call these regions "placeholder +regions" – they represent, basically, "some unknown region". + +Once we've done that replacement, we have the following relation: + +```text +fn(&'static u32) <: fn(&'!1 u32) +``` + +The key idea here is that this unknown region `'!1` is not related to +any other regions. So if we can prove that the subtyping relationship +is true for `'!1`, then it ought to be true for any region, which is +what we wanted. + +So let's work through what happens next. To check if two functions are +subtypes, we check if their arguments have the desired relationship +(fn arguments are [contravariant](../../appendix/background.md#variance), so +we swap the left and right here): + +```text +&'!1 u32 <: &'static u32 +``` + +According to the basic subtyping rules for a reference, this will be +true if `'!1: 'static`. That is – if "some unknown region `!1`" outlives `'static`. +Now, this *might* be true – after all, `'!1` could be `'static` – +but we don't *know* that it's true. So this should yield up an error (eventually). + +## What is a universe? + +In the previous section, we introduced the idea of a placeholder +region, and we denoted it `!1`. We call this number `1` the **universe +index**. The idea of a "universe" is that it is a set of names that +are in scope within some type or at some point. Universes are formed +into a tree, where each child extends its parents with some new names. +So the **root universe** conceptually contains global names, such as +the lifetime `'static` or the type `i32`. In the compiler, we also +put generic type parameters into this root universe (in this sense, +there is not just one root universe, but one per item). So consider +this function `bar`: + +```rust,ignore +struct Foo { } + +fn bar<'a, T>(t: &'a T) { + ... +} +``` + +Here, the root universe would consist of the lifetimes `'static` and +`'a`. In fact, although we're focused on lifetimes here, we can apply +the same concept to types, in which case the types `Foo` and `T` would +be in the root universe (along with other global types, like `i32`). +Basically, the root universe contains all the names that +[appear free](../../appendix/background.md#free-vs-bound) in the body of `bar`. + +Now let's extend `bar` a bit by adding a variable `x`: + +```rust,ignore +fn bar<'a, T>(t: &'a T) { + let x: for<'b> fn(&'b u32) = ...; +} +``` + +Here, the name `'b` is not part of the root universe. Instead, when we +"enter" into this `for<'b>` (e.g., by replacing it with a placeholder), we will create +a child universe of the root, let's call it U1: + +```text +U0 (root universe) +│ +└─ U1 (child universe) +``` + +The idea is that this child universe U1 extends the root universe U0 +with a new name, which we are identifying by its universe number: +`!1`. + +Now let's extend `bar` a bit by adding one more variable, `y`: + +```rust,ignore +fn bar<'a, T>(t: &'a T) { + let x: for<'b> fn(&'b u32) = ...; + let y: for<'c> fn(&'c u32) = ...; +} +``` + +When we enter *this* type, we will again create a new universe, which +we'll call `U2`. Its parent will be the root universe, and U1 will be +its sibling: + +```text +U0 (root universe) +│ +├─ U1 (child universe) +│ +└─ U2 (child universe) +``` + +This implies that, while in U2, we can name things from U0 or U2, but +not U1. + +**Giving existential variables a universe.** Now that we have this +notion of universes, we can use it to extend our type-checker and +things to prevent illegal names from leaking out. The idea is that we +give each inference (existential) variable – whether it be a type or +a lifetime – a universe. That variable's value can then only +reference names visible from that universe. So for example if a +lifetime variable is created in U0, then it cannot be assigned a value +of `!1` or `!2`, because those names are not visible from the universe +U0. + +**Representing universes with just a counter.** You might be surprised +to see that the compiler doesn't keep track of a full tree of +universes. Instead, it just keeps a counter – and, to determine if +one universe can see another one, it just checks if the index is +greater. For example, U2 can see U0 because 2 >= 0. But U0 cannot see +U2, because 0 >= 2 is false. + +How can we get away with this? Doesn't this mean that we would allow +U2 to also see U1? The answer is that, yes, we would, **if that +question ever arose**. But because of the structure of our type +checker etc, there is no way for that to happen. In order for +something happening in the universe U1 to "communicate" with something +happening in U2, they would have to have a shared inference variable X +in common. And because everything in U1 is scoped to just U1 and its +children, that inference variable X would have to be in U0. And since +X is in U0, it cannot name anything from U1 (or U2). This is perhaps easiest +to see by using a kind of generic "logic" example: + +```text +exists { + forall { ... /* Y is in U1 ... */ } + forall { ... /* Z is in U2 ... */ } +} +``` + +Here, the only way for the two foralls to interact would be through X, +but neither Y nor Z are in scope when X is declared, so its value +cannot reference either of them. + +## Universes and placeholder region elements + +But where does that error come from? The way it happens is like this. +When we are constructing the region inference context, we can tell +from the type inference context how many placeholder variables exist +(the `InferCtxt` has an internal counter). For each of those, we +create a corresponding universal region variable `!n` and a "region +element" `placeholder(n)`. This corresponds to "some unknown set of other +elements". The value of `!n` is `{placeholder(n)}`. + +At the same time, we also give each existential variable a +**universe** (also taken from the `InferCtxt`). This universe +determines which placeholder elements may appear in its value: For +example, a variable in universe U3 may name `placeholder(1)`, `placeholder(2)`, and +`placeholder(3)`, but not `placeholder(4)`. Note that the universe of an inference +variable controls what region elements **can** appear in its value; it +does not say region elements **will** appear. + +## Placeholders and outlives constraints + +In the region inference engine, outlives constraints have the form: + +```text +V1: V2 @ P +``` + +where `V1` and `V2` are region indices, and hence map to some region +variable (which may be universally or existentially quantified). The +`P` here is a "point" in the control-flow graph; it's not important +for this section. This variable will have a universe, so let's call +those universes `U(V1)` and `U(V2)` respectively. (Actually, the only +one we are going to care about is `U(V1)`.) + +When we encounter this constraint, the ordinary procedure is to start +a DFS from `P`. We keep walking so long as the nodes we are walking +are present in `value(V2)` and we add those nodes to `value(V1)`. If +we reach a return point, we add in any `end(X)` elements. That part +remains unchanged. + +But then *after that* we want to iterate over the placeholder `placeholder(x)` +elements in V2 (each of those must be visible to `U(V2)`, but we +should be able to just assume that is true, we don't have to check +it). We have to ensure that `value(V1)` outlives each of those +placeholder elements. + +Now there are two ways that could happen. First, if `U(V1)` can see +the universe `x` (i.e., `x <= U(V1)`), then we can just add `placeholder(x)` +to `value(V1)` and be done. But if not, then we have to approximate: +we may not know what set of elements `placeholder(x)` represents, but we +should be able to compute some sort of **upper bound** B for it – +some region B that outlives `placeholder(x)`. For now, we'll just use +`'static` for that (since it outlives everything) – in the future, we +can sometimes be smarter here (and in fact we have code for doing this +already in other contexts). Moreover, since `'static` is in the root +universe U0, we know that all variables can see it – so basically if +we find that `value(V2)` contains `placeholder(x)` for some universe `x` +that `V1` can't see, then we force `V1` to `'static`. + +## Extending the "universal regions" check + +After all constraints have been propagated, the NLL region inference +has one final check, where it goes over the values that wound up being +computed for each universal region and checks that they did not get +'too large'. In our case, we will go through each placeholder region +and check that it contains *only* the `placeholder(u)` element it is known to +outlive. (Later, we might be able to know that there are relationships +between two placeholder regions and take those into account, as we do +for universal regions from the fn signature.) + +Put another way, the "universal regions" check can be considered to be +checking constraints like: + +```text +{placeholder(1)}: V1 +``` + +where `{placeholder(1)}` is like a constant set, and V1 is the variable we +made to represent the `!1` region. + +## Back to our example + +OK, so far so good. Now let's walk through what would happen with our +first example: + +```text +fn(&'static u32) <: fn(&'!1 u32) @ P // this point P is not imp't here +``` + +The region inference engine will create a region element domain like this: + +```text +{ CFG; end('static); placeholder(1) } + --- ------------ ------- from the universe `!1` + | 'static is always in scope + all points in the CFG; not especially relevant here +``` + +It will always create two universal variables, one representing +`'static` and one representing `'!1`. Let's call them Vs and V1. They +will have initial values like so: + +```text +Vs = { CFG; end('static) } // it is in U0, so can't name anything else +V1 = { placeholder(1) } +``` + +From the subtyping constraint above, we would have an outlives constraint like + +```text +'!1: 'static @ P +``` + +To process this, we would grow the value of V1 to include all of Vs: + +```text +Vs = { CFG; end('static) } +V1 = { CFG; end('static), placeholder(1) } +``` + +At that point, constraint propagation is complete, because all the +outlives relationships are satisfied. Then we would go to the "check +universal regions" portion of the code, which would test that no +universal region grew too large. + +In this case, `V1` *did* grow too large – it is not known to outlive +`end('static)`, nor any of the CFG – so we would report an error. + +## Another example + +What about this subtyping relationship? + +```text +for<'a> fn(&'a u32, &'a u32) + <: +for<'b, 'c> fn(&'b u32, &'c u32) +``` + +Here we would replace the bound region in the supertype with a placeholder, as before, yielding: + +```text +for<'a> fn(&'a u32, &'a u32) + <: +fn(&'!1 u32, &'!2 u32) +``` + +then we instantiate the variable on the left-hand side with an +existential in universe U2, yielding the following (`?n` is a notation +for an existential variable): + +```text +fn(&'?3 u32, &'?3 u32) + <: +fn(&'!1 u32, &'!2 u32) +``` + +Then we break this down further: + +```text +&'!1 u32 <: &'?3 u32 +&'!2 u32 <: &'?3 u32 +``` + +and even further, yield up our region constraints: + +```text +'!1: '?3 +'!2: '?3 +``` + +Note that, in this case, both `'!1` and `'!2` have to outlive the +variable `'?3`, but the variable `'?3` is not forced to outlive +anything else. Therefore, it simply starts and ends as the empty set +of elements, and hence the type-check succeeds here. + +(This should surprise you a little. It surprised me when I first realized it. +We are saying that if we are a fn that **needs both of its arguments to have +the same region**, we can accept being called with **arguments with two +distinct regions**. That seems intuitively unsound. But in fact, it's fine, as +I tried to explain in [this issue][ohdeargoditsallbroken] on the Rust issue +tracker long ago. The reason is that even if we get called with arguments of +two distinct lifetimes, those two lifetimes have some intersection (the call +itself), and that intersection can be our value of `'a` that we use as the +common lifetime of our arguments. -nmatsakis) + +[ohdeargoditsallbroken]: https://github.com/rust-lang/rust/issues/32330#issuecomment-202536977 + +## Final example + +Let's look at one last example. We'll extend the previous one to have +a return type: + +```text +for<'a> fn(&'a u32, &'a u32) -> &'a u32 + <: +for<'b, 'c> fn(&'b u32, &'c u32) -> &'b u32 +``` + +Despite seeming very similar to the previous example, this case is going to get +an error. That's good: the problem is that we've gone from a fn that promises +to return one of its two arguments, to a fn that is promising to return the +first one. That is unsound. Let's see how it plays out. + +First, we replace the bound region in the supertype with a placeholder: + +```text +for<'a> fn(&'a u32, &'a u32) -> &'a u32 + <: +fn(&'!1 u32, &'!2 u32) -> &'!1 u32 +``` + +Then we instantiate the subtype with existentials (in U2): + +```text +fn(&'?3 u32, &'?3 u32) -> &'?3 u32 + <: +fn(&'!1 u32, &'!2 u32) -> &'!1 u32 +``` + +And now we create the subtyping relationships: + +```text +&'!1 u32 <: &'?3 u32 // arg 1 +&'!2 u32 <: &'?3 u32 // arg 2 +&'?3 u32 <: &'!1 u32 // return type +``` + +And finally the outlives relationships. Here, let V1, V2, and V3 be the +variables we assign to `!1`, `!2`, and `?3` respectively: + +```text +V1: V3 +V2: V3 +V3: V1 +``` + +Those variables will have these initial values: + +```text +V1 in U1 = {placeholder(1)} +V2 in U2 = {placeholder(2)} +V3 in U2 = {} +``` + +Now because of the `V3: V1` constraint, we have to add `placeholder(1)` into `V3` (and +indeed it is visible from `V3`), so we get: + +```text +V3 in U2 = {placeholder(1)} +``` + +then we have this constraint `V2: V3`, so we wind up having to enlarge +`V2` to include `placeholder(1)` (which it can also see): + +```text +V2 in U2 = {placeholder(1), placeholder(2)} +``` + +Now constraint propagation is done, but when we check the outlives +relationships, we find that `V2` includes this new element `placeholder(1)`, +so we report an error. diff --git a/src/doc/rustc-dev-guide/src/borrow_check/two_phase_borrows.md b/src/doc/rustc-dev-guide/src/borrow_check/two_phase_borrows.md new file mode 100644 index 0000000000000..d38724335c960 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/two_phase_borrows.md @@ -0,0 +1,100 @@ +# Two-phase borrows + +Two-phase borrows are a more permissive version of mutable borrows that allow +nested method calls such as `vec.push(vec.len())`. Such borrows first act as +shared borrows in a "reservation" phase and can later be "activated" into a +full mutable borrow. + +Only certain implicit mutable borrows can be two-phase, any `&mut` or `ref mut` +in the source code is never a two-phase borrow. The cases where we generate a +two-phase borrow are: + +1. The autoref borrow when calling a method with a mutable reference receiver. +2. A mutable reborrow in function arguments. +3. The implicit mutable borrow in an overloaded compound assignment operator. + +To give some examples: + +```rust,edition2018 +// In the source code + +// Case 1: +let mut v = Vec::new(); +v.push(v.len()); +let r = &mut Vec::new(); +r.push(r.len()); + +// Case 2: +std::mem::replace(r, vec![1, r.len()]); + +// Case 3: +let mut x = std::num::Wrapping(2); +x += x; +``` + +Expanding these enough to show the two-phase borrows: + +```rust,ignore +// Case 1: +let mut v = Vec::new(); +let temp1 = &two_phase v; +let temp2 = v.len(); +Vec::push(temp1, temp2); +let r = &mut Vec::new(); +let temp3 = &two_phase *r; +let temp4 = r.len(); +Vec::push(temp3, temp4); + +// Case 2: +let temp5 = &two_phase *r; +let temp6 = vec![1, r.len()]; +std::mem::replace(temp5, temp6); + +// Case 3: +let mut x = std::num::Wrapping(2); +let temp7 = &two_phase x; +let temp8 = x; +std::ops::AddAssign::add_assign(temp7, temp8); +``` + +Whether a borrow can be two-phase is tracked by a flag on the [`AutoBorrow`] +after type checking, which is then [converted] to a [`BorrowKind`] during MIR +construction. + +Each two-phase borrow is assigned to a temporary that is only used once. As +such we can define: + +* The point where the temporary is assigned to is called the *reservation* + point of the two-phase borrow. +* The point where the temporary is used, which is effectively always a + function call, is called the *activation* point. + +The activation points are found using the [`GatherBorrows`] visitor. The +[`BorrowData`] then holds both the reservation and activation points for the +borrow. + +[`AutoBorrow`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/adjustment/enum.AutoBorrow.html +[converted]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_build/thir/cx/expr/trait.ToBorrowKind.html#method.to_borrow_kind +[`BorrowKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/enum.BorrowKind.html +[`GatherBorrows`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/borrow_set/struct.GatherBorrows.html +[`BorrowData`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/borrow_set/struct.BorrowData.html + +## Checking two-phase borrows + +Two-phase borrows are treated as if they were mutable borrows with the +following exceptions: + +1. At every location in the MIR we [check] if any two-phase borrows are + activated at this location. If a live two phase borrow is activated at a + location, then we check that there are no borrows that conflict with the + two-phase borrow. +2. At the reservation point we error if there are conflicting live *mutable* + borrows. And lint if there are any conflicting shared borrows. +3. Between the reservation and the activation point, the two-phase borrow acts + as a shared borrow. We determine (in [`is_active`]) if we're at such a point + by using the [`Dominators`] for the MIR graph. +4. After the activation point, the two-phase borrow acts as a mutable borrow. + +[check]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/struct.MirBorrowckCtxt.html#method.check_activations +[`Dominators`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_data_structures/graph/dominators/struct.Dominators.html +[`is_active`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/path_utils/fn.is_active.html diff --git a/src/doc/rustc-dev-guide/src/borrow_check/type_check.md b/src/doc/rustc-dev-guide/src/borrow_check/type_check.md new file mode 100644 index 0000000000000..69456d870eaa9 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/borrow_check/type_check.md @@ -0,0 +1,64 @@ +# The MIR type-check + +A key component of the borrow check is the +[MIR type-check](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/type_check/index.html). +This check walks the MIR and does a complete "type check" -- the same +kind you might find in any other language. In the process of doing +this type-check, we also uncover the region constraints that apply to +the program. + +TODO -- elaborate further? Maybe? :) + +## User types + +At the start of MIR type-check, we replace all regions in the body with new unconstrained regions. +However, this would cause us to accept the following program: +```rust +fn foo<'a>(x: &'a u32) { + let y: &'static u32 = x; +} +``` +By erasing the lifetimes in the type of `y` we no longer know that it is supposed to be `'static`, +ignoring the intentions of the user. + +To deal with this we remember all places where the user explicitly mentioned a type during +HIR type-check as [`CanonicalUserTypeAnnotations`][annot]. + +There are two different annotations we care about: +- explicit type ascriptions, e.g. `let y: &'static u32` results in `UserType::Ty(&'static u32)`. +- explicit generic arguments, e.g. `x.foo<&'a u32, Vec>` +results in `UserType::TypeOf(foo_def_id, [&'a u32, Vec])`. + +As we do not want the region inference from the HIR type-check to influence MIR typeck, +we store the user type right after lowering it from the HIR. +This means that it may still contain inference variables, +which is why we are using **canonical** user type annotations. +We replace all inference variables with existential bound variables instead. +Something like `let x: Vec<_>` would therefore result in `exists UserType::Ty(Vec)`. + +A pattern like `let Foo(x): Foo<&'a u32>` has a user type `Foo<&'a u32>` but +the actual type of `x` should only be `&'a u32`. For this, we use a [`UserTypeProjection`][proj]. + +In the MIR, we deal with user types in two slightly different ways. + +Given a MIR local corresponding to a variable in a pattern which has an explicit type annotation, +we require the type of that local to be equal to the type of the [`UserTypeProjection`][proj]. +This is directly stored in the [`LocalDecl`][decl]. + +We also constrain the type of scrutinee expressions, e.g. the type of `x` in `let _: &'a u32 = x;`. +Here `T_x` only has to be a subtype of the user type, so we instead use +[`StatementKind::AscribeUserType`][stmt] for that. + +Note that we do not directly use the user type as the MIR typechecker +doesn't really deal with type and const inference variables. We instead store the final +[`inferred_type`][inf] from the HIR type-checker. During MIR typeck, we then replace its regions +with new nll inference vars and relate it with the actual `UserType` to get the correct region +constraints again. + +After the MIR type-check, all user type annotations get discarded, as they aren't needed anymore. + +[annot]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.CanonicalUserTypeAnnotation.html +[proj]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.UserTypeProjection.html +[decl]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/struct.LocalDecl.html +[stmt]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/enum.StatementKind.html#variant.AscribeUserType +[inf]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.CanonicalUserTypeAnnotation.html#structfield.inferred_ty \ No newline at end of file diff --git a/src/doc/rustc-dev-guide/src/building/suggested.md b/src/doc/rustc-dev-guide/src/building/suggested.md index b5c9b9b4e3d12..c87dc6b28d875 100644 --- a/src/doc/rustc-dev-guide/src/building/suggested.md +++ b/src/doc/rustc-dev-guide/src/building/suggested.md @@ -1,29 +1,27 @@ # Suggested workflows -The full bootstrapping process takes quite a while. -Here are some suggestions to make your life easier. +The full bootstrapping process takes quite a while. Here are some suggestions to +make your life easier. ## Installing a pre-push hook CI will automatically fail your build if it doesn't pass `tidy`, our internal -tool for ensuring code quality. -If you'd like, you can install a [Git +tool for ensuring code quality. If you'd like, you can install a [Git hook](https://git-scm.com/book/en/v2/Customizing-Git-Git-Hooks) that will -automatically run `./x test tidy` on each push, to ensure your code is up to par. -If the hook fails then run `./x test tidy --bless` and commit the changes. +automatically run `./x test tidy` on each push, to ensure your code is up to +par. If the hook fails then run `./x test tidy --bless` and commit the changes. If you decide later that the pre-push behavior is undesirable, you can delete the `pre-push` file in `.git/hooks`. -A prebuilt git hook lives at [`src/etc/pre-push.sh`]. - It can be copied into your `.git/hooks` folder as `pre-push` (without the `.sh` extension!). +A prebuilt git hook lives at [`src/etc/pre-push.sh`]. It can be copied into +your `.git/hooks` folder as `pre-push` (without the `.sh` extension!). You can also install the hook as a step of running `./x setup`! ## Config extensions When working on different tasks, you might need to switch between different bootstrap configurations. -Sometimes you may want to keep an old configuration for future use. -But saving raw config values in +Sometimes you may want to keep an old configuration for future use. But saving raw config values in random files and manually copying and pasting them can quickly become messy, especially if you have a long history of different configurations. @@ -53,10 +51,9 @@ include = ["cross.toml"] You can also include extensions within extensions recursively. -**Note:** In the `include` field, the overriding logic follows a right-to-left order. -For example, -in `include = ["a.toml", "b.toml"]`, extension `b.toml` overrides `a.toml`. -Also, parent extensions always overrides the inner ones. +**Note:** In the `include` field, the overriding logic follows a right-to-left order. For example, +in `include = ["a.toml", "b.toml"]`, extension `b.toml` overrides `a.toml`. Also, parent extensions +always overrides the inner ones. ## Configuring `rust-analyzer` for `rustc` @@ -64,37 +61,34 @@ Also, parent extensions always overrides the inner ones. Checking the "library" tree requires a stage1 compiler, which can be a heavy process on some computers. For this reason, bootstrap has a flag called `--skip-std-check-if-no-download-rustc` that skips checking the -"library" tree if `rust.download-rustc` isn't available. -If you want to avoid putting a heavy load on your computer +"library" tree if `rust.download-rustc` isn't available. If you want to avoid putting a heavy load on your computer with `rust-analyzer`, you can add the `--skip-std-check-if-no-download-rustc` flag to your `./x check` command in the `rust-analyzer` configuration. ### Project-local rust-analyzer setup -`rust-analyzer` can help you check and format your code whenever you save a file. -By default, `rust-analyzer` runs the `cargo check` and `rustfmt` commands, +`rust-analyzer` can help you check and format your code whenever you save a +file. By default, `rust-analyzer` runs the `cargo check` and `rustfmt` commands, but you can override these commands to use more adapted versions of these tools -when hacking on `rustc`. -With custom setup, `rust-analyzer` can use `./x check` +when hacking on `rustc`. With custom setup, `rust-analyzer` can use `./x check` to check the sources, and the stage 0 rustfmt to format them. The default `rust-analyzer.check.overrideCommand` command line will check all -the crates and tools in the repository. -If you are working on a specific part, -you can override the command to only check the part you are working on to save checking time. -For example, if you are working on the compiler, you can override +the crates and tools in the repository. If you are working on a specific part, +you can override the command to only check the part you are working on to save +checking time. For example, if you are working on the compiler, you can override the command to `x check compiler --json-output` to only check the compiler part. You can run `x check --help --verbose` to see the available parts. Running `./x setup editor` will prompt you to create a project-local LSP config -file for one of the supported editors. -You can also create the config file as a step of running `./x setup`. +file for one of the supported editors. You can also create the config file as a +step of running `./x setup`. ### Using a separate build directory for rust-analyzer By default, when rust-analyzer runs a check or format command, it will share -the same build directory as manual command-line builds. -This can be inconvenient for two reasons: +the same build directory as manual command-line builds. This can be inconvenient +for two reasons: - Each build will lock the build directory and force the other to wait, so it becomes impossible to run command-line builds while rust-analyzer is running commands in the background. @@ -117,11 +111,12 @@ requires extra disk space. ### Visual Studio Code Selecting `vscode` in `./x setup editor` will prompt you to create a -`.vscode/settings.json` file which will configure Visual Studio code. -The recommended `rust-analyzer` settings live at +`.vscode/settings.json` file which will configure Visual Studio code. The +recommended `rust-analyzer` settings live at [`src/etc/rust_analyzer_settings.json`]. -If running `./x check` on save is inconvenient, in VS Code you can use a [Build Task] instead: +If running `./x check` on save is inconvenient, in VS Code you can use a [Build +Task] instead: ```JSON // .vscode/tasks.json @@ -145,26 +140,27 @@ If running `./x check` on save is inconvenient, in VS Code you can use a [Build ### Neovim -For Neovim users, there are a few options. -The easiest way is by using [neoconf.nvim](https://github.com/folke/neoconf.nvim/), -which allows for project-local configuration files with the native LSP. -The steps for how to use it are below. -Note that they require rust-analyzer to already be configured with Neovim. -Steps for this can be [found here](https://rust-analyzer.github.io/manual.html#nvim-lsp). +For Neovim users, there are a few options. The +easiest way is by using [neoconf.nvim](https://github.com/folke/neoconf.nvim/), +which allows for project-local configuration files with the native LSP. The +steps for how to use it are below. Note that they require rust-analyzer to +already be configured with Neovim. Steps for this can be [found +here](https://rust-analyzer.github.io/manual.html#nvim-lsp). -1. First install the plugin. - This can be done by following the steps in the README. -2. Run `./x setup editor`, and select `vscode` to create a `.vscode/settings.json` file. - `neoconf` is able to read and update - rust-analyzer settings automatically when the project is opened when this file is detected. +1. First install the plugin. This can be done by following the steps in the + README. +2. Run `./x setup editor`, and select `vscode` to create a + `.vscode/settings.json` file. `neoconf` is able to read and update + rust-analyzer settings automatically when the project is opened when this + file is detected. If you're using `coc.nvim`, you can run `./x setup editor` and select `vim` to -create a `.vim/coc-settings.json`. -The settings can be edited with `:CocLocalConfig`. -The recommended settings live at [`src/etc/rust_analyzer_settings.json`]. +create a `.vim/coc-settings.json`. The settings can be edited with +`:CocLocalConfig`. The recommended settings live at +[`src/etc/rust_analyzer_settings.json`]. -Another way is without a plugin, and creating your own logic in your configuration. -The following code will work for any checkout of rust-lang/rust (newer than February 2025): +Another way is without a plugin, and creating your own logic in your +configuration. The following code will work for any checkout of rust-lang/rust (newer than February 2025): ```lua local function expand_config_variables(option) @@ -220,7 +216,8 @@ lspconfig.rust_analyzer.setup { If you would like to use the build task that is described above, you may either make your own command in your config, or you can install a plugin such as -[overseer.nvim](https://github.com/stevearc/overseer.nvim) that can [read VSCode's `task.json` +[overseer.nvim](https://github.com/stevearc/overseer.nvim) that can [read +VSCode's `task.json` files](https://github.com/stevearc/overseer.nvim/blob/master/doc/guides.md#vs-code-tasks), and follow the same instructions as above. @@ -243,58 +240,55 @@ Helix comes with built-in LSP and rust-analyzer support. It can be configured through `languages.toml`, as described [here](https://docs.helix-editor.com/languages.html). You can run `./x setup editor` and select `helix`, which will prompt you to -create `languages.toml` with the recommended configuration for Helix. -The recommended settings live at [`src/etc/rust_analyzer_helix.toml`]. +create `languages.toml` with the recommended configuration for Helix. The +recommended settings live at [`src/etc/rust_analyzer_helix.toml`]. ### Zed Zed comes with built-in LSP and rust-analyzer support. It can be configured through `.zed/settings.json`, as described -[here](https://zed.dev/docs/configuring-languages). -Selecting `zed` in `./x setup editor` will prompt you to create a `.zed/settings.json` -file which will configure Zed with the recommended configuration. -The recommended `rust-analyzer` settings live +[here](https://zed.dev/docs/configuring-languages). Selecting `zed` +in `./x setup editor` will prompt you to create a `.zed/settings.json` +file which will configure Zed with the recommended configuration. The +recommended `rust-analyzer` settings live at [`src/etc/rust_analyzer_zed.json`]. ## Check, check, and check again -When doing simple refactoring, it can be useful to run `./x check` continuously. -If you set up `rust-analyzer` as described above, this will be -done for you every time you save a file. -Here you are just checking that the +When doing simple refactoring, it can be useful to run `./x check` +continuously. If you set up `rust-analyzer` as described above, this will be +done for you every time you save a file. Here you are just checking that the compiler can **build**, but often that is all you need (e.g., when renaming a -method). -You can then run `./x build` when you actually need to run tests. +method). You can then run `./x build` when you actually need to run tests. -In fact, it is sometimes useful to put off tests even when you are not 100% sure the code will work. -You can then keep building up refactoring commits and only run the tests at some later time. -You can then use `git bisect` to track down **precisely** which commit caused the problem. -A nice side-effect of this style +In fact, it is sometimes useful to put off tests even when you are not 100% sure +the code will work. You can then keep building up refactoring commits and only +run the tests at some later time. You can then use `git bisect` to track down +**precisely** which commit caused the problem. A nice side-effect of this style is that you are left with a fairly fine-grained set of commits at the end, all -of which build and pass tests. -This often helps reviewing. +of which build and pass tests. This often helps reviewing. ## Configuring `rustup` to use nightly -Some parts of the bootstrap process uses pinned, nightly versions of tools like rustfmt. -To make things like `cargo fmt` work correctly in your repo, run +Some parts of the bootstrap process uses pinned, nightly versions of tools like +rustfmt. To make things like `cargo fmt` work correctly in your repo, run ```console cd rustup override set nightly ``` -After [installing a nightly toolchain] with `rustup`. -Don't forget to do this for all directories you have [setup a worktree for]. -You may need to use the -pinned nightly version from `src/stage0`, but often the normal `nightly` channel will work. +after [installing a nightly toolchain] with `rustup`. Don't forget to do this +for all directories you have [setup a worktree for]. You may need to use the +pinned nightly version from `src/stage0`, but often the normal `nightly` channel +will work. **Note** see [the section on vscode] for how to configure it with this real rustfmt `x` uses, and [the section on rustup] for how to setup `rustup` toolchain for your bootstrapped compiler -**Note** This does _not_ allow you to build `rustc` with cargo directly. -You still have to use `x` to work on the compiler or standard library, this just +**Note** This does _not_ allow you to build `rustc` with cargo directly. You +still have to use `x` to work on the compiler or standard library, this just lets you use `cargo fmt`. [installing a nightly toolchain]: https://rust-lang.github.io/rustup/concepts/channels.html?highlight=nightl#working-with-nightly-rust @@ -306,22 +300,18 @@ lets you use `cargo fmt`. If you are not working on the compiler, you often don't need to build the compiler tree. For example, you can skip building the compiler and only build the `library` tree or the -tools under `src/tools`. -To achieve that, you have to enable this by setting the `download-rustc` -option in your configuration. -This tells bootstrap to use the latest nightly compiler for `stage > 0` +tools under `src/tools`. To achieve that, you have to enable this by setting the `download-rustc` +option in your configuration. This tells bootstrap to use the latest nightly compiler for `stage > 0` steps, meaning it will have two precompiled compilers: stage0 compiler and `download-rustc` compiler -for `stage > 0` steps. -This way, it will never need to build the in-tree compiler. -As a result, your build time will be significantly reduced by not building the in-tree compiler. +for `stage > 0` steps. This way, it will never need to build the in-tree compiler. As a result, your +build time will be significantly reduced by not building the in-tree compiler. ## Faster rebuilds with `--keep-stage-std` -Sometimes just checking whether the compiler builds is not enough. -A common example is that you need to add a `debug!` statement to inspect the value of -some state or better understand the problem. -In that case, you don't really need a full build. -By bypassing bootstrap's cache invalidation, you can often get +Sometimes just checking whether the compiler builds is not enough. A common +example is that you need to add a `debug!` statement to inspect the value of +some state or better understand the problem. In that case, you don't really need +a full build. By bypassing bootstrap's cache invalidation, you can often get these builds to complete very fast (e.g., around 30 seconds). The only catch is this requires a bit of fudging and may produce compilers that don't work (but that is easily detected and fixed). @@ -333,54 +323,53 @@ The sequence of commands you want is as follows: - Note that we added the `--keep-stage-std=1` flag here As mentioned, the effect of `--keep-stage-std=1` is that we just _assume_ that the -old standard library can be re-used. -If you are editing the compiler, this is -often true: you haven't changed the standard library, after all. -But sometimes, it's not true: for example, if you are editing the "metadata" part of +old standard library can be re-used. If you are editing the compiler, this is +often true: you haven't changed the standard library, after all. But +sometimes, it's not true: for example, if you are editing the "metadata" part of the compiler, which controls how the compiler encodes types and other states into the `rlib` files, or if you are editing things that wind up in the metadata (such as the definition of the MIR). **The TL;DR is that you might get weird behavior from a compile when using `--keep-stage-std=1`** -- for example, strange [ICEs](../appendix/glossary.html#ice) -or other panics. -In that case, you should simply remove the `--keep-stage-std=1` from the command and rebuild. -That ought to fix the problem. +or other panics. In that case, you should simply remove the `--keep-stage-std=1` +from the command and rebuild. That ought to fix the problem. -You can also use `--keep-stage-std=1` when running tests. -Something like this: +You can also use `--keep-stage-std=1` when running tests. Something like this: - Initial test run: `./x test tests/ui` - Subsequent test run: `./x test tests/ui --keep-stage-std=1` ## Using incremental compilation -You can further enable the `--incremental` flag to save additional time in subsequent rebuilds: +You can further enable the `--incremental` flag to save additional time in +subsequent rebuilds: ```bash ./x test tests/ui --incremental --test-args issue-1234 ``` -If you don't want to include the flag with every command, you can enable it in the `bootstrap.toml`: +If you don't want to include the flag with every command, you can enable it in +the `bootstrap.toml`: ```toml [rust] incremental = true ``` -Note that incremental compilation will use more disk space than usual. -If disk space is a concern for you, you might want to check the size of the `build` +Note that incremental compilation will use more disk space than usual. If disk +space is a concern for you, you might want to check the size of the `build` directory from time to time. ## Fine-tuning optimizations -Setting `optimize = false` makes the compiler too slow for tests. -However, to improve the test cycle, you can disable optimizations selectively only for the +Setting `optimize = false` makes the compiler too slow for tests. However, to +improve the test cycle, you can disable optimizations selectively only for the crates you'll have to rebuild ([source](https://rust-lang.zulipchat.com/#narrow/stream/131828-t-compiler/topic/incremental.20compilation.20question/near/202712165)). For example, when working on `rustc_mir_build`, the `rustc_mir_build` and -`rustc_driver` crates take the most time to incrementally rebuild. -You could therefore set the following in the root `Cargo.toml`: +`rustc_driver` crates take the most time to incrementally rebuild. You could +therefore set the following in the root `Cargo.toml`: ```toml [profile.release.package.rustc_mir_build] @@ -393,24 +382,22 @@ opt-level = 0 Working on multiple branches in parallel can be a little annoying, since building the compiler on one branch will cause the old build and the incremental -compilation cache to be overwritten. -One solution would be to have multiple +compilation cache to be overwritten. One solution would be to have multiple clones of the repository, but that would mean storing the Git metadata multiple times, and having to update each clone individually. -Fortunately, Git has a better solution called [worktrees]. -This lets you create multiple "working trees", which all share the same Git database. -Moreover, +Fortunately, Git has a better solution called [worktrees]. This lets you create +multiple "working trees", which all share the same Git database. Moreover, because all of the worktrees share the same object database, if you update a branch (e.g. `main`) in any of them, you can use the new commits from any of the -worktrees. -One caveat, though, is that submodules do not get shared. -They will still be cloned multiple times. +worktrees. One caveat, though, is that submodules do not get shared. They will +still be cloned multiple times. [worktrees]: https://git-scm.com/docs/git-worktree Given you are inside the root directory for your Rust repository, you can create -a "linked working tree" in a new "rust2" directory by running the following command: +a "linked working tree" in a new "rust2" directory by running the following +command: ```bash git worktree add ../rust2 @@ -422,7 +409,8 @@ Creating a new worktree for a new branch based on `main` looks like: git worktree add -b my-feature ../rust2 main ``` -You can then use that rust2 folder as a separate workspace for modifying and building `rustc`! +You can then use that rust2 folder as a separate workspace for modifying and +building `rustc`! ## Working with nix diff --git a/src/doc/rustc-dev-guide/src/compiler-team.md b/src/doc/rustc-dev-guide/src/compiler-team.md index ee058c805f0df..495bd22da4d85 100644 --- a/src/doc/rustc-dev-guide/src/compiler-team.md +++ b/src/doc/rustc-dev-guide/src/compiler-team.md @@ -3,8 +3,7 @@ > NOTE: > There exists much detail about the team [on Forge], making most of the following obsolete. -rustc is maintained by the [Rust compiler team][team]. -The people who belong to +rustc is maintained by the [Rust compiler team][team]. The people who belong to this team collectively work to track regressions and implement new features. Members of the Rust compiler team are people who have made significant contributions to rustc and its design. @@ -35,24 +34,26 @@ who are reviewers of each part. ## Rust compiler meeting The compiler team has a weekly meeting where we do triage and try to -generally stay on top of new bugs, regressions, and discuss important things in general. -They are held on [Zulip][zulip-meetings]. -It works roughly as follows: +generally stay on top of new bugs, regressions, and discuss important +things in general. +They are held on [Zulip][zulip-meetings]. It works roughly as follows: - **Announcements, MCPs/FCPs, and WG-check-ins:** We share some - announcements with the rest of the team about important things we want everyone to be aware of. - We also share the status of MCPs and FCPs and we - use the opportunity to have a couple of WGs giving us an update about their work. + announcements with the rest of the team about important things we want + everyone to be aware of. We also share the status of MCPs and FCPs and we + use the opportunity to have a couple of WGs giving us an update about + their work. - **Check for beta and stable nominations:** These are nominations of things to backport to beta and stable respectively. - We then look for new cases where the compiler broke previously working code in the wild. - Regressions are important issues to fix, so it's + We then look for new cases where the compiler broke previously working + code in the wild. Regressions are important issues to fix, so it's likely that they are tagged as P-critical or P-high; the major exception would be bug fixes (though even there we often [aim to give warnings first][procedure]). - **Review P-critical and P-high bugs:** P-critical and P-high bugs are - those that are sufficiently important for us to actively track progress. - P-critical and P-high bugs should ideally always have an assignee. + those that are sufficiently important for us to actively track + progress. P-critical and P-high bugs should ideally always have an + assignee. - **Check `S-waiting-on-t-compiler` and `I-compiler-nominated` issues:** These are issues where feedback from the team is desired. - **Look over the performance triage report:** We check for PRs that made the @@ -60,7 +61,8 @@ It works roughly as follows: the regression can be addressed in a future PR. The meeting currently takes place on Thursdays at 10am Boston time -(UTC-4 typically, but daylight savings time sometimes makes things complicated). +(UTC-4 typically, but daylight savings time sometimes makes things +complicated). [procedure]: ./bug-fix-procedure.md [zulip-t-compiler]: https://rust-lang.zulipchat.com/#narrow/stream/131828-t-compiler @@ -70,16 +72,17 @@ The meeting currently takes place on Thursdays at 10am Boston time ## Team membership Membership in the Rust team is typically offered when someone has been -making significant contributions to the compiler for some time. -Membership is both a recognition but also an obligation: +making significant contributions to the compiler for some +time. Membership is both a recognition but also an obligation: compiler team members are generally expected to help with upkeep as well as doing reviews and other work. If you are interested in becoming a compiler team member, the first -thing to do is to start fixing some bugs, or get involved in a working group. -One good way to find bugs is to look for +thing to do is to start fixing some bugs, or get involved in a working +group. One good way to find bugs is to look for [open issues tagged with E-easy](https://github.com/rust-lang/rust/issues?q=is%3Aopen+is%3Aissue+label%3AE-easy) -or [E-mentor](https://github.com/rust-lang/rust/issues?q=is%3Aopen+is%3Aissue+label%3AE-mentor). +or +[E-mentor](https://github.com/rust-lang/rust/issues?q=is%3Aopen+is%3Aissue+label%3AE-mentor). You can also dig through the graveyard of PRs that were [closed due to inactivity](https://github.com/rust-lang/rust/pulls?q=is%3Apr+label%3AS-inactive), @@ -89,17 +92,18 @@ for which the original author didn't have time. ### r+ rights -Once you have made a number of individual PRs to rustc, we will often offer r+ privileges. -This means that you have the right to instruct -"bors" (the robot that manages which PRs get landed into rustc) to merge a PR +Once you have made a number of individual PRs to rustc, we will often +offer r+ privileges. This means that you have the right to instruct +"bors" (the robot that manages which PRs get landed into rustc) to +merge a PR ([here are some instructions for how to talk to bors][bors-guide]). [bors-guide]: https://bors.rust-lang.org/ The guidelines for reviewers are as follows: -- You are always welcome to review any PR, regardless of who it is assigned to. - However, do not r+ PRs unless: +- You are always welcome to review any PR, regardless of who it is + assigned to. However, do not r+ PRs unless: - You are confident in that part of the code. - You are confident that nobody else wants to review it first. - For example, sometimes people will express a desire to review a @@ -115,16 +119,18 @@ The guidelines for reviewers are as follows: Once you have r+ rights, you can also be added to the [reviewer rotation]. [triagebot] is the bot that [automatically assigns] incoming PRs to reviewers. -If you are added, you will be randomly selected to review PRs. -If you find you are assigned a PR that you don't feel comfortable +If you are added, you will be randomly selected to review +PRs. If you find you are assigned a PR that you don't feel comfortable reviewing, you can also leave a comment like `r? @so-and-so` to assign to someone else — if you don't know who to request, just write `r? -@nikomatsakis for reassignment` and @nikomatsakis will pick someone for you. +@nikomatsakis for reassignment` and @nikomatsakis will pick someone +for you. [reviewer rotation]: https://github.com/rust-lang/rust/blob/36285c5de8915ecc00d91ae0baa79a87ed5858d5/triagebot.toml#L528-L577 [triagebot]: https://github.com/rust-lang/triagebot/ [automatically assigns]: https://forge.rust-lang.org/triagebot/pr-assignment.html -Getting on the reviewer rotation is much appreciated as it lowers the review burden for all of us! -However, if you don't have time to give -people timely feedback on their PRs, it may be better that you don't get on the list. +Getting on the reviewer rotation is much appreciated as it lowers the +review burden for all of us! However, if you don't have time to give +people timely feedback on their PRs, it may be better that you don't +get on the list. diff --git a/src/doc/rustc-dev-guide/src/const-eval.md b/src/doc/rustc-dev-guide/src/const-eval.md index a3fee034ec6ed..ca6a35a5e97eb 100644 --- a/src/doc/rustc-dev-guide/src/const-eval.md +++ b/src/doc/rustc-dev-guide/src/const-eval.md @@ -35,7 +35,7 @@ They're the wrappers of the `const_eval` query. Statics are special; all other functions do not represent statics correctly and have thus assertions preventing their use on statics. -The `const_eval_*` functions use a [`ParamEnv`](./typing-parameter-envs.md) of environment +The `const_eval_*` functions use a [`ParamEnv`](./typing_parameter_envs.html) of environment in which the constant is evaluated (e.g. the function within which the constant is used) and a [`GlobalId`]. The `GlobalId` is made up of an `Instance` referring to a constant or static or of an `Instance` of a function and an index into the function's `Promoted` table. diff --git a/src/doc/rustc-dev-guide/src/contributing.md b/src/doc/rustc-dev-guide/src/contributing.md index 83f4253a6a107..46d0dc23394a2 100644 --- a/src/doc/rustc-dev-guide/src/contributing.md +++ b/src/doc/rustc-dev-guide/src/contributing.md @@ -60,7 +60,7 @@ See [The Rust Book] for more details on Rust’s train release model. This is the only channel where unstable features are intended to be used, which happens via opt-in feature gates. -See [this chapter on implementing new features](./implementing-new-features.md) for more +See [this chapter on implementing new features](./implementing_new_features.md) for more information. [The Rust Book]: https://doc.rust-lang.org/book/appendix-07-nightly-rust.html diff --git a/src/doc/rustc-dev-guide/src/debuginfo/lldb-visualizers.md b/src/doc/rustc-dev-guide/src/debuginfo/lldb-visualizers.md index 83e2b0d5794e8..40ab9dce375c9 100644 --- a/src/doc/rustc-dev-guide/src/debuginfo/lldb-visualizers.md +++ b/src/doc/rustc-dev-guide/src/debuginfo/lldb-visualizers.md @@ -1,6 +1,6 @@ # LLDB - Python Providers -> NOTE: LLDB's C++<->Python FFI expects a version of Python designated at the time LLDB was +> NOTE: LLDB's C++<->Python FFI expects a version of python designated at the time LLDB was >compiled. LLDB is careful to correspond this version to the minimum in typical Linux and macOS >distributions, but on Windows there is no easy solution. If you receive an import error regarding >`_lldb` not existing, a mismatched Python version is likely the cause. @@ -11,15 +11,14 @@ [minimal_python_install]: https://discourse.llvm.org/t/a-minimal-python-install-for-lldb/88658 [issue_167001]: https://github.com/llvm/llvm-project/issues/167001 -> NOTE: As of Nov 2025, -> LLDB's minimum supported Python version is 3.8, with plans to update it to -> 3.9 or 3.10, depending on several outside factors. Scripts should ideally be written with only the -> features available in the minimum supported Python version. Please see [this discussion][mrpv] for -> more info. +> NOTE: Currently (Nov 2025), LLDB's minimum supported Python version is 3.8 with plans to update it to +>3.9 or 3.10 depending on several outside factors. Scripts should ideally be written with only the +>features available in the minimum supported Python version. Please see [this discussion][mrpv] for +>more info. [mrpv]: https://discourse.llvm.org/t/rfc-upgrading-llvm-s-minimum-required-python-version/88605/ -> NOTE: The path to LLDB's Python package can be located via the CLI command `lldb -P` +> NOTE: The path to LLDB's python package can be located via the CLI command `lldb -P` LLDB provides 3 mechanisms for customizing output: @@ -29,8 +28,7 @@ LLDB provides 3 mechanisms for customizing output: ## Formats -The official documentation is [here](https://lldb.llvm.org/use/variable.html#type-format). -In short, +The official documentation is [here](https://lldb.llvm.org/use/variable.html#type-format). In short, formats allow one to set the default print format for primitive types (e.g. print `25u8` as decimal `25`, hex `0x19`, or binary `00011001`). @@ -49,15 +47,13 @@ plugins and CLI. [sbvalue]: https://lldb.llvm.org/python_api/lldb.SBValue.html A Synthetic Provider is a Python class, written with a specific interface, that is associated with -one or more Rust types. -The Synthetic Provider wraps `SBValue` objects and LLDB will call our +one or more Rust types. The Synthetic Provider wraps `SBValue` objects and LLDB will call our class's functions when inspecting the variable. The wrapped value is still an `SBValue`, but when calling e.g. `SBValue.GetChildAtIndex`, it will -internally call `SyntheticProvider.get_child_at_index`. -You can check if a value has a synthetic -provider via `SBValue.IsSynthetic()`, and which synthetic it is via `SBValue.GetTypeSynthetic()`. -If you want to interact with the underlying non-synthetic value, you can call +internally call `SyntheticProvider.get_child_at_index`. You can check if a value has a synthetic +provider via `SBValue.IsSynthetic()`, and which synthetic it is via `SBValue.GetTypeSynthetic()`. If +you want to interact with the underlying non-synthetic value, you can call `SBValue.GetNonSyntheticValue()`. @@ -87,20 +83,18 @@ class SyntheticProvider: def get_value(self) -> SBValue: ... ``` -Below are explanations of the methods, their quirks, and how they should generally be used. -If a method overrides an `SBValue` method, that method will be listed. +Below are explanations of the methods, their quirks, and how they should generally be used. If a +method overrides an `SBValue` method, that method will be listed. ### `__init__` -This function is called once per object, and must store the `valobj` in the Python class so that it -is accessible elsewhere. -Very little else should be done here. +This function is called once per object, and must store the `valobj` in the python class so that it +is accessible elsewhere. Very little else should be done here. ### (optional) `update` -This function is called prior to LLDB interacting with a variable, but after `__init__`. -LLDB tracks whether `update` has already been called. -If it has been, and if it is not possible for the variable +This function is called prior to LLDB interacting with a variable, but after `__init__`. LLDB tracks +whether `update` has already been called. If it has been, and if it is not possible for the variable to have changed (e.g. inspecting the same variable a second time without stepping), it will omit the call to `update`. @@ -113,19 +107,15 @@ Typical operations include storing the heap pointer, length, capacity, and eleme determining an enum variable's variant, or checking which slots of a `HashMap` are occupied. The bool returned from this function is somewhat complicated, see: -[`update` caching](#update-caching) below for more info. -When in doubt, return `False`/`None`. -As of Nov 2025, -none of the visualizers return `True`, but that may change as the debug info +[`update` caching](#update-caching) below for more info. When in doubt, return `False`/`None`. +Currently (Nov 2025), none of the visualizers return `True`, but that may change as the debug info test suite is improved. #### `update` caching -LLDB attempts to cache values when possible, including child values. -This cache is effectively the +LLDB attempts to cache values when possible, including child values. This cache is effectively the number of child objects, and the addresses of the underlying debugee memory that the child object -represents. -By returning `True`, you indicate to LLDB that the number of children and the addresses +represents. By returning `True`, you indicate to LLDB that the number of children and the addresses of those children have not changed since the last time `update` was run, meaning it can reuse the cached children. @@ -133,23 +123,19 @@ cached children. information**. Returning `False` indicates that there have been changes, the cache will be flushed, and the -children will be fetched from scratch. -It is the safer option if you are unsure. +children will be fetched from scratch. It is the safer option if you are unsure. -The only relationship that matters is parent-to-child. -Grandchildren depend on the `update` function of their direct parent, not that of the grandparent. +The only relationship that matters is parent-to-child. Grandchildren depend on the `update` function +of their direct parent, not that of the grandparent. -It is important to view the child cache as pointers-to-memory. -For example, if a slice's `data_ptr` -value and `length` have not changed, returning `True` is appropriate. -Even if the slice is mutable +It is important to view the child cache as pointers-to-memory. For example, if a slice's `data_ptr` +value and `length` have not changed, returning `True` is appropriate. Even if the slice is mutable and elements of it are overwritten (e.g. `slice[0] = 15`), because the child cache consists of *pointers*, they will reflect the new data at that memory location. Conversely, if `data_ptr` has changed, that means it is pointing to a new location in memory, the -child pointers are invalid, and the cache must be flushed. -If the `length` has changed, we need to flush the cache to reflect the new number of children. -If `length` has changed but `data_ptr` has +child pointers are invalid, and the cache must be flushed. If the `length` has changed, we need to +flush the cache to reflect the new number of children. If `length` has changed but `data_ptr` has not, it is possible to store the old children in the `SyntheticProvider` itself (e.g. `list[SBValue]`) and dole those out rather than generating them from scratch, only creating new children if they do not already exist in the `SyntheticProvider`'s list. @@ -157,7 +143,7 @@ children if they do not already exist in the `SyntheticProvider`'s list. For further clarification, see [this discussion](https://discourse.llvm.org/t/when-is-it-safe-to-cache-syntheticprovider-update/88608) > NOTE: when testing the caching behavior, do not rely on LLDB's heuristic to persist variables when -> stepping. Instead, store the variable in a Python object (e.g. `v = lldb.frame.var("var_name")`), +> stepping. Instead, store the variable in a python object (e.g. `v = lldb.frame.var("var_name")`), > step forward, and then inspect the stored variable. ### (optional) `has_children` @@ -173,21 +159,19 @@ Often, this will be a one-liner of `return True`/`return False` or > Overrides `SBValue.GetNumChildren` -Returns the total number of children that LLDB should try to access when printing the type. -This number **does not** need to match to total number of synthetic children. +Returns the total number of children that LLDB should try to access when printing the type. This +number **does not** need to match to total number of synthetic children. The `max_children` argument can be returned if calculating the number of children can be expensive (e.g. linked list). If this is not a consideration, `max_children` can be omitted from the function signature. Additionally, fields can be intentionally "hidden" from LLDB while still being accessible to the -user. -For example, one might want a `vec![1, 2, 3]` to display only its elements, but still have the -`len` and `capacity` values accessible on request. -By returning `3` from `num_children`, one can +user. For example, one might want a `vec![1, 2, 3]` to display only its elements, but still have the +`len` and `capacity` values accessible on request. By returning `3` from `num_children`, one can restrict LLDB to only displaying `[1, 2, 3]`, while users can still directly access `v.len` and -`v.capacity`. -See: [Example Provider: Vec\](#example-provider-vect) to see an implementation of this. +`v.capacity`. See: [Example Provider: Vec\](#example-provider-vect) to see an implementation of +this. ### `get_child_index` @@ -195,14 +179,12 @@ See: [Example Provider: Vec\](#example-provider-vect) to see an implementati > > Affects `SBValue.GetChildMemberWithName` -Given a name, returns the index that the child should be accessed at. -It is expected that the return value of this function is passed directly to `get_child_at_index`. -As with `num_children`, the +Given a name, returns the index that the child should be accessed at. It is expected that the return +value of this function is passed directly to `get_child_at_index`. As with `num_children`, the values returned here *can* be arbitrary, so long as they are properly coordinated with `get_child_at_index`. -One special value is `$$dereference$$`. -Accounting for this pseudo-field will allow LLDB to use the +One special value is `$$dereference$$`. Accounting for this pseudo-field will allow LLDB to use the `SBValue` returned from `get_child_at_index` as the result of a dereference via LLDB's expression parser (e.g. `*val` and `val->field`) @@ -210,28 +192,24 @@ parser (e.g. `*val` and `val->field`) > Overrides `SBValue.GetChildAtIndex` -Given an index, returns a child `SBValue`. -Often these are generated via +Given an index, returns a child `SBValue`. Often these are generated via `SBValue.CreateValueFromAddress`, but less commonly `SBValue.CreateChildAtOffset`, -`SBValue.CreateValueFromExpression`, and `SBValue.CreateValueFromData`. -These functions can be a +`SBValue.CreateValueFromExpression`, and `SBValue.CreateValueFromData`. These functions can be a little finicky, so you may need to fiddle with them to get the output you want. -In some cases, `SBValue.Clone` is appropriate. -It creates a new child that is an exact copy of an existing child, but with a new name. -This is useful for cases like tuples, which have field names of +In some cases, `SBValue.Clone` is appropriate. It creates a new child that is an exact copy of an +existing child, but with a new name. This is useful for cases like tuples, which have field names of the style `__0`, `__1`, ... when we would prefer they were named `0`, `1`, ... -Small alterations can be made to the resulting child before it is returned. -This is useful for `&str`/`String`, where we would prefer if the children were displayed as +Small alterations can be made to the resulting child before it is returned. This is useful for +`&str`/`String`, where we would prefer if the children were displayed as `lldb.eFormatBytesWithASCII` rather than just as a decimal value. ### (optional) `get_type_name` > Overrides `SBValue.GetDisplayTypeName` -Overrides the displayed name of a type. -For a synthetic `SBValue` whose type name is overridden, the +Overrides the displayed name of a type. For a synthetic `SBValue` whose type name is overridden, the original type name can still be retrieved via `SBValue.GetTypeName()` and `SBValue.GetType().GetName()` @@ -250,52 +228,44 @@ access the generic parameters of the type. The `SBValue` returned is expected to be a primitive type or pointer, and is treated as the value of the variable in expressions. -> IMPORTANT: The `SBValue` returned **must be stored in the `SyntheticProvider`**. -> As of Nov 2025, -> there is a bug where if the `SBValue` is acquired within `get_value` and not stored -> anywhere, Python will segfault when LLDB attempts to access the value. +> IMPORTANT: The `SBValue` returned **must be stored in the `SyntheticProvider`**. There is +>currently (Nov 2025) a bug where if the `SBValue` is acquired within `get_value` and not stored +>anywhere, Python will segfault when LLDB attempts to access the value. ## Summary Providers -Summary providers are Python functions of the following form: +Summary providers are python functions of the following form: ```python def SummaryProvider(valobj: SBValue, _lldb_internal) -> str: ... ``` -Where the returned string is passed verbatim to the user. -If the returned value isn't a string, it +Where the returned string is passed verbatim to the user. If the returned value isn't a string, it is naively convered to a string (e.g. `return None` prints `"None"`, not an empty string). If the `SBValue` passed in is of a type that has a Synthetic Provider, `valobj.IsSynthetic()` will -return `True`, and the synthetic's corresponding functions will be used. -If this is undesirable, the original value can be retrieved via `valobj.GetNonSyntheticValue()`. -This can be helpful in cases +return `True`, and the synthetic's corresponding functions will be used. If this is undesirable, the +original value can be retrieved via `valobj.GetNonSyntheticValue()`. This can be helpful in cases like `String`, where individually calling `GetChildAtIndex` in a loop is much slower than accessing the heap pointer, reading the whole byte array directly from the debugee's memory, and using Python's `bytes.decode()`. ### Instance Summaries -Regular `SummaryProvider` functions take an opaque `SBValue`. -That `SBValue` will reflect the type's +Regular `SummaryProvider` functions take an opaque `SBValue`. That `SBValue` will reflect the type's `SyntheticProvider` if one exists, but we cannot access the `SyntheticProvider` instance itself, or -any of its internal implementation details. -This is deterimental in cases where we need some of -those internal details to help complete the summary. -As of Nov 2025, in the synthetic we just +any of its internal implementation details. This is deterimental in cases where we need some of +those internal details to help complete the summary. Currently (Nov 2025), in the synthetic we just run the non-synthetic value through the synthetic provider (`synth = SyntheticProvider(valobj.GetNonSyntheticValue(), _dict)`), but this is obviously suboptimal and there are plans to use the method outlined below. -Instead, we can leverage the Python module's state to allow for instance summaries. -Prior art for +Instead, we can leverage the Python module's state to allow for instance summaries. Prior art for this technique exists in the [old CodeLLDB Rust visualizer scripts](https://github.com/vadimcn/codelldb/blob/cf9574977b80e29c6de2c44d12f1071a53a54caf/formatters/rust.py#L110). In short: every Synthetic Provider's `__init__` function stores a unique ID and a weak reference to -`self` in a global dictionary. -The Synthetic Provider class also implements a `get_summary` function. -The type's `SummaryProvider` is a function that looks up the unique ID in this dictionary, +`self` in a global dictionary. The Synthetic Provider class also implements a `get_summary` +function. The type's `SummaryProvider` is a function that looks up the unique ID in this dictionary, then calls a `get_summary` on the instance it retrieves. ```python @@ -323,11 +293,9 @@ def InstanceSummaryProvider(valobj: SBValue, _dict) -> str: return SYNTH_BY_ID[valobj.GetNonSyntheticValue().GetID()].get_summary() ``` -For example, one might use this for the Enum synthetic provider. -The summary would like to access +For example, one might use this for the Enum synthetic provider. The summary would like to access the variant name, but there isn't a convenient way to reflect this via the type name or child-values -of the synthetic. -By implementing an instance summary, we can retrieve the variant name via +of the synthetic. By implementing an instance summary, we can retrieve the variant name via `self.variant.GetTypeName()` and some string manipulation. # Writing Visualizer Scripts @@ -336,22 +304,18 @@ By implementing an instance summary, we can retrieve the variant name via >Visualizers must be written to account for both formats whenever possible. See: >[rust-codegen](./rust-codegen.md#dwarf-vs-pdb) for an overview of the differences -Scripts are injected into LLDB via the CLI command `command script import .py`. -Once +Scripts are injected into LLDB via the CLI command `command script import .py`. Once injected, classes and functions can be added to the synthetic/summary pool with `type synthetic add` -and `type summary add` respectively. -The summaries and synthetics can be associated with a -"category", which is typically named after the language the providers are intended for. -The category we use will be called `Rust`. +and `type summary add` respectively. The summaries and synthetics can be associated with a +"category", which is typically named after the language the providers are intended for. The category +we use will be called `Rust`. > TIP: all LLDB commands can be prefixed with `help` (e.g. `help type synthetic add`) for a brief description, list of arguments, and examples. -As of Nov 2025, -we use `command source ...`, which executes a series of CLI commands from the +Currently (Nov 2025) we use `command source ...`, which executes a series of CLI commands from the file [`lldb_commands`](https://github.com/rust-lang/rust/blob/main/src/etc/lldb_commands) to add -providers. -This file is somewhat unwieldy, and will soon be supplanted by the Python API equivalent +providers. This file is somewhat unwieldy, and will soon be supplanted by the Python API equivalent outlined below. ## `__lldb_init_module` @@ -363,20 +327,16 @@ def __lldb_init_module(debugger: SBDebugger, _lldb_internal) -> None: ... ``` This function is called at the end of `command script import ...`, but before control returns back -to the CLI. -It allows the script to initialize its own state. - -Crucially, it is passed a reference to the debugger itself. -This allows us to create the `Rust` category and add providers to it. -It can also allow us to conditionally change which providers we -use depending on what version of LLDB the script detects. -This is vital for backwards compatibility +to the CLI. It allows the script to initialize its own state. + +Crucially, it is passed a reference to the debugger itself. This allows us to create the `Rust` +category and add providers to it. It can also allow us to conditionally change which providers we +use depending on what version of LLDB the script detects. This is vital for backwards compatibility once we begin using recognizer functions, as recognizers were added in lldb 19.0. ## Visualizer Resolution -The order that visualizers resolve in is listed [here][formatters_101]. -In short: +The order that visualizers resolve in is listed [here][formatters_101]. In short: [formatters_101]: https://lldb.llvm.org/use/variable.html#finding-formatters-101 @@ -387,17 +347,14 @@ provider), use that * If none of the above work, iterate through the regex type matchers Within each of those steps, **iteration is done backwards** to allow new commands to "override" old -commands. -This is important for cases like `Box` vs `Box`, were we want a specialized +commands. This is important for cases like `Box` vs `Box`, were we want a specialized synthetic for the former, but a more generalized synthetic for the latter. ## Minutiae LLDB's API is very powerful, but there are some "gotchas" and unintuitive behavior, some of which -will be outlined below. -The Python implementation can be viewed at the path returned by the CLI -command `lldb -P` in `lldb\__init__.py`. -In addition to the +will be outlined below. The python implementation can be viewed at the path returned by the CLI +command `lldb -P` in `lldb\__init__.py`. In addition to the [examples in the lldb repo][synth_examples], there are also [C++ visualizers][plugin_cpp] that can be used as a reference (e.g. [LibCxxVector, the equivalent to `Vec`][cxx_vector]). While C++'s visualizers are written in C++ and have access to LLDB's internals, the API and general practices @@ -413,22 +370,19 @@ are very similar. children of the pointed-to-object are its own children. * The non-function fields are typically [`property()`][property] fields that point directly to the function anyway (e.g. `SBValue.type = property(GetType, None)`). Accessing through these shorthands -is a bit slower to access than just calling the function directly, so they should be avoided. -Some +is a bit slower to access than just calling the function directly, so they should be avoided. Some of the properties return special objects with special properties (e.g. `SBValue.member` returns an -object that acts like `dict[str, SBValue]` to access children). -Internally, many of these special +object that acts like `dict[str, SBValue]` to access children). Internally, many of these special objects just allocate a new class instance and call the function on the `SBValue` anyway, resulting in additional performance loss (e.g. `SBValue.member` internally just implements `__getitem__` which is the one-liner `return self.valobj.GetChildMemberWithName(name)`) * `SBValue.GetID` returns a unique `int` for each value for the duration of the debug session. -Synthetic `SBValue`'s have a different ID than their underlying `SBValue`. -The underlying ID can be retrieved via `SBValue.GetNonSyntheticValue().GetID()`. +Synthetic `SBValue`'s have a different ID than their underlying `SBValue`. The underlying ID can be +retrieved via `SBValue.GetNonSyntheticValue().GetID()`. * When manually calculating an address, `SBValue.GetValueAsAddress` should be preferred over `SBValue.GetValueAsUnsigned` due to [target-specific behavior][get_address] * Getting a string representation of an `SBValue` can be tricky because `GetSummary` requires a -summary provider and `GetValue` requires the type be representable by a primitive. -In almost all +summary provider and `GetValue` requires the type be representable by a primitive. In almost all cases where neither of those conditions are met, the type is a user defined struct that can be passed through `StructSummaryProvider`. @@ -439,14 +393,12 @@ passed through `StructSummaryProvider`. * "Aggregate type" means a non-primitive struct/class/union * "Template" is equivalent to "Generic" -* Types can be looked up by their name via `SBTarget.FindFirstType(type_name)`. - `SBTarget` can be acquired via `SBValue.GetTarget` +* Types can be looked up by their name via `SBTarget.FindFirstType(type_name)`. `SBTarget` can be +acquired via `SBValue.GetTarget` * `SBType.template_args` returns `None` instead of an empty list if the type has no generics * It is sometimes necessary to transform a type into the type you want via functions like -`SBType.GetArrayType` and `SBType.GetPointerType`. -These functions cannot fail. -They ask the underlying LLDB `TypeSystem` plugin for the type, bypassing the debug info completely. -Even if the +`SBType.GetArrayType` and `SBType.GetPointerType`. These functions cannot fail. They ask the +underlying LLDB `TypeSystem` plugin for the type, bypassing the debug info completely. Even if the type does not exist in the debug info at all, these functions can create the appropriate type. * `SBType.GetCanonicalType` is effectively `SBType.GetTypedefedType` + `SBType.GetUnqualifiedType`. Unlike `SBType.GetTypedefedType`, it will always return a valid `SBType` regardless of whether or @@ -459,13 +411,11 @@ always possible since the static fields are otherwise completely inaccessible. ## SyntheticProvider -We start with the typical prelude, using `__slots__` since we have known fields. -In addition to the +We start with the typical prelude, using `__slots__` since we have known fields. In addition to the object itself, we also need to store the type of the elements because `Vec`'s heap pointer is a -`*mut u8`, not a `*mut T`. -Rust is a statically typed language, so the type of `T` will never change. -That means we can store it during initialization. -The heap pointer, length, and capacity *can* change though, and thus are default initialized here. +`*mut u8`, not a `*mut T`. Rust is a statically typed language, so the type of `T` will never +change. That means we can store it during initialization. The heap pointer, length, and capacity +*can* change though, and thus are default initialized here. ```python import lldb @@ -502,15 +452,12 @@ class VecSyntheticProvider: For the implementation of `get_template_args` and `resolve_msvc_template_arg`, please see: [`lldb_providers.py`](https://github.com/rust-lang/rust/blob/main/src/etc/lldb_providers.py#L136). -Next, the update function. -We check if the pointer or length have changed. -We can ommit checking the -capacity, as the number of children will remain the same unless `len` changes. -If changing the capacity resulted in a reallocation, `data_ptr`'s address would be different. +Next, the update function. We check if the pointer or length have changed. We can ommit checking the +capacity, as the number of children will remain the same unless `len` changes. If changing the +capacity resulted in a reallocation, `data_ptr`'s address would be different. If `data_ptr` and `length` haven't changed, we can take advantage of LLDB's caching and return -early. -If they have changed, we store the new values and tell LLDB to flush the cache. +early. If they have changed, we store the new values and tell LLDB to flush the cache. ```python def update(self): @@ -543,10 +490,9 @@ def num_children(self) -> int: When accessing elements, we expect values of the format `[0]`, `[1]`, etc. to mimic indexing. Additionally, we still want the user to be able to quickly access the length and capacity, as they -can be very useful when debugging. -We assign these values `u32::MAX - 1` and `u32::MAX - 2` -respectively, as we can almost surely guarantee that they will not overlap with element values. -Note that we can account for both the full and shorthand `capacity` name. +can be very useful when debugging. We assign these values `u32::MAX - 1` and `u32::MAX - 2` +respectively, as we can almost surely guarantee that they will not overlap with element values. Note +that we can account for both the full and shorthand `capacity` name. ```python def get_child_index(self, name: str) -> int: @@ -581,19 +527,17 @@ def get_child_at_index(self, index: int) -> SBValue: return self.valobj.CreateValueFromAddress(f"[{index}]", addr, self.element_type) ``` -For the type's display name, we can strip the path qualifier. -User defined types named `Vec` will end up fully qualified, so there shouldn't be any ambiguity. -We can also remove the allocator generic, as it's very very rarely useful. -We use `get_template_args` instead of `self.element_type.GetName()` for 3 reasons: +For the type's display name, we can strip the path qualifier. User defined types named +`Vec` will end up fully qualified, so there shouldn't be any ambiguity. We can also remove the +allocator generic, as it's very very rarely useful. We use `get_template_args` instead of +`self.element_type.GetName()` for 3 reasons: 1. If we fail to resolve the element type for any reason, `self.valobj`'s type name can still let the user know what the real type of the element is 2. Type names are not subject to the limitations of DWARF and PDB nodes, so the template type in the name will reflect things like `*const`/`*mut` and `&`/`&mut`. -3. As of Nov 2025, -we don't normalize MSVC type names, but once we do, we will need to work with the -string-names of types anyway. -It's also much easier to cache a string-to-string conversion compared +3. We do not currently (Nov 2025) normalize MSVC type names, but once we do, we will need to work with the +string-names of types anyway. It's also much easier to cache a string-to-string conversion compared to an `SBType`-to-string conversion. ```python @@ -606,14 +550,11 @@ the `get_value` function. ## SummaryProvider -The summary provider is very simple thanks to our synthetic provider. -The only real hiccup is that -`GetSummary` only returns a value if the object's type has a `SummaryProvider`. -If it doesn't, it will return an empty string which is not ideal. -In a full set of visualizer scripts, we can ensure +The summary provider is very simple thanks to our synthetic provider. The only real hiccup is that +`GetSummary` only returns a value if the object's type has a `SummaryProvider`. If it doesn't, it +will return an empty string which is not ideal. In a full set of visualizer scripts, we can ensure that every type that doesn't have a `GetSummary()` or a `GetValue()` is a struct, and then delegate -to a generic `StructSummaryProvider`. -For this demonstration, I will gloss over that detail. +to a generic `StructSummaryProvider`. For this demonstration, I will gloss over that detail. ```python def VecSummaryProvider(valobj: SBValue, _lldb_internal) -> str: @@ -718,4 +659,4 @@ We can also confirm that the "hidden" length and capacity are still accessible: (unsigned long long) vec_v.capacity = 5 (lldb) v vec_v.cap (unsigned long long) vec_v.cap = 5 -``` +``` \ No newline at end of file diff --git a/src/doc/rustc-dev-guide/src/early_late_parameters.md b/src/doc/rustc-dev-guide/src/early_late_parameters.md new file mode 100644 index 0000000000000..c472bdc2c4812 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/early_late_parameters.md @@ -0,0 +1,423 @@ + +# Early vs Late bound parameters + +> **NOTE**: This chapter largely talks about early/late bound as being solely relevant when discussing function item types/function definitions. This is potentially not completely true, async blocks and closures should likely be discussed somewhat in this chapter. + +## What does it mean to be "early" bound or "late" bound + +Every function definition has a corresponding ZST that implements the `Fn*` traits known as a [function item type][function_item_type]. This part of the chapter will talk a little bit about the "desugaring" of function item types as it is useful context for explaining the difference between early bound and late bound generic parameters. + +Let's start with a very trivial example involving no generic parameters: + +```rust +fn foo(a: String) -> u8 { + # 1 + /* snip */ +} +``` + +If we explicitly wrote out the definitions for the function item type corresponding to `foo` and its associated `Fn` impl it would look something like this: +```rust,ignore +struct FooFnItem; + +impl Fn<(String,)> for FooFnItem { + type Output = u8; + /* fn call(&self, ...) -> ... { ... } */ +} +``` + +The builtin impls for the `FnMut`/`FnOnce` traits as well as the impls for `Copy` and `Clone` were omitted for brevity reasons (although these traits *are* implemented for function item types). + +A slightly more complicated example would involve introducing generic parameters to the function: +```rust +fn foo(a: T) -> T { + # a + /* snip */ +} +``` +Writing out the definitions would look something like this: +```rust,ignore +struct FooFnItem(PhantomData T>); + +impl Fn<(T,)> for FooFnItem { + type Output = T; + /* fn call(&self, ...) -> ... { ... } */ +} +``` + +Note that the function item type `FooFnItem` is generic over some type parameter `T` as defined on the function `foo`. However, not all generic parameters defined on functions are also defined on the function item type as demonstrated here: +```rust +fn foo<'a, T: Sized>(a: &'a T) -> &'a T { + # a + /* snip */ +} +``` +With its "desugared" form looking like so: +```rust,ignore +struct FooFnItem(PhantomData fn(&'a T) -> &'a T>); + +impl<'a, T: Sized> Fn<(&'a T,)> for FooFnItem { + type Output = &'a T; + /* fn call(&self, ...) -> ... { ... } */ +} +``` + +The lifetime parameter `'a` from the function `foo` is not present on the function item type `FooFnItem` and is instead introduced on the builtin impl solely for use in representing the argument types. + +Generic parameters not all being defined on the function item type means that there are two steps where generic arguments are provided when calling a function. +1. Naming the function (e.g. `let a = foo;`) the arguments for `FooFnItem` are provided. +2. Calling the function (e.g. `a(&10);`) any parameters defined on the builtin impl are provided. + +This two-step system is where the early vs late naming scheme comes from, early bound parameters are provided in the *earliest* step (naming the function), whereas late bound parameters are provided in the *latest* step (calling the function). + +Looking at the desugaring from the previous example we can tell that `T` is an early bound type parameter and `'a` is a late bound lifetime parameter as `T` is present on the function item type but `'a` is not. See this example of calling `foo` annotated with where each generic parameter has an argument provided: +```rust +fn foo<'a, T: Sized>(a: &'a T) -> &'a T { + # a + /* snip */ +} + +// Here we provide a type argument `String` to the +// type parameter `T` on the function item type +let my_func = foo::; + +// Here (implicitly) a lifetime argument is provided +// to the lifetime parameter `'a` on the builtin impl. +my_func(&String::new()); +``` + +[function_item_type]: https://doc.rust-lang.org/reference/types/function-item.html + +## Differences between early and late bound parameters + +### Higher ranked function pointers and trait bounds + +A generic parameter being late bound allows for more flexible usage of the function item. For example if we have some function `foo` with an early bound lifetime parameter and some function `bar` with a late bound lifetime parameter `'a` we would have the following builtin `Fn` impls: +```rust,ignore +impl<'a> Fn<(&'a String,)> for FooFnItem<'a> { /* ... */ } +impl<'a> Fn<(&'a String,)> for BarFnItem { /* ... */ } +``` + +The `bar` function has a strictly more flexible signature as the function item type can be called with a borrow with *any* lifetime, whereas the `foo` function item type would only be callable with a borrow with the same lifetime on the function item type. We can show this by simply trying to call `foo`'s function item type multiple times with different lifetimes: + +```rust +// The `'a: 'a` bound forces this lifetime to be early bound. +fn foo<'a: 'a>(b: &'a String) -> &'a String { b } +fn bar<'a>(b: &'a String) -> &'a String { b } + +// Early bound generic parameters are instantiated here when naming +// the function `foo`. As `'a` is early bound an argument is provided. +let f = foo::<'_>; + +// Both function arguments are required to have the same lifetime as +// the lifetime parameter being early bound means that `f` is only +// callable for one specific lifetime. +// +// As we call this with borrows of different lifetimes, the borrow checker +// will error here. +f(&String::new()); +f(&String::new()); +``` + +In this example we call `foo`'s function item type twice, each time with a borrow of a temporary. These two borrows could not possible have lifetimes that overlap as the temporaries are only alive during the function call, not after. The lifetime parameter on `foo` being early bound requires all callers of `f` to provide a borrow with the same lifetime, as this is not possible the borrow checker errors. + +If the lifetime parameter on `foo` was late bound this would be able to compile as each caller could provide a different lifetime argument for its borrow. See the following example which demonstrates this using the `bar` function defined above: + +```rust +# fn foo<'a: 'a>(b: &'a String) -> &'a String { b } +# fn bar<'a>(b: &'a String) -> &'a String { b } +# +// Early bound parameters are instantiated here, however as `'a` is +// late bound it is not provided here. +let b = bar; + +// Late bound parameters are instantiated separately at each call site +// allowing different lifetimes to be used by each caller. +b(&String::new()); +b(&String::new()); +``` + +This is reflected in the ability to coerce function item types to higher ranked function pointers and prove higher ranked `Fn` trait bounds. We can demonstrate this with the following example: +```rust +// The `'a: 'a` bound forces this lifetime to be early bound. +fn foo<'a: 'a>(b: &'a String) -> &'a String { b } +fn bar<'a>(b: &'a String) -> &'a String { b } + +fn accepts_hr_fn(_: impl for<'a> Fn(&'a String) -> &'a String) {} + +fn higher_ranked_trait_bound() { + let bar_fn_item = bar; + accepts_hr_fn(bar_fn_item); + + let foo_fn_item = foo::<'_>; + // errors + accepts_hr_fn(foo_fn_item); +} + +fn higher_ranked_fn_ptr() { + let bar_fn_item = bar; + let fn_ptr: for<'a> fn(&'a String) -> &'a String = bar_fn_item; + + let foo_fn_item = foo::<'_>; + // errors + let fn_ptr: for<'a> fn(&'a String) -> &'a String = foo_fn_item; +} +``` + +In both of these cases the borrow checker errors as it does not consider `foo_fn_item` to be callable with a borrow of any lifetime. This is due to the fact that the lifetime parameter on `foo` is early bound, causing `foo_fn_item` to have a type of `FooFnItem<'_>` which (as demonstrated by the desugared `Fn` impl) is only callable with a borrow of the same lifetime `'_`. + +### Turbofishing in the presence of late bound parameters + +As mentioned previously, the distinction between early and late bound parameters means that there are two places where generic parameters are instantiated: +- When naming a function (early) +- When calling a function (late) + +There is currently no syntax for explicitly specifying generic arguments for late bound parameters during the call step; generic arguments can only be specified for early bound parameters when naming a function. +The syntax `foo::<'static>();`, despite being part of a function call, behaves as `(foo::<'static>)();` and instantiates the early bound generic parameters on the function item type. + +See the following example: +```rust +fn foo<'a>(b: &'a u32) -> &'a u32 { b } + +let f /* : FooFnItem */ = foo::<'static>; +``` + +The above example errors as the lifetime parameter `'a` is late bound and so cannot be instantiated as part of the "naming a function" step. If we make the lifetime parameter early bound we will see this code start to compile: +```rust +fn foo<'a: 'a>(b: &'a u32) -> &'a u32 { b } + +let f /* : FooFnItem<'static> */ = foo::<'static>; +``` + +What the current implementation of the compiler aims to do is error when specifying lifetime arguments to a function that has both early *and* late bound lifetime parameters. In practice, due to excessive breakage, some cases are actually only future compatibility warnings ([#42868](https://github.com/rust-lang/rust/issues/42868)): +- When the amount of lifetime arguments is the same as the number of early bound lifetime parameters a FCW is emitted instead of an error +- An error is always downgraded to a FCW when using method call syntax + +To demonstrate this we can write out the different kinds of functions and give them both a late and early bound lifetime: +```rust,ignore +fn free_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} + +struct Foo; + +trait Trait: Sized { + fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()); + fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()); +} + +impl Trait for Foo { + fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} + fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +} + +impl Foo { + fn inherent_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} + fn inherent_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +} +``` + +Then, for the first case, we can call each function with a single lifetime argument (corresponding to the one early bound lifetime parameter) and note that it only results in a FCW rather than a hard error. +```rust +#![deny(late_bound_lifetime_arguments)] + +# fn free_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# +# struct Foo; +# +# trait Trait: Sized { +# fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()); +# fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()); +# } +# +# impl Trait for Foo { +# fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} +# fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# } +# +# impl Foo { +# fn inherent_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} +# fn inherent_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# } +# +// Specifying as many arguments as there are early +// bound parameters is always a future compat warning +Foo.trait_method::<'static>(&(), &()); +Foo::trait_method::<'static>(Foo, &(), &()); +Foo::trait_function::<'static>(&(), &()); +Foo.inherent_method::<'static>(&(), &()); +Foo::inherent_function::<'static>(&(), &()); +free_function::<'static>(&(), &()); +``` + +For the second case we call each function with more lifetime arguments than there are lifetime parameters (be it early or late bound) and note that method calls result in a FCW as opposed to the free/associated functions which result in a hard error: +```rust +# fn free_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# +# struct Foo; +# +# trait Trait: Sized { +# fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()); +# fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()); +# } +# +# impl Trait for Foo { +# fn trait_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} +# fn trait_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# } +# +# impl Foo { +# fn inherent_method<'a: 'a, 'b>(self, _: &'a (), _: &'b ()) {} +# fn inherent_function<'a: 'a, 'b>(_: &'a (), _: &'b ()) {} +# } +# +// Specifying more arguments than there are early +// bound parameters is a future compat warning when +// using method call syntax. +Foo.trait_method::<'static, 'static, 'static>(&(), &()); +Foo.inherent_method::<'static, 'static, 'static>(&(), &()); +// However, it is a hard error when not using method call syntax. +Foo::trait_method::<'static, 'static, 'static>(Foo, &(), &()); +Foo::trait_function::<'static, 'static, 'static>(&(), &()); +Foo::inherent_function::<'static, 'static, 'static>(&(), &()); +free_function::<'static, 'static, 'static>(&(), &()); +``` + +Even when specifying enough lifetime arguments for both the late and early bound lifetime parameter, these arguments are not actually used to annotate the lifetime provided to late bound parameters. We can demonstrate this by turbofishing `'static` to a function while providing a non-static borrow: +```rust +struct Foo; + +impl Foo { + fn inherent_method<'a: 'a, 'b>(self, _: &'a (), _: &'b String ) {} +} + +Foo.inherent_method::<'static, 'static>(&(), &String::new()); +``` + +This compiles even though the `&String::new()` function argument does not have a `'static` lifetime, this is because "extra" lifetime arguments are discarded rather than taken into account for late bound parameters when actually calling the function. + +### Liveness of types with late bound parameters + +When checking type outlives bounds involving function item types we take into account early bound parameters. For example: + +```rust +fn foo(_: T) {} + +fn requires_static(_: T) {} + +fn bar() { + let f /* : FooFnItem */ = foo::; + requires_static(f); +} +``` + +As the type parameter `T` is early bound, the desugaring of the function item type for `foo` would look something like `struct FooFnItem`. Then in order for `FooFnItem: 'static` to hold we must also require `T: 'static` to hold as otherwise we would wind up with soundness bugs. + +Unfortunately, due to bugs in the compiler, we do not take into account early bound *lifetimes*, which is the cause of the open soundness bug [#84366](https://github.com/rust-lang/rust/issues/84366). This means that it's impossible to demonstrate a "difference" between early/late bound parameters for liveness/type outlives bounds as the only kind of generic parameters that are able to be late bound are lifetimes which are handled incorrectly. + +Regardless, in theory the code example below *should* demonstrate such a difference once [#84366](https://github.com/rust-lang/rust/issues/84366) is fixed: +```rust +fn early_bound<'a: 'a>(_: &'a String) {} +fn late_bound<'a>(_: &'a String) {} + +fn requires_static(_: T) {} + +fn bar<'b>() { + let e = early_bound::<'b>; + // this *should* error but does not + requires_static(e); + + let l = late_bound; + // this correctly does not error + requires_static(l); +} +``` + +## Requirements for a parameter to be late bound + +### Must be a lifetime parameter + +Type and Const parameters are not able to be late bound as we do not have a way to support types such as `dyn for Fn(Box)` or `for fn(Box)`. Calling such types requires being able to monomorphize the underlying function which is not possible with indirection through dynamic dispatch. + +### Must not be used in a where clause + +Currently when a generic parameter is used in a where clause it must be early bound. For example: +```rust +# trait Trait<'a> {} +fn foo<'a, T: Trait<'a>>(_: &'a String, _: T) {} +``` + +In this example the lifetime parameter `'a` is considered to be early bound as it appears in the where clause `T: Trait<'a>`. This is true even for "trivial" where clauses such as `'a: 'a` or those implied by wellformedness of function arguments, for example: +```rust +fn foo<'a: 'a>(_: &'a String) {} +fn bar<'a, T: 'a>(_: &'a T) {} +``` + +In both of these functions the lifetime parameter `'a` would be considered to be early bound even though the where clauses they are used in arguably do not actually impose any constraints on the caller. + +The reason for this restriction is a combination of two things: +- We cannot prove bounds on late bound parameters until they have been instantiated +- Function pointers and trait objects do not have a way to represent yet to be proven where clauses from the underlying function + +Take the following example: +```rust +trait Trait<'a> {} +fn foo<'a, T: Trait<'a>>(_: &'a T) {} + +let f = foo::; +let f = f as for<'a> fn(&'a String); +f(&String::new()); +``` + +At *some point* during type checking an error should be emitted for this code as `String` does not implement `Trait` for any lifetime. + +If the lifetime `'a` were late bound then this becomes difficult to check. When naming `foo` we do not know what lifetime should be used as part of the `T: Trait<'a>` trait bound as it has not yet been instantiated. When coercing the function item type to a function pointer we have no way of tracking the `String: Trait<'a>` trait bound that must be proven when calling the function. + +If the lifetime `'a` is early bound (which it is in the current implementation in rustc), then the trait bound can be checked when naming the function `foo`. Requiring parameters used in where clauses to be early bound gives a natural place to check where clauses defined on the function. + +Finally, we do not require lifetimes to be early bound if they are used in *implied bounds*, for example: +```rust +fn foo<'a, T>(_: &'a T) {} + +let f = foo; +f(&String::new()); +f(&String::new()); +``` + +This code compiles, demonstrating that the lifetime parameter is late bound, even though `'a` is used in the type `&'a T` which implicitly requires `T: 'a` to hold. Implied bounds can be treated specially as any types introducing implied bounds are in the signature of the function pointer type, which means that when calling the function we know to prove `T: 'a`. + +### Must be constrained by argument types + +It is important that builtin impls on function item types do not wind up with unconstrained generic parameters as this can lead to unsoundness. This is the same kind of restriction as applies to user written impls, for example the following code results in an error: +```rust +trait Trait { + type Assoc; +} + +impl<'a> Trait for u8 { + type Assoc = &'a String; +} +``` + +The analogous example for builtin impls on function items would be the following: +```rust,ignore +fn foo<'a>() -> &'a String { /* ... */ } +``` +If the lifetime parameter `'a` were to be late bound we would wind up with a builtin impl with an unconstrained lifetime, we can manually write out the desugaring for the function item type and its impls with `'a` being late bound to demonstrate this: +```rust,ignore +// NOTE: this is just for demonstration, in practice `'a` is early bound +struct FooFnItem; + +impl<'a> Fn<()> for FooFnItem { + type Output = &'a String; + /* fn call(...) -> ... { ... } */ +} +``` + +In order to avoid such a situation we consider `'a` to be early bound which causes the lifetime on the impl to be constrained by the self type: +```rust,ignore +struct FooFnItem<'a>(PhantomData &'a String>); + +impl<'a> Fn<()> for FooFnItem<'a> { + type Output = &'a String; + /* fn call(...) -> ... { ... } */ +} +``` diff --git a/src/doc/rustc-dev-guide/src/effects.md b/src/doc/rustc-dev-guide/src/effects.md index 732ba71531167..87b0103a7bc4b 100644 --- a/src/doc/rustc-dev-guide/src/effects.md +++ b/src/doc/rustc-dev-guide/src/effects.md @@ -1,4 +1,4 @@ -# Effects, const traits, and const condition checking +# Effects and const condition checking ## The `HostEffect` predicate @@ -154,18 +154,3 @@ be dropped at compile time. [old solver]: https://doc.rust-lang.org/nightly/nightly-rustc/src/rustc_trait_selection/traits/effects.rs.html [new trait solver]: https://doc.rust-lang.org/nightly/nightly-rustc/src/rustc_next_trait_solver/solve/effect_goals.rs.html - -## More on const traits - -To be expanded later. - -### The `#[rustc_non_const_trait_method]` attribute - -This is intended for internal (standard library) usage only. With this attribute -applied to a trait method, the compiler will not check the default body of this -method for ability to run in compile time. Users of the trait will also not be -allowed to use this trait method in const contexts. This attribute is primarily -used for constifying large traits such as `Iterator` without having to make all -its methods `const` at the same time. - -This attribute should not be present while stabilizing the trait as `const`. diff --git a/src/doc/rustc-dev-guide/src/feature-gates.md b/src/doc/rustc-dev-guide/src/feature-gates.md index d2a5173607144..9806f73c483c2 100644 --- a/src/doc/rustc-dev-guide/src/feature-gates.md +++ b/src/doc/rustc-dev-guide/src/feature-gates.md @@ -12,7 +12,7 @@ mechanism][libs-gate]. See ["Stability in code"][adding] in the "Implementing new features" section for instructions. -[adding]: ./implementing-new-features.md#stability-in-code +[adding]: ./implementing_new_features.md#stability-in-code ## Removing a feature gate @@ -80,5 +80,5 @@ for instructions. There are additional steps you will need to take beyond just updating the declaration! -["Stability in code"]: ./implementing-new-features.md#stability-in-code -["Updating the feature-gate listing"]: ./stabilization-guide.md#updating-the-feature-gate-listing +["Stability in code"]: ./implementing_new_features.md#stability-in-code +["Updating the feature-gate listing"]: ./stabilization_guide.md#updating-the-feature-gate-listing diff --git a/src/doc/rustc-dev-guide/src/generic_parameters_summary.md b/src/doc/rustc-dev-guide/src/generic_parameters_summary.md new file mode 100644 index 0000000000000..da38ba0455c2c --- /dev/null +++ b/src/doc/rustc-dev-guide/src/generic_parameters_summary.md @@ -0,0 +1,28 @@ +# Generic parameter definitions + +This chapter will discuss how rustc tracks what generic parameters are introduced. For example given some `struct Foo` how does rustc track that `Foo` defines some type parameter `T` (and no other generic parameters). + +This will *not* cover how we track generic parameters introduced via `for<'a>` syntax (e.g. in where clauses or `fn` types), which is covered elsewhere in the [chapter on `Binder`s ][ch_binders]. + +# `ty::Generics` + +The generic parameters introduced by an item are tracked by the [`ty::Generics`] struct. Sometimes items allow usage of generics defined on parent items, this is accomplished via the `ty::Generics` struct having an optional field to specify a parent item to inherit generic parameters of. For example given the following code: + +```rust,ignore +trait Trait { + fn foo(&self); +} +``` + +The `ty::Generics` used for `foo` would contain `[U]` and a parent of `Some(Trait)`. `Trait` would have a `ty::Generics` containing `[Self, T]` with a parent of `None`. + +The [`GenericParamDef`] struct is used to represent each individual generic parameter in a `ty::Generics` listing. The `GenericParamDef` struct contains information about the generic parameter, for example its name, defid, what kind of parameter it is (i.e. type, const, lifetime). + +`GenericParamDef` also contains a `u32` index representing what position the parameter is (starting from the outermost parent), this is the value used to represent usages of generic parameters (more on this in the [chapter on representing types][ch_representing_types]). + +Interestingly, `ty::Generics` does not currently contain _every_ generic parameter defined on an item. In the case of functions it only contains the _early bound_ parameters. + +[ch_representing_types]: ./ty.md +[`ty::Generics`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.Generics.html +[`GenericParamDef`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/generics/struct.GenericParamDef.html +[ch_binders]: ./ty_module/binders.md diff --git a/src/doc/rustc-dev-guide/src/git.md b/src/doc/rustc-dev-guide/src/git.md index c0b449e8fb287..abe72b29cb1e2 100644 --- a/src/doc/rustc-dev-guide/src/git.md +++ b/src/doc/rustc-dev-guide/src/git.md @@ -1,22 +1,20 @@ # Using Git -The Rust project uses [Git] to manage its source code. -In order to contribute, you'll need some familiarity with its features so that your changes +The Rust project uses [Git] to manage its source code. In order to +contribute, you'll need some familiarity with its features so that your changes can be incorporated into the compiler. [Git]: https://git-scm.com The goal of this page is to cover some of the more common questions and -problems new contributors face. -Although some Git basics will be covered here, +problems new contributors face. Although some Git basics will be covered here, if you find that this is still a little too fast for you, it might make sense to first read some introductions to Git, such as the Beginner and Getting -started sections of [this tutorial from Atlassian][atlassian-git]. -GitHub also provides [documentation] and [guides] for beginners, or you can consult the +started sections of [this tutorial from Atlassian][atlassian-git]. GitHub also +provides [documentation] and [guides] for beginners, or you can consult the more in depth [book from Git]. -This guide is incomplete. -If you run into trouble with git that this page doesn't help with, +This guide is incomplete. If you run into trouble with git that this page doesn't help with, please [open an issue] so we can document how to fix it. [open an issue]: https://github.com/rust-lang/rustc-dev-guide/issues/new @@ -28,15 +26,15 @@ please [open an issue] so we can document how to fix it. ## Prerequisites We'll assume that you've installed Git, forked [rust-lang/rust], and cloned the -forked repo to your PC. -We'll use the command line interface to interact +forked repo to your PC. We'll use the command line interface to interact with Git; there are also a number of GUIs and IDE integrations that can generally do the same things. [rust-lang/rust]: https://github.com/rust-lang/rust -If you've cloned your fork, then you will be able to reference it with `origin` in your local repo. -It may be helpful to also set up a remote for the official rust-lang/rust repo via +If you've cloned your fork, then you will be able to reference it with `origin` +in your local repo. It may be helpful to also set up a remote for the official +rust-lang/rust repo via ```console git remote add upstream https://github.com/rust-lang/rust.git @@ -56,19 +54,21 @@ useful when contributing to other repositories in the Rust project. ## Standard Process -Below is the normal procedure that you're likely to use for most minor changes and PRs: +Below is the normal procedure that you're likely to use for most minor changes +and PRs: - 1. Ensure that you're making your changes on top of `main`: `git checkout main`. + 1. Ensure that you're making your changes on top of `main`: + `git checkout main`. 2. Get the latest changes from the Rust repo: `git pull upstream main --ff-only`. (see [No-Merge Policy][no-merge-policy] for more info about this). 3. Make a new branch for your change: `git checkout -b issue-12345-fix`. 4. Make some changes to the repo and test them. 5. Stage your changes via `git add src/changed/file.rs src/another/change.rs` - and then commit them with `git commit`. - Of course, making intermediate commits may be a good idea as well. - Avoid `git add .`, as it makes it too easy to - unintentionally commit changes that should not be committed, such as submodule updates. - You can use `git status` to check if there are any files you forgot to stage. + and then commit them with `git commit`. Of course, making intermediate commits + may be a good idea as well. Avoid `git add .`, as it makes it too easy to + unintentionally commit changes that should not be committed, such as submodule + updates. You can use `git status` to check if there are any files you forgot + to stage. 6. Push your changes to your fork: `git push --set-upstream origin issue-12345-fix` (After adding commits, you can use `git push` and after rebasing or pulling-and-rebasing, you can use `git push --force-with-lease`). @@ -100,15 +100,14 @@ Here are some common issues you might run into: ### I made a merge commit by accident. Git has two ways to update your branch with the newest changes: merging and rebasing. -Rust [uses rebasing][no-merge-policy]. -If you make a merge commit, it's not too hard to fix: `git rebase -i upstream/main`. +Rust [uses rebasing][no-merge-policy]. If you make a merge commit, it's not too hard to fix: +`git rebase -i upstream/main`. See [Rebasing](#rebasing) for more about rebasing. ### I deleted my fork on GitHub! -This is not a problem from git's perspective. -If you run `git remote -v`, +This is not a problem from git's perspective. If you run `git remote -v`, it will say something like this: ```console @@ -138,21 +137,19 @@ You might also notice conflicts in the web UI: ![conflict in src/tools/cargo](./img/submodule-conflicts.png) The most common cause is that you rebased after a change and ran `git add .` without first running -`x` to update the submodules. - Alternatively, you might have run `cargo fmt` instead of `x fmt` +`x` to update the submodules. Alternatively, you might have run `cargo fmt` instead of `x fmt` and modified files in a submodule, then committed the changes. To fix it, do the following things (if you changed a submodule other than cargo, replace `src/tools/cargo` with the path to that submodule): 1. See which commit has the accidental changes: `git log --stat -n1 src/tools/cargo` -2. Revert the changes to that commit: `git checkout ~ src/tools/cargo`. - Type `~` literally but replace `` with the output from step 1. +2. Revert the changes to that commit: `git checkout ~ src/tools/cargo`. Type `~` + literally but replace `` with the output from step 1. 3. Tell git to commit the changes: `git commit --fixup ` 4. Repeat steps 1-3 for all the submodules you modified. - If you modified the submodule in several different commits, you will need to repeat steps 1-3 - for each commit you modified. - You'll know when to stop when the `git log` command shows a commit + for each commit you modified. You'll know when to stop when the `git log` command shows a commit that's not authored by you. 5. Squash your changes into the existing commits: `git rebase --autosquash -i upstream/main` 6. [Push your changes](#standard-process). @@ -171,11 +168,9 @@ error: Please commit or stash them. (See for the difference between the two.) -This means you have made changes since the last time you made a commit. -To be able to rebase, either +This means you have made changes since the last time you made a commit. To be able to rebase, either commit your changes, or make a temporary commit called a "stash" to have them still not be committed -when you finish rebasing. -You may want to configure git to make this "stash" automatically, which +when you finish rebasing. You may want to configure git to make this "stash" automatically, which will prevent the "cannot rebase" error in nearly all cases: ```console @@ -196,9 +191,8 @@ rm -r src/stdarch ### I see `<<< HEAD`? -You were probably in the middle of a rebase or merge conflict. -See [Conflicts](#rebasing-and-conflicts) for how to fix the conflict. -If you don't care about the changes +You were probably in the middle of a rebase or merge conflict. See +[Conflicts](#rebasing-and-conflicts) for how to fix the conflict. If you don't care about the changes and just want to get a clean copy of the repository back, you can use `git reset`: ```console @@ -219,19 +213,17 @@ hint: 'git pull ...') before pushing again. hint: See the 'Note about fast-forwards' in 'git push --help' for details. ``` -The advice this gives is incorrect! -Because of Rust's ["no-merge" policy](#no-merge-policy), the merge commit created by `git pull` -will not be allowed in the final PR, in addition to defeating the point of the rebase! -Use `git push --force-with-lease` instead. +The advice this gives is incorrect! Because of Rust's +["no-merge" policy](#no-merge-policy) the merge commit created by `git pull` +will not be allowed in the final PR, in addition to defeating the point of the +rebase! Use `git push --force-with-lease` instead. ### Git is trying to rebase commits I didn't write? If you see many commits in your rebase list, or merge commits, or commits by other people that you -didn't write, it likely means you're trying to rebase over the wrong branch. -For example, you may +didn't write, it likely means you're trying to rebase over the wrong branch. For example, you may have a `rust-lang/rust` remote `upstream`, but ran `git rebase origin/main` instead of `git rebase -upstream/main`. -The fix is to abort the rebase and use the correct branch instead: +upstream/main`. The fix is to abort the rebase and use the correct branch instead: ```console git rebase --abort @@ -247,8 +239,7 @@ git rebase --interactive upstream/main ### Quick note about submodules When updating your local repository with `git pull`, you may notice that sometimes -Git says you have modified some files that you have never edited. -For example, +Git says you have modified some files that you have never edited. For example, running `git status` gives you something like (note the `new commits` mention): ```console @@ -272,18 +263,17 @@ git submodule update ``` Some submodules are not actually needed; for example, `src/llvm-project` doesn't need to be checked -out if you're using `download-ci-llvm`. - To avoid having to keep fetching its history, you can use +out if you're using `download-ci-llvm`. To avoid having to keep fetching its history, you can use `git submodule deinit -f src/llvm-project`, which will also avoid it showing as modified again. ## Rebasing and Conflicts When you edit your code locally, you are making changes to the version of -rust-lang/rust that existed when you created your feature branch. -As such, when you submit your PR, it is possible that some of the changes that have been made +rust-lang/rust that existed when you created your feature branch. As such, when +you submit your PR it is possible that some of the changes that have been made to rust-lang/rust since then are in conflict with the changes you've made. -When this happens, you need to resolve the conflicts before your changes can be merged. -To do that, you need to rebase your work on top of rust-lang/rust. +When this happens, you need to resolve the conflicts before your changes can be +merged. To do that, you need to rebase your work on top of rust-lang/rust. ### Rebasing @@ -304,14 +294,13 @@ git pull --rebase https://github.com/rust-lang/rust.git main > have rebased and fixed all conflicts. When you rebase a branch on main, all the changes on your branch are -reapplied to the most recent version of `main`. -In other words, Git tries to +reapplied to the most recent version of `main`. In other words, Git tries to pretend that the changes you made to the old version of `main` were instead -made to the new version of `main`. -During this process, you should expect to -encounter at least one "rebase conflict". This happens when Git's attempt to -reapply the changes fails because your changes conflicted with other changes that have been made. -You can tell that this happened because you'll see lines in the output that look like +made to the new version of `main`. During this process, you should expect to +encounter at least one "rebase conflict." This happens when Git's attempt to +reapply the changes fails because your changes conflicted with other changes +that have been made. You can tell that this happened because you'll see +lines in the output that look like ```console CONFLICT (content): Merge conflict in file.rs @@ -327,23 +316,21 @@ Your code >>>>>>> 8fbf656... Commit fixes 12345 ``` -This represents the lines in the file that Git could not figure out how to rebase. -The section between `<<<<<<< HEAD` and `=======` has the code from -`main`, while the other side has your version of the code. -You'll need to decide how to deal with the conflict. -You may want to keep your changes, +This represents the lines in the file that Git could not figure out how to +rebase. The section between `<<<<<<< HEAD` and `=======` has the code from +`main`, while the other side has your version of the code. You'll need to +decide how to deal with the conflict. You may want to keep your changes, keep the changes on `main`, or combine the two. -Generally, resolving the conflict consists of two steps: First, fix the particular conflict. -Edit the file to make the changes you want and remove the -`<<<<<<<`, `=======` and `>>>>>>>` lines in the process. -Second, check the surrounding code. -If there was a conflict, its likely there are some logical errors lying around too! -It's a good idea to run `x check` here to make sure there are no glaring errors. +Generally, resolving the conflict consists of two steps: First, fix the +particular conflict. Edit the file to make the changes you want and remove the +`<<<<<<<`, `=======` and `>>>>>>>` lines in the process. Second, check the +surrounding code. If there was a conflict, its likely there are some logical +errors lying around too! It's a good idea to run `x check` here to make sure +there are no glaring errors. Once you're all done fixing the conflicts, you need to stage the files that had -conflicts in them via `git add`. -Afterwards, run `git rebase --continue` to let +conflicts in them via `git add`. Afterwards, run `git rebase --continue` to let Git know that you've resolved the conflicts and it should finish the rebase. Once the rebase has succeeded, you'll want to update the associated branch on @@ -353,11 +340,13 @@ your fork with `git push --force-with-lease`. The [above section](#rebasing) is a specific guide on rebasing work and dealing with merge conflicts. -Here is some general advice about how to keep your local repo up-to-date with upstream changes: +Here is some general advice about how to keep your local repo +up-to-date with upstream changes: -Using `git pull upstream main` while on your local `main` branch regularly will keep it up-to-date. -You will also want to keep your feature branches up-to-date as well. -After pulling, you can checkout the feature branches and rebase them: +Using `git pull upstream main` while on your local `main` branch regularly +will keep it up-to-date. You will also want to keep your feature branches +up-to-date as well. After pulling, you can checkout the feature branches +and rebase them: ```console git checkout main @@ -378,21 +367,21 @@ feature branches are in sync with their state on the Github side. ### Squash your commits -"Squashing" commits into each other causes them to be merged into a single commit. -Both the upside and downside of this is that it simplifies the history. +"Squashing" commits into each other causes them to be merged into a single +commit. Both the upside and downside of this is that it simplifies the history. On the one hand, you lose track of the steps in which changes were made, but the history becomes easier to work with. If there are no conflicts and you are just squashing to clean up the history, -use `git rebase --interactive --keep-base main`. -This keeps the fork point of your PR the same, making it easier to review the diff of what happened +use `git rebase --interactive --keep-base main`. This keeps the fork point +of your PR the same, making it easier to review the diff of what happened across your rebases. Squashing can also be useful as part of conflict resolution. If your branch contains multiple consecutive rewrites of the same code, or if the rebase conflicts are extremely severe, you can use -`git rebase --interactive main` to gain more control over the process. -This allows you to choose to skip commits, edit the commits that you do not skip, +`git rebase --interactive main` to gain more control over the process. This +allows you to choose to skip commits, edit the commits that you do not skip, change the order in which they are applied, or "squash" them into each other. Alternatively, you can sacrifice the commit history like this: @@ -406,35 +395,34 @@ git rebase --continue ``` You also may want to squash just the last few commits together, possibly -because they only represent "fixups" and not real changes. -For example, +because they only represent "fixups" and not real changes. For example, `git rebase --interactive HEAD~2` will allow you to edit the two commits only. ### `git range-diff` After completing a rebase, and before pushing up your changes, you may want to -review the changes between your old branch and your new one. -You can do that with `git range-diff main @{upstream} HEAD`. +review the changes between your old branch and your new one. You can do that +with `git range-diff main @{upstream} HEAD`. The first argument to `range-diff`, `main` in this case, is the base revision -that you're comparing your old and new branch against. -The second argument is +that you're comparing your old and new branch against. The second argument is the old version of your branch; in this case, `@upstream` means the version that -you've pushed to GitHub, which is the same as what people will see in your pull request. -Finally, the third argument to `range-diff` is the *new* version of +you've pushed to GitHub, which is the same as what people will see in your pull +request. Finally, the third argument to `range-diff` is the *new* version of your branch; in this case, it is `HEAD`, which is the commit that is currently checked-out in your local repo. -Note that you can also use the equivalent, abbreviated form `git range-diff main @{u} HEAD`. +Note that you can also use the equivalent, abbreviated form `git range-diff +main @{u} HEAD`. Unlike in regular Git diffs, you'll see a `-` or `+` next to another `-` or `+` -in the range-diff output. -The marker on the left indicates a change between the -old branch and the new branch, and the marker on the right indicates a change you've committed. -So, you can think of a range-diff as a "diff of diffs" since +in the range-diff output. The marker on the left indicates a change between the +old branch and the new branch, and the marker on the right indicates a change +you've committed. So, you can think of a range-diff as a "diff of diffs" since it shows you the differences between your old diff and your new diff. -Here's an example of `git range-diff` output (taken from [Git's docs][range-diff-example-docs]): +Here's an example of `git range-diff` output (taken from [Git's +docs][range-diff-example-docs]): ```console -: ------- > 1: 0ddba11 Prepare for the inevitable! @@ -459,33 +447,31 @@ Here's an example of `git range-diff` output (taken from [Git's docs][range-diff (Note that `git range-diff` output in your terminal will probably be easier to read than in this example because it will have colors.) -Another feature of `git range-diff` is that, unlike `git diff`, it will also diff commit messages. -This feature can be useful when amending several commit +Another feature of `git range-diff` is that, unlike `git diff`, it will also +diff commit messages. This feature can be useful when amending several commit messages so you can make sure you changed the right parts. `git range-diff` is a very useful command, but note that it can take some time -to get used to its output format. -You may also find Git's documentation on the +to get used to its output format. You may also find Git's documentation on the command useful, especially their ["Examples" section][range-diff-example-docs]. [range-diff-example-docs]: https://git-scm.com/docs/git-range-diff#_examples ## No-Merge Policy -The rust-lang/rust repo uses what is known as a "rebase workflow". This means -that merge commits in PRs are not accepted. -As a result, if you are running -`git merge` locally, chances are good that you should be rebasing instead. -Of course, this is not always true; if your merge will just be a fast-forward, +The rust-lang/rust repo uses what is known as a "rebase workflow." This means +that merge commits in PRs are not accepted. As a result, if you are running +`git merge` locally, chances are good that you should be rebasing instead. Of +course, this is not always true; if your merge will just be a fast-forward, like the merges that `git pull` usually performs, then no merge commit is -created and you have nothing to worry about. -Running `git config merge.ff only` (this will apply the config to the local repo) +created and you have nothing to worry about. Running `git config merge.ff only` +(this will apply the config to the local repo) once will ensure that all the merges you perform are of this type, so that you cannot make a mistake. -There are a number of reasons for this decision, and like all others, it is a tradeoff. -The main advantage is the generally linear commit history. -This greatly simplifies bisecting and makes the history and commit log much easier +There are a number of reasons for this decision and like all others, it is a +tradeoff. The main advantage is the generally linear commit history. This +greatly simplifies bisecting and makes the history and commit log much easier to follow and understand. ## Tips for reviewing @@ -504,17 +490,15 @@ You can also use `git diff -w origin/main` to view changes locally. To checkout PRs locally, you can use `git fetch upstream pull/NNNNN/head && git checkout FETCH_HEAD`. -You can also use github's cli tool. -Github shows a button on PRs where you can copy-paste the command to check it out locally. -See for more info. +You can also use github's cli tool. Github shows a button on PRs where you can copy-paste the +command to check it out locally. See for more info. ![`gh` suggestion](./img/github-cli.png) ### Using GitHub dev As an alternative to the GitHub web UI, GitHub Dev provides a web-based editor for browsing -repository and PRs. -It can be opened by replacing `github.com` with `github.dev` in the URL +repository and PRs. It can be opened by replacing `github.com` with `github.dev` in the URL or by pressing `.` on a GitHub page. See [the docs for github.dev editor](https://docs.github.com/en/codespaces/the-githubdev-web-based-editor) for more details. @@ -522,8 +506,8 @@ for more details. ### Moving large sections of code Git and Github's default diff view for large moves *within* a file is quite poor; it will show each -line as deleted and each line as added, forcing you to compare each line yourself. -Git has an option to show moved lines in a different color: +line as deleted and each line as added, forcing you to compare each line yourself. Git has an option +to show moved lines in a different color: ```console git log -p --color-moved=dimmed-zebra --color-moved-ws=allow-indentation-change @@ -533,14 +517,12 @@ See [the docs for `--color-moved`](https://git-scm.com/docs/git-diff#Documentati ### range-diff -See [the relevant section for PR authors](#git-range-diff). -This can be useful for comparing code +See [the relevant section for PR authors](#git-range-diff). This can be useful for comparing code that was force-pushed to make sure there are no unexpected changes. ### Ignoring changes to specific files -Many large files in the repo are autogenerated. -To view a diff that ignores changes to those files, +Many large files in the repo are autogenerated. To view a diff that ignores changes to those files, you can use the following syntax (e.g. Cargo.lock): ```console @@ -553,28 +535,25 @@ Arbitrary patterns are supported (e.g. `:!compiler/*`). Patterns use the same sy ## Git submodules **NOTE**: submodules are a nice thing to know about, but it *isn't* an absolute -prerequisite to contribute to `rustc`. -If you are using Git for the first time, +prerequisite to contribute to `rustc`. If you are using Git for the first time, you might want to get used to the main concepts of Git before reading this section. The `rust-lang/rust` repository uses [Git submodules] as a way to use other -Rust projects from within the `rust` repo. -Examples include Rust's fork of -`llvm-project`, `cargo`, and libraries like `stdarch` and `backtrace`. +Rust projects from within the `rust` repo. Examples include Rust's fork of +`llvm-project`, `cargo` and libraries like `stdarch` and `backtrace`. Those projects are developed and maintained in an separate Git (and GitHub) repository, and they have their own Git history/commits, issue tracker and PRs. Submodules allow us to create some sort of embedded sub-repository inside the `rust` repository and use them like they were directories in the `rust` repository. -Take `llvm-project` for example. -`llvm-project` is maintained in the [`rust-lang/llvm-project`] -repository, but it is used in `rust-lang/rust` by the compiler for code generation and optimization. -We bring it in `rust` as a submodule, in the `src/llvm-project` folder. +Take `llvm-project` for example. `llvm-project` is maintained in the [`rust-lang/llvm-project`] +repository, but it is used in `rust-lang/rust` by the compiler for code generation and +optimization. We bring it in `rust` as a submodule, in the `src/llvm-project` folder. The contents of submodules are ignored by Git: submodules are in some sense isolated -from the rest of the repository. -However, if you try to `cd src/llvm-project` and then run `git status`: +from the rest of the repository. However, if you try to `cd src/llvm-project` and then +run `git status`: ```console HEAD detached at 9567f08afc943 @@ -587,8 +566,7 @@ particular commit. This is because, like any dependency, we want to be able to control which version to use. Submodules allow us to do just that: every submodule is "pinned" to a certain -commit, which doesn't change unless modified manually. -If you use `git checkout ` +commit, which doesn't change unless modified manually. If you use `git checkout ` in the `llvm-project` directory and go back to the `rust` directory, you can stage this change like any other, e.g. by running `git add src/llvm-project`. (Note that if you *don't* stage the change to commit, then you run the risk that running @@ -598,10 +576,10 @@ it automatically "updates" the submodules.) This version selection is usually done by the maintainers of the project, and looks like [this][llvm-update]. -Git submodules take some time to get used to, so don't worry if it isn't perfectly clear yet. -You will rarely have to use them directly and, again, you don't need -to know everything about submodules to contribute to Rust. -Just know that they exist and that they correspond to some sort of embedded subrepository dependency +Git submodules take some time to get used to, so don't worry if it isn't perfectly +clear yet. You will rarely have to use them directly and, again, you don't need +to know everything about submodules to contribute to Rust. Just know that they +exist and that they correspond to some sort of embedded subrepository dependency that Git can nicely and fairly conveniently handle for us. ### Hard-resetting submodules @@ -661,12 +639,13 @@ src/gcc` in this example, you need to: 2. `rm -rf .git/modules//config` 3. `rm -rf .gitconfig.lock` if somehow the `.gitconfig` lock is orphaned. -Then do something like `./x fmt` to have bootstrap manage the submodule checkouts for you. +Then do something like `./x fmt` to have bootstrap manage the submodule +checkouts for you. ## Ignoring commits during `git blame` -Some commits contain large reformatting changes that don't otherwise change functionality. -They can be instructed to be ignored by `git blame` through +Some commits contain large reformatting changes that don't otherwise change functionality. They can +be instructed to be ignored by `git blame` through [`.git-blame-ignore-revs`](https://github.com/rust-lang/rust/blob/HEAD/.git-blame-ignore-revs): 1. Configure `git blame` to use `.git-blame-ignore-revs` as the list of commits to ignore: `git diff --git a/src/doc/rustc-dev-guide/src/hir-typeck/coercions.md b/src/doc/rustc-dev-guide/src/hir-typeck/coercions.md index c63c64f5f945d..158ac0885d323 100644 --- a/src/doc/rustc-dev-guide/src/hir-typeck/coercions.md +++ b/src/doc/rustc-dev-guide/src/hir-typeck/coercions.md @@ -1,5 +1,4 @@ # Coercions - Coercions are implicit operations which transform a value into a different type. A coercion *site* is a position where a coercion is able to be implicitly performed. There are two kinds of coercion sites: - one-to-one diff --git a/src/doc/rustc-dev-guide/src/implementing_new_features.md b/src/doc/rustc-dev-guide/src/implementing_new_features.md new file mode 100644 index 0000000000000..4526a7af0f463 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/implementing_new_features.md @@ -0,0 +1,287 @@ + + +# Implementing new language features + +When you want to implement a new significant feature in the compiler, +you need to go through this process to make sure everything goes smoothly. + +**NOTE: This section is for *language* features, not *library* features, +which use [a different process].** + +See also [the Rust Language Design Team's procedures][lang-propose] for proposing changes to the language. + +[a different process]: ./stability.md +[lang-propose]: https://lang-team.rust-lang.org/how_to/propose.html + +## The @rfcbot FCP process + +When the change is small, uncontroversial, non-breaking, +and does not affect the stable language in any user-observable ways or add any new unstable features, +then it can be done with just writing a PR and getting an r+ from someone who knows that part of the code. +However, if not, more must be done. +Even for compiler-internal work, +it would be a bad idea to push a controversial change without consensus from the rest of the team +(both in the "distributed system" sense to make sure you don't break anything you don't know about, +and in the social sense to avoid PR fights). + +For changes that need the consensus of a team, +we use the process of proposing a final comment period (FCP). +If you're not on the relevant team (and thus don't have @rfcbot permissions), +ask someone who is to start one; +unless they have a concern themselves, they should. + +The FCP process is only needed if you need consensus – +if no processes require consensus for your change +and you don't think anyone would have a problem with it, it's OK to rely on only an r+. +For example, +it is OK to add or modify unstable command-line flags +or attributes in the reserved compiler-internal `rustc_` namespace +without an FCP for compiler development or standard library use, +as long as you don't expect them to be in wide use in the nightly ecosystem. +Some teams have lighter weight processes that they use in scenarios like this; +for example, +the compiler team recommends filing a Major Change Proposal ([MCP]) +as a lightweight way to garner support and feedback without requiring full consensus. + +[MCP]: https://forge.rust-lang.org/compiler/proposals-and-stabilization.html#how-do-i-submit-an-mcp + +You don't need to have the implementation fully ready for r+ to propose an FCP, +but it is generally a good idea to have at least a proof of concept +so that people can see what you are talking about. + +When an FCP is proposed, it requires all members of the team to sign off on the FCP. +After they all do so, +there's a 10-day-long "final comment period" (hence the name) where everybody can comment, +and if no concerns are raised, the PR/issue gets FCP approval. + +## The logistics of writing features + +There are a few "logistical" hoops you might need to go through +in order to implement a feature in a working way. + +### Warning Cycles + +In some cases, a feature or bugfix might break some existing programs in some edge cases. +In that case, +you'll want to do a crater run to assess the impact and possibly add a future-compatibility lint, +similar to those used for [edition-gated lints](diagnostics.md#edition-gated-lints). + +### Stability + +We [value the stability of Rust]. +Code that works and runs on stable should (mostly) not break. +Because of that, +we don't want to release a feature to the world with only team consensus and code review - +we want to gain real-world experience on using that feature on nightly, +and we might want to change the feature based on that experience. + +To allow for that, +we must make sure users don't accidentally depend on that new feature - +otherwise, +especially if experimentation takes time or is delayed and the feature takes the trains to stable, +it would end up de facto stable +and we'll not be able to make changes in it without breaking people's code. + +The way we do that is that we make sure all new features are feature gated - +they can't be used without enabling a feature gate (`#[feature(foo)]`), +which can't be done in a stable/beta compiler. +See the [stability in code] section for the technical details. + +Eventually, after we gain enough experience using the feature, make the necessary changes, +and are satisfied, we expose it to the world using the stabilization process described [here]. +Until then, the feature is not set in stone: +every part of the feature can be changed, or the feature might be completely rewritten or removed. +Features do not gain tenure by being unstable and unchanged for long periods of time. + +### Tracking Issues + +To keep track of the status of an unstable feature, +the experience we get while using it on nightly, +and of the concerns that block its stabilization, +every feature-gate needs a tracking issue. +When creating issues and PRs related to the feature, reference this tracking issue, +and when there are updates about the feature's progress, post those to the tracking issue. + +For features that are part of an accept RFC or approved lang experiment, +use the tracking issue for that. + +For other features, create a tracking issue for that feature. +The issue title should be "Tracking issue for YOUR FEATURE". +Use the ["Tracking Issue" issue template][template]. + +[template]: https://github.com/rust-lang/rust/issues/new?template=tracking_issue.md + +### Lang experiments + +To land in the compiler, +features that have user-visible effects on the language (even unstable ones) +must either be part of an accepted RFC or an approved [lang experiment]. + +To propose a new lang experiment, +open an issue in `rust-lang/rust` that describes the motivation and the intended solution. +If it's accepted, this issue will become the tracking issue for the experiment, +so use the tracking issue [template] while also including these other details. +Nominate the issue for the lang team and CC `@rust-lang/lang` and `@rust-lang/lang-advisors`. +When the experiment is approved, the tracking issue will be marked as `B-experimental`. + +Feature flags related to a lang experiment must be marked as `incomplete` +until an RFC is accepted for the feature. + +[lang experiment]: https://lang-team.rust-lang.org/how_to/experiment.html + +## Stability in code + +The below steps needs to be followed in order to implement a new unstable feature: + +1. Open or identify the [tracking issue]. + For features that are part of an accept RFC or approved lang experiment, + use the tracking issue for that. + + Label the tracking issue with `C-tracking-issue` and the relevant `F-feature_name` label + (adding that label if needed). + +1. Pick a name for the feature gate (for RFCs, use the name in the RFC). + +1. Add the feature name to `rustc_span/src/symbol.rs` in the `Symbols {...}` block. + + Note that this block must be in alphabetical order. + +1. Add a feature gate declaration to `rustc_feature/src/unstable.rs` + in the unstable `declare_features` block. + + ```rust ignore + /// description of feature + (unstable, $feature_name, "CURRENT_RUSTC_VERSION", Some($tracking_issue_number)) + ``` + + If you haven't yet opened a tracking issue + (e.g. because you want initial feedback on whether the feature is likely to be accepted), + you can temporarily use `None` - but make sure to update it before the PR is merged! + + For example: + + ```rust ignore + /// Allows defining identifiers beyond ASCII. + (unstable, non_ascii_idents, "CURRENT_RUSTC_VERSION", Some(55467), None), + ``` + + Features can be marked as incomplete, + and trigger the warn-by-default [`incomplete_features` lint] + by setting their type to `incomplete`: + + [`incomplete_features` lint]: https://doc.rust-lang.org/rustc/lints/listing/warn-by-default.html#incomplete-features + + ```rust ignore + /// Allows deref patterns. + (incomplete, deref_patterns, "CURRENT_RUSTC_VERSION", Some(87121), None), + ``` + + Feature flags related to a lang experiment must be marked as `incomplete` + until an RFC is accepted for the feature. + + To avoid [semantic merge conflicts], + use `CURRENT_RUSTC_VERSION` instead of `1.70` or another explicit version number. + + [semantic merge conflicts]: https://bors.tech/essay/2017/02/02/pitch/ + +1. Prevent usage of the new feature unless the feature gate is set. + You can check it in most places in the compiler + using the expression `tcx.features().$feature_name()`. + + If the feature gate is not set, + you should either maintain the pre-feature behavior or raise an error, + depending on what makes sense. + Errors should generally use [`rustc_session::parse::feature_err`]. + For an example of adding an error, see [#81015]. + + For features introducing new syntax, pre-expansion gating should be used instead. + During parsing, when the new syntax is parsed, + the symbol must be inserted to the current crate's [`GatedSpans`] + via `self.sess.gated_span.gate(sym::my_feature, span)`. + + After being inserted to the gated spans, + the span must be checked in the [`rustc_ast_passes::feature_gate::check_crate`] function, + which actually denies features. + Exactly how it is gated depends on the exact type of feature, + but most likely will use the `gate_all!()` macro. + +1. Add a test to ensure the feature cannot be used without a feature gate, + by creating `tests/ui/feature-gates/feature-gate-$feature_name.rs`. + You can generate the corresponding `.stderr` file + by running `./x test tests/ui/feature-gates/ --bless`. + +1. Add a section to the unstable book, + in `src/doc/unstable-book/src/language-features/$feature_name.md`. + +1. Write a lot of tests for the new feature, preferably in `tests/ui/$feature_name/`. + PRs without tests will not be accepted! + +1. Get your PR reviewed and land it. + You have now successfully implemented a feature in Rust! + +[`GatedSpans`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_session/parse/struct.GatedSpans.html +[#81015]: https://github.com/rust-lang/rust/pull/81015 +[`rustc_session::parse::feature_err`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_session/parse/fn.feature_err.html +[`rustc_ast_passes::feature_gate::check_crate`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_ast_passes/feature_gate/fn.check_crate.html +[value the stability of Rust]: https://github.com/rust-lang/rfcs/blob/master/text/1122-language-semver.md +[stability in code]: #stability-in-code +[here]: ./stabilization_guide.md +[tracking issue]: #tracking-issues +[add-feature-gate]: ./feature-gates.md#adding-a-feature-gate + +## Call for testing + +Once the implementation is complete, +the feature will be available to nightly users but not yet part of stable Rust. +This is a good time to write a blog post on [the main Rust blog][rust-blog] +and issue a "call for testing". + +Some earlier such blog posts include: + +1. [The push for GATs stabilization](https://blog.rust-lang.org/2021/08/03/GATs-stabilization-push/) +2. [Changes to `impl Trait` in Rust 2024](https://blog.rust-lang.org/2024/09/05/impl-trait-capture-rules.html) +3. [Async Closures MVP: Call for Testing!](https://blog.rust-lang.org/inside-rust/2024/08/09/async-closures-call-for-testing/) + +Alternatively, [*This Week in Rust*][twir] has a [section][twir-cft] for this. +One example of this having been used is: + +- [Call for testing on boolean literals as cfg predicates](https://github.com/rust-lang/rust/issues/131204#issuecomment-2569314526) + +Which option to choose might depend on how significant the language change is, +though note that the [*This Week in Rust*][twir] section might be less visible +than a dedicated post on the main Rust blog. + +## Polishing + +Giving users a polished experience means more than just implementing the feature in rustc. +We need to think about all of the tools and resources that we ship. +This work includes: + +- Documenting the language feature in the [Rust Reference][reference]. +- Extending [`rustfmt`] to format any new syntax (if applicable). +- Extending [`rust-analyzer`] (if applicable). + The extent of this work can depend on the nature of the language feature, + as some features don't need to be blocked on *full* support. + - When a language feature degrades the user experience + simply by existing before support is implemented in [`rust-analyzer`], + that may lead the lang team to raise a blocking concern. + - Examples of such might include new syntax that [`rust-analyzer`] can't parse + or type inference changes it doesn't understand when those lead to bogus diagnostics. + +## Stabilization + +The final step in the feature lifecycle is [stabilization][stab], +which is when the feature becomes available to all Rust users. +At this point, +backward incompatible changes are generally no longer permitted +(see the lang team's [defined semver policies](https://rust-lang.github.io/rfcs/1122-language-semver.html) for details). +To learn more about stabilization, see the [stabilization guide][stab]. + + +[stab]: ./stabilization_guide.md +[rust-blog]: https://github.com/rust-lang/blog.rust-lang.org/ +[twir]: https://github.com/rust-lang/this-week-in-rust +[twir-cft]: https://this-week-in-rust.org/blog/2025/01/22/this-week-in-rust-583/#calls-for-testing +[`rustfmt`]: https://github.com/rust-lang/rustfmt +[`rust-analyzer`]: https://github.com/rust-lang/rust-analyzer +[reference]: https://github.com/rust-lang/reference diff --git a/src/doc/rustc-dev-guide/src/memory.md b/src/doc/rustc-dev-guide/src/memory.md index 24e7205a3565b..f766a51898e41 100644 --- a/src/doc/rustc-dev-guide/src/memory.md +++ b/src/doc/rustc-dev-guide/src/memory.md @@ -54,14 +54,14 @@ represented as a slice `&'tcx [tcx.types.i32, tcx.types.u32]`). defined and discussed in depth in the [`AdtDef and DefId`][adtdefid] section. - [`Predicate`] defines something the trait system has to prove (see [traits] module). -[`GenericArgs`]: ./ty-module/generic-arguments.md#the-genericargs-type -[adtdefid]: ./ty-module/generic-arguments.md#adtdef-and-defid +[`GenericArgs`]: ./ty_module/generic_arguments.md#the-genericargs-type +[adtdefid]: ./ty_module/generic_arguments.md#adtdef-and-defid [`TraitRef`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.TraitRef.html [`AdtDef` and `DefId`]: ./ty.md#adts-representation [`def-id`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir/def_id/struct.DefId.html [`GenericArgs`]: ./generic_arguments.html#GenericArgs [`mk_args`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/context/struct.TyCtxt.html#method.mk_args -[adtdefid]: ./ty-module/generic-arguments.md#adtdef-and-defid +[adtdefid]: ./ty_module/generic_arguments.md#adtdef-and-defid [`Predicate`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.Predicate.html [`TraitRef`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.TraitRef.html [`ty::TyKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/sty/type.TyKind.html diff --git a/src/doc/rustc-dev-guide/src/normalization.md b/src/doc/rustc-dev-guide/src/normalization.md index b458b04c17194..53e20f1c0db7f 100644 --- a/src/doc/rustc-dev-guide/src/normalization.md +++ b/src/doc/rustc-dev-guide/src/normalization.md @@ -30,7 +30,7 @@ fn bar>() { } ``` -When an alias can't yet be normalized but may wind up normalizable in the [current environment](./typing-parameter-envs.md), we consider it to be an "ambiguous" alias. This can occur when an alias contains inference variables which prevent being able to determine how the trait is implemented: +When an alias can't yet be normalized but may wind up normalizable in the [current environment](./typing_parameter_envs.md), we consider it to be an "ambiguous" alias. This can occur when an alias contains inference variables which prevent being able to determine how the trait is implemented: ```rust fn foo() { // This alias is considered to be "ambiguous" @@ -113,7 +113,7 @@ fn bar() { foo::<{ FREE_CONST }>(); // The const arg is represented with some anonymous constant: // ```pseudo-rust - // const ANON: usize = FREE_CONST; + // const ANON: usize = FREE_CONST; // foo::(); // ``` } @@ -127,7 +127,7 @@ This is likely to change as const generics functionality is improved, for exampl There are two forms of normalization, structural (sometimes called *shallow*) and deep. Structural normalization should be thought of as only normalizing the "outermost" part of a type. On the other hand deep normalization will normalize *all* aliases in a type. -In practice structural normalization can result in more than just the outer layer of the type being normalized, but this behaviour should not be relied upon. Unnormalizable non-rigid aliases making use of bound variables (`for<'a>`) cannot be normalized by either kind of normalization. +In practice structural normalization can result in more than just the outer layer of the type being normalized, but this behaviour should not be relied upon. Unnormalizable non-rigid aliases making use of bound variables (`for<'a>`) cannot be normalized by either kind of normalization. As an example: conceptually, structurally normalizing the type `Vec<::Assoc>` would be a no-op, whereas deeply normalizing would give `Vec`. In practice even structural normalization would give `Vec`, though, again, this should not be relied upon. @@ -137,9 +137,9 @@ Changing the alias to use bound variables will result in different behaviour; `V Structurally normalizing aliases is a little bit more nuanced than replacing the alias with whatever it is defined as being equal to in its definition; the result of normalizing an alias should either be a rigid type or an inference variable (which will later be inferred to a rigid type). To accomplish this we do two things: -First, when normalizing an ambiguous alias it is normalized to an inference variable instead of leaving it as-is, this has two main effects: +First, when normalizing an ambiguous alias it is normalized to an inference variable instead of leaving it as-is, this has two main effects: - Even though an inference variable is not a rigid type, it will always wind up inferred *to* a rigid type so we ensure that the result of normalization will not need to be normalized again -- Inference variables are used in all cases where a type is non-rigid, allowing the rest of the compiler to not have to deal with *both* ambiguous aliases *and* inference variables +- Inference variables are used in all cases where a type is non-rigid, allowing the rest of the compiler to not have to deal with *both* ambiguous aliases *and* inference variables Secondly, instead of having normalization directly return the type specified in the definition of the alias, we normalize the type first before returning it[^1]. We do this so that normalization is idempotent/callers do not need to run it in a loop. @@ -207,7 +207,7 @@ In practice `query_normalize` is used for normalization in the borrow checker, a ##### `tcx.normalize_erasing_regions` -[`normalize_erasing_regions`][norm_erasing_regions] is generally used by parts of the compiler that are not doing type system analysis. This normalization entry point does not handle inference variables, lifetimes, or any diagnostics. Lints and codegen make heavy use of this entry point as they typically are working with fully inferred aliases that can be assumed to be well formed (or at least, are not responsible for erroring on). +[`normalize_erasing_regions`][norm_erasing_regions] is generally used by parts of the compiler that are not doing type system analysis. This normalization entry point does not handle inference variables, lifetimes, or any diagnostics. Lints and codegen make heavy use of this entry point as they typically are working with fully inferred aliases that can be assumed to be well formed (or at least, are not responsible for erroring on). [query_norm]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/infer/at/struct.At.html#method.query_normalize [norm_erasing_regions]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.TyCtxt.html#method.normalize_erasing_regions @@ -232,7 +232,7 @@ One of the big changes between the old and new solver is our approach to when we ### Old solver -All types are expected to be normalized as soon as possible, so that all types encountered in the type system are either rigid or an inference variable (which will later be inferred to a rigid term). +All types are expected to be normalized as soon as possible, so that all types encountered in the type system are either rigid or an inference variable (which will later be inferred to a rigid term). As a concrete example: equality of aliases is implemented by assuming they're rigid and recursively equating the generic arguments of the alias. @@ -242,7 +242,7 @@ It's expected that all types potentially contain ambiguous or unnormalized alias As a concrete example: equality of aliases is implemented by a custom goal kind ([`PredicateKind::AliasRelate`][aliasrelate]) so that it can handle normalization of the aliases itself instead of assuming all alias types being equated are rigid. -Despite this approach we still deeply normalize during [writeback][writeback] for performance/simplicity, so that types in the MIR can still be assumed to have been deeply normalized. +Despite this approach we still deeply normalize during [writeback][writeback] for performance/simplicity, so that types in the MIR can still be assumed to have been deeply normalized. [aliasrelate]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.PredicateKind.html#variant.AliasRelate [writeback]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_typeck/writeback/index.html @@ -257,7 +257,7 @@ It was a frequent occurrence that normalization calls would be missing, resultin ### Normalizing parameter environments -Another problem was that it was not possible to normalize `ParamEnv`s correctly in the old solver as normalization itself would expect a normalized `ParamEnv` in order to give correct results. See the chapter on `ParamEnv`s for more information: [`Typing/ParamEnv`s: Normalizing all bounds](./typing-parameter-envs.md#normalizing-all-bounds) +Another problem was that it was not possible to normalize `ParamEnv`s correctly in the old solver as normalization itself would expect a normalized `ParamEnv` in order to give correct results. See the chapter on `ParamEnv`s for more information: [`Typing/ParamEnv`s: Normalizing all bounds](./typing_parameter_envs.md#normalizing-all-bounds) ### Unnormalizable non-rigid aliases in higher ranked types @@ -269,7 +269,7 @@ Leaving the alias unnormalized would also be wrong as the old solver expects all Ultimately this means that it is not always possible to ensure all aliases inside of a value are rigid. -[universe]: borrow-check/region-inference/placeholders-and-universes.md#what-is-a-universe +[universe]: borrow_check/region_inference/placeholders_and_universes.md#what-is-a-universe [deeply_normalize]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/traits/normalize/trait.NormalizeExt.html#tymethod.deeply_normalize ## Handling uses of diverging aliases diff --git a/src/doc/rustc-dev-guide/src/opaque-types-impl-trait-inference.md b/src/doc/rustc-dev-guide/src/opaque-types-impl-trait-inference.md index ac908493ee564..42600ad87f8c5 100644 --- a/src/doc/rustc-dev-guide/src/opaque-types-impl-trait-inference.md +++ b/src/doc/rustc-dev-guide/src/opaque-types-impl-trait-inference.md @@ -5,7 +5,7 @@ This kind of type inference is particularly complex because, unlike other kinds of type inference, it can work across functions and function bodies. -[hidden type]: ./borrow-check/region-inference/member-constraints.html?highlight=%22hidden%20type%22#member-constraints +[hidden type]: ./borrow_check/region_inference/member_constraints.html?highlight=%22hidden%20type%22#member-constraints [opaque type]: ./opaque-types-type-alias-impl-trait.md ## Running example diff --git a/src/doc/rustc-dev-guide/src/overview.md b/src/doc/rustc-dev-guide/src/overview.md index 7858c09fe724d..1200a854f8edb 100644 --- a/src/doc/rustc-dev-guide/src/overview.md +++ b/src/doc/rustc-dev-guide/src/overview.md @@ -153,7 +153,7 @@ the final binary. [`simplify_try`]: https://github.com/rust-lang/rust/pull/66282 [`Lexer`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_parse/lexer/struct.Lexer.html [`Ty<'tcx>`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.Ty.html -[borrow checking]: borrow-check.md +[borrow checking]: borrow_check.md [codegen]: backend/codegen.md [hir]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir/index.html [lex]: the-parser.md @@ -344,7 +344,7 @@ Compiler performance is a problem that we would like to improve on (and are always working on). One aspect of that is parallelizing `rustc` itself. -Currently, there is only one part of rustc that is parallel by default: +Currently, there is only one part of rustc that is parallel by default: [code generation](./parallel-rustc.md#Codegen). However, the rest of the compiler is still not yet parallel. There have been @@ -428,7 +428,7 @@ For more details on bootstrapping, see - Definition: [`rustc_middle/src/mir`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/index.html) - Definition of sources that manipulates the MIR: [`rustc_mir_build`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_build/index.html), [`rustc_mir_dataflow`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_dataflow/index.html), [`rustc_mir_transform`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_mir_transform/index.html) - The Borrow Checker - - Guide: [MIR Borrow Check](borrow-check.md) + - Guide: [MIR Borrow Check](borrow_check.md) - Definition: [`rustc_borrowck`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/index.html) - Main entry point: [`mir_borrowck` query](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/fn.mir_borrowck.html) - `MIR` Optimizations diff --git a/src/doc/rustc-dev-guide/src/profiling.md b/src/doc/rustc-dev-guide/src/profiling.md index 519d9b5488cbd..de06bd7cda7b3 100644 --- a/src/doc/rustc-dev-guide/src/profiling.md +++ b/src/doc/rustc-dev-guide/src/profiling.md @@ -12,7 +12,7 @@ Depending on what you're trying to measure, there are several different approach See [their docs](https://github.com/rust-lang/measureme/blob/master/summarize/README.md) for more information. - If you want function level performance data or even just more details than the above approaches: - - Consider using a native code profiler such as [perf](profiling/with-perf.md) + - Consider using a native code profiler such as [perf](profiling/with_perf.md) - or [tracy](https://github.com/nagisa/rust_tracy_client) for a nanosecond-precision, full-featured graphical interface. @@ -23,7 +23,7 @@ Depending on what you're trying to measure, there are several different approach - If you want to profile memory usage, you can use various tools depending on what operating system you are using. - - For Windows, read our [WPA guide](profiling/wpa-profiling.md). + - For Windows, read our [WPA guide](profiling/wpa_profiling.md). ## Optimizing rustc's bootstrap times with `cargo-llvm-lines` diff --git a/src/doc/rustc-dev-guide/src/profiling/with_perf.md b/src/doc/rustc-dev-guide/src/profiling/with_perf.md new file mode 100644 index 0000000000000..e452dde5226d4 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/profiling/with_perf.md @@ -0,0 +1,315 @@ +# Profiling with perf + +This is a guide for how to profile rustc with [perf](https://perf.wiki.kernel.org/index.php/Main_Page). + +## Initial steps + +- Get a clean checkout of rust-lang/rust +- Set the following settings in your `bootstrap.toml`: + - `rust.debuginfo-level = 1` - enables line debuginfo + - `rust.jemalloc = false` - lets you do memory use profiling with valgrind + - leave everything else the defaults +- Run `./x build` to get a full build +- Make a rustup toolchain pointing to that result + - see [the "build and run" section for instructions][b-a-r] + +[b-a-r]: ../building/how-to-build-and-run.html#toolchain + +## Gathering a perf profile + +perf is an excellent tool on linux that can be used to gather and +analyze all kinds of information. Mostly it is used to figure out +where a program spends its time. It can also be used for other sorts +of events, though, like cache misses and so forth. + +### The basics + +The basic `perf` command is this: + +```bash +perf record -F99 --call-graph dwarf XXX +``` + +The `-F99` tells perf to sample at 99 Hz, which avoids generating too +much data for longer runs (why 99 Hz you ask? It is often chosen +because it is unlikely to be in lockstep with other periodic +activity). The `--call-graph dwarf` tells perf to get call-graph +information from debuginfo, which is accurate. The `XXX` is the +command you want to profile. So, for example, you might do: + +```bash +perf record -F99 --call-graph dwarf cargo + rustc +``` + +to run `cargo` -- here `` should be the name of the toolchain +you made in the beginning. But there are some things to be aware of: + +- You probably don't want to profile the time spend building + dependencies. So something like `cargo build; cargo clean -p $C` may + be helpful (where `$C` is the crate name) + - Though usually I just do `touch src/lib.rs` and rebuild instead. =) +- You probably don't want incremental messing about with your + profile. So something like `CARGO_INCREMENTAL=0` can be helpful. + +In case to avoid the issue of `addr2line xxx/elf: could not read first record` when reading +collected data from `cargo`, you may need use the latest version of `addr2line`: + +```bash +cargo install addr2line --features="bin" +``` + +### Gathering a perf profile from a `perf.rust-lang.org` test + +Often we want to analyze a specific test from `perf.rust-lang.org`. +The easiest way to do that is to use the [rustc-perf][rustc-perf] +benchmarking suite, this approach is described [here](with_rustc_perf.md). + +Instead of using the benchmark suite CLI, you can also profile the benchmarks manually. First, +you need to clone the [rustc-perf][rustc-perf] repository: + +```bash +$ git clone https://github.com/rust-lang/rustc-perf +``` + +and then find the source code of the test that you want to profile. Sources for the tests +are found in [the `collector/compile-benchmarks` directory][compile-time dir] +and [the `collector/runtime-benchmarks` directory][runtime dir]. So let's +go into the directory of a specific test; we'll use `clap-rs` as an example: + +[rustc-perf]: https://github.com/rust-lang/rustc-perf +[compile-time dir]: https://github.com/rust-lang/rustc-perf/tree/master/collector/compile-benchmarks +[runtime dir]: https://github.com/rust-lang/rustc-perf/tree/master/collector/runtime-benchmarks + +```bash +cd collector/compile-benchmarks/clap-3.1.6 +``` + +In this case, let's say we want to profile the `cargo check` +performance. In that case, I would first run some basic commands to +build the dependencies: + +```bash +# Setup: first clean out any old results and build the dependencies: +cargo + clean +CARGO_INCREMENTAL=0 cargo + check +``` + +(Again, `` should be replaced with the name of the +toolchain we made in the first step.) + +Next: we want record the execution time for *just* the clap-rs crate, +running cargo check. I tend to use `cargo rustc` for this, since it +also allows me to add explicit flags, which we'll do later on. + +```bash +touch src/lib.rs +CARGO_INCREMENTAL=0 perf record -F99 --call-graph dwarf cargo rustc --profile check --lib +``` + +Note that final command: it's a doozy! It uses the `cargo rustc` +command, which executes rustc with (potentially) additional options; +the `--profile check` and `--lib` options specify that we are doing a +`cargo check` execution, and that this is a library (not a binary). + +At this point, we can use `perf` tooling to analyze the results. For example: + +```bash +perf report +``` + +will open up an interactive TUI program. In simple cases, that can be +helpful. For more detailed examination, the [`perf-focus` tool][pf] +can be helpful; it is covered below. + +**A note of caution.** Each of the rustc-perf tests is its own special + snowflake. In particular, some of them are not libraries, in which + case you would want to do `touch src/main.rs` and avoid passing + `--lib`. I'm not sure how best to tell which test is which to be + honest. + +### Gathering NLL data + +If you want to profile an NLL run, you can just pass extra options to +the `cargo rustc` command, like so: + +```bash +touch src/lib.rs +CARGO_INCREMENTAL=0 perf record -F99 --call-graph dwarf cargo rustc --profile check --lib -- -Z borrowck=mir +``` + +[pf]: https://github.com/nikomatsakis/perf-focus + +## Analyzing a perf profile with `perf focus` + +Once you've gathered a perf profile, we want to get some information +about it. For this, I personally use [perf focus][pf]. It's a kind of +simple but useful tool that lets you answer queries like: + +- "how much time was spent in function F" (no matter where it was called from) +- "how much time was spent in function F when it was called from G" +- "how much time was spent in function F *excluding* time spent in G" +- "what functions does F call and how much time does it spend in them" + +To understand how it works, you have to know just a bit about +perf. Basically, perf works by *sampling* your process on a regular +basis (or whenever some event occurs). For each sample, perf gathers a +backtrace. `perf focus` lets you write a regular expression that tests +which functions appear in that backtrace, and then tells you which +percentage of samples had a backtrace that met the regular +expression. It's probably easiest to explain by walking through how I +would analyze NLL performance. + +### Installing `perf-focus` + +You can install perf-focus using `cargo install`: + +```bash +cargo install perf-focus +``` + +### Example: How much time is spent in MIR borrowck? + +Let's say we've gathered the NLL data for a test. We'd like to know +how much time it is spending in the MIR borrow-checker. The "main" +function of the MIR borrowck is called `do_mir_borrowck`, so we can do +this command: + +```bash +$ perf focus '{do_mir_borrowck}' +Matcher : {do_mir_borrowck} +Matches : 228 +Not Matches: 542 +Percentage : 29% +``` + +The `'{do_mir_borrowck}'` argument is called the **matcher**. It +specifies the test to be applied on the backtrace. In this case, the +`{X}` indicates that there must be *some* function on the backtrace +that meets the regular expression `X`. In this case, that regex is +just the name of the function we want (in fact, it's a subset of the name; +the full name includes a bunch of other stuff, like the module +path). In this mode, perf-focus just prints out the percentage of +samples where `do_mir_borrowck` was on the stack: in this case, 29%. + +**A note about c++filt.** To get the data from `perf`, `perf focus` + currently executes `perf script` (perhaps there is a better + way...). I've sometimes found that `perf script` outputs C++ mangled + names. This is annoying. You can tell by running `perf script | + head` yourself — if you see names like `5rustc6middle` instead of + `rustc::middle`, then you have the same problem. You can solve this + by doing: + +```bash +perf script | c++filt | perf focus --from-stdin ... +``` + +This will pipe the output from `perf script` through `c++filt` and +should mostly convert those names into a more friendly format. The +`--from-stdin` flag to `perf focus` tells it to get its data from +stdin, rather than executing `perf focus`. We should make this more +convenient (at worst, maybe add a `c++filt` option to `perf focus`, or +just always use it — it's pretty harmless). + +### Example: How much time does MIR borrowck spend solving traits? + +Perhaps we'd like to know how much time MIR borrowck spends in the +trait checker. We can ask this using a more complex regex: + +```bash +$ perf focus '{do_mir_borrowck}..{^rustc::traits}' +Matcher : {do_mir_borrowck},..{^rustc::traits} +Matches : 12 +Not Matches: 1311 +Percentage : 0% +``` + +Here we used the `..` operator to ask "how often do we have +`do_mir_borrowck` on the stack and then, later, some function whose +name begins with `rustc::traits`?" (basically, code in that module). It +turns out the answer is "almost never" — only 12 samples fit that +description (if you ever see *no* samples, that often indicates your +query is messed up). + +If you're curious, you can find out exactly which samples by using the +`--print-match` option. This will print out the full backtrace for +each sample. The `|` at the front of the line indicates the part that +the regular expression matched. + +### Example: Where does MIR borrowck spend its time? + +Often we want to do more "explorational" queries. Like, we know that +MIR borrowck is 29% of the time, but where does that time get spent? +For that, the `--tree-callees` option is often the best tool. You +usually also want to give `--tree-min-percent` or +`--tree-max-depth`. The result looks like this: + +```bash +$ perf focus '{do_mir_borrowck}' --tree-callees --tree-min-percent 3 +Matcher : {do_mir_borrowck} +Matches : 577 +Not Matches: 746 +Percentage : 43% + +Tree +| matched `{do_mir_borrowck}` (43% total, 0% self) +: | rustc_borrowck::nll::compute_regions (20% total, 0% self) +: : | rustc_borrowck::nll::type_check::type_check_internal (13% total, 0% self) +: : : | core::ops::function::FnOnce::call_once (5% total, 0% self) +: : : : | rustc_borrowck::nll::type_check::liveness::generate (5% total, 3% self) +: : : | as rustc::mir::visit::Visitor<'tcx>>::visit_mir (3% total, 0% self) +: | rustc::mir::visit::Visitor::visit_mir (8% total, 6% self) +: | as rustc_mir_dataflow::DataflowResultsConsumer<'cx, 'tcx>>::visit_statement_entry (5% total, 0% self) +: | rustc_mir_dataflow::do_dataflow (3% total, 0% self) +``` + +What happens with `--tree-callees` is that + +- we find each sample matching the regular expression +- we look at the code that occurs *after* the regex match and try + to build up a call tree + +The `--tree-min-percent 3` option says "only show me things that take +more than 3% of the time". Without this, the tree often gets really +noisy and includes random stuff like the innards of +malloc. `--tree-max-depth` can be useful too, it just limits how many +levels we print. + +For each line, we display the percent of time in that function +altogether ("total") and the percent of time spent in **just that +function and not some callee of that function** (self). Usually +"total" is the more interesting number, but not always. + +### Relative percentages + +By default, all in perf-focus are relative to the **total program +execution**. This is useful to help you keep perspective — often as +we drill down to find hot spots, we can lose sight of the fact that, +in terms of overall program execution, this "hot spot" is actually not +important. It also ensures that percentages between different queries +are easily compared against one another. + +That said, sometimes it's useful to get relative percentages, so `perf +focus` offers a `--relative` option. In this case, the percentages are +listed only for samples that match (vs all samples). So for example we +could get our percentages relative to the borrowck itself +like so: + +```bash +$ perf focus '{do_mir_borrowck}' --tree-callees --relative --tree-max-depth 1 --tree-min-percent 5 +Matcher : {do_mir_borrowck} +Matches : 577 +Not Matches: 746 +Percentage : 100% + +Tree +| matched `{do_mir_borrowck}` (100% total, 0% self) +: | rustc_borrowck::nll::compute_regions (47% total, 0% self) [...] +: | rustc::mir::visit::Visitor::visit_mir (19% total, 15% self) [...] +: | as rustc_mir_dataflow::DataflowResultsConsumer<'cx, 'tcx>>::visit_statement_entry (13% total, 0% self) [...] +: | rustc_mir_dataflow::do_dataflow (8% total, 1% self) [...] +``` + +Here you see that `compute_regions` came up as "47% total" — that +means that 47% of `do_mir_borrowck` is spent in that function. Before, +we saw 20% — that's because `do_mir_borrowck` itself is only 43% of +the total time (and `.47 * .43 = .20`). diff --git a/src/doc/rustc-dev-guide/src/profiling/with_rustc_perf.md b/src/doc/rustc-dev-guide/src/profiling/with_rustc_perf.md new file mode 100644 index 0000000000000..2158b655b3e27 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/profiling/with_rustc_perf.md @@ -0,0 +1,60 @@ +# Profiling with rustc-perf + +The [Rust benchmark suite][rustc-perf] provides a comprehensive way of profiling and benchmarking +the Rust compiler. +You can find instructions on how to use the suite in its [manual][rustc-perf-readme]. + +However, using the suite manually can be a bit cumbersome. +To make this easier for `rustc` contributors, +the compiler build system (`bootstrap`) also provides built-in integration with the benchmarking suite, +which will download and build the suite for you, build a local compiler toolchain and let you profile it using a simplified command-line interface. + +You can use the `./x perf [options]` command to use this integration. + +You can use normal bootstrap flags for this command, such as `--stage 1` or `--stage 2`, for example to modify the stage of the created sysroot. It might also be useful to configure `bootstrap.toml` to better support profiling, e.g. set `rust.debuginfo-level = 1` to add source line information to the built compiler. + +`x perf` currently supports the following commands: +- `benchmark `: Benchmark the compiler and store the results under the passed `id`. +- `compare `: Compare the benchmark results of two compilers with the two passed `id`s. +- `eprintln`: Just run the compiler and capture its `stderr` output. + Note that the compiler normally does not print + anything to `stderr`, so you might want to add some `eprintln!` calls to get any output. +- `samply`: Profile the compiler using the [samply][samply] sampling profiler. +- `cachegrind`: Use [Cachegrind][cachegrind] to generate a detailed simulated trace of the compiler's execution. + +> You can find a more detailed description of the profilers in the [`rustc-perf` manual][rustc-perf-readme-profilers]. + +You can use the following options for the `x perf` command, which mirror the corresponding options of the +`profile_local` and `bench_local` commands that you can use in the suite: + +- `--include`: Select benchmarks which should be profiled/benchmarked. +- `--profiles`: Select profiles (`Check`, `Debug`, `Opt`, `Doc`) which should be profiled/benchmarked. +- `--scenarios`: Select scenarios (`Full`, `IncrFull`, `IncrPatched`, `IncrUnchanged`) which should be profiled/benchmarked. + +## Example profiling diff for external crates +It can be of interest to generate a local diff for two commits of the compiler for external crates. +To start, in the `rustc-perf` repo, build the collector, which runs the Rust compiler benchmarks as follows. +``` +cargo build --release -p collector +``` +The collector can then be run using cargo, specifying the collector binary. +It expects the following arguments: +- ``: Profiler selection for how performance should be measured. + For this example, we will use Cachegrind. +- ``: The Rust compiler revision to benchmark, specified as a commit SHA from `rust-lang/rust`. +Optional arguments allow running profiles and scenarios as described above. +More information regarding the mandatory and +optional arguments can be found in the [rustc-perf-readme-profilers]. + +Then, for the case of generating a profile diff for the crate `serve_derive-1.0.136`, for two commits `` and `` from the `rust-lang/rust` repository, +run the following in the `rustc-perf` repo: +``` +cargo run --release --bin collector profile_local cachegrind + --rustc2 + --exact-match serde_derive-1.0.136 --profiles Check --scenarios IncrUnchanged +``` + + +[samply]: https://github.com/mstange/samply +[cachegrind]: https://www.cs.cmu.edu/afs/cs.cmu.edu/project/cmt-40/Nice/RuleRefinement/bin/valgrind-3.2.0/docs/html/cg-manual.html +[rustc-perf]: https://github.com/rust-lang/rustc-perf +[rustc-perf-readme]: https://github.com/rust-lang/rustc-perf/blob/master/collector/README.md +[rustc-perf-readme-profilers]: https://github.com/rust-lang/rustc-perf/blob/master/collector/README.md#profiling-local-builds diff --git a/src/doc/rustc-dev-guide/src/profiling/wpa_profiling.md b/src/doc/rustc-dev-guide/src/profiling/wpa_profiling.md new file mode 100644 index 0000000000000..d2680d40853f7 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/profiling/wpa_profiling.md @@ -0,0 +1,108 @@ +# Profiling on Windows + +## Introducing WPR and WPA + +High-level performance analysis (including memory usage) can be performed with the Windows +Performance Recorder (WPR) and Windows Performance Analyzer (WPA). As the names suggest, WPR is for +recording system statistics (in the form of event trace log a.k.a. ETL files), while WPA is for +analyzing these ETL files. + +WPR collects system wide statistics, so it won't just record things relevant to rustc but also +everything else that's running on the machine. During analysis, we can filter to just the things we +find interesting. + +These tools are quite powerful but also require a bit of learning +before we can successfully profile the Rust compiler. + +Here we will explore how to use WPR and WPA for analyzing the Rust compiler as well as provide +links to useful "profiles" (i.e., settings files that tweak the defaults for WPR and WPA) that are +specifically designed to make analyzing rustc easier. + +### Installing WPR and WPA + +You can install WPR and WPA as part of the Windows Performance Toolkit which itself is an option as +part of downloading the Windows Assessment and Deployment Kit (ADK). You can download the ADK +installer [here](https://go.microsoft.com/fwlink/?linkid=2086042). Make sure to select the Windows +Performance Toolkit (you don't need to select anything else). + +## Recording + +In order to perform system analysis, you'll first need to record your system with WPR. Open WPR and +at the bottom of the window select the "profiles" of the things you want to record. For looking +into memory usage of the rustc bootstrap process, we'll want to select the following items: + +* CPU usage +* VirtualAlloc usage + +You might be tempted to record "Heap usage" as well, but this records every single heap allocation +and can be very, very expensive. For high-level analysis, it might be best to leave that turned +off. + +Now we need to get our setup ready to record. For memory usage analysis, it is best to record the +stage 2 compiler build with a stage 1 compiler build with debug symbols. Having symbols in the +compiler we're using to build rustc will aid our analysis greatly by allowing WPA to resolve Rust +symbols correctly. Unfortunately, the stage 0 compiler does not have symbols turned on which is why +we'll need to build a stage 1 compiler and then a stage 2 compiler ourselves. + +To do this, make sure you have set `debuginfo-level = 1` in your `bootstrap.toml` file. This tells +rustc to generate debug information which includes stack frames when bootstrapping. + +Now you can build the stage 1 compiler: `x build --stage 1 -i library` or however +else you want to build the stage 1 compiler. + +Now that the stage 1 compiler is built, we can record the stage 2 build. Go back to WPR, click the +"start" button and build the stage 2 compiler (e.g., `x build --stage=2 -i library`). +When this process finishes, stop the recording. + +Click the Save button and once that process is complete, click the "Open in WPA" button which +appears. + +> Note: The trace file is fairly large so it can take WPA some time to finish opening the file. + +## Analysis + +Now that our ETL file is open in WPA, we can analyze the results. First, we'll want to apply the +pre-made "profile" which will put WPA into a state conducive to analyzing rustc bootstrap. Download +the profile [here](https://github.com/wesleywiser/rustc-bootstrap-wpa-analysis/releases/download/1/rustc.generic.wpaProfile). +Select the "Profiles" menu at the top, then "apply" and then choose the downloaded profile. + +You should see something resembling the following: + +![WPA with profile applied](../img/wpa-initial-memory.png) + +Next, we will need to tell WPA to load and process debug symbols so that it can properly demangle +the Rust stack traces. To do this, click "Trace" and then choose "Load Symbols". This step can take +a while. + +Once WPA has loaded symbols for rustc, we can expand the rustc.exe node and begin drilling down +into the stack with the largest allocations. + +To do that, we'll expand the `[Root]` node in the "Commit Stack" column and continue expanding +until we find interesting stack frames. + +> Tip: After selecting the node you want to expand, press the right arrow key. This will expand the +node and put the selection on the next largest node in the expanded set. You can continue pressing +the right arrow key until you reach an interesting frame. + +![WPA with expanded stack](../img/wpa-stack.png) + +In this sample, you can see calls through codegen are allocating ~30gb of memory in total +throughout this profile. + +## Other Analysis Tabs + +The profile also includes a few other tabs which can be helpful: + +- System Configuration + - General information about the system the capture was recorded on. +- rustc Build Processes + - A flat list of relevant processes such as rustc.exe, cargo.exe, link.exe etc. + - Each process lists its command line arguments. + - Useful for figuring out what a specific rustc process was working on. +- rustc Build Process Tree + - Timeline showing when processes started and exited. +- rustc CPU Analysis + - Contains charts preconfigured to show hotspots in rustc. + - These charts are designed to support analyzing where rustc is spending its time. +- rustc Memory Analysis + - Contains charts preconfigured to show where rustc is allocating memory. diff --git a/src/doc/rustc-dev-guide/src/rustdoc-internals/rustdoc-json-test-suite.md b/src/doc/rustc-dev-guide/src/rustdoc-internals/rustdoc-json-test-suite.md index f9d9d1b59a919..7a846b711326a 100644 --- a/src/doc/rustc-dev-guide/src/rustdoc-internals/rustdoc-json-test-suite.md +++ b/src/doc/rustc-dev-guide/src/rustdoc-internals/rustdoc-json-test-suite.md @@ -32,10 +32,10 @@ It uses [JSONPath] as a query language, which takes a path, and returns a *list* - `//@ has `: Checks `` exists, i.e. matches at least 1 value. - `//@ !has `: Checks `` doesn't exist, i.e. matches 0 values. -- `//@ has `: Check `` exists, and at least 1 of the matches is equal to the given `` +- `//@ has `: Check `` exists, and at least 1 of the matches is equal to the given `` - `//@ !has `: Checks `` exists, but none of the matches equal the given ``. - `//@ is `: Check `` matches exactly one value, and it's equal to the given ``. -- `//@ is ...`: Check that `` matches to exactly every given ``. +- `//@ is ...`: Check that `` matches to exactly every given ``. Ordering doesn't matter here. - `//@ !is `: Check `` matches exactly one value, and that value is not equal to the given ``. - `//@ count `: Check that `` matches to `` of values. @@ -47,9 +47,8 @@ These are defined in [`directive.rs`]. Values can be either JSON values, or variables. -- JSON values are JSON literals, e.g. `true`, `"string"`, `{"key": "value"}`. - These often need to be quoted using `'`, to be processed as 1 value. - See [§Argument splitting](#argument-splitting) +- JSON values are JSON literals, e.g. `true`, `"string"`, `{"key": "value"}`. + These often need to be quoted using `'`, to be processed as 1 value. See [§Argument splitting](#argument-splitting) - Variables can be used to store the value in one path, and use it in later queries. They are set with the `//@ set = ` directive, and accessed with `$` diff --git a/src/doc/rustc-dev-guide/src/solve/opaque-types.md b/src/doc/rustc-dev-guide/src/solve/opaque-types.md index 6bb4534608dbd..ac038e354f53f 100644 --- a/src/doc/rustc-dev-guide/src/solve/opaque-types.md +++ b/src/doc/rustc-dev-guide/src/solve/opaque-types.md @@ -51,7 +51,7 @@ We then check whether we're able to *semantically* unify the generic arguments o with the arguments of any opaque type already in the opaque types storage. If so, we unify the previously stored type with the expected type of this `normalizes-to` call: [source][eq-prev][^1]. -If not, we insert the expected type in the opaque types storage: [source][insert-storage][^2]. +If not, we insert the expected type in the opaque types storage: [source][insert-storage][^2]. Finally, we check whether the item bounds of the opaque hold for the expected type: [source][item-bounds-ck]. @@ -98,7 +98,7 @@ end up leaking placeholders. The handling of member constraints does not change in the new solver. See the [relevant existing chapter][member-constraints] for that. -[member-constraints]: ../borrow-check/region-inference/member-constraints.md +[member-constraints]: ../borrow_check/region_inference/member_constraints.md ## calling methods on opaque types diff --git a/src/doc/rustc-dev-guide/src/stability-guarantees.md b/src/doc/rustc-dev-guide/src/stability-guarantees.md index ed548c250c840..21c4f3594d84e 100644 --- a/src/doc/rustc-dev-guide/src/stability-guarantees.md +++ b/src/doc/rustc-dev-guide/src/stability-guarantees.md @@ -14,7 +14,7 @@ This page gives an overview of our stability guarantees. ## rustc-dev-guide links * [Stabilizing library features](./stability.md) -* [Stabilizing language features](./stabilization-guide.md) +* [Stabilizing language features](./stabilization_guide.md) * [What qualifies as a bug fix?](./bug-fix-procedure.md#what-qualifies-as-a-bug-fix) ## Exemptions diff --git a/src/doc/rustc-dev-guide/src/stability.md b/src/doc/rustc-dev-guide/src/stability.md index f2f2dd909fae9..3c4c65fdd5a88 100644 --- a/src/doc/rustc-dev-guide/src/stability.md +++ b/src/doc/rustc-dev-guide/src/stability.md @@ -4,7 +4,7 @@ This section is about the stability attributes and schemes that allow stable APIs to use unstable APIs internally in the rustc standard library. **NOTE**: this section is for *library* features, not *language* features. For instructions on -stabilizing a language feature see [Stabilizing Features](./stabilization-guide.md). +stabilizing a language feature see [Stabilizing Features](./stabilization_guide.md). ## unstable diff --git a/src/doc/rustc-dev-guide/src/stabilization_guide.md b/src/doc/rustc-dev-guide/src/stabilization_guide.md new file mode 100644 index 0000000000000..6167546a2bc83 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/stabilization_guide.md @@ -0,0 +1,181 @@ +# Request for stabilization + +**NOTE**: This page is about stabilizing *language* features. +For stabilizing *library* features, see [Stabilizing a library feature]. + +[Stabilizing a library feature]: ./stability.md#stabilizing-a-library-feature + +Once an unstable feature has been well-tested with no outstanding concerns, anyone may push for its stabilization, though involving the people who have worked on it is prudent. +Follow these steps: + +## Write an RFC, if needed + +If the feature was part of a [lang experiment], the lang team generally will want to first accept an RFC before stabilization. + +[lang experiment]: https://lang-team.rust-lang.org/how_to/experiment.html + +## Documentation PRs + + + +The feature might be documented in the [`Unstable Book`], located at [`src/doc/unstable-book`]. +Remove the page for the feature gate if it exists. +Integrate any useful parts of that documentation in other places. + +Places that may need updated documentation include: + +- [The Reference]: This must be updated, in full detail, and a member of the lang-docs team must review and approve the PR before the stabilization can be merged. +- [The Book]: This is updated as needed. + If you're not sure, please open an issue on this repository and it can be discussed. +- Standard library documentation: This is updated as needed. + Language features often don't need this, but if it's a feature that changes how idiomatic examples are written, such as when `?` was added to the language, updating these in the library documentation is important. + Review also the keyword documentation and ABI documentation in the standard library, as these sometimes need updates for language changes. +- [Rust by Example]: This is updated as needed. + +Prepare PRs to update documentation involving this new feature for the repositories mentioned above. +Maintainers of these repositories will keep these PRs open until the whole stabilization process has completed. +Meanwhile, we can proceed to the next step. + +## Write a stabilization report + +Author a stabilization report using the [template found in this repository][srt]. + +The stabilization reports summarizes: + +- The main design decisions and deviations since the RFC was accepted, including both decisions that were FCP'd or otherwise accepted by the language team as well as those being presented to the lang team for the first time. + - Often, the final stabilized language feature has significant design deviations from the original RFC. + That's OK, but these deviations must be highlighted and explained carefully. +- The work that has been done since the RFC was accepted, acknowledging the main contributors that helped drive the language feature forward. + +The [*Stabilization Template*][srt] includes a series of questions that aim to surface connections between this feature and lang's subteams (e.g. types, opsem, lang-docs, etc.) and to identify items that are commonly overlooked. + +[srt]: ./stabilization_report_template.md + +The stabilization report is typically posted as the main comment on the stabilization PR (see the next section). + +## Stabilization PR + +Every feature is different, and some may require steps beyond what this guide discusses. + +Before the stabilization will be considered by the lang team, there must be a complete PR to the Reference describing the feature, and before the stabilization PR will be merged, this PR must have been reviewed and approved by the lang-docs team. + +### Updating the feature-gate listing + +There is a central listing of unstable feature-gates in [`compiler/rustc_feature/src/unstable.rs`]. +Search for the `declare_features!` macro. +There should be an entry for the feature you are aiming to stabilize, +something like the following (taken from [rust-lang/rust#32409]): + +```rust,ignore +// pub(restricted) visibilities (RFC 1422) +(unstable, pub_restricted, "CURRENT_RUSTC_VERSION", Some(32409)), +``` + +The above line should be moved to [`compiler/rustc_feature/src/accepted.rs`]. +Entries in the `declare_features!` call are sorted, so find the correct place. +When it is done, it should look like: + +```rust,ignore +// pub(restricted) visibilities (RFC 1422) +(accepted, pub_restricted, "CURRENT_RUSTC_VERSION", Some(32409)), +// note that we changed this +``` + +(Even though you will encounter version numbers in the file of past changes, you should not put the rustc version you expect your stabilization to happen in, but instead use `CURRENT_RUSTC_VERSION`.) + +### Removing existing uses of the feature-gate + +Next, search for the feature string (in this case, `pub_restricted`) in the codebase to find where it appears. +Change uses of `#![feature(XXX)]` from the `std` and any rustc crates +(which includes test folders under `library/` and `compiler/` but not the toplevel `tests/` one) +to be `#![cfg_attr(bootstrap, feature(XXX))]`. +This includes the feature-gate only for stage0, which is built using the current beta (this is needed because the feature is still unstable in the current beta). + +Also, remove those strings from any tests (e.g. under `tests/`). If there are tests specifically targeting the feature-gate (i.e., testing that the feature-gate is required to use the feature, but nothing else), simply remove the test. + +### Do not require the feature-gate to use the feature + +Most importantly, remove the code which flags an error if the feature-gate is not present (since the feature is now considered stable). +If the feature can be detected because it employs some new syntax, then a common place for that code to be is in `compiler/rustc_ast_passes/src/feature_gate.rs`. +For example, you might see code like this: + +```rust,ignore +gate_all!(pub_restricted, "`pub(restricted)` syntax is experimental"); +``` + +The `gate_all!` macro reports an error if the `pub_restricted` feature is not enabled. +It is not needed now that `pub(restricted)` is stable. + +For more subtle features, you may find code like this: + +```rust,ignore +if self.tcx.features().async_fn_in_dyn_trait() { /* XXX */ } +``` + +This `pub_restricted` field (named after the feature) would ordinarily be false if the feature flag is not present and true if it is. +So, transform the code to assume that the field is true. +In this case, that would mean removing the `if` and leaving just the `/* XXX */`. + +```rust,ignore +if self.tcx.sess.features.borrow().pub_restricted { /* XXX */ } +becomes +/* XXX */ + +if self.tcx.sess.features.borrow().pub_restricted && something { /* XXX */ } + becomes +if something { /* XXX */ } +``` + +[rust-lang/rust#32409]: https://github.com/rust-lang/rust/issues/32409 +[std-guide-stabilization]: https://std-dev-guide.rust-lang.org/feature-lifecycle/stabilization.html +[src-version]: https://github.com/rust-lang/rust/blob/HEAD/src/version +[forge-versions]: https://forge.rust-lang.org/#current-release-versions +[forge-release-process]: https://forge.rust-lang.org/release/process.html +[`compiler/rustc_feature`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_feature/index.html +[`compiler/rustc_feature/src/accepted.rs`]: https://github.com/rust-lang/rust/tree/HEAD/compiler/rustc_feature/src/accepted.rs +[`compiler/rustc_feature/src/unstable.rs`]: https://github.com/rust-lang/rust/tree/HEAD/compiler/rustc_feature/src/unstable.rs +[The Reference]: https://github.com/rust-lang/reference +[The Book]: https://github.com/rust-lang/book +[Rust by Example]: https://github.com/rust-lang/rust-by-example +[`Unstable Book`]: https://doc.rust-lang.org/unstable-book/index.html +[`src/doc/unstable-book`]: https://github.com/rust-lang/rust/tree/HEAD/src/doc/unstable-book + +## Team nominations + +When opening the stabilization PR, CC the lang team and its advisors (`@rust-lang/lang @rust-lang/lang-advisors`) and any other teams to whom the feature is relevant, e.g.: + +- `@rust-lang/types`, for type system interactions. +- `@rust-lang/opsem`, for interactions with unsafe code. +- `@rust-lang/compiler`, for implementation robustness. +- `@rust-lang/libs-api`, for changes to the standard library API or its guarantees. +- `@rust-lang/lang-docs`, for questions about how this should be documented in the Reference. + +After the stabilization PR is opened with the stabilization report, wait a bit for any immediate comments. +When such comments "simmer down" and you feel the PR is ready for consideration by the lang team, [nominate the PR](https://lang-team.rust-lang.org/how_to/nominate.html) to get it on the agenda for consideration in an upcoming lang meeting. + +If you are not a `rust-lang` organization member, you can ask your assigned reviewer to CC the relevant teams on your behalf. + +## Propose FCP on the PR + +After the lang team and other relevant teams review the stabilization, and after you have answered any questions they may have had, a member of one of the teams may propose to accept the stabilization by commenting: + +```text +@rfcbot fcp merge +``` + +Once enough team members have reviewed, the PR will move into a "final comment period" (FCP). +If no new concerns are raised, this period will complete and the PR can be merged after implementation review in the usual way. + +## Reviewing and merging stabilizations + +On a stabilization, before giving it the `r+`, ensure that the PR: + +- Matches what the team proposed for stabilization and what is documented in the Reference PR. +- Includes any changes the team decided to request along the way in order to resolve or avoid concerns. +- Is otherwise exactly what is described in the stabilization report and in any relevant RFCs or prior lang FCPs. +- Does not expose on stable behaviors other than those specified, accepted for stabilization, and documented in the Reference. +- Has sufficient tests to convincingly demonstrate these things. +- Is accompanied by a PR to the Reference than has been reviewed and approved by a member of lang-docs. + +In particular, when reviewing the PR, keep an eye out for any user-visible details that the lang team failed to consider and specify. +If you find one, describe it and nominate the PR for the lang team. diff --git a/src/doc/rustc-dev-guide/src/stabilization_report_template.md b/src/doc/rustc-dev-guide/src/stabilization_report_template.md new file mode 100644 index 0000000000000..793f7d7e45cff --- /dev/null +++ b/src/doc/rustc-dev-guide/src/stabilization_report_template.md @@ -0,0 +1,277 @@ +# Stabilization report template + +## What is this? + +This is a template for [stabilization reports](./stabilization_guide.md) of **language features**. The questions aim to solicit the details most often needed. These details help reviewers to identify potential problems upfront. Not all parts of the template will apply to every stabilization. If a question doesn't apply, explain briefly why. + +Copy everything after the separator and edit it as Markdown. Replace each *TODO* with your answer. + +--- + +# Stabilization report + +## Summary + +> Remind us what this feature is and what value it provides. Tell the story of what led up to this stabilization. +> +> E.g., see: +> +> - [Stabilize AFIT/RPITIT](https://web.archive.org/web/20250329190642/https://github.com/rust-lang/rust/pull/115822) +> - [Stabilize RTN](https://web.archive.org/web/20250321214601/https://github.com/rust-lang/rust/pull/138424) +> - [Stabilize ATPIT](https://web.archive.org/web/20250124214256/https://github.com/rust-lang/rust/pull/120700) +> - [Stabilize opaque type precise capturing](https://web.archive.org/web/20250312173538/https://github.com/rust-lang/rust/pull/127672) + +*TODO* + +Tracking: + +- *TODO* (Link to tracking issue.) + +Reference PRs: + +- *TODO* (Link to Reference PRs.) + +cc @rust-lang/lang @rust-lang/lang-advisors + +### What is stabilized + +> Describe each behavior being stabilized and give a short example of code that will now be accepted. + +```rust +todo!() +``` + +### What isn't stabilized + +> Describe any parts of the feature not being stabilized. Talk about what we might want to do later and what doors are being left open for that. If what we're not stabilizing might lead to surprises for users, talk about that in particular. + +## Design + +### Reference + +> What updates are needed to the Reference? Link to each PR. If the Reference is missing content needed for describing this feature, discuss that. + +- *TODO* + +### RFC history + +> What RFCs have been accepted for this feature? + +- *TODO* + +### Answers to unresolved questions + +> What questions were left unresolved by the RFC? How have they been answered? Link to any relevant lang decisions. + +*TODO* + +### Post-RFC changes + +> What other user-visible changes have occurred since the RFC was accepted? Describe both changes that the lang team accepted (and link to those decisions) as well as changes that are being presented to the team for the first time in this stabilization report. + +*TODO* + +### Key points + +> What decisions have been most difficult and what behaviors to be stabilized have proved most contentious? Summarize the major arguments on all sides and link to earlier documents and discussions. + +*TODO* + +### Nightly extensions + +> Are there extensions to this feature that remain unstable? How do we know that we are not accidentally committing to those? + +*TODO* + +### Doors closed + +> What doors does this stabilization close for later changes to the language? E.g., does this stabilization make any other RFCs, lang experiments, or known in-flight proposals more difficult or impossible to do later? + +## Feedback + +### Call for testing + +> Has a "call for testing" been done? If so, what feedback was received? + +*TODO* + +### Nightly use + +> Do any known nightly users use this feature? Counting instances of `#![feature(FEATURE_NAME)]` on GitHub with grep might be informative. + +*TODO* + +## Implementation + +### Major parts + +> Summarize the major parts of the implementation and provide links into the code and to relevant PRs. +> +> See, e.g., this breakdown of the major parts of async closures: +> +> - + +*TODO* + +### Coverage + +> Summarize the test coverage of this feature. +> +> Consider what the "edges" of this feature are. We're particularly interested in seeing tests that assure us about exactly what nearby things we're not stabilizing. Tests should of course comprehensively demonstrate that the feature works. Think too about demonstrating the diagnostics seen when common mistakes are made and the feature is used incorrectly. +> +> Within each test, include a comment at the top describing the purpose of the test and what set of invariants it intends to demonstrate. This is a great help to our review. +> +> Describe any known or intentional gaps in test coverage. +> +> Contextualize and link to test folders and individual tests. + +*TODO* + +### Outstanding bugs + +> What outstanding bugs involve this feature? List them. Should any block the stabilization? Discuss why or why not. + +*TODO* + +- *TODO* +- *TODO* +- *TODO* + +### Outstanding FIXMEs + +> What FIXMEs are still in the code for that feature and why is it OK to leave them there? + +*TODO* + +### Tool changes + +> What changes must be made to our other tools to support this feature. Has this work been done? Link to any relevant PRs and issues. + +- [ ] rustfmt + - *TODO* +- [ ] rust-analyzer + - *TODO* +- [ ] rustdoc (both JSON and HTML) + - *TODO* +- [ ] cargo + - *TODO* +- [ ] clippy + - *TODO* +- [ ] rustup + - *TODO* +- [ ] docs.rs + - *TODO* + +*TODO* + +### Breaking changes + +> If this stabilization represents a known breaking change, link to the crater report, the analysis of the crater report, and to all PRs we've made to ecosystem projects affected by this breakage. Discuss any limitations of what we're able to know about or to fix. + +*TODO* + +Crater report: + +- *TODO* + +Crater analysis: + +- *TODO* + +PRs to affected crates: + +- *TODO* +- *TODO* +- *TODO* + +## Type system, opsem + +### Compile-time checks + +> What compilation-time checks are done that are needed to prevent undefined behavior? +> +> Link to tests demonstrating that these checks are being done. + +*TODO* + +- *TODO* +- *TODO* +- *TODO* + +### Type system rules + +> What type system rules are enforced for this feature and what is the purpose of each? + +*TODO* + +### Sound by default? + +> Does the feature's implementation need specific checks to prevent UB, or is it sound by default and need specific opt-in to perform the dangerous/unsafe operations? If it is not sound by default, what is the rationale? + +*TODO* + +### Breaks the AM? + +> Can users use this feature to introduce undefined behavior, or use this feature to break the abstraction of Rust and expose the underlying assembly-level implementation? Describe this if so. + +*TODO* + +## Common interactions + +### Temporaries + +> Does this feature introduce new expressions that can produce temporaries? What are the scopes of those temporaries? + +*TODO* + +### Drop order + +> Does this feature raise questions about the order in which we should drop values? Talk about the decisions made here and how they're consistent with our earlier decisions. + +*TODO* + +### Pre-expansion / post-expansion + +> Does this feature raise questions about what should be accepted pre-expansion (e.g. in code covered by `#[cfg(false)]`) versus what should be accepted post-expansion? What decisions were made about this? + +*TODO* + +### Edition hygiene + +> If this feature is gated on an edition, how do we decide, in the context of the edition hygiene of tokens, whether to accept or reject code. E.g., what token do we use to decide? + +*TODO* + +### SemVer implications + +> Does this feature create any new ways in which library authors must take care to prevent breaking downstreams when making minor-version releases? Describe these. Are these new hazards "major" or "minor" according to [RFC 1105](https://rust-lang.github.io/rfcs/1105-api-evolution.html)? + +*TODO* + +### Exposing other features + +> Are there any other unstable features whose behavior may be exposed by this feature in any way? What features present the highest risk of that? + +*TODO* + +## History + +> List issues and PRs that are important for understanding how we got here. + +- *TODO* +- *TODO* +- *TODO* + +## Acknowledgments + +> Summarize contributors to the feature by name for recognition and so that those people are notified about the stabilization. Does anyone who worked on this *not* think it should be stabilized right now? We'd like to hear about that if so. + +*TODO* + +## Open items + +> List any known items that have not yet been completed and that should be before this is stabilized. + +- [ ] *TODO* +- [ ] *TODO* +- [ ] *TODO* diff --git a/src/doc/rustc-dev-guide/src/tests/ci.md b/src/doc/rustc-dev-guide/src/tests/ci.md index 723926f2241fe..ce80b07fe08db 100644 --- a/src/doc/rustc-dev-guide/src/tests/ci.md +++ b/src/doc/rustc-dev-guide/src/tests/ci.md @@ -6,15 +6,16 @@ The primary goal of our CI system is to ensure that the `main` branch of From a high-level point of view, when you open a pull request at `rust-lang/rust`, the following will happen: -- A small [subset](#pull-request-builds) of tests and checks are run after each push to the PR. +- A small [subset](#pull-request-builds) of tests and checks are run after each + push to the PR. This should help catch common errors. - When the PR is approved, the [bors] bot enqueues the PR into a [merge queue]. - Once the PR gets to the front of the queue, bors will create a merge commit and run the [full test suite](#auto-builds) on it. The merge commit either contains only one specific PR or it can be a ["rollup"](#rollups) which combines multiple PRs together, to reduce CI costs and merge delays. -- Once the whole test suite finishes, two things can happen. - Either CI fails with an error that needs to be addressed by the developer, or CI succeeds and +- Once the whole test suite finishes, two things can happen. Either CI fails + with an error that needs to be addressed by the developer, or CI succeeds and the merge commit is then pushed to the `main` branch. If you want to modify what gets executed on CI, see [Modifying CI jobs](#modifying-ci-jobs). @@ -302,7 +303,8 @@ This is worth it because these release artifacts: - Allow perf testing even at a later date. - Allow bisection when bugs are discovered later. -- Ensure release quality since if we're always releasing, we can catch problems early. +- Ensure release quality since if we're always releasing, we can catch problems + early. ### Rollups @@ -447,7 +449,8 @@ If you want to determine which `bootstrap.toml` settings are used in CI for a particular job, it is probably easiest to just look at the build log. To do this: -1. Go to +1. Go to + to find the most recently successful build, and click on it. 2. Choose the job you are interested in on the left-hand side. 3. Click on the gear icon and choose "View raw logs" diff --git a/src/doc/rustc-dev-guide/src/tests/compiletest.md b/src/doc/rustc-dev-guide/src/tests/compiletest.md index 5c4dfb6e0dd19..64276a9ea451a 100644 --- a/src/doc/rustc-dev-guide/src/tests/compiletest.md +++ b/src/doc/rustc-dev-guide/src/tests/compiletest.md @@ -2,8 +2,8 @@ ## Introduction -`compiletest` is the main test harness of the Rust test suite. -It allows test authors to organize large numbers of tests (the Rust compiler has many +`compiletest` is the main test harness of the Rust test suite. It allows test +authors to organize large numbers of tests (the Rust compiler has many thousands), efficient test execution (parallel execution is supported), and allows the test author to configure behavior and expected results of both individual and groups of tests. @@ -22,10 +22,9 @@ individual and groups of tests. `compiletest` may check test code for compile-time or run-time success/failure. Tests are typically organized as a Rust source file with annotations in comments -before and/or within the test code. -These comments serve to direct `compiletest` -on if or how to run the test, what behavior to expect, and more. -See [directives](directives.md) and the test suite documentation below for more details +before and/or within the test code. These comments serve to direct `compiletest` +on if or how to run the test, what behavior to expect, and more. See +[directives](directives.md) and the test suite documentation below for more details on these annotations. See the [Adding new tests](adding.md) and [Best practices](best-practices.md) @@ -41,18 +40,16 @@ Additionally, bootstrap accepts several common arguments directly, e.g. `x test --no-capture --force-rerun --run --pass`. Compiletest itself tries to avoid running tests when the artifacts that are -involved (mainly the compiler) haven't changed. -You can use `x test --test-args +involved (mainly the compiler) haven't changed. You can use `x test --test-args --force-rerun` to rerun a test even when none of the inputs have changed. ## Test suites -All of the tests are in the [`tests`] directory. -The tests are organized into "suites", with each suite in a separate subdirectory. -Each test suite behaves a -little differently, with different compiler behavior and different checks for correctness. -For example, the [`tests/incremental`] directory contains tests for incremental compilation. -The various suites are defined in +All of the tests are in the [`tests`] directory. The tests are organized into +"suites", with each suite in a separate subdirectory. Each test suite behaves a +little differently, with different compiler behavior and different checks for +correctness. For example, the [`tests/incremental`] directory contains tests for +incremental compilation. The various suites are defined in [`src/tools/compiletest/src/common.rs`] in the `pub enum Mode` declaration. The following test suites are available, with links for more information: @@ -83,7 +80,7 @@ The following test suites are available, with links for more information: ### The build-std test suite -[`build-std`](#build-std-tests) tests that -Zbuild-std works. +[`build-std`](#build-std-tests) test that -Zbuild-std works. ### Rustdoc test suites @@ -108,9 +105,10 @@ Run-make tests pertaining to rustdoc are typically named `run-make/rustdoc-*/`. ### Pretty-printer tests -The tests in [`tests/pretty`] exercise the "pretty-printing" functionality of `rustc`. -The `-Z unpretty` CLI option for `rustc` causes it to translate the -input source into various different formats, such as the Rust source after macro expansion. +The tests in [`tests/pretty`] exercise the "pretty-printing" functionality of +`rustc`. The `-Z unpretty` CLI option for `rustc` causes it to translate the +input source into various different formats, such as the Rust source after macro +expansion. The pretty-printer tests have several [directives](directives.md) described below. These commands can significantly change the behavior of the test, but the @@ -127,20 +125,17 @@ If any of the commands above fail, then the test fails. The directives for pretty-printing tests are: - `pretty-mode` specifies the mode pretty-print tests should run in (that is, - the argument to `-Zunpretty`). - The default is `normal` if not specified. + the argument to `-Zunpretty`). The default is `normal` if not specified. - `pretty-compare-only` causes a pretty test to only compare the pretty-printed - output (stopping after step 3 from above). - It will not try to compile the expanded output to type check it. - This is needed for a pretty-mode that does - not expand to valid Rust, or for other situations where the expanded output cannot be compiled. + output (stopping after step 3 from above). It will not try to compile the + expanded output to type check it. This is needed for a pretty-mode that does + not expand to valid Rust, or for other situations where the expanded output + cannot be compiled. - `pp-exact` is used to ensure a pretty-print test results in specific output. If specified without a value, then it means the pretty-print output should - match the original source. - If specified with a value, as in `//@ + match the original source. If specified with a value, as in `//@ pp-exact:foo.pp`, it will ensure that the pretty-printed output matches the - contents of the given file. - Otherwise, if `pp-exact` is not specified, then + contents of the given file. Otherwise, if `pp-exact` is not specified, then the pretty-printed output will be pretty-printed one more time, and the output of the two pretty-printing rounds will be compared to ensure that the pretty-printed output converges to a steady state. @@ -149,12 +144,13 @@ The directives for pretty-printing tests are: ### Incremental tests -The tests in [`tests/incremental`] exercise incremental compilation. -They use [`revisions` directive](#revisions) to tell compiletest to run the compiler in a +The tests in [`tests/incremental`] exercise incremental compilation. They use +[`revisions` directive](#revisions) to tell compiletest to run the compiler in a series of steps. Compiletest starts with an empty directory with the `-C incremental` flag, and -then runs the compiler for each revision, reusing the incremental results from previous steps. +then runs the compiler for each revision, reusing the incremental results from +previous steps. The revisions should start with: @@ -162,7 +158,8 @@ The revisions should start with: * `rfail` — the test should compile successfully, but the executable should fail to run * `cfail` — the test should fail to compile -To make the revisions unique, you should add a suffix like `rpass1` and `rpass2`. +To make the revisions unique, you should add a suffix like `rpass1` and +`rpass2`. To simulate changing the source, compiletest also passes a `--cfg` flag with the current revision name. @@ -186,31 +183,30 @@ fn main() { foo(); } ``` `cfail` tests support the `forbid-output` directive to specify that a certain -substring must not appear anywhere in the compiler output. -This can be useful to ensure certain errors do not appear, but this can be fragile as error messages -change over time, and a test may no longer be checking the right thing but will still pass. +substring must not appear anywhere in the compiler output. This can be useful to +ensure certain errors do not appear, but this can be fragile as error messages +change over time, and a test may no longer be checking the right thing but will +still pass. `cfail` tests support the `should-ice` directive to specify that a test should -cause an Internal Compiler Error (ICE). -This is a highly specialized directive +cause an Internal Compiler Error (ICE). This is a highly specialized directive to check that the incremental cache continues to work after an ICE. -Incremental tests may use the attribute `#[rustc_clean(...)]` attribute. -This attribute compares the fingerprint from the current compilation session with the previous one. +Incremental tests may use the attribute `#[rustc_clean(...)]` attribute. This attribute compares +the fingerprint from the current compilation session with the previous one. The first revision should never have an active `rustc_clean` attribute, since it will always be dirty. -In the default mode, it asserts that the fingerprints must be the same. +In the default mode, it asserts that the fingerprints must be the same. The attribute takes the following arguments: * `cfg=""` — checks the cfg condition ``, and only runs the check if the config condition evaluates to true. This can be used to only run the `rustc_clean` attribute in a specific revision. -* `except=",,..."` — asserts that the query results for the listed queries must be different, +* `except=",,..."` — asserts that the query results for the listed queries must be different, rather than the same. -* `loaded_from_disk=",,..."` — asserts that the query results for the listed queries - were actually loaded from disk (not just marked green). +* `loaded_from_disk=",,..."` — asserts that the query results for the listed queries + were actually loaded from disk (not just marked green). This can be useful to ensure that a test is actually exercising the deserialization - logic for a particular query result. - This can be combined with `except`. + logic for a particular query result. This can be combined with `except`. A simple example of a test using `rustc_clean` is the [hello_world test]. @@ -219,9 +215,9 @@ A simple example of a test using `rustc_clean` is the [hello_world test]. ### Debuginfo tests -The tests in [`tests/debuginfo`] test debuginfo generation. -They build a program, launch a debugger, and issue commands to the debugger. -A single test can work with cdb, gdb, and lldb. +The tests in [`tests/debuginfo`] test debuginfo generation. They build a +program, launch a debugger, and issue commands to the debugger. A single test +can work with cdb, gdb, and lldb. Most tests should have the `//@ compile-flags: -g` directive or something similar to generate the appropriate debuginfo. @@ -232,7 +228,8 @@ The debuginfo tests consist of a series of debugger commands along with "check" lines which specify output that is expected from the debugger. The commands are comments of the form `// $DEBUGGER-command:$COMMAND` where -`$DEBUGGER` is the debugger being used and `$COMMAND` is the debugger command to execute. +`$DEBUGGER` is the debugger being used and `$COMMAND` is the debugger command +to execute. The debugger values can be: @@ -248,7 +245,8 @@ The command to check the output are of the form `// $DEBUGGER-check:$OUTPUT` where `$OUTPUT` is the output to expect. For example, the following will build the test, start the debugger, set a -breakpoint, launch the program, inspect a value, and check what the debugger prints: +breakpoint, launch the program, inspect a value, and check what the debugger +prints: ```rust,ignore //@ compile-flags: -g @@ -270,16 +268,17 @@ the debugger currently being used: - `min-cdb-version: 10.0.18317.1001` — ignores the test if the version of cdb is below the given version -- `min-gdb-version: 8.2` — ignores the test if the version of gdb is below the given version +- `min-gdb-version: 8.2` — ignores the test if the version of gdb is below the + given version - `ignore-gdb-version: 9.2` — ignores the test if the version of gdb is equal to the given version - `ignore-gdb-version: 7.11.90 - 8.0.9` — ignores the test if the version of gdb is in a range (inclusive) -- `min-lldb-version: 310` — ignores the test if the version of lldb is below the given version -- `rust-lldb` — ignores the test if lldb is not contain the Rust plugin. - NOTE: The "Rust" version of LLDB doesn't exist anymore, so this will always be - ignored. - This should probably be removed. +- `min-lldb-version: 310` — ignores the test if the version of lldb is below + the given version +- `rust-lldb` — ignores the test if lldb is not contain the Rust plugin. NOTE: + The "Rust" version of LLDB doesn't exist anymore, so this will always be + ignored. This should probably be removed. By passing the `--debugger` option to compiletest, you can specify a single debugger to run tests with. For example, `./x test tests/debuginfo -- --debugger gdb` will only test GDB commands. @@ -288,12 +287,12 @@ For example, `./x test tests/debuginfo -- --debugger gdb` will only test GDB com > > If you want to run lldb debuginfo tests locally, then currently on Windows it > is required that: -> +> > - You have Python 3.10 installed. > - You have `python310.dll` available in your `PATH` env var. This is not > provided by the standard Python installer you obtain from `python.org`; you > need to add this to `PATH` manually. -> +> > Otherwise the lldb debuginfo tests can produce crashes in mysterious ways. [`tests/debuginfo`]: https://github.com/rust-lang/rust/tree/HEAD/tests/debuginfo @@ -312,18 +311,17 @@ For example, `./x test tests/debuginfo -- --debugger gdb` will only test GDB com ### Codegen tests -The tests in [`tests/codegen-llvm`] test LLVM code generation. -They compile the test with the `--emit=llvm-ir` flag to emit LLVM IR. -They then run the LLVM [FileCheck] tool. -The test is annotated with various `// CHECK` comments to check the generated code. -See the [FileCheck] documentation for a tutorial and more information. +The tests in [`tests/codegen-llvm`] test LLVM code generation. They compile the +test with the `--emit=llvm-ir` flag to emit LLVM IR. They then run the LLVM +[FileCheck] tool. The test is annotated with various `// CHECK` comments to +check the generated code. See the [FileCheck] documentation for a tutorial and +more information. See also the [assembly tests](#assembly-tests) for a similar set of tests. By default, codegen tests will have `//@ needs-target-std` *implied* (that the target needs to support std), *unless* the `#![no_std]`/`#![no_core]` attribute -was specified in the test source. -You can override this behavior and explicitly +was specified in the test source. You can override this behavior and explicitly write `//@ needs-target-std` to only run the test when target supports std, even if the test is `#![no_std]`/`#![no_core]`. @@ -336,15 +334,17 @@ If you need to work with `#![no_std]` cross-compiling tests, consult the ### Assembly tests -The tests in [`tests/assembly-llvm`] test LLVM assembly output. -They compile the test with the `--emit=asm` flag to emit a `.s` file with the assembly output. -They then run the LLVM [FileCheck] tool. +The tests in [`tests/assembly-llvm`] test LLVM assembly output. They compile the test +with the `--emit=asm` flag to emit a `.s` file with the assembly output. They +then run the LLVM [FileCheck] tool. Each test should be annotated with the `//@ assembly-output:` directive with a -value of either `emit-asm` or `ptx-linker` to indicate the type of assembly output. +value of either `emit-asm` or `ptx-linker` to indicate the type of assembly +output. -Then, they should be annotated with various `// CHECK` comments to check the assembly output. -See the [FileCheck] documentation for a tutorial and more information. +Then, they should be annotated with various `// CHECK` comments to check the +assembly output. See the [FileCheck] documentation for a tutorial and more +information. See also the [codegen tests](#codegen-tests) for a similar set of tests. @@ -364,11 +364,13 @@ monomorphization collection pass, i.e., `-Zprint-mono-items`, and then special annotations in the file are used to compare against that. Then, the test should be annotated with comments of the form `//~ MONO_ITEM -name` where `name` is the monomorphized string printed by rustc like `fn ::foo`. +name` where `name` is the monomorphized string printed by rustc like `fn ::foo`. To check for CGU partitioning, a comment of the form `//~ MONO_ITEM name @@ cgu` -where `cgu` is a space separated list of the CGU names and the linkage information in brackets. -For example: `//~ MONO_ITEM static function::FOO @@ statics[Internal]` +where `cgu` is a space separated list of the CGU names and the linkage +information in brackets. For example: `//~ MONO_ITEM static function::FOO @@ +statics[Internal]` [`tests/codegen-units`]: https://github.com/rust-lang/rust/tree/HEAD/tests/codegen-units @@ -376,8 +378,8 @@ For example: `//~ MONO_ITEM static function::FOO @@ statics[Internal]` ### Mir-opt tests The tests in [`tests/mir-opt`] check parts of the generated MIR to make sure it -is generated correctly and is doing the expected optimizations. -Check out the [MIR Optimizations](../mir/optimizations.md) chapter for more. +is generated correctly and is doing the expected optimizations. Check out the +[MIR Optimizations](../mir/optimizations.md) chapter for more. Compiletest will build the test with several flags to dump the MIR output and set a baseline for optimizations: @@ -389,24 +391,23 @@ set a baseline for optimizations: * `-Zdump-mir-exclude-pass-number` The test should be annotated with `// EMIT_MIR` comments that specify files that -will contain the expected MIR output. -You can use `x test --bless` to create the initial expected files. +will contain the expected MIR output. You can use `x test --bless` to create the +initial expected files. There are several forms the `EMIT_MIR` comment can take: - `// EMIT_MIR $MIR_PATH.mir` — This will check that the given filename matches - the exact output from the MIR dump. - For example, + the exact output from the MIR dump. For example, `my_test.main.SimplifyCfg-elaborate-drops.after.mir` will load that file from the test directory, and compare it against the dump from rustc. Checking the "after" file (which is after optimization) is useful if you are - interested in the final state after an optimization. - Some rare cases may want to use the "before" file for completeness. + interested in the final state after an optimization. Some rare cases may want + to use the "before" file for completeness. - `// EMIT_MIR $MIR_PATH.diff` — where `$MIR_PATH` is the filename of the MIR - dump, such as `my_test_name.my_function.EarlyOtherwiseBranch`. - Compiletest will diff the `.before.mir` and `.after.mir` files, and compare the diff + dump, such as `my_test_name.my_function.EarlyOtherwiseBranch`. Compiletest + will diff the `.before.mir` and `.after.mir` files, and compare the diff output to the expected `.diff` file from the `EMIT_MIR` comment. This is useful if you want to see how an optimization changes the MIR. @@ -416,8 +417,8 @@ There are several forms the `EMIT_MIR` comment can take: check that the output matches the given file. By default 32 bit and 64 bit targets use the same dump files, which can be -problematic in the presence of pointers in constants or other bit width dependent things. -In that case you can add `// EMIT_MIR_FOR_EACH_BIT_WIDTH` to +problematic in the presence of pointers in constants or other bit width +dependent things. In that case you can add `// EMIT_MIR_FOR_EACH_BIT_WIDTH` to your test, causing separate files to be generated for 32bit and 64bit systems. [`tests/mir-opt`]: https://github.com/rust-lang/rust/tree/HEAD/tests/mir-opt @@ -427,8 +428,9 @@ your test, causing separate files to be generated for 32bit and 64bit systems. The tests in [`tests/run-make`] and [`tests/run-make-cargo`] are general-purpose tests using Rust *recipes*, which are small programs (`rmake.rs`) allowing -arbitrary Rust code such as `rustc` invocations, and is supported by a [`run_make_support`] library. -Using Rust recipes provide the ultimate in flexibility. +arbitrary Rust code such as `rustc` invocations, and is supported by a +[`run_make_support`] library. Using Rust recipes provide the ultimate in +flexibility. `run-make` tests should be used if no other test suites better suit your needs. @@ -439,11 +441,9 @@ faster-to-iterate test suite). ### `build-std` tests -The tests in [`tests/build-std`] check that `-Zbuild-std` works. -This is currently just a run-make test suite with a single recipe. -The recipe generates test cases and runs them in parallel. - -[`tests/build-std`]: https://github.com/rust-lang/rust/tree/HEAD/tests/build-std +The tests in [`tests/build-std`] check that `-Zbuild-std` works. This is currently +just a run-make test suite with a single recipe. The recipe generates test cases +and runs them in parallel. #### Using Rust recipes @@ -455,16 +455,18 @@ If you need new utilities or functionality, consider extending and improving the [`run_make_support`] library. Compiletest directives like `//@ only-` or `//@ ignore-` are -supported in `rmake.rs`, like in UI tests. -However, revisions or building auxiliary via directives are not currently supported. +supported in `rmake.rs`, like in UI tests. However, revisions or building +auxiliary via directives are not currently supported. `rmake.rs` and `run-make-support` may *not* use any nightly/unstable features, -as they must be compilable by a stage 0 rustc that may be a beta or even stable rustc. +as they must be compilable by a stage 0 rustc that may be a beta or even stable +rustc. #### Quickly check if `rmake.rs` tests can be compiled You can quickly check if `rmake.rs` tests can be compiled without having to -build stage1 rustc by forcing `rmake.rs` to be compiled with the stage0 compiler: +build stage1 rustc by forcing `rmake.rs` to be compiled with the stage0 +compiler: ```bash $ COMPILETEST_FORCE_STAGE0=1 x test --stage 0 tests/run-make/ @@ -521,8 +523,7 @@ Then add a corresponding entry to `"rust-analyzer.linkedProjects"` ### Coverage tests The tests in [`tests/coverage`] are shared by multiple test modes that test -coverage instrumentation in different ways. -Running the `coverage` test suite +coverage instrumentation in different ways. Running the `coverage` test suite will automatically run each test in all of the different coverage modes. Each mode also has an alias to run the coverage tests in just that mode: @@ -540,28 +541,31 @@ Each mode also has an alias to run the coverage tests in just that mode: ``` If a particular test should not be run in one of the coverage test modes for -some reason, use the `//@ ignore-coverage-map` or `//@ ignore-coverage-run` directives. +some reason, use the `//@ ignore-coverage-map` or `//@ ignore-coverage-run` +directives. #### `coverage-map` suite In `coverage-map` mode, these tests verify the mappings between source code -regions and coverage counters that are emitted by LLVM. -They compile the test with `--emit=llvm-ir`, then use a custom tool ([`src/tools/coverage-dump`]) to -extract and pretty-print the coverage mappings embedded in the IR. -These tests don't require the profiler runtime, so they run in PR CI jobs and are easy to +regions and coverage counters that are emitted by LLVM. They compile the test +with `--emit=llvm-ir`, then use a custom tool ([`src/tools/coverage-dump`]) to +extract and pretty-print the coverage mappings embedded in the IR. These tests +don't require the profiler runtime, so they run in PR CI jobs and are easy to run/bless locally. These coverage map tests can be sensitive to changes in MIR lowering or MIR -optimizations, producing mappings that are different but produce identical coverage reports. +optimizations, producing mappings that are different but produce identical +coverage reports. As a rule of thumb, any PR that doesn't change coverage-specific code should **feel free to re-bless** the `coverage-map` tests as necessary, without -worrying about the actual changes, as long as the `coverage-run` tests still pass. +worrying about the actual changes, as long as the `coverage-run` tests still +pass. #### `coverage-run` suite -In `coverage-run` mode, these tests perform an end-to-end test of coverage reporting. -They compile a test program with coverage instrumentation, run that +In `coverage-run` mode, these tests perform an end-to-end test of coverage +reporting. They compile a test program with coverage instrumentation, run that program to produce raw coverage data, and then use LLVM tools to process that data into a human-readable code coverage report. @@ -581,8 +585,8 @@ as part of the full set of CI jobs used for merging. #### `coverage-run-rustdoc` suite The tests in [`tests/coverage-run-rustdoc`] also run instrumented doctests and -include them in the coverage report. -This avoids having to build rustdoc when only running the main `coverage` suite. +include them in the coverage report. This avoids having to build rustdoc when +only running the main `coverage` suite. [`tests/coverage`]: https://github.com/rust-lang/rust/tree/HEAD/tests/coverage [`src/tools/coverage-dump`]: https://github.com/rust-lang/rust/tree/HEAD/src/tools/coverage-dump @@ -591,12 +595,13 @@ This avoids having to build rustdoc when only running the main `coverage` suite. ### Crash tests [`tests/crashes`] serve as a collection of tests that are expected to cause the -compiler to ICE, panic or crash in some other way, so that accidental fixes are tracked. -Formerly, this was done at but +compiler to ICE, panic or crash in some other way, so that accidental fixes are +tracked. Formerly, this was done at but doing it inside the rust-lang/rust testsuite is more convenient. -It is imperative that a test in the suite causes rustc to ICE, panic, or crash in some other way. -A test will "pass" if rustc exits with an exit status other than 1 or 0. +It is imperative that a test in the suite causes rustc to ICE, panic, or +crash in some other way. A test will "pass" if rustc exits with an exit status +other than 1 or 0. If you want to see verbose stdout/stderr, you need to set `COMPILETEST_VERBOSE_CRASHES=1`, e.g. @@ -605,17 +610,18 @@ If you want to see verbose stdout/stderr, you need to set $ COMPILETEST_VERBOSE_CRASHES=1 ./x test tests/crashes/999999.rs --stage 1 ``` -Anyone can add ["untracked" crashes] from the issue tracker. -It's strongly recommended to include test cases from several issues in a single PR. +Anyone can add ["untracked" crashes] from the issue tracker. It's strongly +recommended to include test cases from several issues in a single PR. When you do so, each issue number should be noted in the file name (`12345.rs` -should suffice) and also inside the file by means of a `//@ known-bug: #12345` directive. -Please [label][labeling] the relevant issues with `S-bug-has-test` once your PR is merged. +should suffice) and also inside the file by means of a `//@ known-bug: #12345` +directive. Please [label][labeling] the relevant issues with `S-bug-has-test` +once your PR is merged. If you happen to fix one of the crashes, please move it to a fitting -subdirectory in `tests/ui` and give it a meaningful name. -Please add a doc comment at the top of the file explaining why this test exists. -Even better will be if you can briefly explain how the example caused rustc to crash previously, -and what was done to fix it. +subdirectory in `tests/ui` and give it a meaningful name. Please add a doc +comment at the top of the file explaining why this test exists, even better if +you can briefly explain how the example causes rustc to crash previously and +what was done to prevent rustc to ICE / panic / crash. Adding @@ -627,8 +633,8 @@ Fixes #MMMMM to the description of your pull request will ensure the corresponding tickets be closed automatically upon merge. -Make sure that your fix actually fixes the root cause of the issue and not just a subset first. -The issue numbers can be found in the file name or the `//@ +Make sure that your fix actually fixes the root cause of the issue and not just +a subset first. The issue numbers can be found in the file name or the `//@ known-bug` directive inside the test file. [`tests/crashes`]: https://github.com/rust-lang/rust/tree/HEAD/tests/crashes @@ -646,8 +652,8 @@ There are multiple [directives](directives.md) to assist with that: - `aux-codegen-backend` - `proc-macro` -`aux-build` will build a separate crate from the named source file. -The source file should be in a directory called `auxiliary` beside the test file. +`aux-build` will build a separate crate from the named source file. The source +file should be in a directory called `auxiliary` beside the test file. ```rust,ignore //@ aux-build: my-helper.rs @@ -657,48 +663,44 @@ extern crate my_helper; ``` The aux crate will be built as a dylib if possible (unless on a platform that -does not support them, or the `no-prefer-dynamic` header is specified in the aux file). -The `-L` flag is used to find the extern crates. +does not support them, or the `no-prefer-dynamic` header is specified in the aux +file). The `-L` flag is used to find the extern crates. -`aux-crate` is very similar to `aux-build`. -However, it uses the `--extern` flag +`aux-crate` is very similar to `aux-build`. However, it uses the `--extern` flag to link to the extern crate to make the crate be available as an extern prelude. That allows you to specify the additional syntax of the `--extern` flag, such as -renaming a dependency. -For example, `//@ aux-crate:foo=bar.rs` will compile +renaming a dependency. For example, `//@ aux-crate:foo=bar.rs` will compile `auxiliary/bar.rs` and make it available under then name `foo` within the test. -This is similar to how Cargo does dependency renaming. -It is also possible to +This is similar to how Cargo does dependency renaming. It is also possible to specify [`--extern` modifiers](https://github.com/rust-lang/rust/issues/98405). For example, `//@ aux-crate:noprelude:foo=bar.rs`. -`aux-bin` is similar to `aux-build` but will build a binary instead of a library. -The binary will be available in `auxiliary/bin` relative to the working directory of the test. +`aux-bin` is similar to `aux-build` but will build a binary instead of a +library. The binary will be available in `auxiliary/bin` relative to the working +directory of the test. `aux-codegen-backend` is similar to `aux-build`, but will then pass the compiled -dylib to `-Zcodegen-backend` when building the main file. -This will only work for tests in `tests/ui-fulldeps`, since it requires the use of compiler crates. +dylib to `-Zcodegen-backend` when building the main file. This will only work +for tests in `tests/ui-fulldeps`, since it requires the use of compiler crates. ### Auxiliary proc-macro If you want a proc-macro dependency, then you can use the `proc-macro` directive. This directive behaves just like `aux-build`, i.e. that you should place the proc-macro test auxiliary file under a `auxiliary` folder under the -same parent folder as the main test file. -However, it also has four additional +same parent folder as the main test file. However, it also has four additional preset behavior compared to `aux-build` for the proc-macro test auxiliary: 1. The aux test file is built with `--crate-type=proc-macro`. 2. The aux test file is built without `-C prefer-dynamic`, i.e. it will not try to produce a dylib for the aux crate. 3. The aux crate is made available to the test file via extern prelude with - `--extern `. - Note that since UI tests default to edition + `--extern `. Note that since UI tests default to edition 2015, you still need to specify `extern ` unless the main test file is using an edition that is 2018 or newer if you want to use the aux crate name in a `use` import. -4. The `proc_macro` crate is made available as an extern prelude module. - The same edition 2015 vs newer edition distinction for `extern proc_macro;` applies. +4. The `proc_macro` crate is made available as an extern prelude module. Same + edition 2015 vs newer edition distinction for `extern proc_macro;` applies. For example, you might have a test `tests/ui/cat/meow.rs` and proc-macro auxiliary `tests/ui/cat/auxiliary/whiskers.rs`: @@ -740,19 +742,19 @@ pub fn identity(ts: TokenStream) -> TokenStream { ## Revisions -Revisions allow a single test file to be used for multiple tests. -This is done by adding a special directive at the top of the file: +Revisions allow a single test file to be used for multiple tests. This is done +by adding a special directive at the top of the file: ```rust,ignore //@ revisions: foo bar baz ``` This will result in the test being compiled (and tested) three times, once with -`--cfg foo`, once with `--cfg bar`, and once with `--cfg baz`. -You can therefore use `#[cfg(foo)]` etc within the test to tweak each of these results. +`--cfg foo`, once with `--cfg bar`, and once with `--cfg baz`. You can therefore +use `#[cfg(foo)]` etc within the test to tweak each of these results. -You can also customize directives and expected error messages to a particular revision. -To do this, add `[revision-name]` after the `//@` for directives, and +You can also customize directives and expected error messages to a particular +revision. To do this, add `[revision-name]` after the `//@` for directives, and after `//` for UI error annotations, like so: ```rust,ignore @@ -765,7 +767,8 @@ fn test_foo() { } ``` -Multiple revisions can be specified in a comma-separated list, such as `//[foo,bar,baz]~^`. +Multiple revisions can be specified in a comma-separated list, such as +`//[foo,bar,baz]~^`. In test suites that use the LLVM [FileCheck] tool, the current revision name is also registered as an additional prefix for FileCheck directives: @@ -782,10 +785,10 @@ also registered as an additional prefix for FileCheck directives: fn main() {} ``` -Note that not all directives have meaning when customized to a revision. -For example, the `ignore-test` directives (and all "ignore" directives) currently -only apply to the test as a whole, not to particular revisions. -The only directives that are intended to really work when customized to a revision are +Note that not all directives have meaning when customized to a revision. For +example, the `ignore-test` directives (and all "ignore" directives) currently +only apply to the test as a whole, not to particular revisions. The only +directives that are intended to really work when customized to a revision are error patterns and compiler flags. @@ -797,13 +800,14 @@ The following test suites support revisions: - coverage - debuginfo - rustdoc UI tests -- incremental (these are special in that they inherently cannot be run in parallel) +- incremental (these are special in that they inherently cannot be run in + parallel) ### Ignoring unused revision names Normally, revision names mentioned in other directives and error annotations -must correspond to an actual revision declared in a `revisions` directive. -This is enforced by an `./x test tidy` check. +must correspond to an actual revision declared in a `revisions` directive. This is +enforced by an `./x test tidy` check. If a revision name needs to be temporarily removed from the revision list for some reason, the above check can be suppressed by adding the revision name to an @@ -819,7 +823,8 @@ used to compare the behavior of all tests with different compiler flags enabled. This can help highlight what differences might appear with certain flags, and check for any problems that might arise. -To run the tests in a different mode, you need to pass the `--compare-mode` CLI flag: +To run the tests in a different mode, you need to pass the `--compare-mode` CLI +flag: ```bash ./x test tests/ui --compare-mode=chalk @@ -829,17 +834,20 @@ The possible compare modes are: - `polonius` — Runs with Polonius with `-Zpolonius`. - `chalk` — Runs with Chalk with `-Zchalk`. -- `split-dwarf` — Runs with unpacked split-DWARF with `-Csplit-debuginfo=unpacked`. -- `split-dwarf-single` — Runs with packed split-DWARF with `-Csplit-debuginfo=packed`. +- `split-dwarf` — Runs with unpacked split-DWARF with + `-Csplit-debuginfo=unpacked`. +- `split-dwarf-single` — Runs with packed split-DWARF with + `-Csplit-debuginfo=packed`. See [UI compare modes](ui.md#compare-modes) for more information about how UI tests support different output for different modes. -In CI, compare modes are only used in one Linux builder, and only with the following settings: +In CI, compare modes are only used in one Linux builder, and only with the +following settings: -- `tests/debuginfo`: Uses `split-dwarf` mode. - This helps ensure that none of the debuginfo tests are affected when enabling split-DWARF. +- `tests/debuginfo`: Uses `split-dwarf` mode. This helps ensure that none of the + debuginfo tests are affected when enabling split-DWARF. -Note that compare modes are separate to [revisions](#revisions). -All revisions are tested when running `./x test tests/ui`, however compare-modes must be +Note that compare modes are separate to [revisions](#revisions). All revisions +are tested when running `./x test tests/ui`, however compare-modes must be manually run individually via the `--compare-mode` flag. diff --git a/src/doc/rustc-dev-guide/src/tests/perf.md b/src/doc/rustc-dev-guide/src/tests/perf.md index 567b2d7a97e48..a0aa3c0331745 100644 --- a/src/doc/rustc-dev-guide/src/tests/perf.md +++ b/src/doc/rustc-dev-guide/src/tests/perf.md @@ -19,7 +19,7 @@ The result of a perf run is a comparison between two versions of the compiler (by their commit hashes). You can also use `rustc-perf` to manually benchmark and profile the compiler -[locally](../profiling/with-rustc-perf.md). +[locally](../profiling/with_rustc_perf.md). ### Automatic perf runs diff --git a/src/doc/rustc-dev-guide/src/tests/ui.md b/src/doc/rustc-dev-guide/src/tests/ui.md index 7332d1fb38515..e13419d1e01cc 100644 --- a/src/doc/rustc-dev-guide/src/tests/ui.md +++ b/src/doc/rustc-dev-guide/src/tests/ui.md @@ -1,18 +1,20 @@ # UI tests -UI tests are a particular [test suite](compiletest.md#test-suites) of compiletest. +UI tests are a particular [test suite](compiletest.md#test-suites) of +compiletest. ## Introduction The tests in [`tests/ui`] are a collection of general-purpose tests which primarily focus on validating the console output of the compiler, but can be -used for many other purposes. -For example, tests can also be configured to [run -the resulting program](#controlling-passfail-expectations) to verify its behavior. +used for many other purposes. For example, tests can also be configured to [run +the resulting program](#controlling-passfail-expectations) to verify its +behavior. For a survey of each subdirectory's purpose under `tests/ui`, consult the [README.md](https://github.com/rust-lang/rust/tree/HEAD/tests/ui/README.md). -This is useful if you write a new test, and are looking for a category to place it in. +This is useful if you write a new test, and are looking for a category to +place it in. If you need to work with `#![no_std]` cross-compiling tests, consult the [`minicore` test auxiliary](./minicore.md) chapter. @@ -26,63 +28,61 @@ A test consists of a Rust source file located in the `tests/ui` directory. and testing category - placing tests directly in `tests/ui` is not permitted. Compiletest will use `rustc` to compile the test, and compare the output against -the expected output which is stored in a `.stdout` or `.stderr` file located next to the test. -See [Output comparison](#output-comparison) for more. +the expected output which is stored in a `.stdout` or `.stderr` file located +next to the test. See [Output comparison](#output-comparison) for more. -Additionally, errors and warnings should be annotated with comments within the source file. -See [Error annotations](#error-annotations) for more. +Additionally, errors and warnings should be annotated with comments within the +source file. See [Error annotations](#error-annotations) for more. Compiletest [directives](directives.md) in the form of special comments prefixed with `//@` control how the test is compiled and what the expected behavior is. -Tests are expected to fail to compile, since most tests are testing compiler errors. -You can change that behavior with a directive, see [Controlling +Tests are expected to fail to compile, since most tests are testing compiler +errors. You can change that behavior with a directive, see [Controlling pass/fail expectations](#controlling-passfail-expectations). -By default, a test is built as an executable binary. -If you need a different crate type, you can use the `#![crate_type]` attribute to set it as needed. +By default, a test is built as an executable binary. If you need a different +crate type, you can use the `#![crate_type]` attribute to set it as needed. ## Output comparison UI tests store the expected output from the compiler in `.stderr` and `.stdout` -snapshots next to the test. -You normally generate these files with the `--bless` -CLI option, and then inspect them manually to verify they contain what you expect. +snapshots next to the test. You normally generate these files with the `--bless` +CLI option, and then inspect them manually to verify they contain what you +expect. The output is normalized to ignore unwanted differences, see the -[Normalization](#normalization) section. -If the file is missing, then compiletest expects the corresponding output to be empty. +[Normalization](#normalization) section. If the file is missing, then +compiletest expects the corresponding output to be empty. A common reason to use normalization, revisions, and most of the other following tools, -is to account for platform differences. -Consider alternatives to these tools, like +is to account for platform differences. Consider alternatives to these tools, like e.g. using the `extern "rust-invalid"` ABI that is invalid on every platform instead of fixing the test to use cross-compilation and testing every possibly-invalid ABI. -There can be multiple stdout/stderr files. -The general form is: +There can be multiple stdout/stderr files. The general form is: ```text *test-name*`.`*revision*`.`*compare_mode*`.`*extension* ``` -- *test-name* cannot contain dots. - This is so that the general form of test +- *test-name* cannot contain dots. This is so that the general form of test output filenames have a predictable form we can pattern match on in order to track stray test output files. -- *revision* is the [revision](#cfg-revisions) name. - This is not included when not using revisions. -- *compare_mode* is the [compare mode](#compare-modes). - This will only be checked when the given compare mode is active. - If the file does not exist, +- *revision* is the [revision](#cfg-revisions) name. This is not included when + not using revisions. +- *compare_mode* is the [compare mode](#compare-modes). This will only be + checked when the given compare mode is active. If the file does not exist, then compiletest will check for a file without the compare mode. - *extension* is the kind of output being checked: - `stderr` — compiler stderr - `stdout` — compiler stdout - `run.stderr` — stderr when running the test - `run.stdout` — stdout when running the test - - `64bit.stderr` — compiler stderr with `stderr-per-bitwidth` directive on a 64-bit target - - `32bit.stderr` — compiler stderr with `stderr-per-bitwidth` directive on a 32-bit target + - `64bit.stderr` — compiler stderr with `stderr-per-bitwidth` directive on a + 64-bit target + - `32bit.stderr` — compiler stderr with `stderr-per-bitwidth` directive on a + 32-bit target A simple example would be `foo.stderr` next to a `foo.rs` test. A more complex example would be `foo.my-revision.polonius.stderr`. @@ -90,16 +90,17 @@ A more complex example would be `foo.my-revision.polonius.stderr`. There are several [directives](directives.md) which will change how compiletest will check for output files: -- `stderr-per-bitwidth` — checks separate output files based on the target pointer width. - Consider using the `normalize-stderr` directive instead (see [Normalization](#normalization)). +- `stderr-per-bitwidth` — checks separate output files based on the target + pointer width. Consider using the `normalize-stderr` directive instead (see + [Normalization](#normalization)). - `dont-check-compiler-stderr` — Ignores stderr from the compiler. - `dont-check-compiler-stdout` — Ignores stdout from the compiler. - `compare-output-by-lines` — Some tests have non-deterministic orders of output, so we need to compare by lines. UI tests run with `-Zdeduplicate-diagnostics=no` flag which disables rustc's -built-in diagnostic deduplication mechanism. -This means you may see some duplicate messages in the output. -This helps illuminate situations where duplicate diagnostics are being generated. +built-in diagnostic deduplication mechanism. This means you may see some +duplicate messages in the output. This helps illuminate situations where +duplicate diagnostics are being generated. ### Normalization @@ -108,22 +109,22 @@ platforms, mainly about filenames. Compiletest makes the following replacements on the compiler output: -- The directory where the test is defined is replaced with `$DIR`. - Example: `/path/to/rust/tests/ui/error-codes` +- The directory where the test is defined is replaced with `$DIR`. Example: + `/path/to/rust/tests/ui/error-codes` - The directory to the standard library source is replaced with `$SRC_DIR`. Example: `/path/to/rust/library` - Line and column numbers for paths in `$SRC_DIR` are replaced with `LL:COL`. This helps ensure that changes to the layout of the standard library do not - cause widespread changes to the `.stderr` files. - Example: `$SRC_DIR/alloc/src/sync.rs:53:46` -- The base directory where the test's output goes is replaced with `$TEST_BUILD_DIR`. - This only comes up in a few rare circumstances. - Example: `/path/to/rust/build/x86_64-unknown-linux-gnu/test/ui` + cause widespread changes to the `.stderr` files. Example: + `$SRC_DIR/alloc/src/sync.rs:53:46` +- The base directory where the test's output goes is replaced with + `$TEST_BUILD_DIR`. This only comes up in a few rare circumstances. Example: + `/path/to/rust/build/x86_64-unknown-linux-gnu/test/ui` - The real directory to the standard library source is replaced with `$SRC_DIR_REAL`. - The real directory to the compiler source is replaced with `$COMPILER_DIR_REAL`. - Tabs are replaced with `\t`. -- Backslashes (`\`) are converted to forward slashes (`/`) within paths (using a heuristic). - This helps normalize differences with Windows-style paths. +- Backslashes (`\`) are converted to forward slashes (`/`) within paths (using a + heuristic). This helps normalize differences with Windows-style paths. - CRLF newlines are converted to LF. - Error line annotations like `//~ ERROR some message` are removed. - Various v0 and legacy symbol hashes are replaced with placeholders like @@ -134,23 +135,21 @@ the compiler itself to apply some changes to the diagnostic output to make it more suitable for UI testing. For example, it will anonymize line numbers in the output (line numbers -prefixing each source line are replaced with `LL`). -In extremely rare situations, this mode can be disabled with the directive `//@ +prefixing each source line are replaced with `LL`). In extremely rare +situations, this mode can be disabled with the directive `//@ compile-flags: -Z ui-testing=no`. -When using `-Z ui-testing=no`, the `--diagnostic-width` argument should also +When using `-Z ui-testing=no` the `--diagnostic-width` argument should also be set to avoid tests failing or passing depending on the width of the terminal from which the UI test suite is being run. Note: The line and column numbers for `-->` lines pointing to the test are *not* -normalized, and left as-is. -This ensures that the compiler continues to point to -the correct location, and keeps the stderr files readable. -Ideally all line/column information would be retained, but small changes to the source +normalized, and left as-is. This ensures that the compiler continues to point to +the correct location, and keeps the stderr files readable. Ideally all +line/column information would be retained, but small changes to the source causes large diffs, and more frequent merge conflicts and test errors. -Sometimes these built-in normalizations are not enough. -In such cases, you may +Sometimes these built-in normalizations are not enough. In such cases, you may provide custom normalization rules using `normalize-*` directives, e.g. ```rust,ignore @@ -162,8 +161,8 @@ provide custom normalization rules using `normalize-*` directives, e.g. This tells the test, on 32-bit platforms, whenever the compiler writes `fn() (32 bits)` to stderr, it should be normalized to read `fn() ($PTR bits)` instead. -Similar for 64-bit. -The replacement is performed by regexes using default regex flavor provided by `regex` crate. +Similar for 64-bit. The replacement is performed by regexes using default regex +flavor provided by `regex` crate. The corresponding reference file will use the normalized output to test both 32-bit and 64-bit platforms: @@ -176,15 +175,16 @@ The corresponding reference file will use the normalized output to test both ... ``` -Please see [`ui/transmute/main.rs`][mrs] and [`main.stderr`] for a concrete usage example. +Please see [`ui/transmute/main.rs`][mrs] and [`main.stderr`] for a concrete +usage example. [mrs]: https://github.com/rust-lang/rust/blob/HEAD/tests/ui/transmute/main.rs [`main.stderr`]: https://github.com/rust-lang/rust/blob/HEAD/tests/ui/transmute/main.stderr ## Error annotations -Error annotations specify the errors that the compiler is expected to emit. -They are "attached" to the line in source where the error is located. +Error annotations specify the errors that the compiler is expected to emit. They +are "attached" to the line in source where the error is located. ```rust,ignore fn main() { @@ -193,30 +193,30 @@ fn main() { ``` Although UI tests have a `.stderr` file which contains the entire compiler -output, UI tests require that errors are also annotated within the source. -This redundancy helps avoid mistakes since the `.stderr` files are usually -auto-generated. -It also helps to directly see where the error spans are expected -to point to by looking at one file instead of having to compare the `.stderr` file with the source. -Finally, they ensure that no additional unexpected errors are generated. +output, UI tests require that errors are also annotated within the source. This +redundancy helps avoid mistakes since the `.stderr` files are usually +auto-generated. It also helps to directly see where the error spans are expected +to point to by looking at one file instead of having to compare the `.stderr` +file with the source. Finally, they ensure that no additional unexpected errors +are generated. They have several forms, but generally are a comment with the diagnostic level -(such as `ERROR`) and a substring of the expected error output. -You don't have to write out the entire message, -but be sure to include the important part of the message to make it self-documenting. +(such as `ERROR`) and a substring of the expected error output. You don't have +to write out the entire message, just make sure to include the important part of +the message to make it self-documenting. -Most error annotations need to match with the line of the diagnostic. -There are several ways to match the message with the line (see the examples below): +Most error annotations need to match with the line of the diagnostic. There are +several ways to match the message with the line (see the examples below): * `~`: Associates the error level and message with the *current* line -* `~^`: Associates the error level and message with the *previous* error annotation line. - Each caret (`^`) that you add adds a line to this, so `~^^^` +* `~^`: Associates the error level and message with the *previous* error + annotation line. Each caret (`^`) that you add adds a line to this, so `~^^^` is three lines above the error annotation line. * `~|`: Associates the error level and message with the *same* line as the *previous comment*. This is more convenient than using multiple carets when there are multiple messages associated with the same line. -* `~v`: Associates the error level and message with the *next* error annotation line. - Each symbol (`v`) that you add adds a line to this, so `~vvv` +* `~v`: Associates the error level and message with the *next* error + annotation line. Each symbol (`v`) that you add adds a line to this, so `~vvv` is three lines below the error annotation line. Example: @@ -260,8 +260,8 @@ fn main() { #### Positioned below error line -Use the `//~^` idiom with number of carets in the string to indicate the number of lines above. -In the example below, the error line is four lines above the +Use the `//~^` idiom with number of carets in the string to indicate the number +of lines above. In the example below, the error line is four lines above the error annotation line so four carets are included in the annotation. ```rust,ignore @@ -296,8 +296,8 @@ fn main() { #### Positioned above error line -Use the `//~v` idiom with number of v's in the string to indicate the number of lines below. -This is typically used in lexer or parser tests matching on errors like unclosed +Use the `//~v` idiom with number of v's in the string to indicate the number +of lines below. This is typically used in lexer or parser tests matching on errors like unclosed delimiter or unclosed literal happening at the end of file. ```rust,ignore @@ -337,8 +337,8 @@ fn main() { ``` We want to ensure this shows "index out of bounds", but we cannot use the `ERROR` -annotation since the runtime error doesn't have any span. -Then it's time to use the `error-pattern` directive: +annotation since the runtime error doesn't have any span. Then it's time to use the +`error-pattern` directive: ```rust,ignore //@ error-pattern: index out of bounds @@ -385,8 +385,7 @@ by the compiler instead of or in addition to structured json. `//~` by default. Other kinds only need to be line-annotated if at least one annotation of that kind appears -in the test file. -For example, one `//~ NOTE` will also require all other `//~ NOTE`s in the file +in the test file. For example, one `//~ NOTE` will also require all other `//~ NOTE`s in the file to be written out explicitly. Use directive `//@ dont-require-annotations` to opt out of exhaustive annotations. @@ -399,16 +398,15 @@ for example secondary lines of multiline diagnostics, or ubiquitous diagnostics like `aborting due to N previous errors`. UI tests use the `-A unused` flag by default to ignore all unused warnings, as -unused warnings are usually not the focus of a test. -However, simple code samples often have unused warnings. -If the test is specifically testing an +unused warnings are usually not the focus of a test. However, simple code +samples often have unused warnings. If the test is specifically testing an unused warning, just add the appropriate `#![warn(unused)]` attribute as needed. ### `cfg` revisions When using [revisions](compiletest.md#revisions), different messages can be -conditionally checked based on the current revision. -This is done by placing the revision cfg name in brackets like this: +conditionally checked based on the current revision. This is done by placing the +revision cfg name in brackets like this: ```rust,ignore //@ edition:2018 @@ -430,8 +428,7 @@ In this example, the second error message is only emitted in the `mir` revision. The `thir` revision only emits the first error. If the `cfg` causes the compiler to emit different output, then a test can have -multiple `.stderr` files for the different outputs. -In the example above, there +multiple `.stderr` files for the different outputs. In the example above, there would be a `.mir.stderr` and `.thir.stderr` file with the different outputs of the different revisions. @@ -442,10 +439,10 @@ the different revisions. ## Controlling pass/fail expectations By default, a UI test is expected to **generate a compile error** because most -of the tests are checking for invalid input and error diagnostics. -However, you can also make UI tests where compilation is expected to succeed, and you can -even run the resulting program. -Just add one of the following [directives](directives.md): +of the tests are checking for invalid input and error diagnostics. However, you +can also make UI tests where compilation is expected to succeed, and you can +even run the resulting program. Just add one of the following +[directives](directives.md): - Pass directives: - `//@ check-pass` — compilation should succeed but skip codegen @@ -463,32 +460,32 @@ Just add one of the following [directives](directives.md): - Second time is to ensure that the full compile fails - `//@ run-fail` — compilation should succeed, but running the resulting binary should make it exit with a code in the range `1..=127` which - indicates regular failure. - On targets without unwind support, crashes are also accepted. + indicates regular failure. On targets without unwind support, crashes + are also accepted. - `//@ run-crash` — compilation should succeed, but running the resulting - binary should fail with a crash. - Crashing is defined as "not exiting with a code in the range `0..=127`". - - Example on Linux: Termination by `SIGABRT` or `SIGSEGV`. - - Example on Windows: Exiting with the code for `STATUS_ILLEGAL_INSTRUCTION` (`0xC000001D`). + binary should fail with a crash. Crashing is defined as "not exiting with + a code in the range `0..=127`". Example on Linux: Termination by `SIGABRT` + or `SIGSEGV`. Example on Windows: Exiting with the code for + `STATUS_ILLEGAL_INSTRUCTION` (`0xC000001D`). - `//@ run-fail-or-crash` — compilation should succeed, but running the - resulting binary should either `run-fail` or `run-crash`. - Useful if a test crashes on some targets but just fails on others. + resulting binary should either `run-fail` or `run-crash`. Useful if a test + crashes on some targets but just fails on others. -For `run-pass`, `run-fail`, `run-crash`, and `run-fail-or-crash` tests, -the output of the program itself is not checked by default. +For `run-pass`. `run-fail`, `run-crash` and `run-fail-or-crash` tests, by +default the output of the program itself is not checked. -If you want to check the output of running the program, include the `check-run-results` directive. -This will check for a `.run.stderr` and +If you want to check the output of running the program, include the +`check-run-results` directive. This will check for a `.run.stderr` and `.run.stdout` files to compare against the actual output of the program. -Tests with the `*-pass` directives can be overridden with the `--pass` command-line option: +Tests with the `*-pass` directives can be overridden with the `--pass` +command-line option: ```sh ./x test tests/ui --pass check ``` -The `--pass` option only affects UI tests. -Using `--pass check` can run the UI +The `--pass` option only affects UI tests. Using `--pass check` can run the UI test suite much faster (roughly twice as fast on my system), though obviously not exercising as much. @@ -499,12 +496,13 @@ test won't work properly with that override. ## Known bugs The `known-bug` directive may be used for tests that demonstrate a known bug -that has not yet been fixed. -Adding tests for known bugs is helpful for several reasons, including: +that has not yet been fixed. Adding tests for known bugs is helpful for several +reasons, including: -1. Maintaining a functional test that can be conveniently reused when the bug is fixed. -2. Providing a sentinel that will fail if the bug is incidentally fixed. - This can alert the developer so they know that the associated issue has been fixed +1. Maintaining a functional test that can be conveniently reused when the bug is + fixed. +2. Providing a sentinel that will fail if the bug is incidentally fixed. This + can alert the developer so they know that the associated issue has been fixed and can possibly be closed. This directive takes comma-separated issue numbers as arguments, or `"unknown"`: @@ -515,21 +513,21 @@ This directive takes comma-separated issue numbers as arguments, or `"unknown"`: - `//@ known-bug: unknown` (when there is no known issue yet; preferably open one if it does not already exist) -Do not include [error annotations](#error-annotations) in a test with `known-bug`. -The test should still include other normal directives and stdout/stderr files. +Do not include [error annotations](#error-annotations) in a test with +`known-bug`. The test should still include other normal directives and +stdout/stderr files. ## Test organization When deciding where to place a test file, please try to find a subdirectory that -best matches what you are trying to exercise. -Do your best to keep things organized. -Admittedly, it can be difficult as some tests can overlap different +best matches what you are trying to exercise. Do your best to keep things +organized. Admittedly it can be difficult as some tests can overlap different categories, and the existing layout may not fit well. -Name the test by a concise description of what the test is checking. -Avoid including the issue number in the test name. -See [best practices](best-practices.md) for a more in-depth discussion of this. +Name the test by a concise description of what the test is checking. Avoid +including the issue number in the test name. See [best +practices](best-practices.md) for a more in-depth discussion of this. Ideally, the test should be added to a directory that helps identify what piece of code is being tested here (e.g., @@ -537,29 +535,30 @@ of code is being tested here (e.g., When writing a new feature, you may want to **create a subdirectory to store your tests**. For example, if you are implementing RFC 1234 ("Widgets"), then it -might make sense to put the tests in a directory like `tests/ui/rfc1234-widgets/`. +might make sense to put the tests in a directory like +`tests/ui/rfc1234-widgets/`. In other cases, there may already be a suitable directory. -Over time, the [`tests/ui`] directory has grown very fast. -There is a check in [tidy](intro.md#tidy) that will ensure none of the subdirectories has more than -1000 entries. -Having too many files causes problems because it isn't editor/IDE -friendly and the GitHub UI won't show more than 1000 entries. -However, since `tests/ui` (UI test root directory) and `tests/ui/issues` directories have more -than 1000 entries, we set a different limit for those directories. -So, please avoid putting a new test there and try to find a more relevant place. +Over time, the [`tests/ui`] directory has grown very fast. There is a check in +[tidy](intro.md#tidy) that will ensure none of the subdirectories has more than +1000 entries. Having too many files causes problems because it isn't editor/IDE +friendly and the GitHub UI won't show more than 1000 entries. However, since +`tests/ui` (UI test root directory) and `tests/ui/issues` directories have more +than 1000 entries, we set a different limit for those directories. So, please +avoid putting a new test there and try to find a more relevant place. -For example, if your test is related to closures, you should put it in `tests/ui/closures`. -When you reach the limit, you could increase it by tweaking [here][ui test tidy]. +For example, if your test is related to closures, you should put it in +`tests/ui/closures`. When you reach the limit, you could increase it by tweaking +[here][ui test tidy]. [ui test tidy]: https://github.com/rust-lang/rust/blob/HEAD/src/tools/tidy/src/ui_tests.rs ## Rustfix tests UI tests can validate that diagnostic suggestions apply correctly and that the -resulting changes compile correctly. -This can be done with the `run-rustfix` directive: +resulting changes compile correctly. This can be done with the `run-rustfix` +directive: ```rust,ignore //@ run-rustfix @@ -575,34 +574,37 @@ pub struct not_camel_case {} Rustfix tests should have a file with the `.fixed` extension which contains the source file after the suggestion has been applied. -- When the test is run, compiletest first checks that the correct lint/warning is generated. -- Then, it applies the suggestion and compares against `.fixed` (they must match). -- Finally, the fixed source is compiled, and this compilation is required to succeed. +- When the test is run, compiletest first checks that the correct lint/warning + is generated. +- Then, it applies the suggestion and compares against `.fixed` (they must + match). +- Finally, the fixed source is compiled, and this compilation is required to + succeed. Usually when creating a rustfix test you will generate the `.fixed` file automatically with the `x test --bless` option. The `run-rustfix` directive will cause *all* suggestions to be applied, even if -they are not [`MachineApplicable`](../diagnostics.md#suggestions). -If this is a problem, then you can add the `rustfix-only-machine-applicable` directive in -addition to `run-rustfix`. -This should be used if there is a mixture of -different suggestion levels, and some of the non-machine-applicable ones do not apply cleanly. +they are not [`MachineApplicable`](../diagnostics.md#suggestions). If this is a +problem, then you can add the `rustfix-only-machine-applicable` directive in +addition to `run-rustfix`. This should be used if there is a mixture of +different suggestion levels, and some of the non-machine-applicable ones do not +apply cleanly. ## Compare modes [Compare modes](compiletest.md#compare-modes) can be used to run all tests with -different flags from what they are normally compiled with. -In some cases, this might result in different output from the compiler. -To support this, different +different flags from what they are normally compiled with. In some cases, this +might result in different output from the compiler. To support this, different output files can be saved which contain the output based on the compare mode. For example, when using the Polonius mode, a test `foo.rs` will first look for -expected output in `foo.polonius.stderr`, falling back to the usual `foo.stderr` if not found. -This is useful as different modes can sometimes result in different diagnostics and behavior. -This can help track which tests have -differences between the modes, and to visually inspect those diagnostic differences. +expected output in `foo.polonius.stderr`, falling back to the usual `foo.stderr` +if not found. This is useful as different modes can sometimes result in +different diagnostics and behavior. This can help track which tests have +differences between the modes, and to visually inspect those diagnostic +differences. If in the rare case you encounter a test that has different behavior, you can run something like the following to generate the alternate stderr file: @@ -616,15 +618,15 @@ Currently none of the compare modes are checked in CI for UI tests. ## `rustc_*` TEST attributes The compiler defines several perma-unstable `#[rustc_*]` attributes gated behind -the internal feature `rustc_attrs` that dump extra compiler-internal information. -See the corresponding subsection in [compiler debugging] for more details. +the internal feature `rustc_attrs` that dump extra compiler-internal +information. See the corresponding subsection in [compiler debugging] for more +details. -They can be used in tests to more precisely, legibly, and easily test internal +They can be used in tests to more precisely, legibly and easily test internal compiler state in cases where it would otherwise be very hard to do the same -with "user-facing" Rust alone. -Indeed, one could say that this slightly abuses -the term "UI" (*user* interface) and turns such UI tests from black-box tests into white-box ones. -Use them carefully and sparingly. +with "user-facing" Rust alone. Indeed, one could say that this slightly abuses +the term "UI" (*user* interface) and turns such UI tests from black-box tests +into white-box ones. Use them carefully and sparingly. [compiler debugging]: ../compiler-debugging.md#rustc_-test-attributes @@ -634,7 +636,6 @@ By default, test suites under UI test mode (`tests/ui`, `tests/ui-fulldeps`, but not `tests/rustdoc-ui`) will specify - `-A unused` -- `-W unused_attributes` (since these tend to be interesting for ui tests) - `-A internal_features` If: @@ -649,4 +650,5 @@ in-source lint level attributes as required. Note that the `rustfix` version will *not* have `-A unused` passed, meaning that you may have to `#[allow(unused)]` to suppress `unused` -lints on the rustfix'd file (because we might be testing rustfix on `unused` lints themselves). +lints on the rustfix'd file (because we might be testing rustfix +on `unused` lints themselves). diff --git a/src/doc/rustc-dev-guide/src/tracing.md b/src/doc/rustc-dev-guide/src/tracing.md index 28c0bcc737caf..4d52f9c865081 100644 --- a/src/doc/rustc-dev-guide/src/tracing.md +++ b/src/doc/rustc-dev-guide/src/tracing.md @@ -1,15 +1,14 @@ # Using tracing to debug the compiler The compiler has a lot of [`debug!`] (or `trace!`) calls, which print out logging information -at many points. -These are very useful to at least narrow down the location of +at many points. These are very useful to at least narrow down the location of a bug if not to find it entirely, or just to orient yourself as to why the compiler is doing a particular thing. [`debug!`]: https://docs.rs/tracing/0.1/tracing/macro.debug.html -To see the logs, you need to set the `RUSTC_LOG` environment variable to your log filter. -The full syntax of the log filters can be found in the [rustdoc +To see the logs, you need to set the `RUSTC_LOG` environment variable to your +log filter. The full syntax of the log filters can be found in the [rustdoc of `tracing-subscriber`](https://docs.rs/tracing-subscriber/0.2.24/tracing_subscriber/filter/struct.EnvFilter.html#directives). ## Function level filters @@ -48,74 +47,69 @@ RUSTC_LOG=rustc_borrowck[do_mir_borrowck] ### I don't want all calls If you are compiling libcore, you likely don't want *all* borrowck dumps, but only one -for a specific function. -You can filter function calls by their arguments by regexing them. +for a specific function. You can filter function calls by their arguments by regexing them. ``` RUSTC_LOG=[do_mir_borrowck{id=\.\*from_utf8_unchecked\.\*}] ``` -will only give you the logs of borrowchecking `from_utf8_unchecked`. -Note that you will -still get a short message per ignored `do_mir_borrowck`, but none of the things inside those calls. -This helps you in looking through the calls that are happening and helps you adjust +will only give you the logs of borrowchecking `from_utf8_unchecked`. Note that you will +still get a short message per ignored `do_mir_borrowck`, but none of the things inside those +calls. This helps you in looking through the calls that are happening and helps you adjust your regex if you mistyped it. ## Query level filters Every [query](query.md) is automatically tagged with a logging span so that -you can display all log messages during the execution of the query. -For example, if you want to log everything during type checking: +you can display all log messages during the execution of the query. For +example, if you want to log everything during type checking: ``` RUSTC_LOG=[typeck] ``` The query arguments are included as a tracing field which means that you can -filter on the debug display of the arguments. -For example, the `typeck` query has an argument `key: LocalDefId` of what is being checked. -You can use a regex to match on that `LocalDefId` to log type checking for a specific +filter on the debug display of the arguments. For example, the `typeck` query +has an argument `key: LocalDefId` of what is being checked. You can use a +regex to match on that `LocalDefId` to log type checking for a specific function: ``` RUSTC_LOG=[typeck{key=.*name_of_item.*}] ``` -Different queries have different arguments. -You can find a list of queries and their arguments in +Different queries have different arguments. You can find a list of queries and +their arguments in [`rustc_middle/src/query/mod.rs`](https://github.com/rust-lang/rust/blob/HEAD/compiler/rustc_middle/src/query/mod.rs#L18). ## Broad module level filters You can also use filters similar to the `log` crate's filters, which will enable -everything within a specific module. -This is often too verbose and too unstructured, +everything within a specific module. This is often too verbose and too unstructured, so it is recommended to use function level filters. Your log filter can be just `debug` to get all `debug!` output and higher (e.g., it will also include `info!`), or `path::to::module` to get *all* output (which will include `trace!`) from a particular module, or -`path::to::module=debug` to get `debug!` output and higher from a particular module. +`path::to::module=debug` to get `debug!` output and higher from a particular +module. For example, to get the `debug!` output and higher for a specific module, you can run the compiler with `RUSTC_LOG=path::to::module=debug rustc my-file.rs`. All `debug!` output will then appear in standard error. -Note that you can use a partial path and the filter will still work. -For example, if you want to see `info!` output from only +Note that you can use a partial path and the filter will still work. For +example, if you want to see `info!` output from only `rustdoc::passes::collect_intra_doc_links`, you could use `RUSTDOC_LOG=rustdoc::passes::collect_intra_doc_links=info` *or* you could use `RUSTDOC_LOG=rustdoc::passes::collect_intra=info`. -If you are developing rustdoc, use `RUSTDOC_LOG` instead. -If you are developing Miri, use `MIRI_LOG` instead. -You get the idea :) +If you are developing rustdoc, use `RUSTDOC_LOG` instead. If you are developing +Miri, use `MIRI_LOG` instead. You get the idea :) See the [`tracing`] crate's docs, and specifically the docs for [`debug!`] to -see the full syntax you can use. -(Note: unlike the compiler, the [`tracing`] -crate and its examples use the `RUSTC_LOG` environment variable. -rustc, rustdoc, +see the full syntax you can use. (Note: unlike the compiler, the [`tracing`] +crate and its examples use the `RUSTC_LOG` environment variable. rustc, rustdoc, and other tools set custom environment variables.) **Note that unless you use a very strict filter, the logger will emit a lot of @@ -163,20 +157,18 @@ $ RUSTDOC_LOG=rustdoc=debug rustdoc +stage1 my-file.rs ## Log colors By default, rustc (and other tools, like rustdoc and Miri) will be smart about -when to use ANSI colors in the log output. -If they are outputting to a terminal, +when to use ANSI colors in the log output. If they are outputting to a terminal, they will use colors, and if they are outputting to a file or being piped -somewhere else, they will not. -However, it's hard to read log output in your +somewhere else, they will not. However, it's hard to read log output in your terminal unless you have a very strict filter, so you may want to pipe the -output to a pager like `less`. -But then there won't be any colors, which makes it hard to pick out what you're looking for! +output to a pager like `less`. But then there won't be any colors, which makes +it hard to pick out what you're looking for! You can override whether to have colors in log output with the `RUSTC_LOG_COLOR` environment variable (or `RUSTDOC_LOG_COLOR` for rustdoc, or `MIRI_LOG_COLOR` for Miri, etc.). There are three options: `auto` (the default), `always`, and -`never`. -So, if you want to enable colors when piping to `less`, use something similar to this command: +`never`. So, if you want to enable colors when piping to `less`, use something +similar to this command: ```bash # The `-R` switch tells less to print ANSI colors without escaping them. @@ -184,17 +176,18 @@ $ RUSTC_LOG=debug RUSTC_LOG_COLOR=always rustc +stage1 ... | less -R ``` Note that `MIRI_LOG_COLOR` will only color logs that come from Miri, not logs -from rustc functions that Miri calls. -Use `RUSTC_LOG_COLOR` to color logs from rustc. +from rustc functions that Miri calls. Use `RUSTC_LOG_COLOR` to color logs from +rustc. ## How to keep or remove `debug!` and `trace!` calls from the resulting binary While calls to `error!`, `warn!` and `info!` are included in every build of the compiler, calls to `debug!` and `trace!` are only included in the program if -`rust.debug-logging=true` is turned on in bootstrap.toml (it is +`debug-logging=true` is turned on in bootstrap.toml (it is turned off by default), so if you don't see `DEBUG` logs, especially if you run the compiler with `RUSTC_LOG=rustc rustc some.rs` and only see -`INFO` logs, make sure that `debug-logging=true` is turned on in your bootstrap.toml. +`INFO` logs, make sure that `debug-logging=true` is turned on in your +bootstrap.toml. ## Logging etiquette and conventions @@ -203,9 +196,9 @@ about the performance of adding "unnecessary" calls to `debug!` and leaving them commit - they won't slow down the performance of what we ship. That said, there can also be excessive tracing calls, especially -when they are redundant with other calls nearby or in functions called from here. -There is no perfect balance to hit here, and it is left to the reviewer's -discretion to decide whether to let you leave `debug!` statements in, or whether to ask +when they are redundant with other calls nearby or in functions called from +here. There is no perfect balance to hit here, and is left to the reviewer's +discretion to decide whether to let you leave `debug!` statements in or whether to ask you to remove them before merging. It may be preferable to use `trace!` over `debug!` for very noisy logs. @@ -226,8 +219,8 @@ debug!(x = ?random_operation(tcx)); ``` Then if someone runs a debug `rustc` with `RUSTC_LOG=rustc::foo`, then -`random_operation()` will run. -`RUSTC_LOG` filters that do not enable this debug statement will not execute `random_operation`. +`random_operation()` will run. `RUSTC_LOG` filters that do not enable this +debug statement will not execute `random_operation`. This means that you should not put anything too expensive or likely to crash there - that would annoy anyone who wants to use logging for that module. diff --git a/src/doc/rustc-dev-guide/src/traits/caching.md b/src/doc/rustc-dev-guide/src/traits/caching.md index be72f6e89f9ac..c44722a1d9a33 100644 --- a/src/doc/rustc-dev-guide/src/traits/caching.md +++ b/src/doc/rustc-dev-guide/src/traits/caching.md @@ -61,7 +61,7 @@ to be pretty clearly safe and also still retains a very high hit rate **TODO**: it looks like `pick_candidate_cache` no longer exists. In general, is this section still accurate at all? -[`ParamEnv`]: ../typing-parameter-envs.html +[`ParamEnv`]: ../typing_parameter_envs.html [`tcx`]: ../ty.html [#18290]: https://github.com/rust-lang/rust/issues/18290 [#22019]: https://github.com/rust-lang/rust/issues/22019 diff --git a/src/doc/rustc-dev-guide/src/traits/resolution.md b/src/doc/rustc-dev-guide/src/traits/resolution.md index f668d6ccf6198..ccb2b04268e85 100644 --- a/src/doc/rustc-dev-guide/src/traits/resolution.md +++ b/src/doc/rustc-dev-guide/src/traits/resolution.md @@ -130,9 +130,9 @@ Once this first pass is done, we can examine the set of candidates. If it is a singleton set, then we are done: this is the only impl in scope that could possibly apply. Otherwise, we can **winnow** down the set of candidates by using where clauses and other conditions. Winnowing uses -`evaluate_candidate` to check whether the nested obligations may apply. -If this still leaves more than 1 candidate, we use ` fn candidate_should_be_dropped_in_favor_of` -to prefer some candidates over others. +`evaluate_candidate` to check whether the nested obligations may apply. +If this still leaves more than 1 candidate, we use ` fn candidate_should_be_dropped_in_favor_of` +to prefer some candidates over others. If this reduced set yields a single, unambiguous entry, we're good to go, @@ -181,7 +181,7 @@ in that list. If so, it is considered satisfied. More precisely, we want to check whether there is a where-clause obligation that is for the same trait (or some subtrait) and which can match against the obligation. -[parameter environment]: ../typing-parameter-envs.html +[parameter environment]: ../typing_parameter_envs.html Consider this simple example: @@ -240,8 +240,8 @@ confirmation is done based on (in this case) the `Target` type parameter. As mentioned above, during type checking, we do not store the results of trait selection. At codegen time, we repeat the trait selection to choose a particular -impl for each method call. This is done using `fn codegen_select_candidate`. -In this second selection, we do not consider any where-clauses to be in scope +impl for each method call. This is done using `fn codegen_select_candidate`. +In this second selection, we do not consider any where-clauses to be in scope because we know that each resolution will resolve to a particular impl. One interesting twist has to do with nested obligations. In general, in codegen, diff --git a/src/doc/rustc-dev-guide/src/ty-fold.md b/src/doc/rustc-dev-guide/src/ty-fold.md index bf0a51e6b7cfb..120a266e3536a 100644 --- a/src/doc/rustc-dev-guide/src/ty-fold.md +++ b/src/doc/rustc-dev-guide/src/ty-fold.md @@ -99,7 +99,7 @@ it replaces it for something from the list of substitutions, otherwise recursive To replace it, calls [ty_for_param] and all that does is index into the list of substitutions with the index of the `Param`. -[a previous chapter]: ty-module/instantiating-binders.md +[a previous chapter]: ty_module/instantiating_binders.md [`TypeFoldable`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/trait.TypeFoldable.html [`TypeFolder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/trait.TypeFolder.html [`fold_ty`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/trait.TypeFolder.html#method.fold_ty diff --git a/src/doc/rustc-dev-guide/src/ty_module/binders.md b/src/doc/rustc-dev-guide/src/ty_module/binders.md new file mode 100644 index 0000000000000..7fd9eeed54aca --- /dev/null +++ b/src/doc/rustc-dev-guide/src/ty_module/binders.md @@ -0,0 +1,52 @@ +# `Binder` and Higher ranked regions + +Sometimes we define generic parameters not on an item but as part of a type or a where clause. As an example the type `for<'a> fn(&'a u32)` or the where clause `for<'a> T: Trait<'a>` both introduce a generic lifetime named `'a`. Currently there is no stable syntax for `for` or `for` but on nightly `feature(non_lifetime_binders)` can be used to write where clauses (but not types) using `for`/`for`. + +The `for` is referred to as a "binder" because it brings new names into scope. In rustc we use the `Binder` type to track where these parameters are introduced and what the parameters are (i.e. how many and whether the parameter is a type/const/region). A type such as `for<'a> fn(&'a u32)` would be +represented in rustc as: +``` +Binder( + fn(&RegionKind::Bound(DebruijnIndex(0), BoundVar(0)) u32) -> (), + &[BoundVariableKind::Region(...)], +) +``` + +Usages of these parameters is represented by the `RegionKind::Bound` (or `TyKind::Bound`/`ConstKind::Bound` variants). These bound regions/types/consts are composed of two main pieces of data: +- A [DebruijnIndex](../appendix/background.md#what-is-a-de-bruijn-index) to specify which binder we are referring to. +- A [`BoundVar`] which specifies which of the parameters that the `Binder` introduces we are referring to. + +We also sometimes store some extra information for diagnostics reasons via the [`BoundTyKind`]/[`BoundRegionKind`] but this is not important for type equality or more generally the semantics of `Ty`. (omitted from the above example) + +In debug output (and also informally when talking to each other) we tend to write these bound variables in the format of `^DebruijnIndex_BoundVar`. The above example would instead be written as `Binder(fn(&'^0_0), &[BoundVariableKind::Region])`. Sometimes when the `DebruijnIndex` is `0` we just omit it and would write `^0`. + +Another concrete example, this time a mixture of `for<'a>` in a where clause and a type: +``` +where + for<'a> Foo fn(&'a &'b T)>: Trait, +``` +This would be represented as +``` +Binder( + Foo: Trait, + [BoundVariableKind::Region(...)] +) +``` + +Note how the `'^1_0` refers to the `'a` parameter. We use a `DebruijnIndex` of `1` to refer to the binder one level up from the innermost one, and a var of `0` to refer to the first parameter bound which is `'a`. We also use `'^0` to refer to the `'b` parameter, the `DebruijnIndex` is `0` (referring to the innermost binder) so we omit it, leaving only the boundvar of `0` referring to the first parameter bound which is `'b`. + +We did not always explicitly track the set of bound vars introduced by each `Binder`, this caused a number of bugs (read: ICEs [#81193](https://github.com/rust-lang/rust/issues/81193), [#79949](https://github.com/rust-lang/rust/issues/79949), [#83017](https://github.com/rust-lang/rust/issues/83017)). By tracking these explicitly we can assert when constructing higher ranked where clauses/types that there are no escaping bound variables or variables from a different binder. See the following example of an invalid type inside of a binder: +``` +Binder( + fn(&'^1_0 &'^1 T/#0), + &[BoundVariableKind::Region(...)], +) +``` +This would cause all kinds of issues as the region `'^1_0` refers to a binder at a higher level than the outermost binder i.e. it is an escaping bound var. The `'^1` region (also writeable as `'^0_1`) is also ill formed as the binder it refers to does not introduce a second parameter. Modern day rustc will ICE when constructing this binder due to both of those reasons, in the past we would have simply allowed this to work and then ran into issues in other parts of the codebase. + +[`Binder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.Binder.html +[`BoundVar`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.BoundVar.html +[`BoundRegionKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/enum.BoundRegionKind.html +[`BoundTyKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/enum.BoundTyKind.html diff --git a/src/doc/rustc-dev-guide/src/ty_module/early_binder.md b/src/doc/rustc-dev-guide/src/ty_module/early_binder.md new file mode 100644 index 0000000000000..d83d73c955bfc --- /dev/null +++ b/src/doc/rustc-dev-guide/src/ty_module/early_binder.md @@ -0,0 +1,76 @@ +# `EarlyBinder` and instantiating parameters + +Given an item that introduces a generic parameter `T`, whenever we refer to types inside of `foo` (i.e. the return type or argument types) from outside of `foo` we must take care to handle the generic parameters defined on `foo`. As an example: + +```rust,ignore +fn foo(a: T, _b: U) -> T { a } + +fn main() { + let c = foo::(1, 2); +} +``` + +When type checking `main` we cannot just naively look at the return type of `foo` and assign the type `T` to the variable `c`, The function `main` does not define any generic parameters, `T` is completely meaningless in this context. More generally whenever an item introduces (binds) generic parameters, when accessing types inside the item from outside, the generic parameters must be instantiated with values from the outer item. + +In rustc we track this via the [`EarlyBinder`] type, the return type of `foo` is represented as an `EarlyBinder` with the only way to access `Ty` being to provide arguments for any generic parameters `Ty` might be using. This is implemented via the [`EarlyBinder::instantiate`] method which discharges the binder returning the inner value with all the generic parameters replaced by the provided arguments. + +To go back to our example, when type checking `main` the return type of `foo` would be represented as `EarlyBinder(T/#0)`. Then, because we called the function with `i32, u128` for the generic arguments, we would call `EarlyBinder::instantiate` on the return type with `[i32, u128]` for the args. This would result in an instantiated return type of `i32` that we can use as the type of the local `c`. + +Here are some more examples: + +```rust,ignore +fn foo() -> Vec<(u32, T)> { Vec::new() } +fn bar() { + // the return type of `foo` before instantiating it would be: + // `EarlyBinder(Adt(Vec, &[Tup(&[u32, T/#=0])]))` + // we then instantiate the binder with `[u64]` resulting in the type: + // `Adt(Vec, &[Tup(&[u32, u64])])` + let a = foo::(); +} +``` + +```rust,ignore +struct Foo { + x: Vec, + .. +} + +fn bar(foo: Foo) { + // the type of `foo`'s `x` field before instantiating it would be: + // `EarlyBinder(Vec)` + // we then instantiate the binder with `[u32, f32]` as those are the + // generic arguments to the `Foo` struct. This results in a type of: + // `Vec` + let y = foo.x; +} +``` + +In the compiler the `instantiate` call for this is done in [`FieldDef::ty`] ([src][field_def_ty_src]), at some point during type checking `bar` we will wind up calling `FieldDef::ty(x, &[u32, f32])` in order to obtain the type of `foo.x`. + +**Note on indices:** It is a bug if the index of a `Param` does not match what the `EarlyBinder` binds. For +example, if the index is out of bounds or the index of a lifetime corresponds to a type parameter. +These sorts of errors are caught earlier in the compiler during name resolution where we disallow references +to generics parameters introduced by items that should not be nameable by the inner item. + +[`FieldDef::ty`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.FieldDef.html#method.ty +[field_def_ty_src]: https://github.com/rust-lang/rust/blob/44d679b9021f03a79133021b94e6d23e9b55b3ab/compiler/rustc_middle/src/ty/mod.rs#L1421-L1426 +[`EarlyBinder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.EarlyBinder.html +[`EarlyBinder::instantiate`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.EarlyBinder.html#method.instantiate + +--- + +As mentioned previously when _outside_ of an item, it is important to instantiate the `EarlyBinder` with generic arguments before accessing the value inside, but the setup for when we are conceptually inside of the binder already is a bit different. + +For example: +```rust +impl Trait for Vec { + fn foo(&self, b: Self) {} +} +``` + +When constructing a `Ty` to represent the `b` parameter's type we need to get the type of `Self` on the impl that we are inside. This can be acquired by calling the [`type_of`] query with the `impl`'s `DefId`, however, this will return a `EarlyBinder` as the impl block binds generic parameters that may have to be discharged if we are outside of the impl. + +The `EarlyBinder` type provides an [`instantiate_identity`] function for discharging the binder when you are "already inside of it". This is effectively a more performant version of writing `EarlyBinder::instantiate(GenericArgs::identity_for_item(..))`. Conceptually this discharges the binder by instantiating it with placeholders in the root universe (we will talk about what this means in the next few chapters). In practice though it simply returns the inner value with no modification taking place. + +[`type_of`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/context/struct.TyCtxt.html#method.type_of +[`instantiate_identity`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.EarlyBinder.html#method.instantiate_identity diff --git a/src/doc/rustc-dev-guide/src/ty_module/generic_arguments.md b/src/doc/rustc-dev-guide/src/ty_module/generic_arguments.md new file mode 100644 index 0000000000000..3339d31142512 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/ty_module/generic_arguments.md @@ -0,0 +1,128 @@ +# ADTs and Generic Arguments + +The term `ADT` stands for "Algebraic data type", in rust this refers to a struct, enum, or union. + +## ADTs Representation + +Let's consider the example of a type like `MyStruct`, where `MyStruct` is defined like so: + +```rust,ignore +struct MyStruct { x: u8, y: T } +``` + +The type `MyStruct` would be an instance of `TyKind::Adt`: + +```rust,ignore +Adt(&'tcx AdtDef, GenericArgs<'tcx>) +// ------------ --------------- +// (1) (2) +// +// (1) represents the `MyStruct` part +// (2) represents the ``, or "substitutions" / generic arguments +``` + +There are two parts: + +- The [`AdtDef`][adtdef] references the struct/enum/union but without the values for its type + parameters. In our example, this is the `MyStruct` part *without* the argument `u32`. + (Note that in the HIR, structs, enums and unions are represented differently, but in `ty::Ty`, + they are all represented using `TyKind::Adt`.) +- The [`GenericArgs`] is a list of values that are to be substituted +for the generic parameters. In our example of `MyStruct`, we would end up with a list like +`[u32]`. We’ll dig more into generics and substitutions in a little bit. + +[adtdef]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.AdtDef.html +[`GenericArgs`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.GenericArgs.html + +### **`AdtDef` and `DefId`** + +For every type defined in the source code, there is a unique `DefId` (see [this +chapter](../hir.md#identifiers-in-the-hir)). This includes ADTs and generics. In the `MyStruct` +definition we gave above, there are two `DefId`s: one for `MyStruct` and one for `T`. Notice that +the code above does not generate a new `DefId` for `u32` because it is not defined in that code (it +is only referenced). + +`AdtDef` is more or less a wrapper around `DefId` with lots of useful helper methods. There is +essentially a one-to-one relationship between `AdtDef` and `DefId`. You can get the `AdtDef` for a +`DefId` with the [`tcx.adt_def(def_id)` query][adtdefq]. `AdtDef`s are all interned, as shown +by the `'tcx` lifetime. + +[adtdefq]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.TyCtxt.html#method.adt_def + +## Question: Why not substitute “inside” the `AdtDef`? + +Recall that we represent a generic struct with `(AdtDef, args)`. So why bother with this scheme? + +Well, the alternate way we could have chosen to represent types would be to always create a new, +fully-substituted form of the `AdtDef` where all the types are already substituted. This seems like +less of a hassle. However, the `(AdtDef, args)` scheme has some advantages over this. + +First, `(AdtDef, args)` scheme has an efficiency win: + +```rust,ignore +struct MyStruct { + ... 100s of fields ... +} + +// Want to do: MyStruct ==> MyStruct +``` + +in an example like this, we can instantiate `MyStruct` as `MyStruct` (and so on) very cheaply, +by just replacing the one reference to `A` with `B`. But if we eagerly instantiated all the fields, +that could be a lot more work because we might have to go through all of the fields in the `AdtDef` +and update all of their types. + +A bit more deeply, this corresponds to structs in Rust being [*nominal* types][nominal] — which +means that they are defined by their *name* (and that their contents are then indexed from the +definition of that name, and not carried along “within” the type itself). + +[nominal]: https://en.wikipedia.org/wiki/Nominal_type_system + + +## The `GenericArgs` type + +Given a generic type `MyType`, we have to store the list of generic arguments for `MyType`. + +In rustc this is done using [`GenericArgs`]. `GenericArgs` is a thin pointer to a slice of [`GenericArg`] representing a list of generic arguments for a generic item. For example, given a `struct HashMap` with two type parameters, `K` and `V`, the `GenericArgs` used to represent the type `HashMap` would be represented by `&'tcx [tcx.types.i32, tcx.types.u32]`. + +`GenericArg` is conceptually an `enum` with three variants, one for type arguments, one for const arguments and one for lifetime arguments. +In practice that is actually represented by [`GenericArgKind`] and [`GenericArg`] is a more space efficient version that has a method to +turn it into a `GenericArgKind`. + +The actual `GenericArg` struct stores the type, lifetime or const as an interned pointer with the discriminant stored in the lower 2 bits. +Unless you are working with the `GenericArgs` implementation specifically, you should generally not have to deal with `GenericArg` and instead +make use of the safe [`GenericArgKind`](#genericargkind) abstraction obtainable via the `GenericArg::unpack()` method. + +In some cases you may have to construct a `GenericArg`, this can be done via `Ty/Const/Region::into()` or `GenericArgKind::pack`. + +```rust,ignore +// An example of unpacking and packing a generic argument. +fn deal_with_generic_arg<'tcx>(generic_arg: GenericArg<'tcx>) -> GenericArg<'tcx> { + // Unpack a raw `GenericArg` to deal with it safely. + let new_generic_arg: GenericArgKind<'tcx> = match generic_arg.unpack() { + GenericArgKind::Type(ty) => { /* ... */ } + GenericArgKind::Lifetime(lt) => { /* ... */ } + GenericArgKind::Const(ct) => { /* ... */ } + }; + // Pack the `GenericArgKind` to store it in a generic args list. + new_generic_arg.pack() +} +``` + +[list]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.List.html +[`GenericArg`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.GenericArg.html +[`GenericArgKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.GenericArgKind.html +[`GenericArgs`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.GenericArgs.html + +So pulling it all together: + +```rust,ignore +struct MyStruct(T); +type Foo = MyStruct +``` + +For the `MyStruct` written in the `Foo` type alias, we would represent it in the following way: + +- There would be an `AdtDef` (and corresponding `DefId`) for `MyStruct`. +- There would be a `GenericArgs` containing the list `[GenericArgKind::Type(Ty(u32))]` +- And finally a `TyKind::Adt` with the `AdtDef` and `GenericArgs` listed above. diff --git a/src/doc/rustc-dev-guide/src/ty_module/instantiating_binders.md b/src/doc/rustc-dev-guide/src/ty_module/instantiating_binders.md new file mode 100644 index 0000000000000..7e29b95437140 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/ty_module/instantiating_binders.md @@ -0,0 +1,148 @@ +# Instantiating `Binder`s + +Much like [`EarlyBinder`], when accessing the inside of a [`Binder`] we must first discharge it by replacing the bound vars with some other value. This is for much the same reason as with `EarlyBinder`, types referencing parameters introduced by the `Binder` do not make any sense outside of that binder. See the following erroring example: +```rust,ignore +fn foo<'a>(a: &'a u32) -> &'a u32 { + a +} +fn bar(a: fn(&u32) -> T) -> T { + a(&10) +} + +fn main() { + let higher_ranked_fn_ptr = foo as for<'a> fn(&'a u32) -> &'a u32; + // Attempt to infer `T=for<'a> &'a u32` which is not satsifiable + let references_bound_vars = bar(higher_ranked_fn_ptr); +} +``` +In this example we are providing an argument of type `for<'a> fn(&'^0 u32) -> &'^0 u32` to `bar`, we do not want to allow `T` to be inferred to the type `&'^0 u32` as it would be rather nonsensical (and likely unsound if we did not happen to ICE). `main` doesn't know about `'a` so the borrow checker would not be able to handle a borrow with lifetime `'a`. + +Unlike `EarlyBinder` we typically do not instantiate `Binder` with some concrete set of arguments from the user, i.e. `['b, 'static]` as arguments to a `for<'a1, 'a2> fn(&'a1 u32, &'a2 u32)`. Instead we usually instantiate the binder with inference variables or placeholders. + +## Instantiating with inference variables + +We instantiate binders with inference variables when we are trying to infer a possible instantiation of the binder, e.g. calling higher ranked function pointers or attempting to use a higher ranked where-clause to prove some bound. For example, given the `higher_ranked_fn_ptr` from the example above, if we were to call it with `&10_u32` we would: +- Instantiate the binder with infer vars yielding a signature of `fn(&'?0 u32) -> &'?0 u32)` +- Equate the type of the provided argument `&10_u32` (&'static u32) with the type in the signature, `&'?0 u32`, inferring `'?0 = 'static` +- The provided arguments were correct as we were successfully able to unify the types of the provided arguments with the types of the arguments in fn ptr signature + +As another example of instantiating with infer vars, given some `for<'a> T: Trait<'a>` where-clause, if we were attempting to prove that `T: Trait<'static>` holds we would: +- Instantiate the binder with infer vars yielding a where clause of `T: Trait<'?0>` +- Equate the goal of `T: Trait<'static>` with the instantiated where clause, inferring `'?0 = 'static` +- The goal holds because we were successfully able to unify `T: Trait<'static>` with `T: Trait<'?0>` + +Instantiating binders with inference variables can be accomplished by using the [`instantiate_binder_with_fresh_vars`] method on [`InferCtxt`]. Binders should be instantiated with infer vars when we only care about one specific instantiation of the binder, if instead we wish to reason about all possible instantiations of the binder then placeholders should be used instead. + +## Instantiating with placeholders + +Placeholders are very similar to `Ty/ConstKind::Param`/`ReEarlyParam`, they represent some unknown type that is only equal to itself. `Ty`/`Const` and `Region` all have a [`Placeholder`] variant that is comprised of a [`Universe`] and a [`BoundVar`]. + +The `Universe` tracks which binder the placeholder originated from, and the `BoundVar` tracks which parameter on said binder that this placeholder corresponds to. Equality of placeholders is determined solely by whether the universes are equal and the `BoundVar`s are equal. See the [chapter on Placeholders and Universes][ch_placeholders_universes] for more information. + +When talking with other rustc devs or seeing `Debug` formatted `Ty`/`Const`/`Region`s, `Placeholder` will often be written as `'!UNIVERSE_BOUNDVARS`. For example given some type `for<'a> fn(&'a u32, for<'b> fn(&'b &'a u32))`, after instantiating both binders (assuming the `Universe` in the current `InferCtxt` was `U0` beforehand), the type of `&'b &'a u32` would be represented as `&'!2_0 &!1_0 u32`. + +When the universe of the placeholder is `0`, it will be entirely omitted from the debug output, i.e. `!0_2` would be printed as `!2`. This rarely happens in practice though as we increase the universe in the `InferCtxt` when instantiating a binder with placeholders so usually the lowest universe placeholders encounterable are ones in `U1`. + +`Binder`s can be instantiated with placeholders via the [`enter_forall`] method on `InferCtxt`. It should be used whenever the compiler should care about any possible instantiation of the binder instead of one concrete instantiation. + +Note: in the original example of this chapter it was mentioned that we should not infer a local variable to have type `&'^0 u32`. This code is prevented from compiling via universes (as explained in the linked chapter) + +### Why have both `RePlaceholder` and `ReBound`? + +You may be wondering why we have both of these variants, afterall the data stored in `Placeholder` is effectively equivalent to that of `ReBound`: something to track which binder, and an index to track which parameter the `Binder` introduced. + +The main reason for this is that `Bound` is a more syntactic representation of bound variables whereas `Placeholder` is a more semantic representation. As a concrete example: +```rust +impl<'a> Other<'a> for &'a u32 { } + +impl Trait for T +where + for<'a> T: Other<'a>, +{ ... } + +impl Bar for T +where + for<'a> &'a T: Trait +{ ... } +``` + +Given these trait implementations `u32: Bar` should _not_ hold. `&'a u32` only implements `Other<'a>` when the lifetime of the borrow and the lifetime on the trait are equal. However if we only used `ReBound` and did not have placeholders it may be easy to accidentally believe that trait bound does hold. To explain this let's walk through an example of trying to prove `u32: Bar` in a world where rustc did not have placeholders: +- We start by trying to prove `u32: Bar` +- We find the `impl Bar for T` impl, we would wind up instantiating the `EarlyBinder` with `u32` (note: this is not _quite_ accurate as we first instantiate the binder with an inference variable that we then infer to be `u32` but that distinction is not super important here) +- There is a where clause `for<'a> &'^0 T: Trait` on the impl, as we instantiated the early binder with `u32` we actually have to prove `for<'a> &'^0 u32: Trait` +- We find the `impl Trait for T` impl, we would wind up instantiating the `EarlyBinder` with `&'^0 u32` +- There is a where clause `for<'a> T: Other<'^0>`, as we instantiated the early binder with `&'^0 u32` we actually have to prove `for<'a> &'^0 u32: Other<'^0>` +- We find the `impl<'a> Other<'a> for &'a u32` and this impl is enough to prove the bound as the lifetime on the borrow and on the trait are both `'^0` + +This end result is incorrect as we had two separate binders introducing their own generic parameters, the trait bound should have ended up as something like `for<'a1, 'a2> &'^1 u32: Other<'^0>` which is _not_ satisfied by the `impl<'a> Other<'a> for &'a u32`. + +While in theory we could make this work it would be quite involved and more complex than the current setup, we would have to: +- "rewrite" bound variables to have a higher `DebruijnIndex` whenever instantiating a `Binder`/`EarlyBinder` with a `Bound` ty/const/region +- When inferring an inference variable to a bound var, if that bound var is from a binder entered after creating the infer var, we would have to lower the `DebruijnIndex` of the var. +- Separately track what binder an inference variable was created inside of, also what the innermost binder it can name parameters from (currently we only have to track the latter) +- When resolving inference variables rewrite any bound variables according to the current binder depth of the infcx +- Maybe more (while writing this list items kept getting added so it seems naive to think this is exhaustive) + +Fundamentally all of this complexity is because `Bound` ty/const/regions have a different representation for a given parameter on a `Binder` depending on how many other `Binder`s there are between the binder introducing the parameter, and its usage. For example given the following code: +```rust +fn foo() +where + for<'a> T: Trait<'a, for<'b> fn(&'b T, &'a u32)> +{ ... } +``` +That where clause would be written as: +`for<'a> T: Trait<'^0, for<'b> fn(&'^0 T, &'^1_0 u32)>` +Despite there being two references to the `'a` parameter they are both represented differently: `^0` and `^1_0`, due to the fact that the latter usage is nested under a second `Binder` for the inner function pointer type. + +This is in contrast to `Placeholder` ty/const/regions which do not have this limitation due to the fact that `Universe`s are specific to the current `InferCtxt` not the usage site of the parameter. + +It is trivially possible to instantiate `EarlyBinder`s and unify inference variables with existing `Placeholder`s as no matter what context the `Placeholder` is in, it will have the same representation. As an example if we were to instantiate the binder on the higher ranked where clause from above, it would be represented like so: +`T: Trait<'!1_0, for<'b> fn(&'^0 T, &'!1_0 u32)>` +the `RePlaceholder` representation for both usages of `'a` are the same despite one being underneath another `Binder`. + +If we were to then instantiate the binder on the function pointer we would get a type such as: +`fn(&'!2_0 T, ^'!1_0 u32)` +the `RePlaceholder` for the `'b` parameter is in a higher universe to track the fact that its binder was instantiated after the binder for `'a`. + +## Instantiating with `ReLateParam` + +As discussed in [the chapter about representing types][representing-types], `RegionKind` has two variants for representing generic parameters, `ReLateParam` and `ReEarlyParam`. +`ReLateParam` is conceptually a `Placeholder` that is always in the root universe (`U0`). It is used when instantiating late bound parameters of functions/closures while inside of them. Its actual representation is relatively different from both `ReEarlyParam` and `RePlaceholder`: +- A `DefId` for the item that introduced the late bound generic parameter +- A [`BoundRegionKind`] which either specifies the `DefId` of the generic parameter and its name (via a `Symbol`), or that this placeholder is representing the anonymous lifetime of a `Fn`/`FnMut` closure's self borrow. There is also a variant for `BrAnon` but this is not used for `ReLateParam`. + +For example, given the following code: +```rust,ignore +impl Trait for Whatever { + fn foo<'a>(a: &'a u32) -> &'a u32 { + let b: &'a u32 = a; + b + } +} +``` +the lifetime `'a` in the type `&'a u32` in the function body would be represented as: +``` +ReLateParam( + {impl#0}::foo, + BoundRegionKind::BrNamed({impl#0}::foo::'a, "'a") +) +``` + +In this specific case of referencing late bound generic parameters of a function from inside the body this is done implicitly during `hir_ty_lowering` rather than explicitly when instantiating a `Binder` somewhere. In some cases however, we do explicitly instantiate a `Binder` with `ReLateParam`s. + +Generally whenever we have a `Binder` for late bound parameters on a function/closure and we are conceptually inside of the binder already, we use [`liberate_late_bound_regions`] to instantiate it with `ReLateParam`s. That makes this operation the `Binder` equivalent to `EarlyBinder`'s `instantiate_identity`. + +As a concrete example, accessing the signature of a function we are type checking will be represented as `EarlyBinder>`. As we are already "inside" of these binders, we would call `instantiate_identity` followed by `liberate_late_bound_regions`. + +[`liberate_late_bound_regions`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/context/struct.TyCtxt.html#method.liberate_late_bound_regions +[representing-types]: param_ty_const_regions.md +[`BoundRegionKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/enum.BoundRegionKind.html +[`enter_forall`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/infer/struct.InferCtxt.html#method.enter_forall +[ch_placeholders_universes]: ../borrow_check/region_inference/placeholders_and_universes.md +[`instantiate_binder_with_fresh_vars`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/infer/struct.InferCtxt.html#method.instantiate_binder_with_fresh_vars +[`InferCtxt`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/infer/struct.InferCtxt.html +[`EarlyBinder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.EarlyBinder.html +[`Binder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.Binder.html +[`Placeholder`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.Placeholder.html +[`Universe`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.UniverseIndex.html +[`BoundVar`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.BoundVar.html diff --git a/src/doc/rustc-dev-guide/src/ty_module/param_ty_const_regions.md b/src/doc/rustc-dev-guide/src/ty_module/param_ty_const_regions.md new file mode 100644 index 0000000000000..493693c9a4400 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/ty_module/param_ty_const_regions.md @@ -0,0 +1,98 @@ +# Parameter `Ty`/`Const`/`Region`s + +When inside of generic items, types can be written that use in scope generic parameters, for example `fn foo<'a, T>(_: &'a Vec)`. In this specific case +the `&'a Vec` type would be represented internally as: +``` +TyKind::Ref( + RegionKind::LateParam(DefId(foo), DefId(foo::'a), "'a"), + TyKind::Adt(Vec, &[TyKind::Param("T", 0)]) +) +``` + +There are three separate ways we represent usages of generic parameters: +- [`TyKind::Param`]/[`ConstKind::Param`]/[`RegionKind::EarlyParam`] for early bound generic parameters (note: all type and const parameters are considered early bound, see the [chapter on early vs late bound parameters][ch_early_late_bound] for more information) +- [`TyKind::Bound`]/[`ConstKind::Bound`]/[`RegionKind::Bound`] for references to parameters introduced via higher ranked bounds or higher ranked types i.e. `for<'a> fn(&'a u32)` or `for<'a> T: Trait<'a>`. This is discussed in the [chapter on `Binder`s][ch_binders]. +- [`RegionKind::LateParam`] for late bound lifetime parameters, `LateParam` is discussed in the [chapter on instantiating `Binder`s][ch_instantiating_binders]. + +This chapter only covers `TyKind::Param` `ConstKind::Param` and `RegionKind::EarlyParam`. + +## Ty/Const Parameters + +As `TyKind::Param` and `ConstKind::Param` are implemented identically this section only refers to `TyKind::Param` for simplicity. +However you should keep in mind that everything here also is true of `ConstKind::Param` + +Each `TyKind::Param` contains two things: the name of the parameter and an index. + +See the following concrete example of a usage of `TyKind::Param`: +```rust,ignore +struct Foo(Vec); +``` +The `Vec` type is represented as `TyKind::Adt(Vec, &[GenericArgKind::Type(Param("T", 0))])`. + +The name is somewhat self explanatory, it's the name of the type parameter. The index of the type parameter is an integer indicating +its order in the list of generic parameters in scope (note: this includes parameters defined on items on outer scopes than the item the parameter is defined on). Consider the following examples: + +```rust,ignore +struct Foo { + // A would have index 0 + // B would have index 1 + + .. // some fields +} +impl Foo { + fn method() { + // inside here, X, Y and Z are all in scope + // X has index 0 + // Y has index 1 + // Z has index 2 + } +} +``` + +Concretely given the `ty::Generics` for the item the parameter is defined on, if the index is `2` then starting from the root `parent`, it will be the third parameter to be introduced. For example in the above example, `Z` has index `2` and is the third generic parameter to be introduced, starting from the `impl` block. + +The index fully defines the `Ty` and is the only part of `TyKind::Param` that matters for reasoning about the code we are compiling. + +Generally we do not care what the name is and only use the index. The name is included for diagnostics and debug logs as otherwise it would be +incredibly difficult to understand the output, i.e. `Vec: Sized` vs `Vec: Sized`. In debug output, parameter types are +often printed out as `{name}/#{index}`, for example in the function `foo` if we were to debug print `Vec` it would be written as `Vec`. + +An alternative representation would be to only have the name, however using an index is more efficient as it means we can index into `GenericArgs` when instantiating generic parameters with some arguments. We would otherwise have to store `GenericArgs` as a `HashMap` and do a hashmap lookup everytime we used a generic item. + +In theory an index would also allow for having multiple distinct parameters that use the same name, e.g. +`impl Foo { fn bar() { .. } }`. +The rules against shadowing make this difficult but those language rules could change in the future. + +### Lifetime parameters + +In contrast to `Ty`/`Const`'s `Param` singular `Param` variant, lifetimes have two variants for representing region parameters: [`RegionKind::EarlyParam`] and [`RegionKind::LateParam`]. The reason for this is due to function's distinguishing between [early and late bound parameters][ch_early_late_bound] which is discussed in an earlier chapter (see link). + +`RegionKind::EarlyParam` is structured identically to `Ty/Const`'s `Param` variant, it is simply a `u32` index and a `Symbol`. For lifetime parameters defined on non-function items we always use `ReEarlyParam`. For functions we use `ReEarlyParam` for any early bound parameters and `ReLateParam` for any late bound parameters. Note that just like `Ty` and `Const` params we often debug format them as `'SYMBOL/#INDEX`, see for example: + +```rust,ignore +// This function would have its signature represented as: +// +// ``` +// fn( +// T/#2, +// Ref('a/#0, Ref(ReLateParam(...), u32)) +// ) -> Ref(ReLateParam(...), u32) +// ``` +fn foo<'a, 'b, T: 'a>(one: T, two: &'a &'b u32) -> &'b u32 { + ... +} +``` + +`RegionKind::LateParam` is discussed more in the chapter on [instantiating binders][ch_instantiating_binders]. + +[ch_early_late_bound]: ../early_late_parameters.md +[ch_binders]: ./binders.md +[ch_instantiating_binders]: ./instantiating_binders.md +[`BoundRegionKind`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/enum.BoundRegionKind.html +[`RegionKind::EarlyParam`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.RegionKind.html#variant.ReEarlyParam +[`RegionKind::LateParam`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.RegionKind.html#variant.ReLateParam +[`ConstKind::Param`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.ConstKind.html#variant.Param +[`TyKind::Param`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.TyKind.html#variant.Param +[`TyKind::Bound`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.TyKind.html#variant.Bound +[`ConstKind::Bound`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.ConstKind.html#variant.Bound +[`RegionKind::Bound`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.RegionKind.html#variant.ReBound diff --git a/src/doc/rustc-dev-guide/src/typing_parameter_envs.md b/src/doc/rustc-dev-guide/src/typing_parameter_envs.md new file mode 100644 index 0000000000000..45635ebfa15d6 --- /dev/null +++ b/src/doc/rustc-dev-guide/src/typing_parameter_envs.md @@ -0,0 +1,236 @@ +# Typing/Parameter Environments + +## Typing Environments + +When interacting with the type system there are a few variables to consider that can affect the results of trait solving. +The set of in-scope where clauses, and what phase of the compiler type system operations are being performed in (the [`ParamEnv`][penv] and [`TypingMode`][tmode] structs respectively). + +When an environment to perform type system operations in has not yet been created, +the [`TypingEnv`][tenv] can be used to bundle all of the external context required into a single type. + +Once a context to perform type system operations in has been created (e.g. an [`ObligationCtxt`][ocx] or [`FnCtxt`][fnctxt]) a `TypingEnv` is typically not stored anywhere as only the `TypingMode` is a property of the whole environment, +whereas different `ParamEnv`s can be used on a per-goal basis. + +[ocx]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/traits/struct.ObligationCtxt.html +[fnctxt]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_typeck/fn_ctxt/struct.FnCtxt.html + +## Parameter Environments + +### What is a `ParamEnv` + +The [`ParamEnv`][penv] is a list of in-scope where-clauses, +it typically corresponds to a specific item's where clauses. +Some clauses are not explicitly written but are instead implicitly added in the [`predicates_of`][predicates_of] query, +such as `ConstArgHasType` or (some) implied bounds. + +In most cases `ParamEnv`s are initially created via the [`param_env` query][query] which returns a `ParamEnv` derived from the provided item's where clauses. +A `ParamEnv` can also be created with arbitrary sets of clauses that are not derived from a specific item, +such as in [`compare_method_predicate_entailment`][method_pred_entailment] where we create a hybrid `ParamEnv` consisting of the impl's where clauses and the trait definition's function's where clauses. + +--- + +If we have a function such as: +```rust +// `foo` would have a `ParamEnv` of: +// `[T: Sized, T: Trait, ::Assoc: Clone]` +fn foo() +where + ::Assoc: Clone, +{} +``` +If we were conceptually inside of `foo` (for example, type-checking or linting it) we would use this `ParamEnv` everywhere that we interact with the type system. +This would allow things such as [normalization], evaluating generic constants, +and proving where clauses/goals, to rely on `T` being sized, implementing `Trait`, etc. + +A more concrete example: +```rust +// `foo` would have a `ParamEnv` of: +// `[T: Sized, T: Clone]` +fn foo(a: T) { + // when typechecking `foo` we require all the where clauses on `requires_clone` + // to hold in order for it to be legal to call. This means we have to + // prove `T: Clone`. As we are type checking `foo` we use `foo`'s + // environment when trying to check that `T: Clone` holds. + // + // Trying to prove `T: Clone` with a `ParamEnv` of `[T: Sized, T: Clone]` + // will trivially succeed as bound we want to prove is in our environment. + requires_clone(a); +} +``` + +Or alternatively an example that would not compile: +```rust +// `foo2` would have a `ParamEnv` of: +// `[T: Sized]` +fn foo2(a: T) { + // When typechecking `foo2` we attempt to prove `T: Clone`. + // As we are type checking `foo2` we use `foo2`'s environment + // when trying to prove `T: Clone`. + // + // Trying to prove `T: Clone` with a `ParamEnv` of `[T: Sized]` will + // fail as there is nothing in the environment telling the trait solver + // that `T` implements `Clone` and there exists no user written impl + // that could apply. + requires_clone(a); +} +``` + +[predicates_of]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_analysis/collect/predicates_of/fn.predicates_of.html +[method_pred_entailment]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_analysis/check/compare_impl_item/fn.compare_method_predicate_entailment.html +[query]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/context/struct.TyCtxt.html#method.param_env +[normalization]: normalization.md + +### Acquiring a `ParamEnv` + +Using the wrong [`ParamEnv`][penv] when interacting with the type system can lead to ICEs, +illformed programs compiling, or erroring when we shouldn't. +See [#82159](https://github.com/rust-lang/rust/pull/82159) and [#82067](https://github.com/rust-lang/rust/pull/82067) as examples of PRs that modified the compiler to use the correct param env and in the process fixed ICEs. + +In the large majority of cases, when a `ParamEnv` is required it either already exists somewhere in scope, +or above in the call stack and should be passed down. +A non exhaustive list of places where you might find an existing `ParamEnv`: +- During typeck `FnCtxt` has a [`param_env` field][fnctxt_param_env] +- When writing late lints the `LateContext` has a [`param_env` field][latectxt_param_env] +- During well formedness checking the `WfCheckingCtxt` has a [`param_env` field][wfckctxt_param_env] +- The `TypeChecker` used for MIR Typeck has a [`param_env` field][mirtypeck_param_env] +- In the next-gen trait solver all `Goal`s have a [`param_env` field][goal_param_env] specifying what environment to prove the goal in +- When editing an existing [`TypeRelation`][typerelation] if it implements [`PredicateEmittingRelation`][predicate_emitting_relation] then a [`param_env` method][typerelation_param_env] will be available. + +If you aren't sure if there's a `ParamEnv` in scope somewhere that can be used it can be worth opening a thread in the [`#t-compiler/help`][compiler_help] Zulip channel where someone may be able to point out where a `ParamEnv` can be acquired from. + +Manually constructing a `ParamEnv` is typically only needed at the start of some kind of top level analysis (e.g. hir typeck or borrow checking). +In such cases there are three ways it can be done: +- Calling the [`tcx.param_env(def_id)` query][param_env_query] which returns the environment associated with a given definition. +- Creating an empty environment with [`ParamEnv::empty`][env_empty]. +- Using [`ParamEnv::new`][param_env_new] to construct an env with an arbitrary set of where clauses. + Then calling [`traits::normalize_param_env_or_error`][normalize_env_or_error] to handle normalizing and elaborating all the where clauses in the env. + +Using the `param_env` query is by far the most common way to construct a `ParamEnv` as most of the time the compiler is performing an analysis as part of some specific definition. + +Creating an empty environment with `ParamEnv::empty` is typically only done either in codegen (indirectly via [`TypingEnv::fully_monomorphized`][tenv_mono]), +or as part of some analysis that do not expect to ever encounter generic parameters +(e.g. various parts of coherence/orphan check). + +Creating an env from an arbitrary set of where clauses is usually unnecessary and should only be done if the environment you need does not correspond to an actual item in the source code (e.g. [`compare_method_predicate_entailment`][method_pred_entailment]). + +[param_env_new]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.ParamEnv.html#method.new +[normalize_env_or_error]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/traits/fn.normalize_param_env_or_error.html +[fnctxt_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_typeck/fn_ctxt/struct.FnCtxt.html#structfield.param_env +[latectxt_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_lint/context/struct.LateContext.html#structfield.param_env +[wfckctxt_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_analysis/check/wfcheck/struct.WfCheckingCtxt.html#structfield.param_env +[goal_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_infer/infer/canonical/ir/solve/struct.Goal.html#structfield.param_env +[typerelation_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_infer/infer/trait.PredicateEmittingRelation.html#tymethod.param_env +[typerelation]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/relate/trait.TypeRelation.html +[mirtypeck_param_env]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_borrowck/type_check/struct.TypeChecker.html#structfield.param_env +[env_empty]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.ParamEnv.html#method.empty +[param_env_query]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_typeck/fn_ctxt/struct.FnCtxt.html#structfield.param_env +[method_pred_entailment]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir_analysis/check/compare_impl_item/fn.compare_method_predicate_entailment.html +[predicate_emitting_relation]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/relate/combine/trait.PredicateEmittingRelation.html +[tenv_mono]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.TypingEnv.html#method.fully_monomorphized +[compiler_help]: https://rust-lang.zulipchat.com/#narrow/channel/182449-t-compiler.2Fhelp + +### How are `ParamEnv`s constructed + +Creating a [`ParamEnv`][pe] is more complicated than simply using the list of where clauses defined on an item as written by the user. +We need to both elaborate supertraits into the env and fully normalize all aliases. +This logic is handled by [`traits::normalize_param_env_or_error`][normalize_env_or_error] (even though it does not mention anything about elaboration). + +#### Elaborating supertraits + +When we have a function such as `fn foo()` we would like to be able to prove `T: Clone` inside of the function as the `Copy` trait has a `Clone` supertrait. +Constructing a `ParamEnv` looks at all of the trait bounds in the env and explicitly adds new where clauses to the `ParamEnv` for any supertraits found on the traits. + +A concrete example would be the following function: +```rust +trait Trait: SuperTrait {} +trait SuperTrait: SuperSuperTrait {} + +// `bar`'s unelaborated `ParamEnv` would be: +// `[T: Sized, T: Copy, T: Trait]` +fn bar(a: T) { + requires_impl(a); +} + +fn requires_impl(a: T) {} +``` + +If we did not elaborate the env then the `requires_impl` call would fail to typecheck as we would not be able to prove `T: Clone` or `T: SuperSuperTrait`. +In practice we elaborate the env which means that `bar`'s `ParamEnv` is actually: +`[T: Sized, T: Copy, T: Clone, T: Trait, T: SuperTrait, T: SuperSuperTrait]` +This allows us to prove `T: Clone` and `T: SuperSuperTrait` when type checking `bar`. + +The `Clone` trait has a `Sized` supertrait however we do not end up with two `T: Sized` bounds in the env (one for the supertrait and one for the implicitly added `T: Sized` bound) as the elaboration process (implemented via [`util::elaborate`][elaborate]) deduplicates where clauses. + +A side effect of this is that even if no actual elaboration of supertraits takes place, +the existing where clauses in the env are _also_ deduplicated. +See the following example: +```rust +trait Trait {} +// The unelaborated `ParamEnv` would be: +// `[T: Sized, T: Trait, T: Trait]` +// but after elaboration it would be: +// `[T: Sized, T: Trait]` +fn foo() {} +``` + +The [next-gen trait solver][next-gen-solver] also requires this elaboration to take place. + +[elaborate]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_infer/traits/util/fn.elaborate.html +[next-gen-solver]: ./solve/trait-solving.md + +#### Normalizing all bounds + +In the old trait solver the where clauses stored in `ParamEnv` are required to be fully normalized as otherwise the trait solver will not function correctly. +A concrete example of needing to normalize the `ParamEnv` is the following: +```rust +trait Trait { + type Assoc; +} + +trait Other { + type Bar; +} + +impl Other for T { + type Bar = u32; +} + +// `foo`'s unnormalized `ParamEnv` would be: +// `[T: Sized, U: Sized, U: Trait]` +fn foo(a: U) +where + U: Trait<::Bar>, +{ + requires_impl(a); +} + +fn requires_impl>(_: U) {} +``` + +As humans we can tell that `::Bar` is equal to `u32` so the trait bound on `U` is equivalent to `U: Trait`. +In practice trying to prove `U: Trait` in the old solver in this environment would fail as it is unable to determine that `::Bar` is equal to `u32`. + +To work around this we normalize `ParamEnv`'s after constructing them so that `foo`'s `ParamEnv` is actually: `[T: Sized, U: Sized, U: Trait]` which means the trait solver is now able to use the `U: Trait` in the `ParamEnv` to determine that the trait bound `U: Trait` holds. + +This workaround does not work in all cases as normalizing associated types requires a `ParamEnv` which introduces a bootstrapping problem. +We need a normalized `ParamEnv` in order for normalization to give correct results, but we need to normalize to get that `ParamEnv`. +Currently we normalize the `ParamEnv` once using the unnormalized param env and it tends to give okay results in practice even though there are some examples where this breaks ([example]). + +In the next-gen trait solver the requirement for all where clauses in the `ParamEnv` to be fully normalized is not present and so we do not normalize when constructing `ParamEnv`s. + +[example]: https://play.rust-lang.org/?version=stable&mode=debug&edition=2021&gist=e6933265ea3e84eaa47019465739992c +[pe]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.ParamEnv.html +[normalize_env_or_error]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_trait_selection/traits/fn.normalize_param_env_or_error.html + +## Typing Modes + +Depending on what context we are performing type system operations in, +different behaviour may be required. +For example during coherence there are stronger requirements about when we can consider goals to not hold or when we can consider types to be unequal. + +Tracking which "phase" of the compiler type system operations are being performed in is done by the [`TypingMode`][tmode] enum. +The documentation on the `TypingMode` enum is quite good so instead of repeating it here verbatim we would recommend reading the API documentation directly. + +[penv]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.ParamEnv.html +[tenv]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/struct.TypingEnv.html +[tmode]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/ty/type.TypingMode.html diff --git a/src/doc/rustc-dev-guide/src/walkthrough.md b/src/doc/rustc-dev-guide/src/walkthrough.md index 212fb298fd0b3..5ba89f984a703 100644 --- a/src/doc/rustc-dev-guide/src/walkthrough.md +++ b/src/doc/rustc-dev-guide/src/walkthrough.md @@ -41,15 +41,18 @@ Here is a quick list. We will go through each of these in order below. As I mentioned before, not all of these are needed for every type of contribution. -- **Idea discussion/Pre-RFC** A Pre-RFC is an early draft or design discussion of a feature. +- **Idea discussion/Pre-RFC** A Pre-RFC is an early draft or design discussion + of a feature. This stage is intended to flesh out the design space a bit and get a grasp on the different merits and problems with an idea. - It's a great way to get early feedback on your idea before presenting it to the wider audience. + It's a great way to get early feedback on your idea before presenting it to the wider + audience. You can find the original discussion [here][prerfc]. -- **RFC** This is when you formally present your idea to the community for consideration. +- **RFC** This is when you formally present your idea to the community for + consideration. You can find the RFC [here][rfc]. -- **Implementation** Implement your idea unstably in the compiler. - You can find the original implementation [here][impl1]. +- **Implementation** Implement your idea unstably in the compiler. You can + find the original implementation [here][impl1]. - **Possibly iterate/refine** As the community gets experience with your feature on the nightly compiler and in `std`, there may be additional feedback about design choice that might be adjusted. @@ -94,7 +97,7 @@ If that sounds like a lot of work, it's because it is. But no fear! Even if you're not a compiler hacker, you can get great feedback by doing a _pre-RFC_. This is an _informal_ discussion of the idea. -The best place to do this is [internals.rust-lang.org](https://internals.rust-lang.org). +The best place to do this is internals.rust-lang.org. Your post doesn't have to follow any particular structure. It doesn't even need to be a cohesive idea. Generally, you will get tons of feedback that you can integrate back to produce a good RFC. @@ -111,7 +114,8 @@ In this case, the discussion converged pretty quickly, but for some ideas, a lot more discussion can happen (e.g. see [this RFC][nonascii] which received a whopping 684 comments!). If that happens, don't be discouraged; -it means the community is interested in your idea, but it perhaps needs some adjustments. +it means the community is interested in your idea, but it perhaps needs some +adjustments. [nonascii]: https://github.com/rust-lang/rfcs/pull/2457 @@ -134,10 +138,10 @@ last chance for people to bring up objections. When the FCP is over, the disposition is adopted. Here are the three possible dispositions: -- _Merge_: accept the feature. - Here is the proposal to merge for our [`?` macro feature][rfcmerge]. -- _Close_: this feature in its current form is not a good fit for rust. - Don't be discouraged if this happens to your RFC, and don't take it personally. +- _Merge_: accept the feature. Here is the proposal to merge for our [`?` macro + feature][rfcmerge]. +- _Close_: this feature in its current form is not a good fit for rust. Don't + be discouraged if this happens to your RFC, and don't take it personally. This is not a reflection on you, but rather a community decision that rust will go a different direction. - _Postpone_: there is interest in going this direction but not at the moment. @@ -155,21 +159,6 @@ Here is the tracking issue on for our [`?` macro feature][tracking]. [tracking]: https://github.com/rust-lang/rust/issues/48075 -## Experimental RFC (eRFC) - -An eRFC is a variant of the RFC process used for complex features where the high-level need -is clear, but the design space is too large to settle on a detailed specification upfront. -Instead of providing a final design, an eRFC outlines a high-level strategy to authorize -a period of active experimentation. -This allows the team to implement the feature behind -a feature gate and gather practical data, which then informs a subsequent formal RFC for stabilization. -While this process was used for major features like coroutines ([see RFC 2033][rfc2033]), -the explicit "eRFC" label is rarely used today. -The project now generally prefers approving a standard -RFC for an initial version and iterating on it through the nightly channel before final stabilization. - -[rfc2033]: https://github.com/rust-lang/rfcs/pull/2033#issuecomment-309057591 - ## Implementation @@ -197,8 +186,8 @@ When a new feature is implemented, it goes behind a _feature gate_, which means you have to use `#![feature(my_feature_name)]` to use the feature. The feature gate is removed when the feature is stabilized. -**Most bug fixes and improvements** don't require a feature gate. -You can just make your changes/improvements. +**Most bug fixes and improvements** don't require a feature gate. You can just +make your changes/improvements. When you open a PR on the [rust-lang/rust], a bot will assign your PR to a reviewer. If there is a particular Rust team member you are working with, you can @@ -215,7 +204,8 @@ When you finished iterating on the changes, you can mark the PR as `S-waiting-on-author` label and add the `S-waiting-on-review` label. Feel free to ask questions or discuss things you don't understand or disagree with. -However, recognize that the PR won't be merged unless someone on the Rust team approves it. +However, recognize that the PR won't be merged unless someone on the Rust team approves +it. If a reviewer leave a comment like `r=me after fixing ...`, that means they approve the PR and you can merge it with comment with `@bors r=reviewer-github-id`(e.g. `@bors r=eddyb`) to merge it after fixing trivial issues. @@ -232,7 +222,8 @@ If all tests pass, the PR is merged and becomes part of the next nightly compile There are a couple of things that may happen for some PRs during the review process -- If the change is substantial enough, the reviewer may request an FCP on the PR. +- If the change is substantial enough, the reviewer may request an FCP on + the PR. This gives all members of the appropriate team a chance to review the changes. - If the change may cause breakage, the reviewer may request a [crater] run. This compiles the compiler with your changes and then attempts to compile all @@ -293,6 +284,6 @@ A note is added to the [Release notes][relnotes] about the feature. [stab]: https://github.com/rust-lang/rust/pull/56245 -Steps to stabilize the feature can be found at [Stabilizing Features](./stabilization-guide.md). +Steps to stabilize the feature can be found at [Stabilizing Features](./stabilization_guide.md). [relnotes]: https://github.com/rust-lang/rust/blob/HEAD/RELEASES.md diff --git a/src/doc/rustc/src/profile-guided-optimization.md b/src/doc/rustc/src/profile-guided-optimization.md index eeeeffe65a029..4050494793a32 100644 --- a/src/doc/rustc/src/profile-guided-optimization.md +++ b/src/doc/rustc/src/profile-guided-optimization.md @@ -151,9 +151,7 @@ to use PGO with Rust. As an alternative to directly using the compiler for Profile-Guided Optimization, you may choose to go with `cargo-pgo`, which has an intuitive command-line API and saves you the trouble of doing all the manual work. You can read more about -it in [cargo-pgo repository][cargo-pgo]. - -[cargo-pgo]: https://github.com/Kobzol/cargo-pgo +it in their repository accessible from this link: https://github.com/Kobzol/cargo-pgo For the sake of completeness, here are the corresponding steps using `cargo-pgo`: diff --git a/src/librustdoc/Cargo.toml b/src/librustdoc/Cargo.toml index 033d3ecdd03de..43006435fcdee 100644 --- a/src/librustdoc/Cargo.toml +++ b/src/librustdoc/Cargo.toml @@ -10,7 +10,7 @@ path = "lib.rs" [dependencies] # tidy-alphabetical-start arrayvec = { version = "0.7", default-features = false } -askama = { version = "0.15.4", default-features = false, features = ["alloc", "config", "derive"] } +askama = { version = "0.15.2", default-features = false, features = ["alloc", "config", "derive"] } base64 = "0.21.7" indexmap = { version = "2", features = ["serde"] } itertools = "0.12" diff --git a/src/librustdoc/clean/mod.rs b/src/librustdoc/clean/mod.rs index 1c9154238657d..9d6038367419d 100644 --- a/src/librustdoc/clean/mod.rs +++ b/src/librustdoc/clean/mod.rs @@ -3178,7 +3178,7 @@ fn clean_assoc_item_constraint<'tcx>( } fn clean_bound_vars<'tcx>( - bound_vars: &ty::List>, + bound_vars: &ty::List, cx: &mut DocContext<'tcx>, ) -> Vec { bound_vars diff --git a/src/librustdoc/html/static/css/noscript.css b/src/librustdoc/html/static/css/noscript.css index 363cec3116a96..6f44854b6914e 100644 --- a/src/librustdoc/html/static/css/noscript.css +++ b/src/librustdoc/html/static/css/noscript.css @@ -163,7 +163,7 @@ nav.sub { --headings-border-bottom-color: #d2d2d2; --border-color: #e0e0e0; --button-background-color: #f0f0f0; - --right-side-color: #d0d0d0; + --right-side-color: grey; --code-attribute-color: #999; --toggles-color: #999; --toggle-filter: invert(100%); diff --git a/src/librustdoc/html/static/css/rustdoc.css b/src/librustdoc/html/static/css/rustdoc.css index 9e47f80a7fe24..6c34d31cc918c 100644 --- a/src/librustdoc/html/static/css/rustdoc.css +++ b/src/librustdoc/html/static/css/rustdoc.css @@ -359,8 +359,7 @@ summary.hideme, .rustdoc-breadcrumbs, .search-switcher, /* This selector is for the items listed in the "all items" page. */ -ul.all-items, -.deprecated-count { +ul.all-items { font-family: "Fira Sans", Arial, NanumBarunGothic, sans-serif; } @@ -2672,18 +2671,6 @@ However, it's not needed with smaller screen width because the doc/code block is display: none; } -.deprecated-count { - display: none; -} -/* -The `:not(:empty)` is a little trick to not have to add conditions in JS to hide/show the marker. -It's entirely based on whether it has content and if the setting is enabled. -*/ -.hide-deprecated-items .deprecated-count:not(:empty) { - display: block; - margin: 10px 0; -} - /* WARNING: RUSTDOC_MOBILE_BREAKPOINT MEDIA QUERY If you update this line, then you also need to update the line with the same warning @@ -3299,7 +3286,7 @@ by default. --headings-border-bottom-color: #d2d2d2; --border-color: #e0e0e0; --button-background-color: #f0f0f0; - --right-side-color: #d0d0d0; + --right-side-color: grey; --code-attribute-color: #999; --toggles-color: #999; --toggle-filter: invert(100%); diff --git a/src/librustdoc/html/static/js/search.js b/src/librustdoc/html/static/js/search.js index 55ff48846dcb3..9961c1447ec2a 100644 --- a/src/librustdoc/html/static/js/search.js +++ b/src/librustdoc/html/static/js/search.js @@ -158,7 +158,6 @@ const REGEX_INVALID_TYPE_FILTER = /[^a-z]/ui; const MAX_RESULTS = 200; const NO_TYPE_FILTER = -1; -const DEPRECATED_COUNT_SELECTOR = "deprecated-count"; /** * The [edit distance] is a metric for measuring the difference between two strings. @@ -4905,12 +4904,7 @@ async function addTab(results, query, display, finishedCallback, isTypeSearch) { let output = document.createElement("ul"); output.className = "search-results " + extraClass; - const deprecatedCountElem = document.createElement("span"); - deprecatedCountElem.className = DEPRECATED_COUNT_SELECTOR; - output.appendChild(deprecatedCountElem); - let count = 0; - let deprecatedCount = 0; /** @type {Promise[]} */ const descList = []; @@ -4928,10 +4922,6 @@ async function addTab(results, query, display, finishedCallback, isTypeSearch) { link.className = "result-" + type; if (obj.item.deprecated) { link.className += " deprecated"; - deprecatedCount += 1; - const plural = deprecatedCount > 1 ? "s" : ""; - deprecatedCountElem.innerText = - `${deprecatedCount} deprecated item${plural} hidden by setting`; } link.href = obj.href; @@ -5421,7 +5411,7 @@ function registerSearchEvents() { const active = document.activeElement; if (active) { const previous = active.previousElementSibling; - if (previous && previous.className !== DEPRECATED_COUNT_SELECTOR) { + if (previous) { // @ts-expect-error previous.focus(); } else { diff --git a/src/tools/clippy/clippy_lints/src/eta_reduction.rs b/src/tools/clippy/clippy_lints/src/eta_reduction.rs index 3e46c370fb704..21385ee4fdc7f 100644 --- a/src/tools/clippy/clippy_lints/src/eta_reduction.rs +++ b/src/tools/clippy/clippy_lints/src/eta_reduction.rs @@ -10,7 +10,7 @@ use rustc_hir::attrs::AttributeKind; use rustc_hir::{BindingMode, Expr, ExprKind, FnRetTy, GenericArgs, Param, PatKind, QPath, Safety, TyKind, find_attr}; use rustc_infer::infer::TyCtxtInferExt; use rustc_lint::{LateContext, LateLintPass}; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_middle::ty::{ self, Binder, ClosureKind, FnSig, GenericArg, GenericArgKind, List, Region, Ty, TypeVisitableExt, TypeckResults, }; @@ -236,7 +236,7 @@ fn check_closure<'tcx>(cx: &LateContext<'tcx>, outer_receiver: Option<&Expr<'tcx .iter() .rev() .fold(0, |acc, adjustment| match adjustment.kind { - Adjust::Deref(DerefAdjustKind::Overloaded(_)) => acc + 1, + Adjust::Deref(Some(_)) => acc + 1, Adjust::Deref(_) if acc > 0 => acc + 1, _ => acc, }) diff --git a/src/tools/clippy/clippy_lints/src/format_args.rs b/src/tools/clippy/clippy_lints/src/format_args.rs index 5fb1a0b80f1a4..011cbf8c5d41c 100644 --- a/src/tools/clippy/clippy_lints/src/format_args.rs +++ b/src/tools/clippy/clippy_lints/src/format_args.rs @@ -24,7 +24,7 @@ use rustc_errors::SuggestionStyle::{CompletelyHidden, ShowCode}; use rustc_hir::attrs::AttributeKind; use rustc_hir::{Expr, ExprKind, LangItem, RustcVersion, find_attr}; use rustc_lint::{LateContext, LateLintPass, LintContext}; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment}; use rustc_middle::ty::{self, GenericArg, List, TraitRef, Ty, TyCtxt, Upcast}; use rustc_session::impl_lint_pass; use rustc_span::edition::Edition::Edition2021; @@ -704,12 +704,12 @@ where let mut n_needed = 0; loop { if let Some(Adjustment { - kind: Adjust::Deref(deref), + kind: Adjust::Deref(overloaded_deref), target, }) = iter.next() { n_total += 1; - if let DerefAdjustKind::Overloaded(..) = deref { + if overloaded_deref.is_some() { n_needed = n_total; } ty = *target; diff --git a/src/tools/clippy/clippy_lints/src/loops/while_let_on_iterator.rs b/src/tools/clippy/clippy_lints/src/loops/while_let_on_iterator.rs index fc0789894cc2c..6c95c7b54c500 100644 --- a/src/tools/clippy/clippy_lints/src/loops/while_let_on_iterator.rs +++ b/src/tools/clippy/clippy_lints/src/loops/while_let_on_iterator.rs @@ -12,7 +12,7 @@ use rustc_hir::intravisit::{Visitor, walk_expr}; use rustc_hir::{Closure, Expr, ExprKind, HirId, LetStmt, Mutability, UnOp}; use rustc_lint::LateContext; use rustc_middle::hir::nested_filter::OnlyBodies; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_span::Symbol; use rustc_span::symbol::sym; @@ -88,7 +88,7 @@ fn try_parse_iter_expr(cx: &LateContext<'_>, mut e: &Expr<'_>) -> Option, e: &hir::Expr<'_>, recv: &hir::Expr<'_ && cx.tcx.lang_items().clone_trait() == Some(trait_id) // no autoderefs && !cx.typeck_results().expr_adjustments(obj).iter() - .any(|a| matches!(a.kind, Adjust::Deref(DerefAdjustKind::Overloaded(..)))) + .any(|a| matches!(a.kind, Adjust::Deref(Some(..)))) { let obj_ty = cx.typeck_results().expr_ty(obj); if let ty::Ref(_, ty, mutability) = obj_ty.kind() { diff --git a/src/tools/clippy/clippy_lints/src/methods/option_as_ref_deref.rs b/src/tools/clippy/clippy_lints/src/methods/option_as_ref_deref.rs index 1239d8927acfe..3d489075ce8ac 100644 --- a/src/tools/clippy/clippy_lints/src/methods/option_as_ref_deref.rs +++ b/src/tools/clippy/clippy_lints/src/methods/option_as_ref_deref.rs @@ -58,7 +58,7 @@ pub(super) fn check( .iter() .map(|x| &x.kind) .collect::>() - && let [ty::adjustment::Adjust::Deref(ty::adjustment::DerefAdjustKind::Builtin), ty::adjustment::Adjust::Borrow(_)] = *adj + && let [ty::adjustment::Adjust::Deref(None), ty::adjustment::Adjust::Borrow(_)] = *adj && let method_did = cx.typeck_results().type_dependent_def_id(closure_expr.hir_id).unwrap() && let Some(method_name) = cx.tcx.get_diagnostic_name(method_did) { diff --git a/src/tools/clippy/clippy_lints/src/methods/swap_with_temporary.rs b/src/tools/clippy/clippy_lints/src/methods/swap_with_temporary.rs index 0b8f6ae9f2779..e378cbd6ae0ad 100644 --- a/src/tools/clippy/clippy_lints/src/methods/swap_with_temporary.rs +++ b/src/tools/clippy/clippy_lints/src/methods/swap_with_temporary.rs @@ -4,7 +4,7 @@ use rustc_ast::BorrowKind; use rustc_errors::{Applicability, Diag}; use rustc_hir::{Expr, ExprKind, Node, QPath}; use rustc_lint::LateContext; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_span::sym; use super::SWAP_WITH_TEMPORARY; @@ -47,7 +47,7 @@ impl<'tcx> ArgKind<'tcx> { && let adjustments = cx.typeck_results().expr_adjustments(arg) && adjustments .first() - .is_some_and(|adj| matches!(adj.kind, Adjust::Deref(DerefAdjustKind::Builtin))) + .is_some_and(|adj| matches!(adj.kind, Adjust::Deref(None))) && adjustments .last() .is_some_and(|adj| matches!(adj.kind, Adjust::Borrow(_))) diff --git a/src/tools/clippy/clippy_lints/src/methods/type_id_on_box.rs b/src/tools/clippy/clippy_lints/src/methods/type_id_on_box.rs index 98f319be7a457..e67ba5c4d3148 100644 --- a/src/tools/clippy/clippy_lints/src/methods/type_id_on_box.rs +++ b/src/tools/clippy/clippy_lints/src/methods/type_id_on_box.rs @@ -4,7 +4,7 @@ use clippy_utils::source::snippet; use rustc_errors::Applicability; use rustc_hir::Expr; use rustc_lint::LateContext; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment}; use rustc_middle::ty::print::with_forced_trimmed_paths; use rustc_middle::ty::{self, ExistentialPredicate, Ty}; use rustc_span::{Span, sym}; @@ -58,7 +58,7 @@ pub(super) fn check(cx: &LateContext<'_>, receiver: &Expr<'_>, call_span: Span) |diag| { let derefs = recv_adjusts .iter() - .filter(|adj| matches!(adj.kind, Adjust::Deref(DerefAdjustKind::Builtin))) + .filter(|adj| matches!(adj.kind, Adjust::Deref(None))) .count(); diag.note( diff --git a/src/tools/clippy/clippy_lints/src/methods/unnecessary_to_owned.rs b/src/tools/clippy/clippy_lints/src/methods/unnecessary_to_owned.rs index 607aaef9627bd..74e8dbc15a6ce 100644 --- a/src/tools/clippy/clippy_lints/src/methods/unnecessary_to_owned.rs +++ b/src/tools/clippy/clippy_lints/src/methods/unnecessary_to_owned.rs @@ -14,7 +14,7 @@ use rustc_hir::{BorrowKind, Expr, ExprKind, ItemKind, LangItem, Node}; use rustc_infer::infer::TyCtxtInferExt; use rustc_lint::LateContext; use rustc_middle::mir::Mutability; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind, OverloadedDeref}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, OverloadedDeref}; use rustc_middle::ty::{ self, ClauseKind, GenericArg, GenericArgKind, GenericArgsRef, ParamTy, ProjectionPredicate, TraitPredicate, Ty, }; @@ -78,7 +78,7 @@ fn check_addr_of_expr( // For matching uses of `Cow::from` [ Adjustment { - kind: Adjust::Deref(DerefAdjustKind::Builtin), + kind: Adjust::Deref(None), target: referent_ty, }, Adjustment { @@ -89,7 +89,7 @@ fn check_addr_of_expr( // For matching uses of arrays | [ Adjustment { - kind: Adjust::Deref(DerefAdjustKind::Builtin), + kind: Adjust::Deref(None), target: referent_ty, }, Adjustment { @@ -104,11 +104,11 @@ fn check_addr_of_expr( // For matching everything else | [ Adjustment { - kind: Adjust::Deref(DerefAdjustKind::Builtin), + kind: Adjust::Deref(None), target: referent_ty, }, Adjustment { - kind: Adjust::Deref(DerefAdjustKind::Overloaded(OverloadedDeref { .. })), + kind: Adjust::Deref(Some(OverloadedDeref { .. })), .. }, Adjustment { diff --git a/src/tools/clippy/clippy_lints/src/methods/useless_asref.rs b/src/tools/clippy/clippy_lints/src/methods/useless_asref.rs index 3737249a40cb0..f852080d0f2a0 100644 --- a/src/tools/clippy/clippy_lints/src/methods/useless_asref.rs +++ b/src/tools/clippy/clippy_lints/src/methods/useless_asref.rs @@ -7,7 +7,7 @@ use rustc_errors::Applicability; use rustc_hir::def::{DefKind, Res}; use rustc_hir::{self as hir, LangItem, Node}; use rustc_lint::LateContext; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_middle::ty::{Ty, TyCtxt, TypeSuperVisitable, TypeVisitable, TypeVisitor}; use rustc_span::{Span, Symbol, sym}; @@ -161,7 +161,7 @@ fn is_calling_clone(cx: &LateContext<'_>, arg: &hir::Expr<'_>) -> bool { && cx.tcx.lang_items().clone_trait().is_some_and(|id| id == trait_id) // no autoderefs && !cx.typeck_results().expr_adjustments(obj).iter() - .any(|a| matches!(a.kind, Adjust::Deref(DerefAdjustKind::Overloaded(..)))) + .any(|a| matches!(a.kind, Adjust::Deref(Some(..)))) && obj.res_local_id() == Some(local_id) { true diff --git a/src/tools/clippy/clippy_lints/src/non_copy_const.rs b/src/tools/clippy/clippy_lints/src/non_copy_const.rs index f99748127a8f6..9b0008a29c6b4 100644 --- a/src/tools/clippy/clippy_lints/src/non_copy_const.rs +++ b/src/tools/clippy/clippy_lints/src/non_copy_const.rs @@ -33,7 +33,7 @@ use rustc_hir::{ }; use rustc_lint::{LateContext, LateLintPass, LintContext}; use rustc_middle::mir::{ConstValue, UnevaluatedConst}; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment}; use rustc_middle::ty::{ self, AliasTyKind, EarlyBinder, GenericArgs, GenericArgsRef, Instance, Ty, TyCtxt, TypeFolder, TypeSuperFoldable, TypeckResults, TypingEnv, @@ -907,7 +907,7 @@ fn does_adjust_borrow(adjust: &Adjustment<'_>) -> Option { match adjust.kind { Adjust::Borrow(_) => Some(BorrowCause::AutoBorrow), // Custom deref calls `::deref(&x)` resulting in a borrow. - Adjust::Deref(DerefAdjustKind::Overloaded(_)) => Some(BorrowCause::AutoDeref), + Adjust::Deref(Some(_)) => Some(BorrowCause::AutoDeref), // All other adjustments read the value. _ => None, } diff --git a/src/tools/clippy/clippy_utils/src/eager_or_lazy.rs b/src/tools/clippy/clippy_utils/src/eager_or_lazy.rs index d184744162e4e..2bdd5739a5579 100644 --- a/src/tools/clippy/clippy_utils/src/eager_or_lazy.rs +++ b/src/tools/clippy/clippy_utils/src/eager_or_lazy.rs @@ -19,7 +19,7 @@ use rustc_hir::intravisit::{Visitor, walk_expr}; use rustc_hir::{BinOpKind, Block, Expr, ExprKind, QPath, UnOp}; use rustc_lint::LateContext; use rustc_middle::ty; -use rustc_middle::ty::adjustment::{Adjust, DerefAdjustKind}; +use rustc_middle::ty::adjustment::Adjust; use rustc_span::Symbol; use std::{cmp, ops}; @@ -132,7 +132,7 @@ fn expr_eagerness<'tcx>(cx: &LateContext<'tcx>, e: &'tcx Expr<'_>) -> EagernessS .typeck_results() .expr_adjustments(e) .iter() - .any(|adj| matches!(adj.kind, Adjust::Deref(DerefAdjustKind::Overloaded(_)))) + .any(|adj| matches!(adj.kind, Adjust::Deref(Some(_)))) { self.eagerness |= NoChange; return; @@ -211,7 +211,12 @@ fn expr_eagerness<'tcx>(cx: &LateContext<'tcx>, e: &'tcx Expr<'_>) -> EagernessS // Custom `Deref` impl might have side effects ExprKind::Unary(UnOp::Deref, e) - if self.cx.typeck_results().expr_ty(e).builtin_deref(true).is_none() => + if self + .cx + .typeck_results() + .expr_ty(e) + .builtin_deref(true) + .is_none() => { self.eagerness |= NoChange; }, diff --git a/src/tools/clippy/clippy_utils/src/lib.rs b/src/tools/clippy/clippy_utils/src/lib.rs index 16bedf199e208..6b10f4b514423 100644 --- a/src/tools/clippy/clippy_utils/src/lib.rs +++ b/src/tools/clippy/clippy_utils/src/lib.rs @@ -108,7 +108,7 @@ use rustc_middle::hir::nested_filter; use rustc_middle::hir::place::PlaceBase; use rustc_middle::lint::LevelAndSource; use rustc_middle::mir::{AggregateKind, Operand, RETURN_PLACE, Rvalue, StatementKind, TerminatorKind}; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, DerefAdjustKind, PointerCoercion}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, PointerCoercion}; use rustc_middle::ty::layout::IntegerExt; use rustc_middle::ty::{ self as rustc_ty, Binder, BorrowKind, ClosureKind, EarlyBinder, GenericArgKind, GenericArgsRef, IntTy, Ty, TyCtxt, @@ -477,8 +477,8 @@ pub fn expr_custom_deref_adjustment(cx: &LateContext<'_>, e: &Expr<'_>) -> Optio .expr_adjustments(e) .iter() .find_map(|a| match a.kind { - Adjust::Deref(DerefAdjustKind::Overloaded(d)) => Some(Some(d.mutbl)), - Adjust::Deref(DerefAdjustKind::Builtin) => None, + Adjust::Deref(Some(d)) => Some(Some(d.mutbl)), + Adjust::Deref(None) => None, _ => Some(None), }) .and_then(|x| x) @@ -3537,9 +3537,7 @@ pub fn expr_adjustment_requires_coercion(cx: &LateContext<'_>, expr: &Expr<'_>) cx.typeck_results().expr_adjustments(expr).iter().any(|adj| { matches!( adj.kind, - Adjust::Deref(DerefAdjustKind::Overloaded(_)) - | Adjust::Pointer(PointerCoercion::Unsize) - | Adjust::NeverToAny + Adjust::Deref(Some(_)) | Adjust::Pointer(PointerCoercion::Unsize) | Adjust::NeverToAny ) }) } diff --git a/src/tools/clippy/clippy_utils/src/ty/mod.rs b/src/tools/clippy/clippy_utils/src/ty/mod.rs index 46456528fdf87..2926a329ce16c 100644 --- a/src/tools/clippy/clippy_utils/src/ty/mod.rs +++ b/src/tools/clippy/clippy_utils/src/ty/mod.rs @@ -17,7 +17,7 @@ use rustc_lint::LateContext; use rustc_middle::mir::ConstValue; use rustc_middle::mir::interpret::Scalar; use rustc_middle::traits::EvaluationResult; -use rustc_middle::ty::adjustment::{Adjust, Adjustment, DerefAdjustKind}; +use rustc_middle::ty::adjustment::{Adjust, Adjustment}; use rustc_middle::ty::layout::ValidityRequirement; use rustc_middle::ty::{ self, AdtDef, AliasTy, AssocItem, AssocTag, Binder, BoundRegion, BoundVarIndexKind, FnSig, GenericArg, @@ -782,15 +782,15 @@ pub fn is_c_void(cx: &LateContext<'_>, ty: Ty<'_>) -> bool { } } -pub fn for_each_top_level_late_bound_region<'cx, B>( - ty: Ty<'cx>, - f: impl FnMut(BoundRegion<'cx>) -> ControlFlow, +pub fn for_each_top_level_late_bound_region( + ty: Ty<'_>, + f: impl FnMut(BoundRegion) -> ControlFlow, ) -> ControlFlow { struct V { index: u32, f: F, } - impl<'tcx, B, F: FnMut(BoundRegion<'tcx>) -> ControlFlow> TypeVisitor> for V { + impl<'tcx, B, F: FnMut(BoundRegion) -> ControlFlow> TypeVisitor> for V { type Result = ControlFlow; fn visit_region(&mut self, r: Region<'tcx>) -> Self::Result { if let RegionKind::ReBound(BoundVarIndexKind::Bound(idx), bound) = r.kind() @@ -1345,7 +1345,6 @@ pub fn get_field_idx_by_name(ty: Ty<'_>, name: Symbol) -> Option { pub fn adjust_derefs_manually_drop<'tcx>(adjustments: &'tcx [Adjustment<'tcx>], mut ty: Ty<'tcx>) -> bool { adjustments.iter().any(|a| { let ty = mem::replace(&mut ty, a.target); - matches!(a.kind, Adjust::Deref(DerefAdjustKind::Overloaded(op)) if op.mutbl == Mutability::Mut) - && is_manually_drop(ty) + matches!(a.kind, Adjust::Deref(Some(op)) if op.mutbl == Mutability::Mut) && is_manually_drop(ty) }) } diff --git a/src/tools/generate-copyright/Cargo.toml b/src/tools/generate-copyright/Cargo.toml index 17b5c727964fe..e1a5ca31a1db6 100644 --- a/src/tools/generate-copyright/Cargo.toml +++ b/src/tools/generate-copyright/Cargo.toml @@ -8,7 +8,7 @@ description = "Produces a manifest of all the copyrighted materials in the Rust [dependencies] anyhow = "1.0.65" -askama = "0.15.4" +askama = "0.15.2" cargo_metadata = "0.21" serde = { version = "1.0.147", features = ["derive"] } serde_json = "1.0.85" diff --git a/src/tools/miri/tests/pass/intrinsics/portable-simd.rs b/src/tools/miri/tests/pass/intrinsics/portable-simd.rs index 6c5e06518f569..56c000633e586 100644 --- a/src/tools/miri/tests/pass/intrinsics/portable-simd.rs +++ b/src/tools/miri/tests/pass/intrinsics/portable-simd.rs @@ -471,7 +471,7 @@ fn simd_ops_i32() { fn simd_mask() { use std::intrinsics::simd::*; - let intmask = Mask::from_simd(i32x4::from_array([0, -1, 0, 0])); + let intmask = Mask::from_int(i32x4::from_array([0, -1, 0, 0])); assert_eq!(intmask, Mask::from_array([false, true, false, false])); assert_eq!(intmask.to_array(), [false, true, false, false]); @@ -486,8 +486,8 @@ fn simd_mask() { // Also directly call intrinsic, to test both kinds of return types. unsafe { - let bitmask1: u16 = simd_bitmask(mask.to_simd()); - let bitmask2: [u8; 2] = simd_bitmask(mask.to_simd()); + let bitmask1: u16 = simd_bitmask(mask.to_int()); + let bitmask2: [u8; 2] = simd_bitmask(mask.to_int()); if cfg!(target_endian = "little") { assert_eq!(bitmask1, 0b1010001101001001); assert_eq!(bitmask2, [0b01001001, 0b10100011]); @@ -506,8 +506,8 @@ fn simd_mask() { assert_eq!(bitmask, 0b1000); assert_eq!(Mask::::from_bitmask(bitmask), mask); unsafe { - let bitmask1: u8 = simd_bitmask(mask.to_simd()); - let bitmask2: [u8; 1] = simd_bitmask(mask.to_simd()); + let bitmask1: u8 = simd_bitmask(mask.to_int()); + let bitmask2: [u8; 1] = simd_bitmask(mask.to_int()); if cfg!(target_endian = "little") { assert_eq!(bitmask1, 0b1000); assert_eq!(bitmask2, [0b1000]); diff --git a/src/tools/tidy/Cargo.toml b/src/tools/tidy/Cargo.toml index d5433080efc08..cbf27ea87a076 100644 --- a/src/tools/tidy/Cargo.toml +++ b/src/tools/tidy/Cargo.toml @@ -20,7 +20,6 @@ fluent-syntax = "0.12" similar = "2.5.0" toml = "0.7.8" tempfile = "3.15.0" -clap = "4.5.54" [features] build-metrics = ["dep:serde"] diff --git a/src/tools/tidy/src/alphabetical/tests.rs b/src/tools/tidy/src/alphabetical/tests.rs index 5fa0dd751b647..4a1d263f1a4f3 100644 --- a/src/tools/tidy/src/alphabetical/tests.rs +++ b/src/tools/tidy/src/alphabetical/tests.rs @@ -37,7 +37,7 @@ fn bless_test(before: &str, after: &str) { let temp_path = tempfile::Builder::new().tempfile().unwrap().into_temp_path(); std::fs::write(&temp_path, before).unwrap(); - let tidy_ctx = TidyCtx::new(Path::new("/"), false, TidyFlags::new(true)); + let tidy_ctx = TidyCtx::new(Path::new("/"), false, TidyFlags::new(&["--bless".to_owned()])); let mut check = tidy_ctx.start_check("alphabetical-test"); check_lines(&temp_path, before, &tidy_ctx, &mut check); diff --git a/src/tools/tidy/src/diagnostics.rs b/src/tools/tidy/src/diagnostics.rs index 4e6c316f5e18e..6f53f2fff1a48 100644 --- a/src/tools/tidy/src/diagnostics.rs +++ b/src/tools/tidy/src/diagnostics.rs @@ -14,8 +14,16 @@ pub struct TidyFlags { } impl TidyFlags { - pub fn new(bless: bool) -> Self { - Self { bless } + pub fn new(cfg_args: &[String]) -> Self { + let mut flags = Self::default(); + + for arg in cfg_args { + match arg.as_str() { + "--bless" => flags.bless = true, + _ => continue, + } + } + flags } } diff --git a/src/tools/tidy/src/extra_checks/mod.rs b/src/tools/tidy/src/extra_checks/mod.rs index 6272e00591d78..1c81a485608ae 100644 --- a/src/tools/tidy/src/extra_checks/mod.rs +++ b/src/tools/tidy/src/extra_checks/mod.rs @@ -58,8 +58,8 @@ pub fn check( tools_path: &Path, npm: &Path, cargo: &Path, - extra_checks: Option>, - pos_args: Vec, + extra_checks: Option<&str>, + pos_args: &[String], tidy_ctx: TidyCtx, ) { let mut check = tidy_ctx.start_check("extra_checks"); @@ -88,8 +88,8 @@ fn check_impl( tools_path: &Path, npm: &Path, cargo: &Path, - extra_checks: Option>, - pos_args: Vec, + extra_checks: Option<&str>, + pos_args: &[String], tidy_ctx: &TidyCtx, ) -> Result<(), Error> { let show_diff = @@ -99,7 +99,9 @@ fn check_impl( // Split comma-separated args up let mut lint_args = match extra_checks { Some(s) => s - .iter() + .strip_prefix("--extra-checks=") + .unwrap() + .split(',') .map(|s| { if s == "spellcheck:fix" { eprintln!("warning: `spellcheck:fix` is no longer valid, use `--extra-checks=spellcheck --bless`"); diff --git a/src/tools/tidy/src/lib.rs b/src/tools/tidy/src/lib.rs index 19a9fa80d9f04..425f43e42b7f8 100644 --- a/src/tools/tidy/src/lib.rs +++ b/src/tools/tidy/src/lib.rs @@ -157,7 +157,6 @@ pub fn files_modified(ci_info: &CiInfo, pred: impl Fn(&str) -> bool) -> bool { } pub mod alphabetical; -pub mod arg_parser; pub mod bins; pub mod debug_artifacts; pub mod deps; diff --git a/src/tools/tidy/src/main.rs b/src/tools/tidy/src/main.rs index 2485dc802ed53..94c24f11ed12f 100644 --- a/src/tools/tidy/src/main.rs +++ b/src/tools/tidy/src/main.rs @@ -5,10 +5,12 @@ //! builders. The tidy checks can be executed with `./x.py test tidy`. use std::collections::VecDeque; +use std::num::NonZeroUsize; +use std::path::PathBuf; +use std::str::FromStr; use std::thread::{self, ScopedJoinHandle, scope}; use std::{env, process}; -use tidy::arg_parser::TidyArgParser; use tidy::diagnostics::{COLOR_ERROR, COLOR_SUCCESS, TidyCtx, TidyFlags, output_message}; use tidy::*; @@ -20,16 +22,16 @@ fn main() { env::set_var("RUSTC_BOOTSTRAP", "1"); } - let parsed_args = TidyArgParser::parse(); - - let root_path = parsed_args.root_path; - let cargo = parsed_args.cargo; - let output_directory = parsed_args.output_directory; - let concurrency = parsed_args.concurrency.get(); - let npm = parsed_args.npm; + let root_path: PathBuf = env::args_os().nth(1).expect("need path to root of repo").into(); + let cargo: PathBuf = env::args_os().nth(2).expect("need path to cargo").into(); + let output_directory: PathBuf = + env::args_os().nth(3).expect("need path to output directory").into(); + let concurrency: NonZeroUsize = + FromStr::from_str(&env::args().nth(4).expect("need concurrency")) + .expect("concurrency must be a number"); + let npm: PathBuf = env::args_os().nth(5).expect("need name/path of npm command").into(); let root_manifest = root_path.join("Cargo.toml"); - let typos_toml = root_path.join("typos.toml"); let src_path = root_path.join("src"); let tests_path = root_path.join("tests"); let library_path = root_path.join("library"); @@ -38,12 +40,17 @@ fn main() { let tools_path = src_path.join("tools"); let crashes_path = tests_path.join("crashes"); - let verbose = parsed_args.verbose; - let bless = parsed_args.bless; - let extra_checks = parsed_args.extra_checks; - let pos_args = parsed_args.pos_args; + let args: Vec = env::args().skip(1).collect(); + let (cfg_args, pos_args) = match args.iter().position(|arg| arg == "--") { + Some(pos) => (&args[..pos], &args[pos + 1..]), + None => (&args[..], [].as_slice()), + }; + let verbose = cfg_args.iter().any(|s| *s == "--verbose"); + let extra_checks = + cfg_args.iter().find(|s| s.starts_with("--extra-checks=")).map(String::as_str); - let tidy_ctx = TidyCtx::new(&root_path, verbose, TidyFlags::new(bless)); + let tidy_flags = TidyFlags::new(cfg_args); + let tidy_ctx = TidyCtx::new(&root_path, verbose, tidy_flags); let ci_info = CiInfo::new(tidy_ctx.clone()); let drain_handles = |handles: &mut VecDeque>| { @@ -54,13 +61,14 @@ fn main() { } } - while handles.len() >= concurrency { + while handles.len() >= concurrency.get() { handles.pop_front().unwrap().join().unwrap(); } }; scope(|s| { - let mut handles: VecDeque> = VecDeque::with_capacity(concurrency); + let mut handles: VecDeque> = + VecDeque::with_capacity(concurrency.get()); macro_rules! check { ($p:ident) => { @@ -135,7 +143,6 @@ fn main() { check!(edition, &library_path); check!(alphabetical, &root_manifest); - check!(alphabetical, &typos_toml); check!(alphabetical, &src_path); check!(alphabetical, &tests_path); check!(alphabetical, &compiler_path); diff --git a/src/tools/tidy/src/ui_tests.rs b/src/tools/tidy/src/ui_tests.rs index b5643034d45c5..bf51810810a6c 100644 --- a/src/tools/tidy/src/ui_tests.rs +++ b/src/tools/tidy/src/ui_tests.rs @@ -73,57 +73,6 @@ pub fn check(root_path: &Path, tidy_ctx: TidyCtx) { )); } } - - // The list of subdirectories in ui tests. - // Compare previous subdirectory with current subdirectory - // to sync with `tests/ui/README.md`. - // See - let mut prev_line = String::new(); - let mut is_sorted = true; - let documented_subdirs: BTreeSet<_> = include_str!("../../../../tests/ui/README.md") - .lines() - .filter_map(|line| { - static_regex!(r"^##.*?`(?

[^`]+)`").captures(line).map(|cap| { - let dir = &cap["dir"]; - // FIXME(reddevilmidzy) normalize subdirs title in tests/ui/README.md - if dir.ends_with('/') { - dir.strip_suffix('/').unwrap().to_string() - } else { - dir.to_string() - } - }) - }) - .inspect(|line| { - if prev_line.as_str() > line.as_str() { - is_sorted = false; - } - - prev_line = line.clone(); - }) - .collect(); - let filesystem_subdirs = collect_ui_tests_subdirs(&path); - let is_modified = !filesystem_subdirs.eq(&documented_subdirs); - - if !is_sorted { - check.error("`tests/ui/README.md` is not in order"); - } - if is_modified { - for directory in documented_subdirs.symmetric_difference(&filesystem_subdirs) { - if documented_subdirs.contains(directory) { - check.error(format!( - "ui subdirectory `{directory}` is listed in `tests/ui/README.md` but does not exist in the filesystem" - )); - } else { - check.error(format!( - "ui subdirectory `{directory}` exists in the filesystem but is not documented in `tests/ui/README.md`" - )); - } - } - check.error( - "`tests/ui/README.md` subdirectory listing is out of sync with the filesystem. \ - Please add or remove subdirectory entries (## headers with backtick-wrapped names) to match the actual directories in `tests/ui/`" - ); - } } fn deny_new_top_level_ui_tests(check: &mut RunningCheck, tests_path: &Path) { @@ -188,24 +137,6 @@ fn recursively_check_ui_tests<'issues>( remaining_issue_names } -fn collect_ui_tests_subdirs(path: &Path) -> BTreeSet { - let ui = path.join("ui"); - let entries = std::fs::read_dir(ui.as_path()).unwrap(); - - entries - .filter_map(|entry| entry.ok()) - .map(|entry| entry.path()) - .filter(|path| path.is_dir()) - .map(|dir_path| { - let dir_path = dir_path.strip_prefix(path).unwrap(); - format!( - "tests/{}", - dir_path.to_string_lossy().replace(std::path::MAIN_SEPARATOR_STR, "/") - ) - }) - .collect() -} - fn check_unexpected_extension(check: &mut RunningCheck, file_path: &Path, ext: &str) { const EXPECTED_TEST_FILE_EXTENSIONS: &[&str] = &[ "rs", // test source files diff --git a/src/tools/update-lockfile.sh b/src/tools/update-lockfile.sh index 123481b6b681c..a968d83d81523 100755 --- a/src/tools/update-lockfile.sh +++ b/src/tools/update-lockfile.sh @@ -1,4 +1,4 @@ -#!/bin/bash +#!/bin/sh # Updates the workspaces in `.`, `library` and `src/tools/rustbook` # Logs are written to `cargo_update.log` @@ -6,13 +6,13 @@ set -euo pipefail -printf "\ncompiler & tools dependencies:" > cargo_update.log +echo -e "\ncompiler & tools dependencies:" > cargo_update.log # Remove first line that always just says "Updating crates.io index" cargo update 2>&1 | sed '/crates.io index/d' | \ tee -a cargo_update.log -printf "\nlibrary dependencies:" >> cargo_update.log +echo -e "\nlibrary dependencies:" >> cargo_update.log cargo update --manifest-path library/Cargo.toml 2>&1 | sed '/crates.io index/d' | \ tee -a cargo_update.log -printf "\nrustbook dependencies:" >> cargo_update.log +echo -e "\nrustbook dependencies:" >> cargo_update.log cargo update --manifest-path src/tools/rustbook/Cargo.toml 2>&1 | sed '/crates.io index/d' | \ tee -a cargo_update.log diff --git a/tests/codegen-llvm/lib-optimizations/append-elements.rs b/tests/codegen-llvm/lib-optimizations/append-elements.rs index 5d7d746dbb6c1..b8657104d6653 100644 --- a/tests/codegen-llvm/lib-optimizations/append-elements.rs +++ b/tests/codegen-llvm/lib-optimizations/append-elements.rs @@ -1,7 +1,6 @@ //@ compile-flags: -O -Zmerge-functions=disabled //@ needs-deterministic-layouts //@ min-llvm-version: 21 -//@ ignore-std-debug-assertions (causes different value naming) #![crate_type = "lib"] //! Check that a temporary intermediate allocations can eliminated and replaced diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-abort.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-abort.diff index 5a3342a45cd3d..7a60070b7074c 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-abort.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-abort.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,8 +45,11 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); - _6 = const {0x1 as *const [bool; 0]}; + _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); + _7 = const {0x1 as *const [bool; 0]}; _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; StorageDead(_5); diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-unwind.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-unwind.diff index 2d1b05e6e9875..d13d0d962a69e 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-unwind.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.32bit.panic-unwind.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,8 +45,11 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); - _6 = const {0x1 as *const [bool; 0]}; + _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); + _7 = const {0x1 as *const [bool; 0]}; _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; StorageDead(_5); diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-abort.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-abort.diff index 695a06e29d3d7..8701e879e9593 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-abort.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-abort.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,8 +45,11 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); - _6 = const {0x1 as *const [bool; 0]}; + _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); + _7 = const {0x1 as *const [bool; 0]}; _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; StorageDead(_5); diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-unwind.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-unwind.diff index 17714feb1432e..ac1c8d627baab 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-unwind.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.DataflowConstProp.64bit.panic-unwind.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,8 +45,11 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); - _6 = const {0x1 as *const [bool; 0]}; + _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); + _7 = const {0x1 as *const [bool; 0]}; _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; StorageDead(_5); diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-abort.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-abort.diff index 7d66d31291155..0205d0cc3d167 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-abort.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-abort.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,10 +45,14 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); -- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as *const [bool; 0] (Transmute); -- _5 = NonNull::<[bool; 0]> { pointer: copy _6 }; -+ _6 = const {0x1 as *const [bool; 0]}; +- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as std::num::NonZero (Transmute); ++ _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); +- _7 = copy _6 as *const [bool; 0] (Transmute); +- _5 = NonNull::<[bool; 0]> { pointer: copy _7 }; ++ _7 = const {0x1 as *const [bool; 0]}; + _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); - _4 = std::ptr::Unique::<[bool; 0]> { pointer: move _5, _marker: const PhantomData::<[bool; 0]> }; + _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-unwind.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-unwind.diff index cc00bd300a3c1..f6babe35b5a0b 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-unwind.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.32bit.panic-unwind.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,10 +45,14 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); -- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as *const [bool; 0] (Transmute); -- _5 = NonNull::<[bool; 0]> { pointer: copy _6 }; -+ _6 = const {0x1 as *const [bool; 0]}; +- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as std::num::NonZero (Transmute); ++ _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); +- _7 = copy _6 as *const [bool; 0] (Transmute); +- _5 = NonNull::<[bool; 0]> { pointer: copy _7 }; ++ _7 = const {0x1 as *const [bool; 0]}; + _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); - _4 = std::ptr::Unique::<[bool; 0]> { pointer: move _5, _marker: const PhantomData::<[bool; 0]> }; + _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-abort.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-abort.diff index 9380cdd6ccb4c..204e59415c6bd 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-abort.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-abort.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,10 +45,14 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); -- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as *const [bool; 0] (Transmute); -- _5 = NonNull::<[bool; 0]> { pointer: copy _6 }; -+ _6 = const {0x1 as *const [bool; 0]}; +- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as std::num::NonZero (Transmute); ++ _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); +- _7 = copy _6 as *const [bool; 0] (Transmute); +- _5 = NonNull::<[bool; 0]> { pointer: copy _7 }; ++ _7 = const {0x1 as *const [bool; 0]}; + _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); - _4 = std::ptr::Unique::<[bool; 0]> { pointer: move _5, _marker: const PhantomData::<[bool; 0]> }; + _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; diff --git a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-unwind.diff b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-unwind.diff index bea5643762747..0cf3f43c04646 100644 --- a/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-unwind.diff +++ b/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-unwind.diff @@ -16,11 +16,12 @@ scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) { let mut _5: std::ptr::NonNull<[bool; 0]>; scope 5 (inlined NonNull::<[bool; 0]>::dangling) { + let mut _6: std::num::NonZero; scope 6 { scope 8 (inlined std::ptr::Alignment::as_nonzero) { } scope 9 (inlined NonNull::<[bool; 0]>::without_provenance) { - let _6: *const [bool; 0]; + let _7: *const [bool; 0]; scope 10 { } scope 11 (inlined NonZero::::get) { @@ -44,10 +45,14 @@ StorageLive(_4); StorageLive(_5); StorageLive(_6); -- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as *const [bool; 0] (Transmute); -- _5 = NonNull::<[bool; 0]> { pointer: copy _6 }; -+ _6 = const {0x1 as *const [bool; 0]}; +- _6 = const std::ptr::Alignment::of::<[bool; 0]>::{constant#0} as std::num::NonZero (Transmute); ++ _6 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + StorageLive(_7); +- _7 = copy _6 as *const [bool; 0] (Transmute); +- _5 = NonNull::<[bool; 0]> { pointer: copy _7 }; ++ _7 = const {0x1 as *const [bool; 0]}; + _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}; + StorageDead(_7); StorageDead(_6); - _4 = std::ptr::Unique::<[bool; 0]> { pointer: move _5, _marker: const PhantomData::<[bool; 0]> }; + _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} }}, _marker: PhantomData::<[bool; 0]> }}; diff --git a/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.32bit.panic-abort.diff b/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.32bit.panic-abort.diff index cde4d281f6877..2e428b778504f 100644 --- a/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.32bit.panic-abort.diff +++ b/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.32bit.panic-abort.diff @@ -111,7 +111,7 @@ bb3: { - _22 = handle_alloc_error(move _18) -> unwind unreachable; -+ _22 = handle_alloc_error(const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}) -> unwind unreachable; ++ _22 = handle_alloc_error(const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}) -> unwind unreachable; } bb4: { @@ -190,12 +190,12 @@ StorageLive(_24); - _24 = copy _17 as std::ptr::Alignment (Transmute); - _18 = Layout { size: copy _16, align: move _24 }; -+ _24 = const std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }}; -+ _18 = const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}; ++ _24 = const std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0); ++ _18 = const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}; StorageDead(_24); StorageLive(_19); - _19 = std::alloc::Global::alloc_impl_runtime(copy _18, const false) -> [return: bb7, unwind unreachable]; -+ _19 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}, const false) -> [return: bb7, unwind unreachable]; ++ _19 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}, const false) -> [return: bb7, unwind unreachable]; } bb7: { diff --git a/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.64bit.panic-abort.diff b/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.64bit.panic-abort.diff index ea5622eb9a2f7..4531720ee5013 100644 --- a/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.64bit.panic-abort.diff +++ b/tests/mir-opt/dont_reset_cast_kind_without_updating_operand.test.GVN.64bit.panic-abort.diff @@ -111,7 +111,7 @@ bb3: { - _22 = handle_alloc_error(move _18) -> unwind unreachable; -+ _22 = handle_alloc_error(const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}) -> unwind unreachable; ++ _22 = handle_alloc_error(const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}) -> unwind unreachable; } bb4: { @@ -190,12 +190,12 @@ StorageLive(_24); - _24 = copy _17 as std::ptr::Alignment (Transmute); - _18 = Layout { size: copy _16, align: move _24 }; -+ _24 = const std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }}; -+ _18 = const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}; ++ _24 = const std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0); ++ _18 = const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}; StorageDead(_24); StorageLive(_19); - _19 = std::alloc::Global::alloc_impl_runtime(copy _18, const false) -> [return: bb7, unwind unreachable]; -+ _19 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: 0_usize, align: std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }} }}, const false) -> [return: bb7, unwind unreachable]; ++ _19 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: 0_usize, align: std::ptr::Alignment(std::ptr::alignment::AlignmentEnum::_Align1Shl0) }}, const false) -> [return: bb7, unwind unreachable]; } bb7: { diff --git a/tests/mir-opt/gvn.fn_pointers.GVN.panic-abort.diff b/tests/mir-opt/gvn.fn_pointers.GVN.panic-abort.diff index a29d3331f3800..90920dd0be8fd 100644 --- a/tests/mir-opt/gvn.fn_pointers.GVN.panic-abort.diff +++ b/tests/mir-opt/gvn.fn_pointers.GVN.panic-abort.diff @@ -8,10 +8,10 @@ let mut _3: fn(u8) -> u8; let _5: (); let mut _6: fn(u8) -> u8; - let mut _9: {closure@$DIR/gvn.rs:618:19: 618:21}; + let mut _9: {closure@$DIR/gvn.rs:617:19: 617:21}; let _10: (); let mut _11: fn(); - let mut _13: {closure@$DIR/gvn.rs:618:19: 618:21}; + let mut _13: {closure@$DIR/gvn.rs:617:19: 617:21}; let _14: (); let mut _15: fn(); scope 1 { @@ -19,7 +19,7 @@ let _4: fn(u8) -> u8; scope 2 { debug g => _4; - let _7: {closure@$DIR/gvn.rs:618:19: 618:21}; + let _7: {closure@$DIR/gvn.rs:617:19: 617:21}; scope 3 { debug closure => _7; let _8: fn(); @@ -62,16 +62,16 @@ StorageDead(_6); StorageDead(_5); - StorageLive(_7); -- _7 = {closure@$DIR/gvn.rs:618:19: 618:21}; +- _7 = {closure@$DIR/gvn.rs:617:19: 617:21}; - StorageLive(_8); + nop; -+ _7 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; ++ _7 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; + nop; StorageLive(_9); - _9 = copy _7; - _8 = move _9 as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); -+ _9 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; -+ _8 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); ++ _9 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; ++ _8 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); StorageDead(_9); StorageLive(_10); StorageLive(_11); @@ -88,8 +88,8 @@ StorageLive(_13); - _13 = copy _7; - _12 = move _13 as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); -+ _13 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; -+ _12 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); ++ _13 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; ++ _12 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); StorageDead(_13); StorageLive(_14); StorageLive(_15); diff --git a/tests/mir-opt/gvn.fn_pointers.GVN.panic-unwind.diff b/tests/mir-opt/gvn.fn_pointers.GVN.panic-unwind.diff index b716fcd4e74b8..0aca8e508f5c3 100644 --- a/tests/mir-opt/gvn.fn_pointers.GVN.panic-unwind.diff +++ b/tests/mir-opt/gvn.fn_pointers.GVN.panic-unwind.diff @@ -8,10 +8,10 @@ let mut _3: fn(u8) -> u8; let _5: (); let mut _6: fn(u8) -> u8; - let mut _9: {closure@$DIR/gvn.rs:618:19: 618:21}; + let mut _9: {closure@$DIR/gvn.rs:617:19: 617:21}; let _10: (); let mut _11: fn(); - let mut _13: {closure@$DIR/gvn.rs:618:19: 618:21}; + let mut _13: {closure@$DIR/gvn.rs:617:19: 617:21}; let _14: (); let mut _15: fn(); scope 1 { @@ -19,7 +19,7 @@ let _4: fn(u8) -> u8; scope 2 { debug g => _4; - let _7: {closure@$DIR/gvn.rs:618:19: 618:21}; + let _7: {closure@$DIR/gvn.rs:617:19: 617:21}; scope 3 { debug closure => _7; let _8: fn(); @@ -62,16 +62,16 @@ StorageDead(_6); StorageDead(_5); - StorageLive(_7); -- _7 = {closure@$DIR/gvn.rs:618:19: 618:21}; +- _7 = {closure@$DIR/gvn.rs:617:19: 617:21}; - StorageLive(_8); + nop; -+ _7 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; ++ _7 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; + nop; StorageLive(_9); - _9 = copy _7; - _8 = move _9 as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); -+ _9 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; -+ _8 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); ++ _9 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; ++ _8 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); StorageDead(_9); StorageLive(_10); StorageLive(_11); @@ -88,8 +88,8 @@ StorageLive(_13); - _13 = copy _7; - _12 = move _13 as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); -+ _13 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21}; -+ _12 = const ZeroSized: {closure@$DIR/gvn.rs:618:19: 618:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); ++ _13 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21}; ++ _12 = const ZeroSized: {closure@$DIR/gvn.rs:617:19: 617:21} as fn() (PointerCoercion(ClosureFnPointer(Safe), AsCast)); StorageDead(_13); StorageLive(_14); StorageLive(_15); diff --git a/tests/mir-opt/gvn.rs b/tests/mir-opt/gvn.rs index 837e8ac4d9e34..3c3241fefe22e 100644 --- a/tests/mir-opt/gvn.rs +++ b/tests/mir-opt/gvn.rs @@ -9,7 +9,6 @@ #![feature(freeze)] #![allow(ambiguous_wide_pointer_comparisons)] #![allow(unconditional_panic)] -#![allow(unnecessary_transmutes)] #![allow(unused)] use std::intrinsics::mir::*; @@ -986,14 +985,7 @@ unsafe fn aggregate_struct_then_transmute(id: u16, thin: *const u8) { opaque(std::intrinsics::transmute::<_, *const u8>(j)); } -#[repr(u8)] -enum ZeroOneTwo { - Zero, - One, - Two, -} - -unsafe fn transmute_then_transmute_again(a: u32, c: char, b: bool, d: u8) { +unsafe fn transmute_then_transmute_again(a: u32, c: char) { // CHECK: [[TEMP1:_[0-9]+]] = copy _1 as char (Transmute); // CHECK: [[TEMP2:_[0-9]+]] = copy [[TEMP1]] as i32 (Transmute); // CHECK: opaque::(move [[TEMP2]]) @@ -1004,16 +996,6 @@ unsafe fn transmute_then_transmute_again(a: u32, c: char, b: bool, d: u8) { // CHECK: opaque::(move [[TEMP]]) let x = std::intrinsics::transmute::(c); opaque(std::intrinsics::transmute::(x)); - - // CHECK: [[TEMP:_[0-9]+]] = copy _3 as u8 (Transmute); - // CHECK: opaque::(move [[TEMP]]) - let x = std::intrinsics::transmute::(b); - opaque(std::intrinsics::transmute::(x)); - - // CHECK: [[TEMP:_[0-9]+]] = copy _4 as bool (Transmute); - // CHECK: opaque::(move [[TEMP]]) - let x = std::intrinsics::transmute::(d); - opaque(std::intrinsics::transmute::(x)); } // Transmuting can skip a pointer cast so long as it wasn't a fat-to-thin cast. diff --git a/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-abort.diff b/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-abort.diff index caed065536e3a..962fecd2586eb 100644 --- a/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-abort.diff +++ b/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-abort.diff @@ -1,135 +1,71 @@ - // MIR for `transmute_then_transmute_again` before GVN + // MIR for `transmute_then_transmute_again` after GVN - fn transmute_then_transmute_again(_1: u32, _2: char, _3: bool, _4: u8) -> () { + fn transmute_then_transmute_again(_1: u32, _2: char) -> () { debug a => _1; debug c => _2; - debug b => _3; - debug d => _4; let mut _0: (); - let _5: char; - let mut _6: u32; - let _7: (); - let mut _8: i32; + let _3: char; + let mut _4: u32; + let _5: (); + let mut _6: i32; + let mut _7: char; let mut _9: char; - let mut _11: char; - let _12: (); - let mut _13: i32; - let mut _14: u32; - let mut _16: bool; - let _17: (); - let mut _18: u8; - let mut _19: ZeroOneTwo; - let mut _21: u8; - let _22: (); - let mut _23: bool; - let mut _24: ZeroOneTwo; + let _10: (); + let mut _11: i32; + let mut _12: u32; scope 1 { - debug x => _5; - let _10: u32; + debug x => _3; + let _8: u32; scope 2 { - debug x => _10; - let _15: ZeroOneTwo; - scope 3 { - debug x => _15; - let _20: ZeroOneTwo; - scope 4 { - debug x => _20; - } - } + debug x => _8; } } bb0: { -- StorageLive(_5); +- StorageLive(_3); + nop; + StorageLive(_4); + _4 = copy _1; +- _3 = move _4 as char (Transmute); ++ _3 = copy _1 as char (Transmute); + StorageDead(_4); + StorageLive(_5); StorageLive(_6); - _6 = copy _1; -- _5 = move _6 as char (Transmute); -+ _5 = copy _1 as char (Transmute); - StorageDead(_6); StorageLive(_7); - StorageLive(_8); - StorageLive(_9); - _9 = copy _5; -- _8 = move _9 as i32 (Transmute); -+ _8 = copy _5 as i32 (Transmute); - StorageDead(_9); - _7 = opaque::(move _8) -> [return: bb1, unwind unreachable]; + _7 = copy _3; +- _6 = move _7 as i32 (Transmute); ++ _6 = copy _3 as i32 (Transmute); + StorageDead(_7); + _5 = opaque::(move _6) -> [return: bb1, unwind unreachable]; } bb1: { - StorageDead(_8); - StorageDead(_7); -- StorageLive(_10); + StorageDead(_6); + StorageDead(_5); +- StorageLive(_8); + nop; + StorageLive(_9); + _9 = copy _2; +- _8 = move _9 as u32 (Transmute); ++ _8 = copy _2 as u32 (Transmute); + StorageDead(_9); + StorageLive(_10); StorageLive(_11); - _11 = copy _2; -- _10 = move _11 as u32 (Transmute); -+ _10 = copy _2 as u32 (Transmute); - StorageDead(_11); StorageLive(_12); - StorageLive(_13); - StorageLive(_14); - _14 = copy _10; -- _13 = move _14 as i32 (Transmute); -+ _13 = copy _2 as i32 (Transmute); - StorageDead(_14); - _12 = opaque::(move _13) -> [return: bb2, unwind unreachable]; - } - - bb2: { - StorageDead(_13); + _12 = copy _8; +- _11 = move _12 as i32 (Transmute); ++ _11 = copy _2 as i32 (Transmute); StorageDead(_12); -- StorageLive(_15); -+ nop; - StorageLive(_16); - _16 = copy _3; -- _15 = move _16 as ZeroOneTwo (Transmute); -+ _15 = copy _3 as ZeroOneTwo (Transmute); - StorageDead(_16); - StorageLive(_17); - StorageLive(_18); - StorageLive(_19); -- _19 = move _15; -- _18 = move _19 as u8 (Transmute); -+ _19 = copy _15; -+ _18 = copy _3 as u8 (Transmute); - StorageDead(_19); - _17 = opaque::(move _18) -> [return: bb3, unwind unreachable]; - } - - bb3: { - StorageDead(_18); - StorageDead(_17); -- StorageLive(_20); -+ nop; - StorageLive(_21); - _21 = copy _4; -- _20 = move _21 as ZeroOneTwo (Transmute); -+ _20 = copy _4 as ZeroOneTwo (Transmute); - StorageDead(_21); - StorageLive(_22); - StorageLive(_23); - StorageLive(_24); -- _24 = move _20; -- _23 = move _24 as bool (Transmute); -+ _24 = copy _20; -+ _23 = copy _4 as bool (Transmute); - StorageDead(_24); - _22 = opaque::(move _23) -> [return: bb4, unwind unreachable]; + _10 = opaque::(move _11) -> [return: bb2, unwind unreachable]; } - bb4: { - StorageDead(_23); - StorageDead(_22); + bb2: { + StorageDead(_11); + StorageDead(_10); _0 = const (); -- StorageDead(_20); -- StorageDead(_15); -- StorageDead(_10); -- StorageDead(_5); -+ nop; -+ nop; +- StorageDead(_8); +- StorageDead(_3); + nop; + nop; return; diff --git a/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-unwind.diff b/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-unwind.diff index 3b25dd362cd5c..e32397c1aed07 100644 --- a/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-unwind.diff +++ b/tests/mir-opt/gvn.transmute_then_transmute_again.GVN.panic-unwind.diff @@ -1,135 +1,71 @@ - // MIR for `transmute_then_transmute_again` before GVN + // MIR for `transmute_then_transmute_again` after GVN - fn transmute_then_transmute_again(_1: u32, _2: char, _3: bool, _4: u8) -> () { + fn transmute_then_transmute_again(_1: u32, _2: char) -> () { debug a => _1; debug c => _2; - debug b => _3; - debug d => _4; let mut _0: (); - let _5: char; - let mut _6: u32; - let _7: (); - let mut _8: i32; + let _3: char; + let mut _4: u32; + let _5: (); + let mut _6: i32; + let mut _7: char; let mut _9: char; - let mut _11: char; - let _12: (); - let mut _13: i32; - let mut _14: u32; - let mut _16: bool; - let _17: (); - let mut _18: u8; - let mut _19: ZeroOneTwo; - let mut _21: u8; - let _22: (); - let mut _23: bool; - let mut _24: ZeroOneTwo; + let _10: (); + let mut _11: i32; + let mut _12: u32; scope 1 { - debug x => _5; - let _10: u32; + debug x => _3; + let _8: u32; scope 2 { - debug x => _10; - let _15: ZeroOneTwo; - scope 3 { - debug x => _15; - let _20: ZeroOneTwo; - scope 4 { - debug x => _20; - } - } + debug x => _8; } } bb0: { -- StorageLive(_5); +- StorageLive(_3); + nop; + StorageLive(_4); + _4 = copy _1; +- _3 = move _4 as char (Transmute); ++ _3 = copy _1 as char (Transmute); + StorageDead(_4); + StorageLive(_5); StorageLive(_6); - _6 = copy _1; -- _5 = move _6 as char (Transmute); -+ _5 = copy _1 as char (Transmute); - StorageDead(_6); StorageLive(_7); - StorageLive(_8); - StorageLive(_9); - _9 = copy _5; -- _8 = move _9 as i32 (Transmute); -+ _8 = copy _5 as i32 (Transmute); - StorageDead(_9); - _7 = opaque::(move _8) -> [return: bb1, unwind continue]; + _7 = copy _3; +- _6 = move _7 as i32 (Transmute); ++ _6 = copy _3 as i32 (Transmute); + StorageDead(_7); + _5 = opaque::(move _6) -> [return: bb1, unwind continue]; } bb1: { - StorageDead(_8); - StorageDead(_7); -- StorageLive(_10); + StorageDead(_6); + StorageDead(_5); +- StorageLive(_8); + nop; + StorageLive(_9); + _9 = copy _2; +- _8 = move _9 as u32 (Transmute); ++ _8 = copy _2 as u32 (Transmute); + StorageDead(_9); + StorageLive(_10); StorageLive(_11); - _11 = copy _2; -- _10 = move _11 as u32 (Transmute); -+ _10 = copy _2 as u32 (Transmute); - StorageDead(_11); StorageLive(_12); - StorageLive(_13); - StorageLive(_14); - _14 = copy _10; -- _13 = move _14 as i32 (Transmute); -+ _13 = copy _2 as i32 (Transmute); - StorageDead(_14); - _12 = opaque::(move _13) -> [return: bb2, unwind continue]; - } - - bb2: { - StorageDead(_13); + _12 = copy _8; +- _11 = move _12 as i32 (Transmute); ++ _11 = copy _2 as i32 (Transmute); StorageDead(_12); -- StorageLive(_15); -+ nop; - StorageLive(_16); - _16 = copy _3; -- _15 = move _16 as ZeroOneTwo (Transmute); -+ _15 = copy _3 as ZeroOneTwo (Transmute); - StorageDead(_16); - StorageLive(_17); - StorageLive(_18); - StorageLive(_19); -- _19 = move _15; -- _18 = move _19 as u8 (Transmute); -+ _19 = copy _15; -+ _18 = copy _3 as u8 (Transmute); - StorageDead(_19); - _17 = opaque::(move _18) -> [return: bb3, unwind continue]; - } - - bb3: { - StorageDead(_18); - StorageDead(_17); -- StorageLive(_20); -+ nop; - StorageLive(_21); - _21 = copy _4; -- _20 = move _21 as ZeroOneTwo (Transmute); -+ _20 = copy _4 as ZeroOneTwo (Transmute); - StorageDead(_21); - StorageLive(_22); - StorageLive(_23); - StorageLive(_24); -- _24 = move _20; -- _23 = move _24 as bool (Transmute); -+ _24 = copy _20; -+ _23 = copy _4 as bool (Transmute); - StorageDead(_24); - _22 = opaque::(move _23) -> [return: bb4, unwind continue]; + _10 = opaque::(move _11) -> [return: bb2, unwind continue]; } - bb4: { - StorageDead(_23); - StorageDead(_22); + bb2: { + StorageDead(_11); + StorageDead(_10); _0 = const (); -- StorageDead(_20); -- StorageDead(_15); -- StorageDead(_10); -- StorageDead(_5); -+ nop; -+ nop; +- StorageDead(_8); +- StorageDead(_3); + nop; + nop; return; diff --git a/tests/mir-opt/gvn_ptr_eq_with_constant.main.GVN.diff b/tests/mir-opt/gvn_ptr_eq_with_constant.main.GVN.diff index 9e543699da70f..f56af33ea603f 100644 --- a/tests/mir-opt/gvn_ptr_eq_with_constant.main.GVN.diff +++ b/tests/mir-opt/gvn_ptr_eq_with_constant.main.GVN.diff @@ -7,7 +7,7 @@ let mut _2: *mut u8; scope 1 (inlined dangling_mut::) { scope 2 (inlined NonNull::::dangling) { - let _3: std::ptr::Alignment; + let mut _3: std::num::NonZero; scope 3 { scope 5 (inlined std::ptr::Alignment::as_nonzero) { } @@ -40,9 +40,9 @@ StorageLive(_1); StorageLive(_2); StorageLive(_3); -- _3 = const std::ptr::Alignment::of::::{constant#0}; +- _3 = const std::ptr::Alignment::of::::{constant#0} as std::num::NonZero (Transmute); - _2 = copy _3 as *mut u8 (Transmute); -+ _3 = const std::ptr::Alignment {{ _inner_repr_trick: std::ptr::alignment::AlignmentEnum::_Align1Shl0 }}; ++ _3 = const NonZero::(core::num::niche_types::NonZeroUsizeInner(1_usize)); + _2 = const {0x1 as *mut u8}; StorageDead(_3); StorageLive(_4); diff --git a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-abort.mir b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-abort.mir index 0adc66951e78b..6ffadd4c51db1 100644 --- a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-abort.mir +++ b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-abort.mir @@ -8,8 +8,9 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { let _2: std::ptr::NonNull<[T]>; let mut _3: *mut [T]; let mut _4: *const [T]; - let _10: (); + let _11: (); scope 3 { + let _8: std::ptr::alignment::AlignmentEnum; scope 4 { scope 17 (inlined Layout::size) { } @@ -26,21 +27,17 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { scope 23 (inlined ::deallocate) { scope 24 (inlined std::alloc::Global::deallocate_impl) { scope 25 (inlined std::alloc::Global::deallocate_impl_runtime) { - let mut _8: *mut u8; + let mut _9: *mut u8; scope 26 (inlined Layout::size) { } scope 27 (inlined NonNull::::as_ptr) { } scope 28 (inlined std::alloc::dealloc) { - let mut _9: usize; + let mut _10: usize; scope 29 (inlined Layout::size) { } scope 30 (inlined Layout::align) { scope 31 (inlined std::ptr::Alignment::as_usize) { - scope 32 (inlined std::ptr::Alignment::as_nonzero) { - } - scope 33 (inlined NonZero::::get) { - } } } } @@ -85,6 +82,7 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { StorageLive(_4); _3 = copy _2 as *mut [T] (Transmute); _4 = copy _2 as *const [T] (Transmute); + StorageLive(_7); _5 = std::intrinsics::size_of_val::<[T]>(move _4) -> [return: bb1, unwind unreachable]; } @@ -93,21 +91,23 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { _6 = const ::ALIGN; _7 = copy _6 as std::ptr::Alignment (Transmute); StorageDead(_6); + _8 = copy (_7.0: std::ptr::alignment::AlignmentEnum); + StorageDead(_7); StorageDead(_4); switchInt(copy _5) -> [0: bb4, otherwise: bb2]; } bb2: { - StorageLive(_8); - _8 = copy _3 as *mut u8 (PtrToPtr); StorageLive(_9); - _9 = copy _7 as usize (Transmute); - _10 = alloc::alloc::__rust_dealloc(move _8, move _5, move _9) -> [return: bb3, unwind unreachable]; + _9 = copy _3 as *mut u8 (PtrToPtr); + StorageLive(_10); + _10 = discriminant(_8); + _11 = alloc::alloc::__rust_dealloc(move _9, move _5, move _10) -> [return: bb3, unwind unreachable]; } bb3: { + StorageDead(_10); StorageDead(_9); - StorageDead(_8); goto -> bb4; } diff --git a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-unwind.mir b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-unwind.mir index 0adc66951e78b..6ffadd4c51db1 100644 --- a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-unwind.mir +++ b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.32bit.panic-unwind.mir @@ -8,8 +8,9 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { let _2: std::ptr::NonNull<[T]>; let mut _3: *mut [T]; let mut _4: *const [T]; - let _10: (); + let _11: (); scope 3 { + let _8: std::ptr::alignment::AlignmentEnum; scope 4 { scope 17 (inlined Layout::size) { } @@ -26,21 +27,17 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { scope 23 (inlined ::deallocate) { scope 24 (inlined std::alloc::Global::deallocate_impl) { scope 25 (inlined std::alloc::Global::deallocate_impl_runtime) { - let mut _8: *mut u8; + let mut _9: *mut u8; scope 26 (inlined Layout::size) { } scope 27 (inlined NonNull::::as_ptr) { } scope 28 (inlined std::alloc::dealloc) { - let mut _9: usize; + let mut _10: usize; scope 29 (inlined Layout::size) { } scope 30 (inlined Layout::align) { scope 31 (inlined std::ptr::Alignment::as_usize) { - scope 32 (inlined std::ptr::Alignment::as_nonzero) { - } - scope 33 (inlined NonZero::::get) { - } } } } @@ -85,6 +82,7 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { StorageLive(_4); _3 = copy _2 as *mut [T] (Transmute); _4 = copy _2 as *const [T] (Transmute); + StorageLive(_7); _5 = std::intrinsics::size_of_val::<[T]>(move _4) -> [return: bb1, unwind unreachable]; } @@ -93,21 +91,23 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { _6 = const ::ALIGN; _7 = copy _6 as std::ptr::Alignment (Transmute); StorageDead(_6); + _8 = copy (_7.0: std::ptr::alignment::AlignmentEnum); + StorageDead(_7); StorageDead(_4); switchInt(copy _5) -> [0: bb4, otherwise: bb2]; } bb2: { - StorageLive(_8); - _8 = copy _3 as *mut u8 (PtrToPtr); StorageLive(_9); - _9 = copy _7 as usize (Transmute); - _10 = alloc::alloc::__rust_dealloc(move _8, move _5, move _9) -> [return: bb3, unwind unreachable]; + _9 = copy _3 as *mut u8 (PtrToPtr); + StorageLive(_10); + _10 = discriminant(_8); + _11 = alloc::alloc::__rust_dealloc(move _9, move _5, move _10) -> [return: bb3, unwind unreachable]; } bb3: { + StorageDead(_10); StorageDead(_9); - StorageDead(_8); goto -> bb4; } diff --git a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-abort.mir b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-abort.mir index 0adc66951e78b..6ffadd4c51db1 100644 --- a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-abort.mir +++ b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-abort.mir @@ -8,8 +8,9 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { let _2: std::ptr::NonNull<[T]>; let mut _3: *mut [T]; let mut _4: *const [T]; - let _10: (); + let _11: (); scope 3 { + let _8: std::ptr::alignment::AlignmentEnum; scope 4 { scope 17 (inlined Layout::size) { } @@ -26,21 +27,17 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { scope 23 (inlined ::deallocate) { scope 24 (inlined std::alloc::Global::deallocate_impl) { scope 25 (inlined std::alloc::Global::deallocate_impl_runtime) { - let mut _8: *mut u8; + let mut _9: *mut u8; scope 26 (inlined Layout::size) { } scope 27 (inlined NonNull::::as_ptr) { } scope 28 (inlined std::alloc::dealloc) { - let mut _9: usize; + let mut _10: usize; scope 29 (inlined Layout::size) { } scope 30 (inlined Layout::align) { scope 31 (inlined std::ptr::Alignment::as_usize) { - scope 32 (inlined std::ptr::Alignment::as_nonzero) { - } - scope 33 (inlined NonZero::::get) { - } } } } @@ -85,6 +82,7 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { StorageLive(_4); _3 = copy _2 as *mut [T] (Transmute); _4 = copy _2 as *const [T] (Transmute); + StorageLive(_7); _5 = std::intrinsics::size_of_val::<[T]>(move _4) -> [return: bb1, unwind unreachable]; } @@ -93,21 +91,23 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { _6 = const ::ALIGN; _7 = copy _6 as std::ptr::Alignment (Transmute); StorageDead(_6); + _8 = copy (_7.0: std::ptr::alignment::AlignmentEnum); + StorageDead(_7); StorageDead(_4); switchInt(copy _5) -> [0: bb4, otherwise: bb2]; } bb2: { - StorageLive(_8); - _8 = copy _3 as *mut u8 (PtrToPtr); StorageLive(_9); - _9 = copy _7 as usize (Transmute); - _10 = alloc::alloc::__rust_dealloc(move _8, move _5, move _9) -> [return: bb3, unwind unreachable]; + _9 = copy _3 as *mut u8 (PtrToPtr); + StorageLive(_10); + _10 = discriminant(_8); + _11 = alloc::alloc::__rust_dealloc(move _9, move _5, move _10) -> [return: bb3, unwind unreachable]; } bb3: { + StorageDead(_10); StorageDead(_9); - StorageDead(_8); goto -> bb4; } diff --git a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-unwind.mir b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-unwind.mir index 0adc66951e78b..6ffadd4c51db1 100644 --- a/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-unwind.mir +++ b/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-unwind.mir @@ -8,8 +8,9 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { let _2: std::ptr::NonNull<[T]>; let mut _3: *mut [T]; let mut _4: *const [T]; - let _10: (); + let _11: (); scope 3 { + let _8: std::ptr::alignment::AlignmentEnum; scope 4 { scope 17 (inlined Layout::size) { } @@ -26,21 +27,17 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { scope 23 (inlined ::deallocate) { scope 24 (inlined std::alloc::Global::deallocate_impl) { scope 25 (inlined std::alloc::Global::deallocate_impl_runtime) { - let mut _8: *mut u8; + let mut _9: *mut u8; scope 26 (inlined Layout::size) { } scope 27 (inlined NonNull::::as_ptr) { } scope 28 (inlined std::alloc::dealloc) { - let mut _9: usize; + let mut _10: usize; scope 29 (inlined Layout::size) { } scope 30 (inlined Layout::align) { scope 31 (inlined std::ptr::Alignment::as_usize) { - scope 32 (inlined std::ptr::Alignment::as_nonzero) { - } - scope 33 (inlined NonZero::::get) { - } } } } @@ -85,6 +82,7 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { StorageLive(_4); _3 = copy _2 as *mut [T] (Transmute); _4 = copy _2 as *const [T] (Transmute); + StorageLive(_7); _5 = std::intrinsics::size_of_val::<[T]>(move _4) -> [return: bb1, unwind unreachable]; } @@ -93,21 +91,23 @@ fn generic_in_place(_1: *mut Box<[T]>) -> () { _6 = const ::ALIGN; _7 = copy _6 as std::ptr::Alignment (Transmute); StorageDead(_6); + _8 = copy (_7.0: std::ptr::alignment::AlignmentEnum); + StorageDead(_7); StorageDead(_4); switchInt(copy _5) -> [0: bb4, otherwise: bb2]; } bb2: { - StorageLive(_8); - _8 = copy _3 as *mut u8 (PtrToPtr); StorageLive(_9); - _9 = copy _7 as usize (Transmute); - _10 = alloc::alloc::__rust_dealloc(move _8, move _5, move _9) -> [return: bb3, unwind unreachable]; + _9 = copy _3 as *mut u8 (PtrToPtr); + StorageLive(_10); + _10 = discriminant(_8); + _11 = alloc::alloc::__rust_dealloc(move _9, move _5, move _10) -> [return: bb3, unwind unreachable]; } bb3: { + StorageDead(_10); StorageDead(_9); - StorageDead(_8); goto -> bb4; } diff --git a/tests/mir-opt/pre-codegen/drop_boxed_slice.rs b/tests/mir-opt/pre-codegen/drop_boxed_slice.rs index cad7251421ebf..dddcffdd48439 100644 --- a/tests/mir-opt/pre-codegen/drop_boxed_slice.rs +++ b/tests/mir-opt/pre-codegen/drop_boxed_slice.rs @@ -11,7 +11,8 @@ pub unsafe fn generic_in_place(ptr: *mut Box<[T]>) { // CHECK: [[SIZE:_.+]] = std::intrinsics::size_of_val::<[T]> // CHECK: [[ALIGN:_.+]] = const ::ALIGN; // CHECK: [[B:_.+]] = copy [[ALIGN]] as std::ptr::Alignment (Transmute); - // CHECK: [[C:_.+]] = copy [[B]] as usize (Transmute); - // CHECK: = alloc::alloc::__rust_dealloc({{.+}}, move [[SIZE]], move [[C]]) -> + // CHECK: [[C:_.+]] = copy ([[B]].0: std::ptr::alignment::AlignmentEnum); + // CHECK: [[D:_.+]] = discriminant([[C]]); + // CHECK: = alloc::alloc::__rust_dealloc({{.+}}, move [[SIZE]], move [[D]]) -> std::ptr::drop_in_place(ptr) } diff --git a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-abort.diff b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-abort.diff index b48e6fc56f430..d0fda06c115ce 100644 --- a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-abort.diff +++ b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-abort.diff @@ -63,7 +63,7 @@ bb3: { - _1 = move ((_2 as Some).0: std::alloc::Layout); -+ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}; ++ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}; StorageDead(_8); StorageDead(_2); StorageLive(_3); @@ -73,8 +73,8 @@ StorageLive(_7); - _7 = copy _1; - _6 = std::alloc::Global::alloc_impl_runtime(move _7, const false) -> [return: bb4, unwind unreachable]; -+ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}; -+ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}, const false) -> [return: bb4, unwind unreachable]; ++ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}; ++ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}, const false) -> [return: bb4, unwind unreachable]; } bb4: { diff --git a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-unwind.diff b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-unwind.diff index d0e59c06ff995..485ff902a7b9d 100644 --- a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-unwind.diff +++ b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.32bit.panic-unwind.diff @@ -64,7 +64,7 @@ bb4: { - _1 = move ((_2 as Some).0: std::alloc::Layout); -+ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}; ++ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}; StorageDead(_8); StorageDead(_2); StorageLive(_3); @@ -74,8 +74,8 @@ StorageLive(_7); - _7 = copy _1; - _6 = std::alloc::Global::alloc_impl_runtime(move _7, const false) -> [return: bb5, unwind continue]; -+ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}; -+ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x00000000): std::ptr::alignment::AlignmentEnum }} }}, const false) -> [return: bb5, unwind continue]; ++ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}; ++ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(4 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x00000000): std::ptr::alignment::AlignmentEnum) }}, const false) -> [return: bb5, unwind continue]; } bb5: { diff --git a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-abort.diff b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-abort.diff index 18fc4ac0d87f1..b45a0f4a9bdd0 100644 --- a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-abort.diff +++ b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-abort.diff @@ -63,7 +63,7 @@ bb3: { - _1 = move ((_2 as Some).0: std::alloc::Layout); -+ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}; ++ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}; StorageDead(_8); StorageDead(_2); StorageLive(_3); @@ -73,8 +73,8 @@ StorageLive(_7); - _7 = copy _1; - _6 = std::alloc::Global::alloc_impl_runtime(move _7, const false) -> [return: bb4, unwind unreachable]; -+ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}; -+ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}, const false) -> [return: bb4, unwind unreachable]; ++ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}; ++ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}, const false) -> [return: bb4, unwind unreachable]; } bb4: { diff --git a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-unwind.diff b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-unwind.diff index c109fe735e898..beee899dafe6e 100644 --- a/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-unwind.diff +++ b/tests/mir-opt/pre-codegen/issue_117368_print_invalid_constant.main.GVN.64bit.panic-unwind.diff @@ -64,7 +64,7 @@ bb4: { - _1 = move ((_2 as Some).0: std::alloc::Layout); -+ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}; ++ _1 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}; StorageDead(_8); StorageDead(_2); StorageLive(_3); @@ -74,8 +74,8 @@ StorageLive(_7); - _7 = copy _1; - _6 = std::alloc::Global::alloc_impl_runtime(move _7, const false) -> [return: bb5, unwind continue]; -+ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}; -+ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment {{ _inner_repr_trick: Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum }} }}, const false) -> [return: bb5, unwind continue]; ++ _7 = const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}; ++ _6 = std::alloc::Global::alloc_impl_runtime(const Layout {{ size: Indirect { alloc_id: ALLOC0, offset: Size(8 bytes) }: usize, align: std::ptr::Alignment(Scalar(0x0000000000000000): std::ptr::alignment::AlignmentEnum) }}, const false) -> [return: bb5, unwind continue]; } bb5: { diff --git a/tests/run-make-cargo/apple-slow-tls/rmake.rs b/tests/run-make-cargo/apple-slow-tls/rmake.rs index 476414bcfa1ec..231e0b1668e99 100644 --- a/tests/run-make-cargo/apple-slow-tls/rmake.rs +++ b/tests/run-make-cargo/apple-slow-tls/rmake.rs @@ -26,7 +26,6 @@ fn main() { "--target", "t.json", "-Zbuild-std=std,core,panic_abort", - "-Zjson-target-spec", ]) .run(); diff --git a/tests/rustdoc-gui/globals.goml b/tests/rustdoc-gui/globals.goml index 4f12175f6ab23..89f57add81618 100644 --- a/tests/rustdoc-gui/globals.goml +++ b/tests/rustdoc-gui/globals.goml @@ -4,14 +4,14 @@ include: "utils.goml" // URL query -go-to: "file://" + |DOC_PATH| + "/test_docs/index.html?search=sa" +go-to: "file://" + |DOC_PATH| + "/test_docs/index.html?search=sa'%3Bda'%3Bds" wait-for: "#search-tabs" assert-window-property-false: {"searchIndex": null} // Form input go-to: "file://" + |DOC_PATH| + "/test_docs/index.html" call-function: ("perform-search", {"query": "Foo"}) -wait-for-window-property-false: {"searchIndex": null} +assert-window-property-false: {"searchIndex": null} // source sidebar go-to: "file://" + |DOC_PATH| + "/src/test_docs/lib.rs.html" diff --git a/tests/rustdoc-gui/headings.goml b/tests/rustdoc-gui/headings.goml index 391234b78ebd3..94d80a3e3df5f 100644 --- a/tests/rustdoc-gui/headings.goml +++ b/tests/rustdoc-gui/headings.goml @@ -221,14 +221,14 @@ call-function: ( define-function: ( "check-since-color", - [theme, color], + [theme], block { call-function: ("switch-theme", {"theme": |theme|}) - assert-css: (".since", {"color": |color|}, ALL) + assert-css: (".since", {"color": "#808080"}, ALL) }, ) go-to: "file://" + |DOC_PATH| + "/staged_api/struct.Foo.html" -call-function: ("check-since-color", {"theme": "ayu", "color": "#808080"}) -call-function: ("check-since-color", {"theme": "dark", "color": "#d0d0d0"}) -call-function: ("check-since-color", {"theme": "light", "color": "#808080"}) +call-function: ("check-since-color", {"theme": "ayu"}) +call-function: ("check-since-color", {"theme": "dark"}) +call-function: ("check-since-color", {"theme": "light"}) diff --git a/tests/rustdoc-gui/setting-hide-deprecated.goml b/tests/rustdoc-gui/setting-hide-deprecated.goml index 0fefe00f9457b..6dc5a6bff175d 100644 --- a/tests/rustdoc-gui/setting-hide-deprecated.goml +++ b/tests/rustdoc-gui/setting-hide-deprecated.goml @@ -69,7 +69,7 @@ wait-for-css: ("details" + |deprecated_class|, {"display": "block"}, ALL) // And now we check with the search results. call-function: ("perform-search", {"query": "deprecated::depr"}) -// There should be at least 7 results. +// There should at least 7 results. store-count: ("#results ul.search-results.active > a", nb_search_results) assert: |nb_search_results| >= 7 // There should be at least 5 deprecated items. @@ -77,12 +77,6 @@ store-count: ("#results ul.search-results.active > a" + |deprecated_class|, nb_d assert: |nb_search_results| >= 5 // Deprecated items should all be displayed. assert-css: ("#results ul.search-results.active > a" + |deprecated_class|, {"display": "grid"}, ALL) -// The "X deprecated items hidden by setting" element should not be displayed. -assert-text: ( - "#results ul.search-results.active .deprecated-count", - "5 deprecated items hidden by setting", -) -assert-css: ("#results ul.search-results.active .deprecated-count", {"display": "none"}) // We enable the "hide deprecated items" setting. call-function: ("open-settings-menu", {}) click: "#hide-deprecated-items" @@ -92,16 +86,11 @@ wait-for-css: ( {"display": "none"}, ALL, ) -// The "X deprecated items hidden by setting" element should be displayed. -assert-css: ("#results ul.search-results.active .deprecated-count", {"display": "block"}) // Finally we check that the future deprecated item doesn't have the deprecated class in the search -// and therefore isn't impacted by the setting. -call-function: ("perform-search", {"query": '"future_deprecated_fn"'}) +// and therefore isn't impact by the setting. +call-function: ("perform-search", {"query": "deprecated::future_deprecated"}) assert-text: ( "#results ul.search-results.active > a:not(" + |deprecated_class| + ") .path", " lib2::deprecated::NonDeprecatedStruct::future_deprecated_fn", ) -// The "X deprecated items hidden by setting" element should now be empty, and therefore not displayed. -assert-text: ("#results ul.search-results.active .deprecated-count", "") -assert-css: ("#results ul.search-results.active .deprecated-count", {"display": "none"}) diff --git a/tests/rustdoc-html/glob-shadowing.rs b/tests/rustdoc-html/glob-shadowing.rs index c1eeb7e663e7b..d9e9ead3f9a90 100644 --- a/tests/rustdoc-html/glob-shadowing.rs +++ b/tests/rustdoc-html/glob-shadowing.rs @@ -1,9 +1,9 @@ //@ has 'glob_shadowing/index.html' -//@ count - '//dt' 7 -//@ !has - '//dd' 'sub1::describe1' +//@ count - '//dt' 6 +//@ !has - '//dd' 'sub1::describe' //@ has - '//dd' 'sub2::describe' -//@ has - '//dd' 'sub1::describe2' +//@ !has - '//dd' 'sub1::describe2' //@ !has - '//dd' 'sub1::prelude' //@ has - '//dd' 'mod::prelude' @@ -18,7 +18,7 @@ mod sub1 { // this should be shadowed by sub2::describe - /// sub1::describe1 + /// sub1::describe pub fn describe() -> &'static str { "sub1::describe" } @@ -33,9 +33,7 @@ mod sub1 { pub struct Foo; // this should be shadowed, - // because both sub1::describe2 and sub3::describe2 are from glob reexport, - // but it is still usable from other crates under the `ambiguous_glob_imports` lint, - // so it is reachable and documented + // because both sub1::describe2 and sub3::describe2 are from glob reexport /// sub1::describe2 pub fn describe2() -> &'static str { "sub1::describe2" diff --git a/tests/rustdoc-json/reexport/glob_collision.rs b/tests/rustdoc-json/reexport/glob_collision.rs index dd6eab6517b09..48de1b5e77213 100644 --- a/tests/rustdoc-json/reexport/glob_collision.rs +++ b/tests/rustdoc-json/reexport/glob_collision.rs @@ -1,9 +1,7 @@ // Regression test for https://github.com/rust-lang/rust/issues/100973 -// Update: the rules has changed after #147984, one of the colliding items is now available -// from other crates under a deprecation lint. //@ set m1 = "$.index[?(@.name == 'm1' && @.inner.module)].id" -//@ is "$.index[?(@.name == 'm1')].inner.module.items" [0] +//@ is "$.index[?(@.name == 'm1')].inner.module.items" [] //@ is "$.index[?(@.name == 'm1')].inner.module.is_stripped" true mod m1 { pub fn f() {} diff --git a/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.rs b/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.rs index 91447e5fa166b..3d1e48a4c6382 100644 --- a/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.rs +++ b/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.rs @@ -14,20 +14,3 @@ pub mod bar { //~| ERROR: unresolved link pub fn sql_function_proc() {} } - -// From here, this is a regression test for . -pub use fuzz_test_helpers::*; - -/// A type referenced in the deprecation note. -pub struct Env; - -impl Env { - pub fn try_invoke(&self) {} -} - -mod fuzz_test_helpers { - #[deprecated(note = "use [Env::try_invoke] instead")] - //~^ ERROR: unresolved link - //~| ERROR: unresolved link - pub fn fuzz_catch_panic() {} -} diff --git a/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.stderr b/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.stderr index cb7a5f0c6e022..25f10b24d9fb5 100644 --- a/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.stderr +++ b/tests/rustdoc-ui/intra-doc/deprecated-note-from-reexported.stderr @@ -16,18 +16,6 @@ note: the lint level is defined here LL | #![deny(rustdoc::broken_intra_doc_links)] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -error: unresolved link to `Env::try_invoke` - --> $DIR/deprecated-note-from-reexported.rs:29:25 - | -LL | #[deprecated(note = "use [Env::try_invoke] instead")] - | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - | - = note: the link appears in this line: - - use [Env::try_invoke] instead - ^^^^^^^^^^^^^^^ - = note: no item named `Env` in scope - error: unresolved link to `define_sql_function` --> $DIR/deprecated-note-from-reexported.rs:12:25 | @@ -42,18 +30,5 @@ LL | #[deprecated(note = "Use [`define_sql_function`] instead")] = help: to escape `[` and `]` characters, add '\' before them like `\[` or `\]` = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` -error: unresolved link to `Env::try_invoke` - --> $DIR/deprecated-note-from-reexported.rs:29:25 - | -LL | #[deprecated(note = "use [Env::try_invoke] instead")] - | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - | - = note: the link appears in this line: - - use [Env::try_invoke] instead - ^^^^^^^^^^^^^^^ - = note: no item named `Env` in scope - = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` - -error: aborting due to 4 previous errors +error: aborting due to 2 previous errors diff --git a/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.rs b/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.rs index 798eca68b1c91..fcae379d982fc 100644 --- a/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.rs +++ b/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.rs @@ -80,17 +80,20 @@ struct InvalidNestedStructAttr {} #[derive(Diagnostic)] #[diag(nonsense("foo"), code = E0123, slug = "foo")] -//~^ ERROR derive(Diagnostic): diagnostic slug not specified +//~^ ERROR diagnostic slug must be the first argument +//~| ERROR diagnostic slug not specified struct InvalidNestedStructAttr1 {} #[derive(Diagnostic)] #[diag(nonsense = "...", code = E0123, slug = "foo")] -//~^ ERROR diagnostic slug not specified +//~^ ERROR unknown argument +//~| ERROR diagnostic slug not specified struct InvalidNestedStructAttr2 {} #[derive(Diagnostic)] #[diag(nonsense = 4, code = E0123, slug = "foo")] -//~^ ERROR diagnostic slug not specified +//~^ ERROR unknown argument +//~| ERROR diagnostic slug not specified struct InvalidNestedStructAttr3 {} #[derive(Diagnostic)] @@ -110,6 +113,7 @@ struct WrongPlaceField { #[diag(no_crate_example, code = E0123)] #[diag(no_crate_example, code = E0456)] //~^ ERROR specified multiple times +//~^^ ERROR specified multiple times struct DiagSpecifiedTwice {} #[derive(Diagnostic)] @@ -539,7 +543,7 @@ struct LabelWithTrailingPath { #[diag(no_crate_example, code = E0123)] struct LabelWithTrailingNameValue { #[label(no_crate_label, foo = "...")] - //~^ ERROR no nested attribute expected here + //~^ ERROR only `no_span` is a valid nested attribute span: Span, } @@ -547,7 +551,7 @@ struct LabelWithTrailingNameValue { #[diag(no_crate_example, code = E0123)] struct LabelWithTrailingList { #[label(no_crate_label, foo("..."))] - //~^ ERROR no nested attribute expected here + //~^ ERROR only `no_span` is a valid nested attribute span: Span, } @@ -803,7 +807,7 @@ struct SuggestionsInvalidItem { sub: Span, } -#[derive(Diagnostic)] +#[derive(Diagnostic)] //~ ERROR cannot find value `__code_34` in this scope #[diag(no_crate_example)] struct SuggestionsInvalidLiteral { #[suggestion(code = 3)] diff --git a/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.stderr b/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.stderr index 9ecb6c15767e9..cf5c0c2e6491f 100644 --- a/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.stderr +++ b/tests/ui-fulldeps/session-diagnostic/diagnostic-derive.stderr @@ -48,6 +48,12 @@ LL | #[diag(code = E0123)] | = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` +error: derive(Diagnostic): diagnostic slug must be the first argument + --> $DIR/diagnostic-derive.rs:82:16 + | +LL | #[diag(nonsense("foo"), code = E0123, slug = "foo")] + | ^ + error: derive(Diagnostic): diagnostic slug not specified --> $DIR/diagnostic-derive.rs:82:1 | @@ -56,16 +62,32 @@ LL | #[diag(nonsense("foo"), code = E0123, slug = "foo")] | = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` +error: derive(Diagnostic): unknown argument + --> $DIR/diagnostic-derive.rs:88:8 + | +LL | #[diag(nonsense = "...", code = E0123, slug = "foo")] + | ^^^^^^^^ + | + = note: only the `code` parameter is valid after the slug + error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:87:1 + --> $DIR/diagnostic-derive.rs:88:1 | LL | #[diag(nonsense = "...", code = E0123, slug = "foo")] | ^ | = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` +error: derive(Diagnostic): unknown argument + --> $DIR/diagnostic-derive.rs:94:8 + | +LL | #[diag(nonsense = 4, code = E0123, slug = "foo")] + | ^^^^^^^^ + | + = note: only the `code` parameter is valid after the slug + error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:92:1 + --> $DIR/diagnostic-derive.rs:94:1 | LL | #[diag(nonsense = 4, code = E0123, slug = "foo")] | ^ @@ -73,7 +95,7 @@ LL | #[diag(nonsense = 4, code = E0123, slug = "foo")] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): unknown argument - --> $DIR/diagnostic-derive.rs:97:40 + --> $DIR/diagnostic-derive.rs:100:40 | LL | #[diag(no_crate_example, code = E0123, slug = "foo")] | ^^^^ @@ -81,43 +103,55 @@ LL | #[diag(no_crate_example, code = E0123, slug = "foo")] = note: only the `code` parameter is valid after the slug error: derive(Diagnostic): `#[suggestion = ...]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:104:5 + --> $DIR/diagnostic-derive.rs:107:5 | LL | #[suggestion = "bar"] | ^ error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:111:26 + --> $DIR/diagnostic-derive.rs:114:8 + | +LL | #[diag(no_crate_example, code = E0456)] + | ^^^^^^^^^^^^^^^^ + | +note: previously specified here + --> $DIR/diagnostic-derive.rs:113:8 + | +LL | #[diag(no_crate_example, code = E0123)] + | ^^^^^^^^^^^^^^^^ + +error: derive(Diagnostic): attribute specified multiple times + --> $DIR/diagnostic-derive.rs:114:26 | LL | #[diag(no_crate_example, code = E0456)] | ^^^^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:110:26 + --> $DIR/diagnostic-derive.rs:113:26 | LL | #[diag(no_crate_example, code = E0123)] | ^^^^ error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:116:40 + --> $DIR/diagnostic-derive.rs:120:40 | LL | #[diag(no_crate_example, code = E0123, code = E0456)] | ^^^^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:116:26 + --> $DIR/diagnostic-derive.rs:120:26 | LL | #[diag(no_crate_example, code = E0123, code = E0456)] | ^^^^ error: derive(Diagnostic): diagnostic slug must be the first argument - --> $DIR/diagnostic-derive.rs:121:26 + --> $DIR/diagnostic-derive.rs:125:43 | LL | #[diag(no_crate_example, no_crate::example, code = E0123)] - | ^^^^^^^^ + | ^ error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:126:1 + --> $DIR/diagnostic-derive.rs:130:1 | LL | struct KindNotProvided {} | ^^^^^^ @@ -125,7 +159,7 @@ LL | struct KindNotProvided {} = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:129:1 + --> $DIR/diagnostic-derive.rs:133:1 | LL | #[diag(code = E0123)] | ^ @@ -133,31 +167,31 @@ LL | #[diag(code = E0123)] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): the `#[primary_span]` attribute can only be applied to fields of type `Span` or `MultiSpan` - --> $DIR/diagnostic-derive.rs:140:5 + --> $DIR/diagnostic-derive.rs:144:5 | LL | #[primary_span] | ^ error: derive(Diagnostic): `#[nonsense]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:148:5 + --> $DIR/diagnostic-derive.rs:152:5 | LL | #[nonsense] | ^ error: derive(Diagnostic): the `#[label(...)]` attribute can only be applied to fields of type `Span` or `MultiSpan` - --> $DIR/diagnostic-derive.rs:165:5 + --> $DIR/diagnostic-derive.rs:169:5 | LL | #[label(no_crate_label)] | ^ error: derive(Diagnostic): `name` doesn't refer to a field on this type - --> $DIR/diagnostic-derive.rs:173:46 + --> $DIR/diagnostic-derive.rs:177:46 | LL | #[suggestion(no_crate_suggestion, code = "{name}")] | ^^^^^^^^ error: invalid format string: expected `}` but string was terminated - --> $DIR/diagnostic-derive.rs:178:10 + --> $DIR/diagnostic-derive.rs:182:10 | LL | #[derive(Diagnostic)] | ^^^^^^^^^^ expected `}` in format string @@ -166,7 +200,7 @@ LL | #[derive(Diagnostic)] = note: this error originates in the derive macro `Diagnostic` (in Nightly builds, run with -Z macro-backtrace for more info) error: invalid format string: unmatched `}` found - --> $DIR/diagnostic-derive.rs:188:10 + --> $DIR/diagnostic-derive.rs:192:10 | LL | #[derive(Diagnostic)] | ^^^^^^^^^^ unmatched `}` in format string @@ -175,47 +209,47 @@ LL | #[derive(Diagnostic)] = note: this error originates in the derive macro `Diagnostic` (in Nightly builds, run with -Z macro-backtrace for more info) error: derive(Diagnostic): the `#[label(...)]` attribute can only be applied to fields of type `Span` or `MultiSpan` - --> $DIR/diagnostic-derive.rs:208:5 + --> $DIR/diagnostic-derive.rs:212:5 | LL | #[label(no_crate_label)] | ^ error: derive(Diagnostic): suggestion without `code = "..."` - --> $DIR/diagnostic-derive.rs:227:5 + --> $DIR/diagnostic-derive.rs:231:5 | LL | #[suggestion(no_crate_suggestion)] | ^ error: derive(Diagnostic): invalid nested attribute - --> $DIR/diagnostic-derive.rs:235:18 + --> $DIR/diagnostic-derive.rs:239:18 | LL | #[suggestion(nonsense = "bar")] | ^^^^^^^^ | - = help: only `style`, `code` and `applicability` are valid nested attributes + = help: only `no_span`, `style`, `code` and `applicability` are valid nested attributes error: derive(Diagnostic): suggestion without `code = "..."` - --> $DIR/diagnostic-derive.rs:235:5 + --> $DIR/diagnostic-derive.rs:239:5 | LL | #[suggestion(nonsense = "bar")] | ^ error: derive(Diagnostic): invalid nested attribute - --> $DIR/diagnostic-derive.rs:244:18 + --> $DIR/diagnostic-derive.rs:248:18 | LL | #[suggestion(msg = "bar")] | ^^^ | - = help: only `style`, `code` and `applicability` are valid nested attributes + = help: only `no_span`, `style`, `code` and `applicability` are valid nested attributes error: derive(Diagnostic): suggestion without `code = "..."` - --> $DIR/diagnostic-derive.rs:244:5 + --> $DIR/diagnostic-derive.rs:248:5 | LL | #[suggestion(msg = "bar")] | ^ error: derive(Diagnostic): wrong field type for suggestion - --> $DIR/diagnostic-derive.rs:267:5 + --> $DIR/diagnostic-derive.rs:271:5 | LL | #[suggestion(no_crate_suggestion, code = "This is suggested code")] | ^ @@ -223,79 +257,79 @@ LL | #[suggestion(no_crate_suggestion, code = "This is suggested code")] = help: `#[suggestion(...)]` should be applied to fields of type `Span` or `(Span, Applicability)` error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:283:24 + --> $DIR/diagnostic-derive.rs:287:24 | LL | suggestion: (Span, Span, Applicability), | ^^^^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:283:18 + --> $DIR/diagnostic-derive.rs:287:18 | LL | suggestion: (Span, Span, Applicability), | ^^^^ error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:291:33 + --> $DIR/diagnostic-derive.rs:295:33 | LL | suggestion: (Applicability, Applicability, Span), | ^^^^^^^^^^^^^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:291:18 + --> $DIR/diagnostic-derive.rs:295:18 | LL | suggestion: (Applicability, Applicability, Span), | ^^^^^^^^^^^^^ error: derive(Diagnostic): `#[label = ...]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:298:5 + --> $DIR/diagnostic-derive.rs:302:5 | LL | #[label = "bar"] | ^ error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:449:5 + --> $DIR/diagnostic-derive.rs:453:5 | LL | #[suggestion(no_crate_suggestion, code = "...", applicability = "maybe-incorrect")] | ^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:451:24 + --> $DIR/diagnostic-derive.rs:455:24 | LL | suggestion: (Span, Applicability), | ^^^^^^^^^^^^^ error: derive(Diagnostic): invalid applicability - --> $DIR/diagnostic-derive.rs:457:69 + --> $DIR/diagnostic-derive.rs:461:69 | LL | #[suggestion(no_crate_suggestion, code = "...", applicability = "batman")] | ^^^^^^^^ error: derive(Diagnostic): the `#[help(...)]` attribute can only be applied to fields of type `Span`, `MultiSpan`, `bool` or `()` - --> $DIR/diagnostic-derive.rs:524:5 + --> $DIR/diagnostic-derive.rs:528:5 | LL | #[help(no_crate_help)] | ^ error: derive(Diagnostic): a diagnostic slug must be the first argument to the attribute - --> $DIR/diagnostic-derive.rs:533:29 + --> $DIR/diagnostic-derive.rs:537:32 | LL | #[label(no_crate_label, foo)] - | ^^^ + | ^ -error: derive(Diagnostic): no nested attribute expected here - --> $DIR/diagnostic-derive.rs:541:29 +error: derive(Diagnostic): only `no_span` is a valid nested attribute + --> $DIR/diagnostic-derive.rs:545:29 | LL | #[label(no_crate_label, foo = "...")] | ^^^ -error: derive(Diagnostic): no nested attribute expected here - --> $DIR/diagnostic-derive.rs:549:29 +error: derive(Diagnostic): only `no_span` is a valid nested attribute + --> $DIR/diagnostic-derive.rs:553:29 | LL | #[label(no_crate_label, foo("..."))] | ^^^ error: derive(Diagnostic): `#[primary_span]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:561:5 + --> $DIR/diagnostic-derive.rs:565:5 | LL | #[primary_span] | ^ @@ -303,13 +337,13 @@ LL | #[primary_span] = help: the `primary_span` field attribute is not valid for lint diagnostics error: derive(Diagnostic): `#[error(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:581:1 + --> $DIR/diagnostic-derive.rs:585:1 | LL | #[error(no_crate_example, code = E0123)] | ^ error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:581:1 + --> $DIR/diagnostic-derive.rs:585:1 | LL | #[error(no_crate_example, code = E0123)] | ^ @@ -317,13 +351,13 @@ LL | #[error(no_crate_example, code = E0123)] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): `#[warn_(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:588:1 + --> $DIR/diagnostic-derive.rs:592:1 | LL | #[warn_(no_crate_example, code = E0123)] | ^ error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:588:1 + --> $DIR/diagnostic-derive.rs:592:1 | LL | #[warn_(no_crate_example, code = E0123)] | ^ @@ -331,13 +365,13 @@ LL | #[warn_(no_crate_example, code = E0123)] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): `#[lint(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:595:1 + --> $DIR/diagnostic-derive.rs:599:1 | LL | #[lint(no_crate_example, code = E0123)] | ^ error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:595:1 + --> $DIR/diagnostic-derive.rs:599:1 | LL | #[lint(no_crate_example, code = E0123)] | ^ @@ -345,13 +379,13 @@ LL | #[lint(no_crate_example, code = E0123)] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): `#[lint(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:602:1 + --> $DIR/diagnostic-derive.rs:606:1 | LL | #[lint(no_crate_example, code = E0123)] | ^ error: derive(Diagnostic): diagnostic slug not specified - --> $DIR/diagnostic-derive.rs:602:1 + --> $DIR/diagnostic-derive.rs:606:1 | LL | #[lint(no_crate_example, code = E0123)] | ^ @@ -359,19 +393,19 @@ LL | #[lint(no_crate_example, code = E0123)] = help: specify the slug as the first argument to the `#[diag(...)]` attribute, such as `#[diag(hir_analysis_example_error)]` error: derive(Diagnostic): attribute specified multiple times - --> $DIR/diagnostic-derive.rs:611:53 + --> $DIR/diagnostic-derive.rs:615:53 | LL | #[suggestion(no_crate_suggestion, code = "...", code = ",,,")] | ^^^^ | note: previously specified here - --> $DIR/diagnostic-derive.rs:611:39 + --> $DIR/diagnostic-derive.rs:615:39 | LL | #[suggestion(no_crate_suggestion, code = "...", code = ",,,")] | ^^^^ error: derive(Diagnostic): wrong types for suggestion - --> $DIR/diagnostic-derive.rs:620:24 + --> $DIR/diagnostic-derive.rs:624:24 | LL | suggestion: (Span, usize), | ^^^^^ @@ -379,7 +413,7 @@ LL | suggestion: (Span, usize), = help: `#[suggestion(...)]` on a tuple field must be applied to fields of type `(Span, Applicability)` error: derive(Diagnostic): wrong types for suggestion - --> $DIR/diagnostic-derive.rs:628:17 + --> $DIR/diagnostic-derive.rs:632:17 | LL | suggestion: (Span,), | ^^^^^^^ @@ -387,13 +421,13 @@ LL | suggestion: (Span,), = help: `#[suggestion(...)]` on a tuple field must be applied to fields of type `(Span, Applicability)` error: derive(Diagnostic): suggestion without `code = "..."` - --> $DIR/diagnostic-derive.rs:635:5 + --> $DIR/diagnostic-derive.rs:639:5 | LL | #[suggestion(no_crate_suggestion)] | ^ error: derive(Diagnostic): `#[multipart_suggestion(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:642:1 + --> $DIR/diagnostic-derive.rs:646:1 | LL | #[multipart_suggestion(no_crate_suggestion)] | ^ @@ -401,7 +435,7 @@ LL | #[multipart_suggestion(no_crate_suggestion)] = help: consider creating a `Subdiagnostic` instead error: derive(Diagnostic): `#[multipart_suggestion(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:645:1 + --> $DIR/diagnostic-derive.rs:649:1 | LL | #[multipart_suggestion()] | ^ @@ -409,7 +443,7 @@ LL | #[multipart_suggestion()] = help: consider creating a `Subdiagnostic` instead error: derive(Diagnostic): `#[multipart_suggestion(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:649:5 + --> $DIR/diagnostic-derive.rs:653:5 | LL | #[multipart_suggestion(no_crate_suggestion)] | ^ @@ -417,7 +451,7 @@ LL | #[multipart_suggestion(no_crate_suggestion)] = help: consider creating a `Subdiagnostic` instead error: derive(Diagnostic): `#[suggestion(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:657:1 + --> $DIR/diagnostic-derive.rs:661:1 | LL | #[suggestion(no_crate_suggestion, code = "...")] | ^ @@ -425,7 +459,7 @@ LL | #[suggestion(no_crate_suggestion, code = "...")] = help: `#[label]` and `#[suggestion]` can only be applied to fields error: derive(Diagnostic): `#[label]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:666:1 + --> $DIR/diagnostic-derive.rs:670:1 | LL | #[label] | ^ @@ -433,73 +467,73 @@ LL | #[label] = help: `#[label]` and `#[suggestion]` can only be applied to fields error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:700:5 + --> $DIR/diagnostic-derive.rs:704:5 | LL | #[subdiagnostic(bad)] | ^ error: derive(Diagnostic): `#[subdiagnostic = ...]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:708:5 + --> $DIR/diagnostic-derive.rs:712:5 | LL | #[subdiagnostic = "bad"] | ^ error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:716:5 + --> $DIR/diagnostic-derive.rs:720:5 | LL | #[subdiagnostic(bad, bad)] | ^ error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:724:5 + --> $DIR/diagnostic-derive.rs:728:5 | LL | #[subdiagnostic("bad")] | ^ error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:732:5 + --> $DIR/diagnostic-derive.rs:736:5 | LL | #[subdiagnostic(eager)] | ^ error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:740:5 + --> $DIR/diagnostic-derive.rs:744:5 | LL | #[subdiagnostic(eager)] | ^ error: derive(Diagnostic): `#[subdiagnostic(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:761:5 + --> $DIR/diagnostic-derive.rs:765:5 | LL | #[subdiagnostic(eager)] | ^ error: derive(Diagnostic): expected at least one string literal for `code(...)` - --> $DIR/diagnostic-derive.rs:792:23 + --> $DIR/diagnostic-derive.rs:796:23 | LL | #[suggestion(code())] | ^ error: derive(Diagnostic): `code(...)` must contain only string literals - --> $DIR/diagnostic-derive.rs:800:23 + --> $DIR/diagnostic-derive.rs:804:23 | LL | #[suggestion(code(foo))] | ^^^ error: unexpected token, expected `)` - --> $DIR/diagnostic-derive.rs:800:23 + --> $DIR/diagnostic-derive.rs:804:23 | LL | #[suggestion(code(foo))] | ^^^ error: expected string literal - --> $DIR/diagnostic-derive.rs:809:25 + --> $DIR/diagnostic-derive.rs:813:25 | LL | #[suggestion(code = 3)] | ^ error: derive(Diagnostic): `#[suggestion(...)]` is not a valid attribute - --> $DIR/diagnostic-derive.rs:824:5 + --> $DIR/diagnostic-derive.rs:828:5 | LL | #[suggestion(no_crate_suggestion, code = "")] | ^ @@ -515,13 +549,13 @@ LL | #[nonsense(no_crate_example, code = E0123)] | ^^^^^^^^ error: cannot find attribute `nonsense` in this scope - --> $DIR/diagnostic-derive.rs:148:7 + --> $DIR/diagnostic-derive.rs:152:7 | LL | #[nonsense] | ^^^^^^^^ error: cannot find attribute `error` in this scope - --> $DIR/diagnostic-derive.rs:581:3 + --> $DIR/diagnostic-derive.rs:585:3 | LL | #[error(no_crate_example, code = E0123)] | ^^^^^ @@ -533,7 +567,7 @@ LL | struct ErrorAttribute {} | error: cannot find attribute `warn_` in this scope - --> $DIR/diagnostic-derive.rs:588:3 + --> $DIR/diagnostic-derive.rs:592:3 | LL | #[warn_(no_crate_example, code = E0123)] | ^^^^^ @@ -545,7 +579,7 @@ LL + #[warn(no_crate_example, code = E0123)] | error: cannot find attribute `lint` in this scope - --> $DIR/diagnostic-derive.rs:595:3 + --> $DIR/diagnostic-derive.rs:599:3 | LL | #[lint(no_crate_example, code = E0123)] | ^^^^ @@ -557,7 +591,7 @@ LL + #[link(no_crate_example, code = E0123)] | error: cannot find attribute `lint` in this scope - --> $DIR/diagnostic-derive.rs:602:3 + --> $DIR/diagnostic-derive.rs:606:3 | LL | #[lint(no_crate_example, code = E0123)] | ^^^^ @@ -569,7 +603,7 @@ LL + #[link(no_crate_example, code = E0123)] | error: cannot find attribute `multipart_suggestion` in this scope - --> $DIR/diagnostic-derive.rs:642:3 + --> $DIR/diagnostic-derive.rs:646:3 | LL | #[multipart_suggestion(no_crate_suggestion)] | ^^^^^^^^^^^^^^^^^^^^ @@ -581,7 +615,7 @@ LL | struct MultipartSuggestion { | error: cannot find attribute `multipart_suggestion` in this scope - --> $DIR/diagnostic-derive.rs:645:3 + --> $DIR/diagnostic-derive.rs:649:3 | LL | #[multipart_suggestion()] | ^^^^^^^^^^^^^^^^^^^^ @@ -593,7 +627,7 @@ LL | struct MultipartSuggestion { | error: cannot find attribute `multipart_suggestion` in this scope - --> $DIR/diagnostic-derive.rs:649:7 + --> $DIR/diagnostic-derive.rs:653:7 | LL | #[multipart_suggestion(no_crate_suggestion)] | ^^^^^^^^^^^^^^^^^^^^ @@ -606,8 +640,16 @@ error[E0425]: cannot find value `nonsense` in module `crate::fluent_generated` LL | #[diag(nonsense, code = E0123)] | ^^^^^^^^ not found in `crate::fluent_generated` +error[E0425]: cannot find value `__code_34` in this scope + --> $DIR/diagnostic-derive.rs:810:10 + | +LL | #[derive(Diagnostic)] + | ^^^^^^^^^^ not found in this scope + | + = note: this error originates in the derive macro `Diagnostic` (in Nightly builds, run with -Z macro-backtrace for more info) + error[E0277]: the trait bound `Hello: IntoDiagArg` is not satisfied - --> $DIR/diagnostic-derive.rs:347:12 + --> $DIR/diagnostic-derive.rs:351:12 | LL | #[derive(Diagnostic)] | ---------- required by a bound introduced by this call @@ -628,7 +670,7 @@ note: required by a bound in `Diag::<'a, G>::arg` = note: in this macro invocation = note: this error originates in the macro `with_fn` (in Nightly builds, run with -Z macro-backtrace for more info) -error: aborting due to 80 previous errors +error: aborting due to 85 previous errors Some errors have detailed explanations: E0277, E0425. For more information about an error, try `rustc --explain E0277`. diff --git a/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.rs b/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.rs index b2e7b4c61daa0..941668ad602e4 100644 --- a/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.rs +++ b/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.rs @@ -85,7 +85,7 @@ struct F { #[derive(Subdiagnostic)] #[label(bug = "...")] -//~^ ERROR no nested attribute expected here +//~^ ERROR only `no_span` is a valid nested attribute //~| ERROR diagnostic slug must be first argument struct G { #[primary_span] @@ -95,7 +95,7 @@ struct G { #[derive(Subdiagnostic)] #[label("...")] -//~^ ERROR expected identifier +//~^ ERROR unexpected literal in nested attribute, expected ident struct H { #[primary_span] span: Span, @@ -104,7 +104,7 @@ struct H { #[derive(Subdiagnostic)] #[label(slug = 4)] -//~^ ERROR no nested attribute expected here +//~^ ERROR only `no_span` is a valid nested attribute //~| ERROR diagnostic slug must be first argument struct J { #[primary_span] @@ -114,7 +114,7 @@ struct J { #[derive(Subdiagnostic)] #[label(slug("..."))] -//~^ ERROR no nested attribute expected here +//~^ ERROR only `no_span` is a valid nested attribute //~| ERROR diagnostic slug must be first argument struct K { #[primary_span] @@ -133,7 +133,7 @@ struct M { #[derive(Subdiagnostic)] #[label(no_crate_example, code = "...")] -//~^ ERROR no nested attribute expected here +//~^ ERROR only `no_span` is a valid nested attribute struct N { #[primary_span] span: Span, @@ -142,7 +142,7 @@ struct N { #[derive(Subdiagnostic)] #[label(no_crate_example, applicability = "machine-applicable")] -//~^ ERROR no nested attribute expected here +//~^ ERROR only `no_span` is a valid nested attribute struct O { #[primary_span] span: Span, @@ -214,7 +214,7 @@ enum T { enum U { #[label(code = "...")] //~^ ERROR diagnostic slug must be first argument of a `#[label(...)]` attribute - //~| ERROR no nested attribute expected here + //~| ERROR only `no_span` is a valid nested attribute A { #[primary_span] span: Span, @@ -775,7 +775,7 @@ struct SuggestionStyleInvalid1 { #[derive(Subdiagnostic)] #[suggestion(no_crate_example, code = "", style = 42)] -//~^ ERROR expected string literal +//~^ ERROR expected `= "xxx"` struct SuggestionStyleInvalid2 { #[primary_span] sub: Span, @@ -791,7 +791,8 @@ struct SuggestionStyleInvalid3 { #[derive(Subdiagnostic)] #[suggestion(no_crate_example, code = "", style("foo"))] -//~^ ERROR expected `=` +//~^ ERROR expected `= "xxx"` +//~| ERROR expected `,` struct SuggestionStyleInvalid4 { #[primary_span] sub: Span, diff --git a/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.stderr b/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.stderr index 63634741e9347..c31da4421d255 100644 --- a/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.stderr +++ b/tests/ui-fulldeps/session-diagnostic/subdiagnostic-derive.stderr @@ -22,7 +22,7 @@ error: derive(Diagnostic): `#[label = ...]` is not a valid attribute LL | #[label = "..."] | ^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:87:9 | LL | #[label(bug = "...")] @@ -34,13 +34,13 @@ error: derive(Diagnostic): diagnostic slug must be first argument of a `#[label( LL | #[label(bug = "...")] | ^ -error: expected identifier +error: unexpected literal in nested attribute, expected ident --> $DIR/subdiagnostic-derive.rs:97:9 | LL | #[label("...")] | ^^^^^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:106:9 | LL | #[label(slug = 4)] @@ -52,7 +52,7 @@ error: derive(Diagnostic): diagnostic slug must be first argument of a `#[label( LL | #[label(slug = 4)] | ^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:116:9 | LL | #[label(slug("..."))] @@ -70,13 +70,13 @@ error: derive(Diagnostic): diagnostic slug must be first argument of a `#[label( LL | #[label()] | ^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:135:27 | LL | #[label(no_crate_example, code = "...")] | ^^^^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:144:27 | LL | #[label(no_crate_example, applicability = "machine-applicable")] @@ -112,7 +112,7 @@ error: derive(Diagnostic): `#[bar(...)]` is not a valid attribute LL | #[bar("...")] | ^ -error: derive(Diagnostic): no nested attribute expected here +error: derive(Diagnostic): only `no_span` is a valid nested attribute --> $DIR/subdiagnostic-derive.rs:215:13 | LL | #[label(code = "...")] @@ -175,10 +175,10 @@ LL | | } | |_^ error: derive(Diagnostic): a diagnostic slug must be the first argument to the attribute - --> $DIR/subdiagnostic-derive.rs:317:27 + --> $DIR/subdiagnostic-derive.rs:317:44 | LL | #[label(no_crate_example, no_crate::example)] - | ^^^^^^^^ + | ^ error: derive(Diagnostic): attribute specified multiple times --> $DIR/subdiagnostic-derive.rs:330:5 @@ -292,7 +292,7 @@ error: derive(Diagnostic): invalid nested attribute LL | #[multipart_suggestion(no_crate_example, code = "...", applicability = "machine-applicable")] | ^^^^ | - = help: only `style` and `applicability` are valid nested attributes + = help: only `no_span`, `style` and `applicability` are valid nested attributes error: derive(Diagnostic): multipart suggestion without any `#[suggestion_part(...)]` fields --> $DIR/subdiagnostic-derive.rs:530:1 @@ -381,10 +381,10 @@ LL | #[applicability] | ^ error: derive(Diagnostic): expected exactly one string literal for `code = ...` - --> $DIR/subdiagnostic-derive.rs:663:28 + --> $DIR/subdiagnostic-derive.rs:663:34 | LL | #[suggestion_part(code("foo"))] - | ^^^^^ + | ^ error: unexpected token, expected `)` --> $DIR/subdiagnostic-derive.rs:663:28 @@ -393,10 +393,10 @@ LL | #[suggestion_part(code("foo"))] | ^^^^^ error: derive(Diagnostic): expected exactly one string literal for `code = ...` - --> $DIR/subdiagnostic-derive.rs:673:28 + --> $DIR/subdiagnostic-derive.rs:673:41 | LL | #[suggestion_part(code("foo", "bar"))] - | ^^^^^ + | ^ error: unexpected token, expected `)` --> $DIR/subdiagnostic-derive.rs:673:28 @@ -405,10 +405,10 @@ LL | #[suggestion_part(code("foo", "bar"))] | ^^^^^ error: derive(Diagnostic): expected exactly one string literal for `code = ...` - --> $DIR/subdiagnostic-derive.rs:683:28 + --> $DIR/subdiagnostic-derive.rs:683:30 | LL | #[suggestion_part(code(3))] - | ^ + | ^ error: unexpected token, expected `)` --> $DIR/subdiagnostic-derive.rs:683:28 @@ -417,10 +417,10 @@ LL | #[suggestion_part(code(3))] | ^ error: derive(Diagnostic): expected exactly one string literal for `code = ...` - --> $DIR/subdiagnostic-derive.rs:693:28 + --> $DIR/subdiagnostic-derive.rs:693:29 | LL | #[suggestion_part(code())] - | ^ + | ^ error: expected string literal --> $DIR/subdiagnostic-derive.rs:702:30 @@ -464,26 +464,32 @@ LL | #[suggestion(no_crate_example, code = "", style = "foo")] | = help: valid styles are `normal`, `short`, `hidden`, `verbose` and `tool-only` -error: expected string literal - --> $DIR/subdiagnostic-derive.rs:777:51 +error: derive(Diagnostic): expected `= "xxx"` + --> $DIR/subdiagnostic-derive.rs:777:49 | LL | #[suggestion(no_crate_example, code = "", style = 42)] - | ^^ + | ^ error: derive(Diagnostic): a diagnostic slug must be the first argument to the attribute - --> $DIR/subdiagnostic-derive.rs:785:43 + --> $DIR/subdiagnostic-derive.rs:785:48 | LL | #[suggestion(no_crate_example, code = "", style)] - | ^^^^^ + | ^ + +error: derive(Diagnostic): expected `= "xxx"` + --> $DIR/subdiagnostic-derive.rs:793:48 + | +LL | #[suggestion(no_crate_example, code = "", style("foo"))] + | ^ -error: expected `=` +error: expected `,` --> $DIR/subdiagnostic-derive.rs:793:48 | LL | #[suggestion(no_crate_example, code = "", style("foo"))] | ^ error: derive(Diagnostic): `#[primary_span]` is not a valid attribute - --> $DIR/subdiagnostic-derive.rs:804:5 + --> $DIR/subdiagnostic-derive.rs:805:5 | LL | #[primary_span] | ^ @@ -492,7 +498,7 @@ LL | #[primary_span] = help: to create a suggestion with multiple spans, use `#[multipart_suggestion]` instead error: derive(Diagnostic): suggestion without `#[primary_span]` field - --> $DIR/subdiagnostic-derive.rs:801:1 + --> $DIR/subdiagnostic-derive.rs:802:1 | LL | #[suggestion(no_crate_example, code = "")] | ^ @@ -551,5 +557,5 @@ error: cannot find attribute `bar` in this scope LL | #[bar("...")] | ^^^ -error: aborting due to 83 previous errors +error: aborting due to 84 previous errors diff --git a/tests/ui/README.md b/tests/ui/README.md index 237cfb9c4f071..4c91f313a7351 100644 --- a/tests/ui/README.md +++ b/tests/ui/README.md @@ -10,23 +10,17 @@ These tests deal with *Application Binary Interfaces* (ABI), mostly relating to Tests for unsupported ABIs can be made cross-platform by using the `extern "rust-invalid"` ABI, which is considered unsupported on every platform. -## `tests/ui/alloc-error` - -These tests exercise alloc error handling. - -See . - ## `tests/ui/allocator` These tests exercise `#![feature(allocator_api)]` and the `#[global_allocator]` attribute. See [Allocator traits and `std::heap` #32838](https://github.com/rust-lang/rust/issues/32838). -## `tests/ui/annotate-moves` +## `tests/ui/alloc-error` -These tests exercise the `annotate-moves` feature. +These tests exercise alloc error handling. -See [`annotate-moves` | The Unstable book](https://doc.rust-lang.org/nightly/unstable-book/compiler-flags/annotate-moves.html) +See . ## `tests/ui/annotate-snippet` @@ -40,26 +34,20 @@ These tests exercise the [`annotate-snippets`]-based emitter implementation. These tests deal with anonymous parameters (no name, only type), a deprecated feature that becomes a hard error in Edition 2018. -## `tests/ui/any` - -These tests exercise the `try_as_dyn` feature. - -See [`core::any::try_as_dyn`](https://doc.rust-lang.org/nightly/core/any/fn.try_as_dyn.html) - ## `tests/ui/argfile`: External files providing command line arguments These tests exercise rustc reading command line arguments from an externally provided argfile (`@argsfile`). See [Implement `@argsfile` to read arguments from command line #63576](https://github.com/rust-lang/rust/issues/63576). -## `tests/ui/argument-suggestions`: Argument suggestions - -Calling a function with the wrong number of arguments causes a compilation failure, but the compiler is able to, in some cases, provide suggestions on how to fix the error, such as which arguments to add or delete. These tests exercise the quality of such diagnostics. - ## `tests/ui/array-slice-vec`: Arrays, slices and vectors Exercises various aspects surrounding basic collection types `[]`, `&[]` and `Vec`. E.g. type-checking, out-of-bounds indices, attempted instructions which are allowed in other programming languages, and more. +## `tests/ui/argument-suggestions`: Argument suggestions + +Calling a function with the wrong number of arguments causes a compilation failure, but the compiler is able to, in some cases, provide suggestions on how to fix the error, such as which arguments to add or delete. These tests exercise the quality of such diagnostics. + ## `tests/ui/asm`: `asm!` macro These tests exercise the `asm!` macro, which is used for adding inline assembly. @@ -184,10 +172,6 @@ See [RFC 3729: Hierarchy of Sized traits](https://github.com/rust-lang/rfcs/pull Defining custom auto traits with the `auto` keyword belongs to `tests/ui/auto-traits/` instead. -## `tests/ui/c-variadic`: C Variadic Function - -Tests for FFI with C varargs (`va_list`). - ## `tests/ui/cast/`: Type Casting Tests for type casting using the `as` operator. Includes tests for valid/invalid casts between primitive types, trait objects, and custom types. For example, check that trying to cast `i32` into `bool` results in a helpful error message. @@ -206,16 +190,16 @@ Tests for the `--check-cfg` compiler mechanism for checking cfg configurations, See [Checking conditional configurations | The rustc book](https://doc.rust-lang.org/rustc/check-cfg.html). +## `tests/ui/closure_context/`: Closure type inference in context + +Tests for closure type inference with respect to surrounding scopes, mostly quality of diagnostics. + ## `tests/ui/closure-expected-type/`: Closure type inference Tests targeted at how we deduce the types of closure arguments. This process is a result of some heuristics which take into account the *expected type* we have alongside the *actual types* that we get from inputs. **FIXME**: Appears to have significant overlap with `tests/ui/closure_context` and `tests/ui/functions-closures/closure-expected-type`. Needs further investigation. -## `tests/ui/closure_context`: Closure type inference in context - -Tests for closure type inference with respect to surrounding scopes, mostly quality of diagnostics. - ## `tests/ui/closures/`: General Closure Tests Any closure-focused tests that does not fit in the other more specific closure subdirectories belong here. E.g. syntax, `move`, lifetimes. @@ -260,14 +244,6 @@ See: This directory only contains one highly specific test. Other coinduction tests can be found down the deeply located `tests/ui/traits/next-solver/cycles/coinduction/` subdirectory. -## `tests/ui/collections` - -These tests exercise the `collections` library. - -See [`std::collections`](https://doc.rust-lang.org/std/collections/index.html) - -**FIXME**: consider merge with `tests/ui/btreemap` and `tests/ui/hashmap` - ## `tests/ui/command/`: `std::process::Command` This directory is actually for the standard library [`std::process::Command`](https://doc.rust-lang.org/std/process/struct.Command.html) type, where some tests are too difficult or inconvenient to write as unit tests or integration tests within the standard library itself. @@ -309,6 +285,10 @@ See: - [Tracking Issue for complex generic constants: `feature(generic_const_exprs)` #76560](https://github.com/rust-lang/rust/issues/76560) - [Const generics | Reference](https://doc.rust-lang.org/reference/items/generics.html#const-generics) +## `tests/ui/const_prop/`: Constant Propagation + +Tests exercising `ConstProp` mir-opt pass (mostly regression tests). See . + ## `tests/ui/const-ptr/`: Constant Pointers Tests exercise const raw pointers. E.g. pointer arithmetic, casting and dereferencing, always with a `const`. @@ -319,10 +299,6 @@ See: - [`std::ptr`](https://doc.rust-lang.org/std/ptr/index.html) - [Pointer types | Reference](https://doc.rust-lang.org/reference/types/pointer.html) -## `tests/ui/const_prop`: Constant Propagation - -Tests exercising `ConstProp` mir-opt pass (mostly regression tests). See . - ## `tests/ui/consts/`: General Constant Evaluation Anything to do with constants, which does not fit in the previous two `const` categories, goes here. This does not always imply use of the `const` keyword - other values considered constant, such as defining an enum variant as `enum Foo { Variant = 5 }` also counts. @@ -364,6 +340,10 @@ Tests for `#[bench]`, `#[test_case]` attributes and the `custom_test_frameworks` See [Tracking issue for eRFC 2318, Custom test frameworks #50297](https://github.com/rust-lang/rust/issues/50297). +## `tests/ui/c-variadic/`: C Variadic Function + +Tests for FFI with C varargs (`va_list`). + ## `tests/ui/cycle-trait/`: Trait Cycle Detection Tests for detection and handling of cyclic trait dependencies. @@ -400,18 +380,6 @@ These tests use the unstable command line option `query-dep-graph` to examine th Tests for `#[deprecated]` attribute and `deprecated_in_future` internal lint. -## `tests/ui/deref` - -Tests for `Deref` and `DerefMut` traits. - -## `tests/ui/deref-patterns`: `#![feature(deref_patterns)]` and `#![feature(string_deref_patterns)]` - -Tests for `#![feature(deref_patterns)]` and `#![feature(string_deref_patterns)]`. See [Deref patterns | The Unstable book](https://doc.rust-lang.org/nightly/unstable-book/language-features/deref-patterns.html). - -**FIXME**: May have some overlap with `tests/ui/pattern/deref-patterns`. - -See [`std::ops::Deref`](https://doc.rust-lang.org/std/ops/trait.Deref.html) and [`std::ops::DerefMut`](https://doc.rust-lang.org/std/ops/trait.DerefMut.html) - ## `tests/ui/derived-errors/`: Derived Error Messages Tests for quality of diagnostics involving suppression of cascading errors in some cases to avoid overwhelming the user. @@ -438,10 +406,6 @@ These tests revolve around command-line flags which change the way error/warning **FIXME**: Check redundancy with `annotate-snippet`, which is another emitter. -## `tests/ui/diagnostic-width`: `--diagnostic-width` - -Everything to do with `--diagnostic-width`. - ## `tests/ui/diagnostic_namespace/` Exercises `#[diagnostic::*]` namespaced attributes. See [RFC 3368 Diagnostic attribute namespace](https://github.com/rust-lang/rfcs/blob/master/text/3368-diagnostic-attribute-namespace.md). @@ -450,6 +414,10 @@ Exercises `#[diagnostic::*]` namespaced attributes. See [RFC 3368 Diagnostic att This directory contains tests and infrastructure related to the diagnostics system, including support for translatable diagnostics +## `tests/ui/diagnostic-width/`: `--diagnostic-width` + +Everything to do with `--diagnostic-width`. + ## `tests/ui/did_you_mean/` Tests for miscellaneous suggestions. @@ -462,10 +430,6 @@ Exercises diagnostics for when a code block attempts to gain ownership of a non- Exercises diagnostics for disallowed struct destructuring. -## `tests/ui/dist` - -Tests that require distribution artifacts. - ## `tests/ui/dollar-crate/`: `$crate` used with the `use` keyword There are a few rules - which are checked in this directory - to follow when using `$crate` - it must be used in the start of a `use` line and is a reserved identifier. @@ -497,6 +461,10 @@ Tests for dynamically-sized types (DSTs). See [Dynamically Sized Types | Referen Tests about duplicated symbol names and associated errors, such as using the `#[export_name]` attribute to rename a function with the same name as another function. +## `tests/ui/dynamically-sized-types/`: Dynamically Sized Types + +**FIXME**: should be coalesced with `tests/ui/dst`. + ## `tests/ui/dyn-compatibility/`: Dyn-compatibility Tests for dyn-compatibility of traits. @@ -518,20 +486,12 @@ The `dyn` keyword is used to highlight that calls to methods on the associated T See [`dyn` keyword](https://doc.rust-lang.org/std/keyword.dyn.html). -## `tests/ui/dynamically-sized-types`: Dynamically Sized Types - -**FIXME**: should be coalesced with `tests/ui/dst`. - ## `tests/ui/editions/`: Rust edition-specific peculiarities These tests run in specific Rust editions, such as Rust 2015 or Rust 2018, and check errors and functionality related to specific now-deprecated idioms and features. **FIXME**: Maybe regroup `rust-2018`, `rust-2021` and `rust-2024` under this umbrella? -## `tests/ui/eii`: Externally Implementable Items - -Exercises `eii` keyword. - ## `tests/ui/empty/`: Various tests related to the concept of "empty" **FIXME**: These tests need better homes, this is not very informative. @@ -611,10 +571,6 @@ See: - [`ffi_const` | The Unstable book](https://doc.rust-lang.org/unstable-book/language-features/ffi-const.html) - [`ffi_pure` | The Unstable book](https://doc.rust-lang.org/beta/unstable-book/language-features/ffi-pure.html) -## `tests/ui/float` - -See: [Tracking Issue for `f16` and `f128` float types #116909](https://github.com/rust-lang/rust/issues/116909) - ## `tests/ui/fmt/` Exercises the `format!` macro. @@ -623,16 +579,6 @@ Exercises the `format!` macro. A broad category of tests on functions. -## `tests/ui/fn_traits` - -Tests for `#![feature(fn_traits)]`. See [`fn_traits` | The Unstable book](https://doc.rust-lang.org/nightly/unstable-book/library-features/fn-traits.html). - -## `tests/ui/for-loop-while` - -Anything to do with loops and `for`, `loop` and `while` keywords to express them. - -**FIXME**: After `ui/for` is merged into this, also carry over its SUMMARY text. - ## `tests/ui/force-inlining/`: `#[rustc_force_inline]` Tests for `#[rustc_force_inline]`, which will force a function to always be labelled as inline by the compiler (it will be inserted at the point of its call instead of being used as a normal function call.) If the compiler is unable to inline the function, an error will be reported. See . @@ -643,6 +589,12 @@ Tests for `extern "C"` and `extern "Rust`. **FIXME**: Check for potential overlap/merge with `ui/c-variadic` and/or `ui/extern`. +## `tests/ui/for-loop-while/` + +Anything to do with loops and `for`, `loop` and `while` keywords to express them. + +**FIXME**: After `ui/for` is merged into this, also carry over its SUMMARY text. + ## `tests/ui/frontmatter/` Tests for `#![feature(frontmatter)]`. See [Tracking Issue for `frontmatter` #136889](https://github.com/rust-lang/rust/issues/136889). @@ -651,6 +603,12 @@ Tests for `#![feature(frontmatter)]`. See [Tracking Issue for `frontmatter` #136 Tests for diagnostics when there may be identically named types that need further qualifications to disambiguate. +## `tests/ui/functional-struct-update/` + +Functional Struct Update is the name for the idiom by which one can write `..` at the end of a struct literal expression to fill in all remaining fields of the struct literal by using `` as the source for them. + +See [RFC 0736 Privacy-respecting Functional Struct Update](https://github.com/rust-lang/rfcs/blob/master/text/0736-privacy-respecting-fru.md). + ## `tests/ui/function-pointer/` Tests on function pointers, such as testing their compatibility with higher-ranked trait bounds. @@ -660,12 +618,6 @@ See: - [Function pointer types | Reference](https://doc.rust-lang.org/reference/types/function-pointer.html) - [Higher-ranked trait bounds | Nomicon](https://doc.rust-lang.org/nomicon/hrtb.html) -## `tests/ui/functional-struct-update/` - -Functional Struct Update is the name for the idiom by which one can write `..` at the end of a struct literal expression to fill in all remaining fields of the struct literal by using `` as the source for them. - -See [RFC 0736 Privacy-respecting Functional Struct Update](https://github.com/rust-lang/rfcs/blob/master/text/0736-privacy-respecting-fru.md). - ## `tests/ui/functions-closures/` Tests on closures. See [Closure expressions | Reference](https://doc.rust-lang.org/reference/expressions/closure-expr.html). @@ -701,10 +653,6 @@ See: - [Higher-ranked trait bounds | rustc-dev-guide](https://rustc-dev-guide.rust-lang.org/traits/hrtb.html) - [Higher-ranked trait bounds | Nomicon](https://doc.rust-lang.org/nomicon/hrtb.html) -## `tests/ui/higher-ranked-trait-bounds` - -**FIXME**: move to `tests/ui/higher-ranked/trait-bounds` - ## `tests/ui/hygiene/` This seems to have been originally intended for "hygienic macros" - macros which work in all contexts, independent of what surrounds them. However, this category has grown into a mish-mash of many tests that may belong in the other directories. @@ -721,14 +669,14 @@ This test category revolves around trait objects with `Sized` having illegal ope Tests on lifetime elision in impl function signatures. See [Lifetime elision | Nomicon](https://doc.rust-lang.org/nomicon/lifetime-elision.html). -## `tests/ui/impl-trait/` - -Tests for trait impls. - ## `tests/ui/implied-bounds/` See [Implied bounds | Reference](https://doc.rust-lang.org/reference/trait-bounds.html#implied-bounds). +## `tests/ui/impl-trait/` + +Tests for trait impls. + ## `tests/ui/imports/` Tests for module system and imports. @@ -854,12 +802,6 @@ Broad directory on lifetimes, including proper specifiers, lifetimes not living These tests exercises numerical limits, such as `[[u8; 1518599999]; 1518600000]`. -## `tests/ui/link-native-libs/` - -Tests for `#[link(name = "", kind = "")]` and `-l` command line flag. - -See [Tracking Issue for linking modifiers for native libraries #81490](https://github.com/rust-lang/rust/issues/81490). - ## `tests/ui/linkage-attr/` Tests for the linkage attribute `#[linkage]` of `#![feature(linkage)]`. @@ -872,6 +814,12 @@ Tests on code which fails during the linking stage, or which contain arguments a See [Linkage | Reference](https://doc.rust-lang.org/reference/linkage.html). +## `tests/ui/link-native-libs/` + +Tests for `#[link(name = "", kind = "")]` and `-l` command line flag. + +See [Tracking Issue for linking modifiers for native libraries #81490](https://github.com/rust-lang/rust/issues/81490). + ## `tests/ui/lint/` Tests for the lint infrastructure, lint levels, lint reasons, etc. @@ -887,10 +835,6 @@ Tests exercising analysis for unused variables, unreachable statements, function **FIXME**: This seems unrelated to "liveness" as defined in the rustc compiler guide. Is this misleadingly named? https://rustc-dev-guide.rust-lang.org/borrow_check/region_inference/lifetime_parameters.html#liveness-and-universal-regions -## `tests/ui/loop-match` - -Tests for `loop` with `match` expressions. - ## `tests/ui/loops/` Tests on the `loop` construct. @@ -997,10 +941,6 @@ See [RFC 3550 New Range](https://github.com/rust-lang/rfcs/blob/master/text/3550 Tests for Non-lexical lifetimes. See [RFC 2094 NLL](https://rust-lang.github.io/rfcs/2094-nll.html). -## `tests/ui/no_std/` - -Tests for where the standard library is disabled through `#![no_std]`. - ## `tests/ui/non_modrs_mods/` Despite the size of the directory, this is a single test, spawning a sprawling `mod` dependency tree and checking its successful build. @@ -1013,6 +953,10 @@ A very similar principle as `non_modrs_mods`, but with an added inline `mod` sta **FIXME**: Consider merge with `tests/ui/modules/`, keeping the directory structure. +## `tests/ui/no_std/` + +Tests for where the standard library is disabled through `#![no_std]`. + ## `tests/ui/not-panic/` Tests checking various types, such as `&RefCell`, and whether they are not `UnwindSafe` as expected. @@ -1037,15 +981,6 @@ Contains a single test. Check that we reject the ancient Rust syntax `x <- y` an **FIXME**: Definitely should be rehomed, maybe to `tests/ui/deprecation/`. -## `tests/ui/offload` - -Exercises the offload feature. - -See: - -- [`std::offload` | rustc-dev-guide](https://rustc-dev-guide.rust-lang.org/offload/internals.html) -- [Tracking Issue for GPU-offload #131513](https://github.com/rust-lang/rust/issues/131513) - ## `tests/ui/offset-of/` Exercises the [`std::mem::offset_of` macro](https://doc.rust-lang.org/beta/std/mem/macro.offset_of.html). @@ -1104,16 +1039,6 @@ Broad category of tests surrounding patterns. See [Patterns | Reference](https:/ **FIXME**: Some overlap with `tests/ui/match/`. -## `tests/ui/pin` - -**FIXME**: Consider merging with `tests/ui/pin-macro`. - -## `tests/ui/pin-ergonomics` - -Exercises the `#![feature(pin_ergonomics)]` feature. - -See [Tracking issue for pin ergonomics #130494](https://github.com/rust-lang/rust/issues/130494) - ## `tests/ui/pin-macro/` See [`std::pin`](https://doc.rust-lang.org/std/pin/). @@ -1134,10 +1059,6 @@ Exercises the `-Z print-type-sizes` flag. Exercises on name privacy. E.g. the meaning of `pub`, `pub(crate)`, etc. -## `tests/ui/proc-macro/` - -Broad category of tests on proc-macros. See [Procedural Macros | Reference](https://doc.rust-lang.org/reference/procedural-macros.html). - ## `tests/ui/process/` Some standard library process tests which are hard to write within standard library crate tests. @@ -1146,6 +1067,10 @@ Some standard library process tests which are hard to write within standard libr Some standard library process termination tests which are hard to write within standard library crate tests. +## `tests/ui/proc-macro/` + +Broad category of tests on proc-macros. See [Procedural Macros | Reference](https://doc.rust-lang.org/reference/procedural-macros.html). + ## `tests/ui/ptr_ops/`: Using operations on a pointer Contains only 2 tests, related to a single issue, which was about an error caused by using addition on a pointer to `i8`. @@ -1178,12 +1103,6 @@ Reachability tests, primarily unreachable code and coercions into the never type **FIXME**: Check for overlap with `ui/liveness`. -## `tests/ui/reborrow` - -Exercises the `#![feature(reborrow)]` feature. - -See [Tracking Issue for Reborrow trait lang experiment #145612](https://github.com/rust-lang/rust/issues/145612) - ## `tests/ui/recursion/` Broad category of tests exercising recursions (compile test and run time), in functions, macros, `type` definitions, and more. @@ -1196,12 +1115,6 @@ Sets a recursion limit on recursive code. **FIXME**: Should be merged with `tests/ui/recursion/`. -## `tests/ui/reflection/` - -Exercises the `#![feature(type_info)]` feature. - -See [Tracking Issue for type_info #146922](https://github.com/rust-lang/rust/issues/146922) - ## `tests/ui/regions/` **FIXME**: Maybe merge with `ui/lifetimes`. @@ -1244,44 +1157,22 @@ Exercises `.rmeta` crate metadata and the `--emit=metadata` cli flag. Tests for runtime environment on which Rust programs are executed. E.g. Unix `SIGPIPE`. -## `tests/ui/rust-2018` - -Tests that exercise behaviors and features specific to the Rust 2018 edition. - -## `tests/ui/rust-2021` - -Tests that exercise behaviors and features specific to the Rust 2021 edition. +## `tests/ui/rust-{2018,2021,2024}/` -## `tests/ui/rust-2024` - -Tests that exercise behaviors and features specific to the Rust 2024 edition. +Tests that exercise behaviors and features that are specific to editions. ## `tests/ui/rustc-env` Tests on environmental variables that affect `rustc`. -## `tests/ui/rustc_public-ir-print` - -Some tests for pretty printing of rustc_public's IR. - ## `tests/ui/rustdoc` Hybrid tests that exercises `rustdoc`, and also some joint `rustdoc`/`rustc` interactions. -## `tests/ui/sanitize-attr` - -Tests for the `#![feature(sanitize)]` attribute. - -See [Sanitize | The Unstable Book](https://doc.rust-lang.org/unstable-book/language-features/sanitize.html). - ## `tests/ui/sanitizer/` Exercises sanitizer support. See [Sanitizer | The rustc book](https://doc.rust-lang.org/unstable-book/compiler-flags/sanitizer.html). -## `tests/ui/scalable-vectors` - -See [Tracking Issue for Scalable Vectors #145052](https://github.com/rust-lang/rust/issues/145052) - ## `tests/ui/self/`: `self` keyword Tests with erroneous ways of using `self`, such as using `this.x` syntax as seen in other languages, having it not be the first argument, or using it in a non-associated function (no `impl` or `trait`). It also contains correct uses of `self` which have previously been observed to cause ICEs. @@ -1320,12 +1211,6 @@ This is a test directory for the specific error case where a lifetime never gets While many tests here involve the `Sized` trait directly, some instead test, for example the slight variations between returning a zero-sized `Vec` and a `Vec` with one item, where one has no known type and the other does. -## `tests/ui/sized-hierarchy` - -Tests for `#![feature(sized_hierarchy)]` attribute. - -See [Tracking Issue for Sized Hierarchy #144404](https://github.com/rust-lang/rust/issues/144404) - ## `tests/ui/span/` An assorted collection of tests that involves specific diagnostic spans. @@ -1340,9 +1225,9 @@ See [Tracking issue for specialization (RFC 1210) #31844](https://github.com/rus Stability attributes used internally by the standard library: `#[stable()]` and `#[unstable()]`. -## `tests/ui/stack-probes` +## `tests/ui/rustc_public-ir-print/` -**FIXME**: Contains a single test, should likely be rehomed to `tests/ui/abi`. +Some tests for pretty printing of rustc_public's IR. ## `tests/ui/stack-protector/`: `-Z stack-protector` command line flag @@ -1474,10 +1359,6 @@ Tests surrounding [`std::mem::transmute`](https://doc.rust-lang.org/std/mem/fn.t Exercises compiler development support flag `-Z treat-err-as-bug`. -## `tests/ui/trimmed-paths/` - -Tests for the `#[doc(hidden)]` items. - ## `tests/ui/trivial-bounds/` `#![feature(trivial_bounds)]`. See [RFC 2056 Allow trivial where clause constraints](https://github.com/rust-lang/rfcs/blob/master/text/2056-allow-trivial-where-clause-constraints.md). @@ -1512,13 +1393,17 @@ Tests for `type` aliases in the context of `enum` variants, such as that applied `#![feature(type_alias_impl_trait)]`. See [Type Alias Impl Trait | The Unstable book](https://doc.rust-lang.org/nightly/unstable-book/language-features/type-alias-impl-trait.html). +## `tests/ui/typeck/` + +General collection of type checking related tests. + ## `tests/ui/type-inference/` General collection of type inference related tests. -## `tests/ui/typeck` +## `tests/ui/typeof/` -General collection of type checking related tests. +`typeof` keyword, reserved but unimplemented. ## `tests/ui/ufcs/` @@ -1598,11 +1483,7 @@ See: **FIXME**: Seems to also contain more generic tests that fit in `tests/ui/unsized/`. -## `tests/ui/unstable-feature-bound` - -Tests for gating and diagnostics when unstable features are used. - -## `tests/ui/unused-crate-deps` +## `tests/ui/unused-crate-deps/` Exercises the `unused_crate_dependencies` lint. diff --git a/tests/ui/associated-type-bounds/duplicate-bound-err.stderr b/tests/ui/associated-type-bounds/duplicate-bound-err.stderr index 695bb8ad60666..80db2cdb933f4 100644 --- a/tests/ui/associated-type-bounds/duplicate-bound-err.stderr +++ b/tests/ui/associated-type-bounds/duplicate-bound-err.stderr @@ -108,18 +108,6 @@ LL | fn foo() -> impl Iterator { LL | [2u32].into_iter() | ------------------ return type was inferred to be `std::array::IntoIter` here -error[E0271]: expected `impl Iterator` to be an iterator that yields `i32`, but it yields `u32` - --> $DIR/duplicate-bound-err.rs:111:17 - | -LL | fn foo() -> impl Iterator { - | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected `i32`, found `u32` - | -note: required by a bound in `Trait3::foo::{anon_assoc#0}` - --> $DIR/duplicate-bound-err.rs:107:31 - | -LL | fn foo() -> impl Iterator; - | ^^^^^^^^^^ required by this bound in `Trait3::foo::{anon_assoc#0}` - error[E0719]: the value of the associated type `Item` in trait `Iterator` is already specified --> $DIR/duplicate-bound-err.rs:87:42 | @@ -170,6 +158,18 @@ LL | type MustFail4 = dyn Trait2; | | | `ASSOC` bound here first +error[E0271]: expected `impl Iterator` to be an iterator that yields `i32`, but it yields `u32` + --> $DIR/duplicate-bound-err.rs:111:17 + | +LL | fn foo() -> impl Iterator { + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ expected `i32`, found `u32` + | +note: required by a bound in `Trait3::foo::{anon_assoc#0}` + --> $DIR/duplicate-bound-err.rs:107:31 + | +LL | fn foo() -> impl Iterator; + | ^^^^^^^^^^ required by this bound in `Trait3::foo::{anon_assoc#0}` + error[E0271]: expected `Empty` to be an iterator that yields `i32`, but it yields `u32` --> $DIR/duplicate-bound-err.rs:119:16 | diff --git a/tests/ui/attributes/attr-on-mac-call.stderr b/tests/ui/attributes/attr-on-mac-call.stderr index 3bb50f2d6f654..1aeec463c71cf 100644 --- a/tests/ui/attributes/attr-on-mac-call.stderr +++ b/tests/ui/attributes/attr-on-mac-call.stderr @@ -55,7 +55,7 @@ LL | #[deprecated] | ^^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements warning: `#[inline]` attribute cannot be used on macro calls --> $DIR/attr-on-mac-call.rs:24:5 @@ -136,7 +136,7 @@ LL | #[deprecated] | ^^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements warning: `#[automatically_derived]` attribute cannot be used on macro calls --> $DIR/attr-on-mac-call.rs:51:5 @@ -163,7 +163,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_implicit_prelude]` attribute cannot be used on macro calls --> $DIR/attr-on-mac-call.rs:60:5 diff --git a/tests/ui/delegation/unsupported.current.stderr b/tests/ui/delegation/unsupported.current.stderr index 9bc2eec068fef..2bb0633621f21 100644 --- a/tests/ui/delegation/unsupported.current.stderr +++ b/tests/ui/delegation/unsupported.current.stderr @@ -29,7 +29,11 @@ note: ...which requires comparing an impl and trait method signature, inferring LL | reuse ToReuse::opaque_ret; | ^^^^^^^^^^ = note: ...which again requires computing type of `opaque::::opaque_ret::{anon_assoc#0}`, completing the cycle - = note: cycle used when checking effective visibilities +note: cycle used when checking assoc item `opaque::::opaque_ret` is compatible with trait definition + --> $DIR/unsupported.rs:33:24 + | +LL | reuse ToReuse::opaque_ret; + | ^^^^^^^^^^ = note: see https://rustc-dev-guide.rust-lang.org/overview.html#queries and https://rustc-dev-guide.rust-lang.org/query.html for more information error[E0283]: type annotations needed diff --git a/tests/ui/delegation/unsupported.next.stderr b/tests/ui/delegation/unsupported.next.stderr index 08bc49513bad5..1665d1f39d6d0 100644 --- a/tests/ui/delegation/unsupported.next.stderr +++ b/tests/ui/delegation/unsupported.next.stderr @@ -25,7 +25,7 @@ note: ...which requires comparing an impl and trait method signature, inferring LL | reuse ToReuse::opaque_ret; | ^^^^^^^^^^ = note: ...which again requires computing type of `opaque::::opaque_ret::{anon_assoc#0}`, completing the cycle - = note: cycle used when checking effective visibilities + = note: cycle used when computing implied outlives bounds for `::opaque_ret::{anon_assoc#0}` (hack disabled = false) = note: see https://rustc-dev-guide.rust-lang.org/overview.html#queries and https://rustc-dev-guide.rust-lang.org/query.html for more information error[E0283]: type annotations needed diff --git a/tests/ui/deprecation/deprecated-expr-precedence.stderr b/tests/ui/deprecation/deprecated-expr-precedence.stderr index bd575e6b6276c..c3124cf86ef49 100644 --- a/tests/ui/deprecation/deprecated-expr-precedence.stderr +++ b/tests/ui/deprecation/deprecated-expr-precedence.stderr @@ -5,7 +5,7 @@ LL | #[deprecated] 0 | ^^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements = note: requested on the command line with `-W unused-attributes` error[E0308]: mismatched types diff --git a/tests/ui/deprecation/deprecation-sanity.stderr b/tests/ui/deprecation/deprecation-sanity.stderr index 427d14d89c19f..a4dc9f23d3d2f 100644 --- a/tests/ui/deprecation/deprecation-sanity.stderr +++ b/tests/ui/deprecation/deprecation-sanity.stderr @@ -83,7 +83,7 @@ LL | #[deprecated = "hello"] | ^^^^^^^^^^^^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements = note: `#[deny(useless_deprecated)]` on by default error: aborting due to 10 previous errors diff --git a/tests/ui/expr/if/bad-if-let-suggestion.rs b/tests/ui/expr/if/bad-if-let-suggestion.rs index c462e32c9ef55..b0d0676e1ea75 100644 --- a/tests/ui/expr/if/bad-if-let-suggestion.rs +++ b/tests/ui/expr/if/bad-if-let-suggestion.rs @@ -1,6 +1,8 @@ fn a() { if let x = 1 && i = 2 {} - //~^ ERROR expected expression, found `let` statement + //~^ ERROR cannot find value `i` in this scope + //~| ERROR mismatched types + //~| ERROR expected expression, found `let` statement } fn b() { diff --git a/tests/ui/expr/if/bad-if-let-suggestion.stderr b/tests/ui/expr/if/bad-if-let-suggestion.stderr index d0838fec67d66..4244a3bb06eea 100644 --- a/tests/ui/expr/if/bad-if-let-suggestion.stderr +++ b/tests/ui/expr/if/bad-if-let-suggestion.stderr @@ -15,7 +15,13 @@ LL | if let x = 1 && i == 2 {} | + error[E0425]: cannot find value `i` in this scope - --> $DIR/bad-if-let-suggestion.rs:7:9 + --> $DIR/bad-if-let-suggestion.rs:2:21 + | +LL | if let x = 1 && i = 2 {} + | ^ not found in this scope + +error[E0425]: cannot find value `i` in this scope + --> $DIR/bad-if-let-suggestion.rs:9:9 | LL | fn a() { | ------ similarly named function `a` defined here @@ -30,7 +36,7 @@ LL + if (a + j) = i {} | error[E0425]: cannot find value `j` in this scope - --> $DIR/bad-if-let-suggestion.rs:7:13 + --> $DIR/bad-if-let-suggestion.rs:9:13 | LL | fn a() { | ------ similarly named function `a` defined here @@ -45,7 +51,7 @@ LL + if (i + a) = i {} | error[E0425]: cannot find value `i` in this scope - --> $DIR/bad-if-let-suggestion.rs:7:18 + --> $DIR/bad-if-let-suggestion.rs:9:18 | LL | fn a() { | ------ similarly named function `a` defined here @@ -60,7 +66,7 @@ LL + if (i + j) = a {} | error[E0425]: cannot find value `x` in this scope - --> $DIR/bad-if-let-suggestion.rs:14:8 + --> $DIR/bad-if-let-suggestion.rs:16:8 | LL | fn a() { | ------ similarly named function `a` defined here @@ -74,6 +80,18 @@ LL - if x[0] = 1 {} LL + if a[0] = 1 {} | -error: aborting due to 5 previous errors +error[E0308]: mismatched types + --> $DIR/bad-if-let-suggestion.rs:2:8 + | +LL | if let x = 1 && i = 2 {} + | ^^^^^^^^^^^^^^^^^^ expected `bool`, found `()` + | +help: you might have meant to compare for equality + | +LL | if let x = 1 && i == 2 {} + | + + +error: aborting due to 7 previous errors -For more information about this error, try `rustc --explain E0425`. +Some errors have detailed explanations: E0308, E0425. +For more information about an error, try `rustc --explain E0308`. diff --git a/tests/ui/feature-gates/feature-gate-mut-ref.rs b/tests/ui/feature-gates/feature-gate-mut-ref.rs index 74b1fba5dfea2..752ae35d8a9ae 100644 --- a/tests/ui/feature-gates/feature-gate-mut-ref.rs +++ b/tests/ui/feature-gates/feature-gate-mut-ref.rs @@ -10,7 +10,4 @@ fn main() { let mut ref x = 10; //~ ERROR [E0658] #[cfg(false)] let mut ref mut y = 10; //~ ERROR [E0658] - - struct Foo { x: i32 } - let Foo { mut ref x } = Foo { x: 10 }; //~ ERROR [E0658] } diff --git a/tests/ui/feature-gates/feature-gate-mut-ref.stderr b/tests/ui/feature-gates/feature-gate-mut-ref.stderr index 921ff878bf4d8..d3eb674e92dec 100644 --- a/tests/ui/feature-gates/feature-gate-mut-ref.stderr +++ b/tests/ui/feature-gates/feature-gate-mut-ref.stderr @@ -38,16 +38,6 @@ LL | let mut ref mut y = 10; = help: add `#![feature(mut_ref)]` to the crate attributes to enable = note: this compiler was built on YYYY-MM-DD; consider upgrading it if it is out of date -error[E0658]: mutable by-reference bindings are experimental - --> $DIR/feature-gate-mut-ref.rs:15:15 - | -LL | let Foo { mut ref x } = Foo { x: 10 }; - | ^^^^^^^^^ - | - = note: see issue #123076 for more information - = help: add `#![feature(mut_ref)]` to the crate attributes to enable - = note: this compiler was built on YYYY-MM-DD; consider upgrading it if it is out of date - -error: aborting due to 5 previous errors +error: aborting due to 4 previous errors For more information about this error, try `rustc --explain E0658`. diff --git a/tests/ui/feature-gates/issue-43106-gating-of-builtin-attrs.stderr b/tests/ui/feature-gates/issue-43106-gating-of-builtin-attrs.stderr index d69daf45b3524..fd90fe4c837bc 100644 --- a/tests/ui/feature-gates/issue-43106-gating-of-builtin-attrs.stderr +++ b/tests/ui/feature-gates/issue-43106-gating-of-builtin-attrs.stderr @@ -1055,7 +1055,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[must_use]` attribute cannot be used on modules --> $DIR/issue-43106-gating-of-builtin-attrs.rs:766:17 @@ -1064,7 +1064,7 @@ LL | mod inner { #![must_use] } | ^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[must_use]` attribute cannot be used on type aliases --> $DIR/issue-43106-gating-of-builtin-attrs.rs:775:5 @@ -1073,7 +1073,7 @@ LL | #[must_use] type T = S; | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[must_use]` attribute cannot be used on inherent impl blocks --> $DIR/issue-43106-gating-of-builtin-attrs.rs:780:5 @@ -1082,7 +1082,7 @@ LL | #[must_use] impl S { } | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: crate-level attribute should be an inner attribute: add an exclamation mark: `#![windows_subsystem]` --> $DIR/issue-43106-gating-of-builtin-attrs.rs:786:1 @@ -1635,7 +1635,7 @@ LL | #![must_use] | ^^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: 175 warnings emitted diff --git a/tests/ui/issues/issue-17651.rs b/tests/ui/issues/issue-17651.rs new file mode 100644 index 0000000000000..7629a5a3be1ea --- /dev/null +++ b/tests/ui/issues/issue-17651.rs @@ -0,0 +1,7 @@ +// Test that moves of unsized values within closures are caught +// and rejected. + +fn main() { + (|| Box::new(*(&[0][..])))(); + //~^ ERROR the size for values of type +} diff --git a/tests/ui/issues/issue-17651.stderr b/tests/ui/issues/issue-17651.stderr new file mode 100644 index 0000000000000..9519507320d82 --- /dev/null +++ b/tests/ui/issues/issue-17651.stderr @@ -0,0 +1,20 @@ +error[E0277]: the size for values of type `[{integer}]` cannot be known at compilation time + --> $DIR/issue-17651.rs:5:18 + | +LL | (|| Box::new(*(&[0][..])))(); + | -------- ^^^^^^^^^^^ doesn't have a size known at compile-time + | | + | required by a bound introduced by this call + | + = help: the trait `Sized` is not implemented for `[{integer}]` +note: required by a bound in `Box::::new` + --> $SRC_DIR/alloc/src/boxed.rs:LL:COL +help: references are always `Sized`, even if they point to unsized data; consider not dereferencing the expression + | +LL - (|| Box::new(*(&[0][..])))(); +LL + (|| Box::new((&[0][..])))(); + | + +error: aborting due to 1 previous error + +For more information about this error, try `rustc --explain E0277`. diff --git a/tests/ui/issues/issue-18767.rs b/tests/ui/issues/issue-18767.rs new file mode 100644 index 0000000000000..87762406da607 --- /dev/null +++ b/tests/ui/issues/issue-18767.rs @@ -0,0 +1,10 @@ +//@ run-pass +// Test that regionck uses the right memcat for patterns in for loops +// and doesn't ICE. + + +fn main() { + for &&x in Some(&0_usize).iter() { + assert_eq!(x, 0) + } +} diff --git a/tests/ui/issues/issue-2848.rs b/tests/ui/issues/issue-2848.rs new file mode 100644 index 0000000000000..8499459cec269 --- /dev/null +++ b/tests/ui/issues/issue-2848.rs @@ -0,0 +1,18 @@ +#[allow(non_camel_case_types)] + +mod bar { + pub enum foo { + alpha, + beta, + charlie + } +} + +fn main() { + use bar::foo::{alpha, charlie}; + match alpha { + alpha | beta => {} //~ ERROR variable `beta` is not bound in all patterns + //~^ ERROR `beta` is named the same as one of the variants + charlie => {} + } +} diff --git a/tests/ui/issues/issue-2848.stderr b/tests/ui/issues/issue-2848.stderr new file mode 100644 index 0000000000000..1cef27c34635e --- /dev/null +++ b/tests/ui/issues/issue-2848.stderr @@ -0,0 +1,20 @@ +error[E0408]: variable `beta` is not bound in all patterns + --> $DIR/issue-2848.rs:14:7 + | +LL | alpha | beta => {} + | ^^^^^ ---- variable not in all patterns + | | + | pattern doesn't bind `beta` + +error[E0170]: pattern binding `beta` is named the same as one of the variants of the type `bar::foo` + --> $DIR/issue-2848.rs:14:15 + | +LL | alpha | beta => {} + | ^^^^ help: to match on the variant, qualify the path: `bar::foo::beta` + | + = note: `#[deny(bindings_with_variant_name)]` on by default + +error: aborting due to 2 previous errors + +Some errors have detailed explanations: E0170, E0408. +For more information about an error, try `rustc --explain E0170`. diff --git a/tests/ui/issues/issue-2849.rs b/tests/ui/issues/issue-2849.rs new file mode 100644 index 0000000000000..787ab0e289604 --- /dev/null +++ b/tests/ui/issues/issue-2849.rs @@ -0,0 +1,8 @@ +enum Foo { Alpha, Beta(isize) } + +fn main() { + match Foo::Alpha { + Foo::Alpha | Foo::Beta(i) => {} + //~^ ERROR variable `i` is not bound in all patterns + } +} diff --git a/tests/ui/issues/issue-2849.stderr b/tests/ui/issues/issue-2849.stderr new file mode 100644 index 0000000000000..ef5cdb42e6106 --- /dev/null +++ b/tests/ui/issues/issue-2849.stderr @@ -0,0 +1,11 @@ +error[E0408]: variable `i` is not bound in all patterns + --> $DIR/issue-2849.rs:5:7 + | +LL | Foo::Alpha | Foo::Beta(i) => {} + | ^^^^^^^^^^ - variable not in all patterns + | | + | pattern doesn't bind `i` + +error: aborting due to 1 previous error + +For more information about this error, try `rustc --explain E0408`. diff --git a/tests/ui/issues/issue-29740.rs b/tests/ui/issues/issue-29740.rs new file mode 100644 index 0000000000000..e26e2c882dc3a --- /dev/null +++ b/tests/ui/issues/issue-29740.rs @@ -0,0 +1,317 @@ +//@ check-pass +#![allow(dead_code)] +// Regression test for #29740. Inefficient MIR matching algorithms +// generated way too much code for this sort of case, leading to OOM. +#![allow(non_snake_case)] + +pub mod KeyboardEventConstants { + pub const DOM_KEY_LOCATION_STANDARD: u32 = 0; + pub const DOM_KEY_LOCATION_LEFT: u32 = 1; + pub const DOM_KEY_LOCATION_RIGHT: u32 = 2; + pub const DOM_KEY_LOCATION_NUMPAD: u32 = 3; +} // mod KeyboardEventConstants + +pub enum Key { + Space, + Apostrophe, + Comma, + Minus, + Period, + Slash, + Num0, + Num1, + Num2, + Num3, + Num4, + Num5, + Num6, + Num7, + Num8, + Num9, + Semicolon, + Equal, + A, + B, + C, + D, + E, + F, + G, + H, + I, + J, + K, + L, + M, + N, + O, + P, + Q, + R, + S, + T, + U, + V, + W, + X, + Y, + Z, + LeftBracket, + Backslash, + RightBracket, + GraveAccent, + World1, + World2, + + Escape, + Enter, + Tab, + Backspace, + Insert, + Delete, + Right, + Left, + Down, + Up, + PageUp, + PageDown, + Home, + End, + CapsLock, + ScrollLock, + NumLock, + PrintScreen, + Pause, + F1, + F2, + F3, + F4, + F5, + F6, + F7, + F8, + F9, + F10, + F11, + F12, + F13, + F14, + F15, + F16, + F17, + F18, + F19, + F20, + F21, + F22, + F23, + F24, + F25, + Kp0, + Kp1, + Kp2, + Kp3, + Kp4, + Kp5, + Kp6, + Kp7, + Kp8, + Kp9, + KpDecimal, + KpDivide, + KpMultiply, + KpSubtract, + KpAdd, + KpEnter, + KpEqual, + LeftShift, + LeftControl, + LeftAlt, + LeftSuper, + RightShift, + RightControl, + RightAlt, + RightSuper, + Menu, +} + +fn key_from_string(key_string: &str, location: u32) -> Option { + match key_string { + " " => Some(Key::Space), + "\"" => Some(Key::Apostrophe), + "'" => Some(Key::Apostrophe), + "<" => Some(Key::Comma), + "," => Some(Key::Comma), + "_" => Some(Key::Minus), + "-" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Minus), + ">" => Some(Key::Period), + "." if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Period), + "?" => Some(Key::Slash), + "/" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Slash), + "~" => Some(Key::GraveAccent), + "`" => Some(Key::GraveAccent), + ")" => Some(Key::Num0), + "0" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num0), + "!" => Some(Key::Num1), + "1" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num1), + "@" => Some(Key::Num2), + "2" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num2), + "#" => Some(Key::Num3), + "3" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num3), + "$" => Some(Key::Num4), + "4" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num4), + "%" => Some(Key::Num5), + "5" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num5), + "^" => Some(Key::Num6), + "6" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num6), + "&" => Some(Key::Num7), + "7" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num7), + "*" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num8), + "8" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num8), + "(" => Some(Key::Num9), + "9" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Num9), + ":" => Some(Key::Semicolon), + ";" => Some(Key::Semicolon), + "+" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Equal), + "=" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD => Some(Key::Equal), + "A" => Some(Key::A), + "a" => Some(Key::A), + "B" => Some(Key::B), + "b" => Some(Key::B), + "C" => Some(Key::C), + "c" => Some(Key::C), + "D" => Some(Key::D), + "d" => Some(Key::D), + "E" => Some(Key::E), + "e" => Some(Key::E), + "F" => Some(Key::F), + "f" => Some(Key::F), + "G" => Some(Key::G), + "g" => Some(Key::G), + "H" => Some(Key::H), + "h" => Some(Key::H), + "I" => Some(Key::I), + "i" => Some(Key::I), + "J" => Some(Key::J), + "j" => Some(Key::J), + "K" => Some(Key::K), + "k" => Some(Key::K), + "L" => Some(Key::L), + "l" => Some(Key::L), + "M" => Some(Key::M), + "m" => Some(Key::M), + "N" => Some(Key::N), + "n" => Some(Key::N), + "O" => Some(Key::O), + "o" => Some(Key::O), + "P" => Some(Key::P), + "p" => Some(Key::P), + "Q" => Some(Key::Q), + "q" => Some(Key::Q), + "R" => Some(Key::R), + "r" => Some(Key::R), + "S" => Some(Key::S), + "s" => Some(Key::S), + "T" => Some(Key::T), + "t" => Some(Key::T), + "U" => Some(Key::U), + "u" => Some(Key::U), + "V" => Some(Key::V), + "v" => Some(Key::V), + "W" => Some(Key::W), + "w" => Some(Key::W), + "X" => Some(Key::X), + "x" => Some(Key::X), + "Y" => Some(Key::Y), + "y" => Some(Key::Y), + "Z" => Some(Key::Z), + "z" => Some(Key::Z), + "{" => Some(Key::LeftBracket), + "[" => Some(Key::LeftBracket), + "|" => Some(Key::Backslash), + "\\" => Some(Key::Backslash), + "}" => Some(Key::RightBracket), + "]" => Some(Key::RightBracket), + "Escape" => Some(Key::Escape), + "Enter" if location == KeyboardEventConstants::DOM_KEY_LOCATION_STANDARD + => Some(Key::Enter), + "Tab" => Some(Key::Tab), + "Backspace" => Some(Key::Backspace), + "Insert" => Some(Key::Insert), + "Delete" => Some(Key::Delete), + "ArrowRight" => Some(Key::Right), + "ArrowLeft" => Some(Key::Left), + "ArrowDown" => Some(Key::Down), + "ArrowUp" => Some(Key::Up), + "PageUp" => Some(Key::PageUp), + "PageDown" => Some(Key::PageDown), + "Home" => Some(Key::Home), + "End" => Some(Key::End), + "CapsLock" => Some(Key::CapsLock), + "ScrollLock" => Some(Key::ScrollLock), + "NumLock" => Some(Key::NumLock), + "PrintScreen" => Some(Key::PrintScreen), + "Pause" => Some(Key::Pause), + "F1" => Some(Key::F1), + "F2" => Some(Key::F2), + "F3" => Some(Key::F3), + "F4" => Some(Key::F4), + "F5" => Some(Key::F5), + "F6" => Some(Key::F6), + "F7" => Some(Key::F7), + "F8" => Some(Key::F8), + "F9" => Some(Key::F9), + "F10" => Some(Key::F10), + "F11" => Some(Key::F11), + "F12" => Some(Key::F12), + "F13" => Some(Key::F13), + "F14" => Some(Key::F14), + "F15" => Some(Key::F15), + "F16" => Some(Key::F16), + "F17" => Some(Key::F17), + "F18" => Some(Key::F18), + "F19" => Some(Key::F19), + "F20" => Some(Key::F20), + "F21" => Some(Key::F21), + "F22" => Some(Key::F22), + "F23" => Some(Key::F23), + "F24" => Some(Key::F24), + "F25" => Some(Key::F25), + "0" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp0), + "1" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp1), + "2" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp2), + "3" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp3), + "4" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp4), + "5" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp5), + "6" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp6), + "7" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp7), + "8" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp8), + "9" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::Kp9), + "." if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpDecimal), + "/" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpDivide), + "*" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpMultiply), + "-" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpSubtract), + "+" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpAdd), + "Enter" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD + => Some(Key::KpEnter), + "=" if location == KeyboardEventConstants::DOM_KEY_LOCATION_NUMPAD => Some(Key::KpEqual), + "Shift" if location == KeyboardEventConstants::DOM_KEY_LOCATION_LEFT + => Some(Key::LeftShift), + "Control" if location == KeyboardEventConstants::DOM_KEY_LOCATION_LEFT + => Some(Key::LeftControl), + "Alt" if location == KeyboardEventConstants::DOM_KEY_LOCATION_LEFT => Some(Key::LeftAlt), + "Super" if location == KeyboardEventConstants::DOM_KEY_LOCATION_LEFT + => Some(Key::LeftSuper), + "Shift" if location == KeyboardEventConstants::DOM_KEY_LOCATION_RIGHT + => Some(Key::RightShift), + "Control" if location == KeyboardEventConstants::DOM_KEY_LOCATION_RIGHT + => Some(Key::RightControl), + "Alt" if location == KeyboardEventConstants::DOM_KEY_LOCATION_RIGHT => Some(Key::RightAlt), + "Super" if location == KeyboardEventConstants::DOM_KEY_LOCATION_RIGHT + => Some(Key::RightSuper), + "ContextMenu" => Some(Key::Menu), + _ => None + } +} + +fn main() { } diff --git a/tests/ui/issues/issue-3038.rs b/tests/ui/issues/issue-3038.rs new file mode 100644 index 0000000000000..cf3ba009f00ce --- /dev/null +++ b/tests/ui/issues/issue-3038.rs @@ -0,0 +1,26 @@ +enum F { G(isize, isize) } + +enum H { I(J, K) } + +enum J { L(isize, isize) } +enum K { M(isize, isize) } + +fn main() +{ + + let _z = match F::G(1, 2) { + F::G(x, x) => { println!("{}", x + x); } + //~^ ERROR identifier `x` is bound more than once in the same pattern + }; + + let _z = match H::I(J::L(1, 2), K::M(3, 4)) { + H::I(J::L(x, _), K::M(_, x)) + //~^ ERROR identifier `x` is bound more than once in the same pattern + => { println!("{}", x + x); } + }; + + let _z = match (1, 2) { + (x, x) => { x } //~ ERROR identifier `x` is bound more than once in the same pattern + }; + +} diff --git a/tests/ui/issues/issue-3038.stderr b/tests/ui/issues/issue-3038.stderr new file mode 100644 index 0000000000000..210da2ceff9bb --- /dev/null +++ b/tests/ui/issues/issue-3038.stderr @@ -0,0 +1,21 @@ +error[E0416]: identifier `x` is bound more than once in the same pattern + --> $DIR/issue-3038.rs:12:15 + | +LL | F::G(x, x) => { println!("{}", x + x); } + | ^ used in a pattern more than once + +error[E0416]: identifier `x` is bound more than once in the same pattern + --> $DIR/issue-3038.rs:17:32 + | +LL | H::I(J::L(x, _), K::M(_, x)) + | ^ used in a pattern more than once + +error[E0416]: identifier `x` is bound more than once in the same pattern + --> $DIR/issue-3038.rs:23:13 + | +LL | (x, x) => { x } + | ^ used in a pattern more than once + +error: aborting due to 3 previous errors + +For more information about this error, try `rustc --explain E0416`. diff --git a/tests/ui/issues/issue-31267.rs b/tests/ui/issues/issue-31267.rs new file mode 100644 index 0000000000000..d6081bb87439f --- /dev/null +++ b/tests/ui/issues/issue-31267.rs @@ -0,0 +1,14 @@ +//@ run-pass +// Regression test for issue #31267 + + +struct Foo; + +impl Foo { + const FOO: [i32; 3] = [0; 3]; +} + +pub fn main() { + let foo = Foo::FOO; + assert_eq!(foo, [0i32, 0, 0]); +} diff --git a/tests/ui/issues/issue-32004.rs b/tests/ui/issues/issue-32004.rs new file mode 100644 index 0000000000000..b3493508c5a9f --- /dev/null +++ b/tests/ui/issues/issue-32004.rs @@ -0,0 +1,19 @@ +enum Foo { + Bar(i32), + Baz +} + +struct S; + +fn main() { + match Foo::Baz { + Foo::Bar => {} + //~^ ERROR expected unit struct, unit variant or constant, found tuple variant `Foo::Bar` + _ => {} + } + + match S { + S(()) => {} + //~^ ERROR expected tuple struct or tuple variant, found unit struct `S` + } +} diff --git a/tests/ui/issues/issue-32004.stderr b/tests/ui/issues/issue-32004.stderr new file mode 100644 index 0000000000000..fcbec97661b4b --- /dev/null +++ b/tests/ui/issues/issue-32004.stderr @@ -0,0 +1,33 @@ +error[E0532]: expected unit struct, unit variant or constant, found tuple variant `Foo::Bar` + --> $DIR/issue-32004.rs:10:9 + | +LL | Bar(i32), + | -------- `Foo::Bar` defined here +LL | Baz + | --- similarly named unit variant `Baz` defined here +... +LL | Foo::Bar => {} + | ^^^^^^^^ + | +help: use the tuple variant pattern syntax instead + | +LL | Foo::Bar(_) => {} + | +++ +help: a unit variant with a similar name exists + | +LL - Foo::Bar => {} +LL + Foo::Baz => {} + | + +error[E0532]: expected tuple struct or tuple variant, found unit struct `S` + --> $DIR/issue-32004.rs:16:9 + | +LL | struct S; + | --------- `S` defined here +... +LL | S(()) => {} + | ^^^^^ help: use this syntax instead: `S` + +error: aborting due to 2 previous errors + +For more information about this error, try `rustc --explain E0532`. diff --git a/tests/ui/issues/issue-34569.rs b/tests/ui/issues/issue-34569.rs new file mode 100644 index 0000000000000..25b2e7fbe1608 --- /dev/null +++ b/tests/ui/issues/issue-34569.rs @@ -0,0 +1,17 @@ +//@ run-pass +//@ compile-flags:-g + +// In this test we just want to make sure that the code below does not lead to +// a debuginfo verification assertion during compilation. This was caused by the +// closure in the guard being codegened twice due to how match expressions are +// handled. +// +// See https://github.com/rust-lang/rust/issues/34569 for details. + +fn main() { + match 0 { + e if (|| { e == 0 })() => {}, + 1 => {}, + _ => {} + } +} diff --git a/tests/ui/issues/issue-49824.rs b/tests/ui/issues/issue-49824.rs new file mode 100644 index 0000000000000..bc1cd6856bc92 --- /dev/null +++ b/tests/ui/issues/issue-49824.rs @@ -0,0 +1,9 @@ +fn main() { + let mut x = 0; + || { + || { + //~^ ERROR captured variable cannot escape `FnMut` closure body + let _y = &mut x; + } + }; +} diff --git a/tests/ui/issues/issue-49824.stderr b/tests/ui/issues/issue-49824.stderr new file mode 100644 index 0000000000000..1c77090de27b8 --- /dev/null +++ b/tests/ui/issues/issue-49824.stderr @@ -0,0 +1,23 @@ +error: captured variable cannot escape `FnMut` closure body + --> $DIR/issue-49824.rs:4:9 + | +LL | let mut x = 0; + | ----- variable defined here +LL | || { + | - inferred to be a `FnMut` closure +LL | / || { +LL | | +LL | | let _y = &mut x; + | | - variable captured here +LL | | } + | |_________^ returns a closure that contains a reference to a captured variable, which then escapes the closure body + | + = note: `FnMut` closures only have access to their captured variables while they are executing... + = note: ...therefore, they cannot allow references to captured variables to escape +help: consider adding 'move' keyword before the nested closure + | +LL | move || { + | ++++ + +error: aborting due to 1 previous error + diff --git a/tests/ui/layout/debug.rs b/tests/ui/layout/debug.rs index 60415911d38e9..90e3c58dad719 100644 --- a/tests/ui/layout/debug.rs +++ b/tests/ui/layout/debug.rs @@ -68,12 +68,12 @@ union P5 { zst: [u16; 0], byte: u8 } //~ ERROR: layout_of #[rustc_layout(debug)] type X = std::mem::MaybeUninit; //~ ERROR: layout_of -#[rustc_layout(debug)] //~ ERROR: cannot be used on constants -const C: () = (); +#[rustc_layout(debug)] +const C: () = (); //~ ERROR: can only be applied to impl S { - #[rustc_layout(debug)] //~ ERROR: cannot be used on associated consts - const C: () = (); + #[rustc_layout(debug)] + const C: () = (); //~ ERROR: can only be applied to } #[rustc_layout(debug)] diff --git a/tests/ui/layout/debug.stderr b/tests/ui/layout/debug.stderr index c92f876fa5a13..79ce21eb532b0 100644 --- a/tests/ui/layout/debug.stderr +++ b/tests/ui/layout/debug.stderr @@ -4,22 +4,6 @@ error: unions cannot have zero fields LL | union EmptyUnion {} | ^^^^^^^^^^^^^^^^^^^ -error: `#[rustc_layout]` attribute cannot be used on constants - --> $DIR/debug.rs:71:1 - | -LL | #[rustc_layout(debug)] - | ^^^^^^^^^^^^^^^^^^^^^^ - | - = help: `#[rustc_layout]` can be applied to data types and type aliases - -error: `#[rustc_layout]` attribute cannot be used on associated consts - --> $DIR/debug.rs:75:5 - | -LL | #[rustc_layout(debug)] - | ^^^^^^^^^^^^^^^^^^^^^^ - | - = help: `#[rustc_layout]` can be applied to data types and type aliases - error: layout_of(E) = Layout { size: Size(12 bytes), align: AbiAlign { @@ -593,6 +577,12 @@ error: layout_of(MaybeUninit) = Layout { LL | type X = std::mem::MaybeUninit; | ^^^^^^ +error: `#[rustc_layout]` can only be applied to `struct`/`enum`/`union` declarations and type aliases + --> $DIR/debug.rs:72:1 + | +LL | const C: () = (); + | ^^^^^^^^^^^ + error[E0277]: the size for values of type `str` cannot be known at compilation time --> $DIR/debug.rs:80:19 | @@ -614,6 +604,12 @@ error: the type `T` does not have a fixed layout LL | type TooGeneric = T; | ^^^^^^^^^^^^^^^^^^ +error: `#[rustc_layout]` can only be applied to `struct`/`enum`/`union` declarations and type aliases + --> $DIR/debug.rs:76:5 + | +LL | const C: () = (); + | ^^^^^^^^^^^ + error: aborting due to 20 previous errors For more information about this error, try `rustc --explain E0277`. diff --git a/tests/ui/lint/fn_must_use.stderr b/tests/ui/lint/fn_must_use.stderr index bdf4eb6de4a53..0e8da873e7c3b 100644 --- a/tests/ui/lint/fn_must_use.stderr +++ b/tests/ui/lint/fn_must_use.stderr @@ -5,7 +5,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, foreign functions, functions, inherent methods, provided trait methods, required trait methods, and traits + = help: `#[must_use]` can be applied to data types, foreign functions, functions, inherent methods, provided trait methods, required trait methods, traits, and unions = note: requested on the command line with `-W unused-attributes` warning: unused return value of `need_to_use_this_value` that must be used diff --git a/tests/ui/lint/invalid_value-polymorphic.rs b/tests/ui/lint/invalid_value-polymorphic.rs index 4ed8950d20faa..6a31ac17d96ff 100644 --- a/tests/ui/lint/invalid_value-polymorphic.rs +++ b/tests/ui/lint/invalid_value-polymorphic.rs @@ -1,4 +1,4 @@ -//@ compile-flags: --crate-type=lib -Zmir-enable-passes=+InstSimplify-before-inline +//@ compile-flags: --crate-type=lib -Zmir-enable-passes=+InstSimplify //@ build-pass #![feature(core_intrinsics)] diff --git a/tests/ui/lint/lint-stability-deprecated.stderr b/tests/ui/lint/lint-stability-deprecated.stderr index ce0bc36f62922..bda4ee82d1fc6 100644 --- a/tests/ui/lint/lint-stability-deprecated.stderr +++ b/tests/ui/lint/lint-stability-deprecated.stderr @@ -1,8 +1,8 @@ -warning: use of deprecated function `lint_stability::deprecated`: text - --> $DIR/lint-stability-deprecated.rs:24:9 +warning: use of deprecated associated type `lint_stability::TraitWithAssociatedTypes::TypeDeprecated`: text + --> $DIR/lint-stability-deprecated.rs:97:48 | -LL | deprecated(); - | ^^^^^^^^^^ +LL | struct S2(T::TypeDeprecated); + | ^^^^^^^^^^^^^^^^^ | note: the lint level is defined here --> $DIR/lint-stability-deprecated.rs:6:9 @@ -10,6 +10,12 @@ note: the lint level is defined here LL | #![warn(deprecated)] | ^^^^^^^^^^ +warning: use of deprecated function `lint_stability::deprecated`: text + --> $DIR/lint-stability-deprecated.rs:24:9 + | +LL | deprecated(); + | ^^^^^^^^^^ + warning: use of deprecated method `lint_stability::Trait::trait_deprecated`: text --> $DIR/lint-stability-deprecated.rs:29:16 | @@ -316,12 +322,6 @@ warning: use of deprecated function `this_crate::MethodTester::test_method_body: LL | fn_in_body(); | ^^^^^^^^^^ -warning: use of deprecated associated type `lint_stability::TraitWithAssociatedTypes::TypeDeprecated`: text - --> $DIR/lint-stability-deprecated.rs:97:48 - | -LL | struct S2(T::TypeDeprecated); - | ^^^^^^^^^^^^^^^^^ - warning: use of deprecated associated type `lint_stability::TraitWithAssociatedTypes::TypeDeprecated`: text --> $DIR/lint-stability-deprecated.rs:101:13 | diff --git a/tests/ui/lint/lint-stability.stderr b/tests/ui/lint/lint-stability.stderr index fd57908a77b53..249f3ccaa5423 100644 --- a/tests/ui/lint/lint-stability.stderr +++ b/tests/ui/lint/lint-stability.stderr @@ -1,3 +1,12 @@ +error[E0658]: use of unstable library feature `unstable_test_feature` + --> $DIR/lint-stability.rs:88:48 + | +LL | struct S1(T::TypeUnstable); + | ^^^^^^^^^^^^^^^ + | + = help: add `#![feature(unstable_test_feature)]` to the crate attributes to enable + = note: this compiler was built on YYYY-MM-DD; consider upgrading it if it is out of date + error[E0658]: use of unstable library feature `unstable_test_feature` --> $DIR/lint-stability.rs:17:5 | @@ -367,15 +376,6 @@ LL | let _ = Unstable::StableVariant; = help: add `#![feature(unstable_test_feature)]` to the crate attributes to enable = note: this compiler was built on YYYY-MM-DD; consider upgrading it if it is out of date -error[E0658]: use of unstable library feature `unstable_test_feature` - --> $DIR/lint-stability.rs:88:48 - | -LL | struct S1(T::TypeUnstable); - | ^^^^^^^^^^^^^^^ - | - = help: add `#![feature(unstable_test_feature)]` to the crate attributes to enable - = note: this compiler was built on YYYY-MM-DD; consider upgrading it if it is out of date - error[E0658]: use of unstable library feature `unstable_test_feature` --> $DIR/lint-stability.rs:92:13 | diff --git a/tests/ui/lint/must_not_suspend/other_items.stderr b/tests/ui/lint/must_not_suspend/other_items.stderr index 289230b027ada..999a9d2fb3dc8 100644 --- a/tests/ui/lint/must_not_suspend/other_items.stderr +++ b/tests/ui/lint/must_not_suspend/other_items.stderr @@ -4,7 +4,7 @@ error: `#[must_not_suspend]` attribute cannot be used on modules LL | #[must_not_suspend] | ^^^^^^^^^^^^^^^^^^^ | - = help: `#[must_not_suspend]` can be applied to data types and traits + = help: `#[must_not_suspend]` can be applied to data types, traits, and unions error: aborting due to 1 previous error diff --git a/tests/ui/lint/must_not_suspend/return.stderr b/tests/ui/lint/must_not_suspend/return.stderr index b041491128e12..1a81b1a39f0c8 100644 --- a/tests/ui/lint/must_not_suspend/return.stderr +++ b/tests/ui/lint/must_not_suspend/return.stderr @@ -4,7 +4,7 @@ error: `#[must_not_suspend]` attribute cannot be used on functions LL | #[must_not_suspend] | ^^^^^^^^^^^^^^^^^^^ | - = help: `#[must_not_suspend]` can be applied to data types and traits + = help: `#[must_not_suspend]` can be applied to data types, traits, and unions error: aborting due to 1 previous error diff --git a/tests/ui/lint/unused/unused_attributes-must_use.stderr b/tests/ui/lint/unused/unused_attributes-must_use.stderr index 3fc340b5188f7..3192c09945487 100644 --- a/tests/ui/lint/unused/unused_attributes-must_use.stderr +++ b/tests/ui/lint/unused/unused_attributes-must_use.stderr @@ -5,7 +5,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions note: the lint level is defined here --> $DIR/unused_attributes-must_use.rs:4:9 | @@ -19,7 +19,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on modules --> $DIR/unused_attributes-must_use.rs:11:1 @@ -28,7 +28,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on use statements --> $DIR/unused_attributes-must_use.rs:15:1 @@ -37,7 +37,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on constants --> $DIR/unused_attributes-must_use.rs:19:1 @@ -46,7 +46,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on statics --> $DIR/unused_attributes-must_use.rs:22:1 @@ -55,7 +55,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on inherent impl blocks --> $DIR/unused_attributes-must_use.rs:40:1 @@ -64,7 +64,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on foreign modules --> $DIR/unused_attributes-must_use.rs:55:1 @@ -73,7 +73,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on foreign statics --> $DIR/unused_attributes-must_use.rs:59:5 @@ -82,7 +82,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on type aliases --> $DIR/unused_attributes-must_use.rs:73:1 @@ -91,7 +91,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on type parameters --> $DIR/unused_attributes-must_use.rs:77:8 @@ -100,7 +100,7 @@ LL | fn qux<#[must_use] T>(_: T) {} | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on associated consts --> $DIR/unused_attributes-must_use.rs:82:5 @@ -109,7 +109,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on associated types --> $DIR/unused_attributes-must_use.rs:85:5 @@ -118,7 +118,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on trait impl blocks --> $DIR/unused_attributes-must_use.rs:95:1 @@ -127,7 +127,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on trait methods in impl blocks --> $DIR/unused_attributes-must_use.rs:100:5 @@ -136,7 +136,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, foreign functions, functions, inherent methods, provided trait methods, required trait methods, and traits + = help: `#[must_use]` can be applied to data types, foreign functions, functions, inherent methods, provided trait methods, required trait methods, traits, and unions error: `#[must_use]` attribute cannot be used on trait aliases --> $DIR/unused_attributes-must_use.rs:107:1 @@ -145,7 +145,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on macro defs --> $DIR/unused_attributes-must_use.rs:111:1 @@ -154,7 +154,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on statements --> $DIR/unused_attributes-must_use.rs:120:5 @@ -163,7 +163,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on closures --> $DIR/unused_attributes-must_use.rs:125:13 @@ -172,7 +172,7 @@ LL | let x = #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, foreign functions, functions, methods, and traits + = help: `#[must_use]` can be applied to data types, foreign functions, functions, methods, traits, and unions error: `#[must_use]` attribute cannot be used on match arms --> $DIR/unused_attributes-must_use.rs:148:9 @@ -181,7 +181,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on struct fields --> $DIR/unused_attributes-must_use.rs:157:28 @@ -190,7 +190,7 @@ LL | let s = PatternField { #[must_use] foo: 123 }; | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: `#[must_use]` attribute cannot be used on pattern fields --> $DIR/unused_attributes-must_use.rs:159:24 @@ -199,7 +199,7 @@ LL | let PatternField { #[must_use] foo } = s; | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions error: unused `X` that must be used --> $DIR/unused_attributes-must_use.rs:130:5 diff --git a/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.rs b/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.rs index a556983e204df..a2e1398c61e66 100644 --- a/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.rs +++ b/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.rs @@ -5,4 +5,5 @@ macro_rules! sample { () => {} } #[sample] //~ ERROR cannot find attribute `sample` in this scope #[derive(sample)] //~ ERROR cannot find derive macro `sample` in this scope //~| ERROR cannot find derive macro `sample` in this scope + //~| ERROR cannot find derive macro `sample` in this scope pub struct S {} diff --git a/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.stderr b/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.stderr index a3c21df43e758..aad4a844ec17c 100644 --- a/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.stderr +++ b/tests/ui/macros/macro-rules-as-derive-or-attr-issue-132928.stderr @@ -1,3 +1,12 @@ +error: cannot find derive macro `sample` in this scope + --> $DIR/macro-rules-as-derive-or-attr-issue-132928.rs:6:10 + | +LL | macro_rules! sample { () => {} } + | ------ `sample` exists, but has no `derive` rules +... +LL | #[derive(sample)] + | ^^^^^^ + error: cannot find attribute `sample` in this scope --> $DIR/macro-rules-as-derive-or-attr-issue-132928.rs:5:3 | @@ -15,6 +24,8 @@ LL | macro_rules! sample { () => {} } ... LL | #[derive(sample)] | ^^^^^^ + | + = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` error: cannot find derive macro `sample` in this scope --> $DIR/macro-rules-as-derive-or-attr-issue-132928.rs:6:10 @@ -27,5 +38,5 @@ LL | #[derive(sample)] | = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` -error: aborting due to 3 previous errors +error: aborting due to 4 previous errors diff --git a/tests/ui/mir/enable_passes_validation.rs b/tests/ui/mir/enable_passes_validation.rs index d3d22b49ac7f8..99b1ba528b0cc 100644 --- a/tests/ui/mir/enable_passes_validation.rs +++ b/tests/ui/mir/enable_passes_validation.rs @@ -1,5 +1,4 @@ //@ revisions: empty unprefixed all_unknown all_known mixed -//@ revisions: enum_not_in_pass_names enum_in_pass_names //@[empty] compile-flags: -Zmir-enable-passes= @@ -14,12 +13,6 @@ //@[mixed] check-pass //@[mixed] compile-flags: -Zmir-enable-passes=+ThisPassDoesNotExist,+CheckAlignment -//@[enum_not_in_pass_names] check-pass -//@[enum_not_in_pass_names] compile-flags: -Zmir-enable-passes=+SimplifyCfg - -//@[enum_in_pass_names] check-pass -//@[enum_in_pass_names] compile-flags: -Zmir-enable-passes=+AddCallGuards - fn main() {} //[empty]~? ERROR incorrect value `` for unstable option `mir-enable-passes` @@ -30,5 +23,3 @@ fn main() {} //[all_unknown]~? WARN MIR pass `DoesNotExist` is unknown and will be ignored //[all_unknown]~? WARN MIR pass `ThisPass` is unknown and will be ignored //[all_unknown]~? WARN MIR pass `DoesNotExist` is unknown and will be ignored -//[enum_not_in_pass_names]~? WARN MIR pass `SimplifyCfg` is unknown and will be ignored -//[enum_not_in_pass_names]~? WARN MIR pass `SimplifyCfg` is unknown and will be ignored diff --git a/tests/ui/pin-ergonomics/pin_v2-attr.stderr b/tests/ui/pin-ergonomics/pin_v2-attr.stderr index 8f8a9f3b3a19a..c297afa87a73f 100644 --- a/tests/ui/pin-ergonomics/pin_v2-attr.stderr +++ b/tests/ui/pin-ergonomics/pin_v2-attr.stderr @@ -4,7 +4,7 @@ error: `#[pin_v2]` attribute cannot be used on macro calls LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: allow, cfg, cfg_attr, deny, expect, forbid, and warn are the only allowed built-in attributes in function parameters --> $DIR/pin_v2-attr.rs:84:12 @@ -18,7 +18,7 @@ error: `#[pin_v2]` attribute cannot be used on crates LL | #![pin_v2] | ^^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on type parameters --> $DIR/pin_v2-attr.rs:27:10 @@ -26,7 +26,7 @@ error: `#[pin_v2]` attribute cannot be used on type parameters LL | enum Foo<#[pin_v2] T, #[pin_v2] U = ()> { | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on type parameters --> $DIR/pin_v2-attr.rs:27:23 @@ -34,7 +34,7 @@ error: `#[pin_v2]` attribute cannot be used on type parameters LL | enum Foo<#[pin_v2] T, #[pin_v2] U = ()> { | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on enum variants --> $DIR/pin_v2-attr.rs:30:5 @@ -42,7 +42,7 @@ error: `#[pin_v2]` attribute cannot be used on enum variants LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on struct fields --> $DIR/pin_v2-attr.rs:32:18 @@ -50,7 +50,7 @@ error: `#[pin_v2]` attribute cannot be used on struct fields LL | TupleVariant(#[pin_v2] T), | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on struct fields --> $DIR/pin_v2-attr.rs:34:9 @@ -58,7 +58,7 @@ error: `#[pin_v2]` attribute cannot be used on struct fields LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on traits --> $DIR/pin_v2-attr.rs:39:1 @@ -66,7 +66,7 @@ error: `#[pin_v2]` attribute cannot be used on traits LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on associated consts --> $DIR/pin_v2-attr.rs:41:5 @@ -74,7 +74,7 @@ error: `#[pin_v2]` attribute cannot be used on associated consts LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on associated types --> $DIR/pin_v2-attr.rs:43:5 @@ -82,7 +82,7 @@ error: `#[pin_v2]` attribute cannot be used on associated types LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on required trait methods --> $DIR/pin_v2-attr.rs:46:5 @@ -90,7 +90,7 @@ error: `#[pin_v2]` attribute cannot be used on required trait methods LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on provided trait methods --> $DIR/pin_v2-attr.rs:48:5 @@ -98,7 +98,7 @@ error: `#[pin_v2]` attribute cannot be used on provided trait methods LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on trait aliases --> $DIR/pin_v2-attr.rs:52:1 @@ -106,7 +106,7 @@ error: `#[pin_v2]` attribute cannot be used on trait aliases LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on inherent impl blocks --> $DIR/pin_v2-attr.rs:55:1 @@ -114,7 +114,7 @@ error: `#[pin_v2]` attribute cannot be used on inherent impl blocks LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on delegations --> $DIR/pin_v2-attr.rs:58:5 @@ -122,7 +122,7 @@ error: `#[pin_v2]` attribute cannot be used on delegations LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on inherent methods --> $DIR/pin_v2-attr.rs:61:5 @@ -130,7 +130,7 @@ error: `#[pin_v2]` attribute cannot be used on inherent methods LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on trait impl blocks --> $DIR/pin_v2-attr.rs:65:1 @@ -138,7 +138,7 @@ error: `#[pin_v2]` attribute cannot be used on trait impl blocks LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on trait methods in impl blocks --> $DIR/pin_v2-attr.rs:67:5 @@ -146,7 +146,7 @@ error: `#[pin_v2]` attribute cannot be used on trait methods in impl blocks LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on extern crates --> $DIR/pin_v2-attr.rs:71:1 @@ -154,7 +154,7 @@ error: `#[pin_v2]` attribute cannot be used on extern crates LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on use statements --> $DIR/pin_v2-attr.rs:74:1 @@ -162,7 +162,7 @@ error: `#[pin_v2]` attribute cannot be used on use statements LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on statics --> $DIR/pin_v2-attr.rs:77:1 @@ -170,7 +170,7 @@ error: `#[pin_v2]` attribute cannot be used on statics LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on constants --> $DIR/pin_v2-attr.rs:80:1 @@ -178,7 +178,7 @@ error: `#[pin_v2]` attribute cannot be used on constants LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on functions --> $DIR/pin_v2-attr.rs:83:1 @@ -186,7 +186,7 @@ error: `#[pin_v2]` attribute cannot be used on functions LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on function params --> $DIR/pin_v2-attr.rs:84:12 @@ -194,7 +194,7 @@ error: `#[pin_v2]` attribute cannot be used on function params LL | fn f(#[pin_v2] param: Foo) | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on closures --> $DIR/pin_v2-attr.rs:92:5 @@ -202,7 +202,7 @@ error: `#[pin_v2]` attribute cannot be used on closures LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on expressions --> $DIR/pin_v2-attr.rs:94:5 @@ -210,7 +210,7 @@ error: `#[pin_v2]` attribute cannot be used on expressions LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on struct fields --> $DIR/pin_v2-attr.rs:98:9 @@ -218,7 +218,7 @@ error: `#[pin_v2]` attribute cannot be used on struct fields LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on statements --> $DIR/pin_v2-attr.rs:96:5 @@ -226,7 +226,7 @@ error: `#[pin_v2]` attribute cannot be used on statements LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on match arms --> $DIR/pin_v2-attr.rs:102:9 @@ -234,7 +234,7 @@ error: `#[pin_v2]` attribute cannot be used on match arms LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on pattern fields --> $DIR/pin_v2-attr.rs:106:13 @@ -242,7 +242,7 @@ error: `#[pin_v2]` attribute cannot be used on pattern fields LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on where predicates --> $DIR/pin_v2-attr.rs:88:5 @@ -250,7 +250,7 @@ error: `#[pin_v2]` attribute cannot be used on where predicates LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on modules --> $DIR/pin_v2-attr.rs:112:1 @@ -258,7 +258,7 @@ error: `#[pin_v2]` attribute cannot be used on modules LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on foreign modules --> $DIR/pin_v2-attr.rs:115:1 @@ -266,7 +266,7 @@ error: `#[pin_v2]` attribute cannot be used on foreign modules LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on foreign types --> $DIR/pin_v2-attr.rs:117:5 @@ -274,7 +274,7 @@ error: `#[pin_v2]` attribute cannot be used on foreign types LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on foreign statics --> $DIR/pin_v2-attr.rs:120:5 @@ -282,7 +282,7 @@ error: `#[pin_v2]` attribute cannot be used on foreign statics LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on foreign functions --> $DIR/pin_v2-attr.rs:123:5 @@ -290,7 +290,7 @@ error: `#[pin_v2]` attribute cannot be used on foreign functions LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on type aliases --> $DIR/pin_v2-attr.rs:127:1 @@ -298,7 +298,7 @@ error: `#[pin_v2]` attribute cannot be used on type aliases LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: `#[pin_v2]` attribute cannot be used on macro defs --> $DIR/pin_v2-attr.rs:130:1 @@ -306,7 +306,7 @@ error: `#[pin_v2]` attribute cannot be used on macro defs LL | #[pin_v2] | ^^^^^^^^^ | - = help: `#[pin_v2]` can only be applied to data types + = help: `#[pin_v2]` can be applied to data types and unions error: aborting due to 39 previous errors diff --git a/tests/ui/privacy/private-in-public-warn.rs b/tests/ui/privacy/private-in-public-warn.rs index 6a0ac2b9ade79..f79e4641312e1 100644 --- a/tests/ui/privacy/private-in-public-warn.rs +++ b/tests/ui/privacy/private-in-public-warn.rs @@ -49,11 +49,7 @@ mod traits { fn f(arg: T) {} //~^ ERROR trait `traits::PrivTr` is more private than the item `traits::Tr3::f` fn g() -> impl PrivTr; - //~^ ERROR trait `traits::PrivTr` is more private than the item `traits::Tr3::g::{anon_assoc#0}` - //~| ERROR trait `traits::PrivTr` is more private than the item `traits::Tr3::g::{anon_assoc#0}` fn h() -> impl PrivTr {} - //~^ ERROR trait `traits::PrivTr` is more private than the item `traits::Tr3::h::{anon_assoc#0}` - //~| ERROR trait `traits::PrivTr` is more private than the item `traits::Tr3::h::{anon_assoc#0}` } impl Pub {} //~ ERROR trait `traits::PrivTr` is more private than the item `traits::Pub` impl PubTr for Pub {} // OK, trait impl predicates @@ -93,15 +89,7 @@ mod generics { pub trait Tr5 { fn required() -> impl PrivTr>; - //~^ ERROR trait `generics::PrivTr>` is more private than the item `Tr5::required::{anon_assoc#0}` - //~| ERROR type `generics::Priv<()>` is more private than the item `Tr5::required::{anon_assoc#0}` - //~| ERROR trait `generics::PrivTr>` is more private than the item `Tr5::required::{anon_assoc#0}` - //~| ERROR type `generics::Priv<()>` is more private than the item `Tr5::required::{anon_assoc#0}` fn provided() -> impl PrivTr> {} - //~^ ERROR trait `generics::PrivTr>` is more private than the item `Tr5::provided::{anon_assoc#0}` - //~| ERROR type `generics::Priv<()>` is more private than the item `Tr5::provided::{anon_assoc#0}` - //~| ERROR trait `generics::PrivTr>` is more private than the item `Tr5::provided::{anon_assoc#0}` - //~| ERROR type `generics::Priv<()>` is more private than the item `Tr5::provided::{anon_assoc#0}` } } diff --git a/tests/ui/privacy/private-in-public-warn.stderr b/tests/ui/privacy/private-in-public-warn.stderr index 1fa415e27c16f..edcffaf6b70a4 100644 --- a/tests/ui/privacy/private-in-public-warn.stderr +++ b/tests/ui/privacy/private-in-public-warn.stderr @@ -194,56 +194,8 @@ note: but trait `traits::PrivTr` is only usable at visibility `pub(self)` LL | trait PrivTr {} | ^^^^^^^^^^^^ -error: trait `traits::PrivTr` is more private than the item `traits::Tr3::g::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:51:19 - | -LL | fn g() -> impl PrivTr; - | ^^^^^^^^^^^ opaque type `traits::Tr3::g::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `traits::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:37:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^ - -error: trait `traits::PrivTr` is more private than the item `traits::Tr3::g::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:51:19 - | -LL | fn g() -> impl PrivTr; - | ^^^^^^^^^^^ opaque type `traits::Tr3::g::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `traits::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:37:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^ - -error: trait `traits::PrivTr` is more private than the item `traits::Tr3::h::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:54:19 - | -LL | fn h() -> impl PrivTr {} - | ^^^^^^^^^^^ opaque type `traits::Tr3::h::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `traits::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:37:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^ - -error: trait `traits::PrivTr` is more private than the item `traits::Tr3::h::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:54:19 - | -LL | fn h() -> impl PrivTr {} - | ^^^^^^^^^^^ opaque type `traits::Tr3::h::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `traits::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:37:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^ - error: trait `traits::PrivTr` is more private than the item `traits::Pub` - --> $DIR/private-in-public-warn.rs:58:5 + --> $DIR/private-in-public-warn.rs:54:5 | LL | impl Pub {} | ^^^^^^^^^^^^^^^^^^^^^^ implementation `traits::Pub` is reachable at visibility `pub(crate)` @@ -255,199 +207,103 @@ LL | trait PrivTr {} | ^^^^^^^^^^^^ error: trait `traits_where::PrivTr` is more private than the item `traits_where::Alias` - --> $DIR/private-in-public-warn.rs:67:5 + --> $DIR/private-in-public-warn.rs:63:5 | LL | pub type Alias where T: PrivTr = T; | ^^^^^^^^^^^^^^^^^ type alias `traits_where::Alias` is reachable at visibility `pub(crate)` | note: but trait `traits_where::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:63:5 + --> $DIR/private-in-public-warn.rs:59:5 | LL | trait PrivTr {} | ^^^^^^^^^^^^ error: trait `traits_where::PrivTr` is more private than the item `traits_where::Tr2` - --> $DIR/private-in-public-warn.rs:70:5 + --> $DIR/private-in-public-warn.rs:66:5 | LL | pub trait Tr2 where T: PrivTr {} | ^^^^^^^^^^^^^^^^ trait `traits_where::Tr2` is reachable at visibility `pub(crate)` | note: but trait `traits_where::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:63:5 + --> $DIR/private-in-public-warn.rs:59:5 | LL | trait PrivTr {} | ^^^^^^^^^^^^ error: trait `traits_where::PrivTr` is more private than the item `traits_where::Tr3::f` - --> $DIR/private-in-public-warn.rs:73:9 + --> $DIR/private-in-public-warn.rs:69:9 | LL | fn f(arg: T) where T: PrivTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ associated function `traits_where::Tr3::f` is reachable at visibility `pub(crate)` | note: but trait `traits_where::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:63:5 + --> $DIR/private-in-public-warn.rs:59:5 | LL | trait PrivTr {} | ^^^^^^^^^^^^ error: trait `traits_where::PrivTr` is more private than the item `traits_where::Pub` - --> $DIR/private-in-public-warn.rs:76:5 + --> $DIR/private-in-public-warn.rs:72:5 | LL | impl Pub where T: PrivTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ implementation `traits_where::Pub` is reachable at visibility `pub(crate)` | note: but trait `traits_where::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:63:5 + --> $DIR/private-in-public-warn.rs:59:5 | LL | trait PrivTr {} | ^^^^^^^^^^^^ error: trait `generics::PrivTr` is more private than the item `generics::Tr1` - --> $DIR/private-in-public-warn.rs:88:5 + --> $DIR/private-in-public-warn.rs:84:5 | LL | pub trait Tr1: PrivTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `generics::Tr1` is reachable at visibility `pub(crate)` | note: but trait `generics::PrivTr` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:84:5 + --> $DIR/private-in-public-warn.rs:80:5 | LL | trait PrivTr {} | ^^^^^^^^^^^^^^^ error: type `generics::Priv` is more private than the item `generics::Tr2` - --> $DIR/private-in-public-warn.rs:90:5 + --> $DIR/private-in-public-warn.rs:86:5 | LL | pub trait Tr2: PubTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `generics::Tr2` is reachable at visibility `pub(crate)` | note: but type `generics::Priv` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 + --> $DIR/private-in-public-warn.rs:78:5 | LL | struct Priv(T); | ^^^^^^^^^^^^^^^^^^^ error: type `generics::Priv` is more private than the item `generics::Tr3` - --> $DIR/private-in-public-warn.rs:91:5 + --> $DIR/private-in-public-warn.rs:87:5 | LL | pub trait Tr3: PubTr<[Priv; 1]> {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `generics::Tr3` is reachable at visibility `pub(crate)` | note: but type `generics::Priv` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 + --> $DIR/private-in-public-warn.rs:78:5 | LL | struct Priv(T); | ^^^^^^^^^^^^^^^^^^^ error: type `generics::Priv` is more private than the item `Tr4` - --> $DIR/private-in-public-warn.rs:92:5 + --> $DIR/private-in-public-warn.rs:88:5 | LL | pub trait Tr4: PubTr> {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `Tr4` is reachable at visibility `pub(crate)` | note: but type `generics::Priv` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 - | -LL | struct Priv(T); - | ^^^^^^^^^^^^^^^^^^^ - -error: trait `generics::PrivTr>` is more private than the item `Tr5::required::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:95:26 - | -LL | fn required() -> impl PrivTr>; - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::required::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `generics::PrivTr>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:84:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^^^^ - -error: type `generics::Priv<()>` is more private than the item `Tr5::required::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:95:26 - | -LL | fn required() -> impl PrivTr>; - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::required::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but type `generics::Priv<()>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 - | -LL | struct Priv(T); - | ^^^^^^^^^^^^^^^^^^^ - -error: trait `generics::PrivTr>` is more private than the item `Tr5::required::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:95:26 - | -LL | fn required() -> impl PrivTr>; - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::required::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `generics::PrivTr>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:84:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^^^^ - -error: type `generics::Priv<()>` is more private than the item `Tr5::required::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:95:26 - | -LL | fn required() -> impl PrivTr>; - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::required::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but type `generics::Priv<()>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 - | -LL | struct Priv(T); - | ^^^^^^^^^^^^^^^^^^^ - -error: trait `generics::PrivTr>` is more private than the item `Tr5::provided::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:100:26 - | -LL | fn provided() -> impl PrivTr> {} - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::provided::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `generics::PrivTr>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:84:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^^^^ - -error: type `generics::Priv<()>` is more private than the item `Tr5::provided::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:100:26 - | -LL | fn provided() -> impl PrivTr> {} - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::provided::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but type `generics::Priv<()>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 - | -LL | struct Priv(T); - | ^^^^^^^^^^^^^^^^^^^ - -error: trait `generics::PrivTr>` is more private than the item `Tr5::provided::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:100:26 - | -LL | fn provided() -> impl PrivTr> {} - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::provided::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but trait `generics::PrivTr>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:84:5 - | -LL | trait PrivTr {} - | ^^^^^^^^^^^^^^^ - -error: type `generics::Priv<()>` is more private than the item `Tr5::provided::{anon_assoc#0}` - --> $DIR/private-in-public-warn.rs:100:26 - | -LL | fn provided() -> impl PrivTr> {} - | ^^^^^^^^^^^^^^^^^^^^^ opaque type `Tr5::provided::{anon_assoc#0}` is reachable at visibility `pub(crate)` - | -note: but type `generics::Priv<()>` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:82:5 + --> $DIR/private-in-public-warn.rs:78:5 | LL | struct Priv(T); | ^^^^^^^^^^^^^^^^^^^ error[E0446]: private type `impls::Priv` in public interface - --> $DIR/private-in-public-warn.rs:131:9 + --> $DIR/private-in-public-warn.rs:119:9 | LL | struct Priv; | ----------- `impls::Priv` declared as private @@ -456,19 +312,19 @@ LL | type Alias = Priv; | ^^^^^^^^^^ can't leak private type error: type `aliases_pub::Priv` is more private than the item `aliases_pub::::f` - --> $DIR/private-in-public-warn.rs:202:9 + --> $DIR/private-in-public-warn.rs:190:9 | LL | pub fn f(arg: Priv) {} | ^^^^^^^^^^^^^^^^^^^ associated function `aliases_pub::::f` is reachable at visibility `pub(crate)` | note: but type `aliases_pub::Priv` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:175:5 + --> $DIR/private-in-public-warn.rs:163:5 | LL | struct Priv; | ^^^^^^^^^^^ error[E0446]: private type `aliases_pub::Priv` in public interface - --> $DIR/private-in-public-warn.rs:205:9 + --> $DIR/private-in-public-warn.rs:193:9 | LL | struct Priv; | ----------- `aliases_pub::Priv` declared as private @@ -477,7 +333,7 @@ LL | type Check = Priv; | ^^^^^^^^^^ can't leak private type error[E0446]: private type `aliases_pub::Priv` in public interface - --> $DIR/private-in-public-warn.rs:208:9 + --> $DIR/private-in-public-warn.rs:196:9 | LL | struct Priv; | ----------- `aliases_pub::Priv` declared as private @@ -486,7 +342,7 @@ LL | type Check = Priv; | ^^^^^^^^^^ can't leak private type error[E0446]: private type `aliases_pub::Priv` in public interface - --> $DIR/private-in-public-warn.rs:211:9 + --> $DIR/private-in-public-warn.rs:199:9 | LL | struct Priv; | ----------- `aliases_pub::Priv` declared as private @@ -495,7 +351,7 @@ LL | type Check = Priv; | ^^^^^^^^^^ can't leak private type error[E0446]: private type `aliases_pub::Priv` in public interface - --> $DIR/private-in-public-warn.rs:214:9 + --> $DIR/private-in-public-warn.rs:202:9 | LL | struct Priv; | ----------- `aliases_pub::Priv` declared as private @@ -504,37 +360,37 @@ LL | type Check = Priv; | ^^^^^^^^^^ can't leak private type error: trait `PrivTr1` is more private than the item `aliases_priv::Tr1` - --> $DIR/private-in-public-warn.rs:244:5 + --> $DIR/private-in-public-warn.rs:232:5 | LL | pub trait Tr1: PrivUseAliasTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `aliases_priv::Tr1` is reachable at visibility `pub(crate)` | note: but trait `PrivTr1` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:230:5 + --> $DIR/private-in-public-warn.rs:218:5 | LL | trait PrivTr1 { | ^^^^^^^^^^^^^^^^^^^^^ error: trait `PrivTr1` is more private than the item `aliases_priv::Tr2` - --> $DIR/private-in-public-warn.rs:246:5 + --> $DIR/private-in-public-warn.rs:234:5 | LL | pub trait Tr2: PrivUseAliasTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `aliases_priv::Tr2` is reachable at visibility `pub(crate)` | note: but trait `PrivTr1` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:230:5 + --> $DIR/private-in-public-warn.rs:218:5 | LL | trait PrivTr1 { | ^^^^^^^^^^^^^^^^^^^^^ error: type `Priv2` is more private than the item `aliases_priv::Tr2` - --> $DIR/private-in-public-warn.rs:246:5 + --> $DIR/private-in-public-warn.rs:234:5 | LL | pub trait Tr2: PrivUseAliasTr {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ trait `aliases_priv::Tr2` is reachable at visibility `pub(crate)` | note: but type `Priv2` is only usable at visibility `pub(self)` - --> $DIR/private-in-public-warn.rs:228:5 + --> $DIR/private-in-public-warn.rs:216:5 | LL | struct Priv2; | ^^^^^^^^^^^^ @@ -554,7 +410,7 @@ LL | pub type Alias = T; = note: `#[warn(type_alias_bounds)]` on by default warning: where clauses on type aliases are not enforced - --> $DIR/private-in-public-warn.rs:67:29 + --> $DIR/private-in-public-warn.rs:63:29 | LL | pub type Alias where T: PrivTr = T; | ------^^^^^^^^^ @@ -566,6 +422,6 @@ LL | pub type Alias where T: PrivTr = T; see issue #112792 for more information = help: add `#![feature(lazy_type_alias)]` to the crate attributes to enable the desired semantics -error: aborting due to 46 previous errors; 2 warnings emitted +error: aborting due to 34 previous errors; 2 warnings emitted For more information about this error, try `rustc --explain E0446`. diff --git a/tests/ui/privacy/pub-priv-dep/pub-priv1.rs b/tests/ui/privacy/pub-priv-dep/pub-priv1.rs index ae86be19cf960..eae0f9756a10e 100644 --- a/tests/ui/privacy/pub-priv-dep/pub-priv1.rs +++ b/tests/ui/privacy/pub-priv-dep/pub-priv1.rs @@ -74,12 +74,8 @@ pub trait MyPubTrait { //~^ ERROR trait `OtherTrait` from private dependency 'priv_dep' in public interface fn required_impl_trait() -> impl OtherTrait; - //~^ ERROR trait `OtherTrait` from private dependency 'priv_dep' in public interface - //~| ERROR trait `OtherTrait` from private dependency 'priv_dep' in public interface fn provided_impl_trait() -> impl OtherTrait { OtherType } - //~^ ERROR trait `OtherTrait` from private dependency 'priv_dep' in public interface - //~| ERROR trait `OtherTrait` from private dependency 'priv_dep' in public interface fn required_concrete() -> OtherType; //~^ ERROR type `OtherType` from private dependency 'priv_dep' in public interface diff --git a/tests/ui/privacy/pub-priv-dep/pub-priv1.stderr b/tests/ui/privacy/pub-priv-dep/pub-priv1.stderr index 609dbd77f9c19..e66db53f65dd0 100644 --- a/tests/ui/privacy/pub-priv-dep/pub-priv1.stderr +++ b/tests/ui/privacy/pub-priv-dep/pub-priv1.stderr @@ -11,55 +11,55 @@ LL | #![deny(exported_private_dependencies)] | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: macro `m` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:160:9 + --> $DIR/pub-priv1.rs:156:9 | LL | pub use priv_dep::m; | ^^^^^^^^^^^ error: macro `fn_like` from private dependency 'pm' is re-exported - --> $DIR/pub-priv1.rs:162:9 + --> $DIR/pub-priv1.rs:158:9 | LL | pub use pm::fn_like; | ^^^^^^^^^^^ error: derive macro `PmDerive` from private dependency 'pm' is re-exported - --> $DIR/pub-priv1.rs:164:9 + --> $DIR/pub-priv1.rs:160:9 | LL | pub use pm::PmDerive; | ^^^^^^^^^^^^ error: attribute macro `pm_attr` from private dependency 'pm' is re-exported - --> $DIR/pub-priv1.rs:166:9 + --> $DIR/pub-priv1.rs:162:9 | LL | pub use pm::pm_attr; | ^^^^^^^^^^^ error: variant `V1` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:169:9 + --> $DIR/pub-priv1.rs:165:9 | LL | pub use priv_dep::E::V1; | ^^^^^^^^^^^^^^^ error: type alias `Unit` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:172:9 + --> $DIR/pub-priv1.rs:168:9 | LL | pub use priv_dep::Unit; | ^^^^^^^^^^^^^^ error: type alias `PubPub` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:174:9 + --> $DIR/pub-priv1.rs:170:9 | LL | pub use priv_dep::PubPub; | ^^^^^^^^^^^^^^^^ error: type alias `PubPriv` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:176:9 + --> $DIR/pub-priv1.rs:172:9 | LL | pub use priv_dep::PubPriv; | ^^^^^^^^^^^^^^^^^ error: struct `Renamed` from private dependency 'priv_dep' is re-exported - --> $DIR/pub-priv1.rs:178:9 + --> $DIR/pub-priv1.rs:174:9 | LL | pub use priv_dep::OtherType as Renamed; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -124,120 +124,92 @@ error: trait `OtherTrait` from private dependency 'priv_dep' in public interface LL | type Foo: OtherTrait; | ^^^^^^^^^^^^^^^^^^^^ -error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:76:33 - | -LL | fn required_impl_trait() -> impl OtherTrait; - | ^^^^^^^^^^^^^^^ - -error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:76:33 - | -LL | fn required_impl_trait() -> impl OtherTrait; - | ^^^^^^^^^^^^^^^ - | - = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` - -error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:80:33 - | -LL | fn provided_impl_trait() -> impl OtherTrait { OtherType } - | ^^^^^^^^^^^^^^^ - -error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:80:33 - | -LL | fn provided_impl_trait() -> impl OtherTrait { OtherType } - | ^^^^^^^^^^^^^^^ - | - = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` - error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:84:5 + --> $DIR/pub-priv1.rs:80:5 | LL | fn required_concrete() -> OtherType; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:87:5 + --> $DIR/pub-priv1.rs:83:5 | LL | fn provided_concrete() -> OtherType { OtherType } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:91:1 + --> $DIR/pub-priv1.rs:87:1 | LL | pub trait WithSuperTrait: OtherTrait {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:100:5 + --> $DIR/pub-priv1.rs:96:5 | LL | type X = OtherType; | ^^^^^^ error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:104:1 + --> $DIR/pub-priv1.rs:100:1 | LL | pub fn in_bounds(x: T) { unimplemented!() } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:107:1 + --> $DIR/pub-priv1.rs:103:1 | LL | pub fn private_return_impl_trait() -> impl OtherTrait { OtherType } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:110:1 + --> $DIR/pub-priv1.rs:106:1 | LL | pub fn private_return() -> OtherType { OtherType } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:113:1 + --> $DIR/pub-priv1.rs:109:1 | LL | pub fn private_in_generic() -> std::num::Saturating { unimplemented!() } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:116:1 + --> $DIR/pub-priv1.rs:112:1 | LL | pub static STATIC: OtherType = OtherType; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:119:1 + --> $DIR/pub-priv1.rs:115:1 | LL | pub const CONST: OtherType = OtherType; | ^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:122:1 + --> $DIR/pub-priv1.rs:118:1 | LL | pub type Alias = OtherType; | ^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:125:1 + --> $DIR/pub-priv1.rs:121:1 | LL | pub type AliasOfAlias = priv_dep::PubPub; | ^^^^^^^^^^^^^^^^^^^^^ error: trait `OtherTrait` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:130:1 + --> $DIR/pub-priv1.rs:126:1 | LL | impl OtherTrait for PublicWithPrivateImpl {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:135:1 + --> $DIR/pub-priv1.rs:131:1 | LL | impl PubTraitOnPrivate for OtherType {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:135:1 + --> $DIR/pub-priv1.rs:131:1 | LL | impl PubTraitOnPrivate for OtherType {} | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -245,25 +217,25 @@ LL | impl PubTraitOnPrivate for OtherType {} = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:141:1 + --> $DIR/pub-priv1.rs:137:1 | LL | impl From for PublicWithStdImpl { | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:143:5 + --> $DIR/pub-priv1.rs:139:5 | LL | fn from(val: OtherType) -> Self { Self } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:147:1 + --> $DIR/pub-priv1.rs:143:1 | LL | impl From for OtherType { | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:147:1 + --> $DIR/pub-priv1.rs:143:1 | LL | impl From for OtherType { | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -271,18 +243,18 @@ LL | impl From for OtherType { = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:150:5 + --> $DIR/pub-priv1.rs:146:5 | LL | fn from(val: PublicWithStdImpl) -> Self { Self } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ error: type `OtherType` from private dependency 'priv_dep' in public interface - --> $DIR/pub-priv1.rs:150:5 + --> $DIR/pub-priv1.rs:146:5 | LL | fn from(val: PublicWithStdImpl) -> Self { Self } | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no` -error: aborting due to 45 previous errors +error: aborting due to 41 previous errors diff --git a/tests/ui/proc-macro/quote/not-repeatable.stderr b/tests/ui/proc-macro/quote/not-repeatable.stderr index 6a867350a3b36..5943111efd585 100644 --- a/tests/ui/proc-macro/quote/not-repeatable.stderr +++ b/tests/ui/proc-macro/quote/not-repeatable.stderr @@ -2,7 +2,7 @@ error[E0599]: the method `quote_into_iter` exists for struct `Ipv4Addr`, but its --> $DIR/not-repeatable.rs:11:13 | LL | struct Ipv4Addr; - | --------------- method `quote_into_iter` not found for this struct because `Ipv4Addr` doesn't implement `Iterator` or `ToTokens` + | --------------- method `quote_into_iter` not found for this struct because it doesn't satisfy `Ipv4Addr: Iterator`, `Ipv4Addr: ToTokens`, `Ipv4Addr: proc_macro::ext::RepIteratorExt` or `Ipv4Addr: proc_macro::ext::RepToTokensExt` ... LL | let _ = quote! { $($ip)* }; | ^^^^^^^^^^^^^^^^^^ method cannot be called on `Ipv4Addr` due to unsatisfied trait bounds diff --git a/tests/ui/reflection/dump.bit32.run.stdout b/tests/ui/reflection/dump.bit32.run.stdout index d15b46509ff20..c9ad1dfd224f8 100644 --- a/tests/ui/reflection/dump.bit32.run.stdout +++ b/tests/ui/reflection/dump.bit32.run.stdout @@ -20,6 +20,7 @@ Type { size: Some( 2, ), + id: TypeId(0x5a16e6fbf8293c4c38740f6ab3f64621), } Type { kind: Array( @@ -31,6 +32,7 @@ Type { size: Some( 2, ), + id: TypeId(0x40d501f4327e47fe5c2b2a0f80bd2df1), } Type { kind: Int( @@ -42,6 +44,7 @@ Type { size: Some( 1, ), + id: TypeId(0x12427c993eca190c841e0d92c5b7a45d), } Type { kind: Int( @@ -53,6 +56,7 @@ Type { size: Some( 4, ), + id: TypeId(0x56ced5e4a15bd89050bb9674fa2df013), } Type { kind: Int( @@ -64,6 +68,7 @@ Type { size: Some( 8, ), + id: TypeId(0xae6c4318bb07632e00428affbea41961), } Type { kind: Int( @@ -75,6 +80,7 @@ Type { size: Some( 16, ), + id: TypeId(0xc7164498f3902dde0d8194a7b9733e79), } Type { kind: Int( @@ -86,6 +92,7 @@ Type { size: Some( 4, ), + id: TypeId(0x1e5f92831c560aac8658b980a22e60b0), } Type { kind: Int( @@ -97,6 +104,7 @@ Type { size: Some( 1, ), + id: TypeId(0x0596b48cc04376e64d5c788c2aa46bdb), } Type { kind: Int( @@ -108,6 +116,7 @@ Type { size: Some( 4, ), + id: TypeId(0x1378bb1c0a0202683eb65e7c11f2e4d7), } Type { kind: Int( @@ -119,6 +128,7 @@ Type { size: Some( 8, ), + id: TypeId(0x9ed91be891e304132cb86891e578f4a5), } Type { kind: Int( @@ -130,6 +140,7 @@ Type { size: Some( 16, ), + id: TypeId(0x7bf7411d57d603e9fb393892a9c3f362), } Type { kind: Int( @@ -141,29 +152,33 @@ Type { size: Some( 4, ), + id: TypeId(0x763d199bccd319899208909ed1a860c6), } Type { kind: Other, size: Some( 4, ), + id: TypeId(0xad7d83331bd9d1c4c069ab6f20512619), } Type { kind: Other, size: Some( 12, ), + id: TypeId(0xdea54d223f006bd38cc819e111593faf), } Type { kind: Reference( Reference { - pointee: TypeId(0xda1b6da9bd297bb2900de9303aadea79), + pointee: TypeId(0xf309ab505b839a2649ce3468b9e6c624), mutable: false, }, ), size: Some( 8, ), + id: TypeId(0x554a9c8fbaeb2e817a9907ca7fe7dccf), } Type { kind: Reference( @@ -175,6 +190,7 @@ Type { size: Some( 8, ), + id: TypeId(0xb98b1b7157a6417863eb502cd6cb5d6d), } Type { kind: Reference( @@ -186,12 +202,14 @@ Type { size: Some( 8, ), + id: TypeId(0x03f6aa200663725e076283e0711c66aa), } Type { kind: Str( Str, ), size: None, + id: TypeId(0x474ccf3b5db264ef53916706f7d7bb2c), } Type { kind: Slice( @@ -200,6 +218,7 @@ Type { }, ), size: None, + id: TypeId(0x641e3def269c37acc6dcb92bf8c5f196), } Type { kind: Reference( @@ -211,6 +230,7 @@ Type { size: Some( 4, ), + id: TypeId(0x8a8d25435c9aa1ed611bd54eddb095c4), } Type { kind: Reference( @@ -222,4 +242,5 @@ Type { size: Some( 4, ), + id: TypeId(0x57bb24072c78596db60e68f83b5de67b), } diff --git a/tests/ui/reflection/dump.bit64.run.stdout b/tests/ui/reflection/dump.bit64.run.stdout index efae226539515..dc37bd76fb272 100644 --- a/tests/ui/reflection/dump.bit64.run.stdout +++ b/tests/ui/reflection/dump.bit64.run.stdout @@ -20,6 +20,7 @@ Type { size: Some( 2, ), + id: TypeId(0x5a16e6fbf8293c4c38740f6ab3f64621), } Type { kind: Array( @@ -31,6 +32,7 @@ Type { size: Some( 2, ), + id: TypeId(0xe09e770f1c1da76825e6290f984ddaf7), } Type { kind: Int( @@ -42,6 +44,7 @@ Type { size: Some( 1, ), + id: TypeId(0x12427c993eca190c841e0d92c5b7a45d), } Type { kind: Int( @@ -53,6 +56,7 @@ Type { size: Some( 4, ), + id: TypeId(0x56ced5e4a15bd89050bb9674fa2df013), } Type { kind: Int( @@ -64,6 +68,7 @@ Type { size: Some( 8, ), + id: TypeId(0xae6c4318bb07632e00428affbea41961), } Type { kind: Int( @@ -75,6 +80,7 @@ Type { size: Some( 16, ), + id: TypeId(0xc7164498f3902dde0d8194a7b9733e79), } Type { kind: Int( @@ -86,6 +92,7 @@ Type { size: Some( 8, ), + id: TypeId(0x1e5f92831c560aac8658b980a22e60b0), } Type { kind: Int( @@ -97,6 +104,7 @@ Type { size: Some( 1, ), + id: TypeId(0x0596b48cc04376e64d5c788c2aa46bdb), } Type { kind: Int( @@ -108,6 +116,7 @@ Type { size: Some( 4, ), + id: TypeId(0x1378bb1c0a0202683eb65e7c11f2e4d7), } Type { kind: Int( @@ -119,6 +128,7 @@ Type { size: Some( 8, ), + id: TypeId(0x9ed91be891e304132cb86891e578f4a5), } Type { kind: Int( @@ -130,6 +140,7 @@ Type { size: Some( 16, ), + id: TypeId(0x7bf7411d57d603e9fb393892a9c3f362), } Type { kind: Int( @@ -141,18 +152,21 @@ Type { size: Some( 8, ), + id: TypeId(0x763d199bccd319899208909ed1a860c6), } Type { kind: Other, size: Some( 4, ), + id: TypeId(0x78c34ce87517aee8f0d54cc3ea348028), } Type { kind: Other, size: Some( 24, ), + id: TypeId(0x8ed28b76f102b777afcc7a07749d45fe), } Type { kind: Reference( @@ -164,6 +178,7 @@ Type { size: Some( 16, ), + id: TypeId(0x4d13f2e9be6854d4529cc187d26d3e83), } Type { kind: Reference( @@ -175,6 +190,7 @@ Type { size: Some( 16, ), + id: TypeId(0xb98b1b7157a6417863eb502cd6cb5d6d), } Type { kind: Reference( @@ -186,12 +202,14 @@ Type { size: Some( 16, ), + id: TypeId(0x03f6aa200663725e076283e0711c66aa), } Type { kind: Str( Str, ), size: None, + id: TypeId(0x474ccf3b5db264ef53916706f7d7bb2c), } Type { kind: Slice( @@ -200,6 +218,7 @@ Type { }, ), size: None, + id: TypeId(0x641e3def269c37acc6dcb92bf8c5f196), } Type { kind: Reference( @@ -211,6 +230,7 @@ Type { size: Some( 8, ), + id: TypeId(0x8a8d25435c9aa1ed611bd54eddb095c4), } Type { kind: Reference( @@ -222,4 +242,5 @@ Type { size: Some( 8, ), + id: TypeId(0x57bb24072c78596db60e68f83b5de67b), } diff --git a/tests/ui/rfcs/rfc-2008-non-exhaustive/invalid-attribute.stderr b/tests/ui/rfcs/rfc-2008-non-exhaustive/invalid-attribute.stderr index d711c3f2eb129..98e8f1235e6b9 100644 --- a/tests/ui/rfcs/rfc-2008-non-exhaustive/invalid-attribute.stderr +++ b/tests/ui/rfcs/rfc-2008-non-exhaustive/invalid-attribute.stderr @@ -21,7 +21,7 @@ error: `#[non_exhaustive]` attribute cannot be used on unions LL | #[non_exhaustive] | ^^^^^^^^^^^^^^^^^ | - = help: `#[non_exhaustive]` can be applied to enum variants, enums, and structs + = help: `#[non_exhaustive]` can be applied to data types and enum variants error: aborting due to 3 previous errors diff --git a/tests/ui/rfcs/rfc-2565-param-attrs/param-attrs-builtin-attrs.stderr b/tests/ui/rfcs/rfc-2565-param-attrs/param-attrs-builtin-attrs.stderr index c234cb31bc561..cc08307a18d04 100644 --- a/tests/ui/rfcs/rfc-2565-param-attrs/param-attrs-builtin-attrs.stderr +++ b/tests/ui/rfcs/rfc-2565-param-attrs/param-attrs-builtin-attrs.stderr @@ -389,7 +389,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions = note: requested on the command line with `-W unused-attributes` warning: `#[no_mangle]` attribute cannot be used on function params @@ -408,7 +408,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:70:9 @@ -426,7 +426,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:89:9 @@ -444,7 +444,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:114:9 @@ -462,7 +462,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:137:9 @@ -480,7 +480,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:156:9 @@ -498,7 +498,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:180:9 @@ -516,7 +516,7 @@ LL | #[must_use] | ^^^^^^^^^^^ | = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release! - = help: `#[must_use]` can be applied to data types, functions, and traits + = help: `#[must_use]` can be applied to data types, functions, traits, and unions warning: `#[no_mangle]` attribute cannot be used on function params --> $DIR/param-attrs-builtin-attrs.rs:201:9 diff --git a/tests/ui/simd/dont-invalid-bitcast-masks.rs b/tests/ui/simd/dont-invalid-bitcast-masks.rs index 1e2d097198d03..3d8376207cd07 100644 --- a/tests/ui/simd/dont-invalid-bitcast-masks.rs +++ b/tests/ui/simd/dont-invalid-bitcast-masks.rs @@ -12,6 +12,6 @@ use std::simd::num::*; pub unsafe fn mask_to_array(mask: u8) -> [i32; 8] { let mut output = [0; 8]; let m = masksizex8::from_bitmask(mask as _); - output.copy_from_slice(&m.to_simd().cast::().to_array()); + output.copy_from_slice(&m.to_int().cast::().to_array()); output } diff --git a/tests/ui/typeck/typeck_type_placeholder_item.stderr b/tests/ui/typeck/typeck_type_placeholder_item.stderr index 2772d55f953a8..0b70ac97fd435 100644 --- a/tests/ui/typeck/typeck_type_placeholder_item.stderr +++ b/tests/ui/typeck/typeck_type_placeholder_item.stderr @@ -684,6 +684,13 @@ error[E0015]: cannot call non-const method ` as Iterator>:: LL | const _: _ = (1..10).filter(|x| x % 2 == 0).map(|x| x * x); | ^^^^^^^^^^^^^^^^^^^^^^ | +note: method `filter` is not const because trait `Iterator` is not const + --> $SRC_DIR/core/src/iter/traits/iterator.rs:LL:COL + | + = note: this trait is not const + ::: $SRC_DIR/core/src/iter/traits/iterator.rs:LL:COL + | + = note: this method is not const = note: calls in constants are limited to constant functions, tuple structs and tuple variants error[E0015]: cannot call non-const method `, {closure@$DIR/typeck_type_placeholder_item.rs:240:29: 240:32}> as Iterator>::map::` in constants @@ -692,6 +699,13 @@ error[E0015]: cannot call non-const method `, {closu LL | const _: _ = (1..10).filter(|x| x % 2 == 0).map(|x| x * x); | ^^^^^^^^^^^^^^ | +note: method `map` is not const because trait `Iterator` is not const + --> $SRC_DIR/core/src/iter/traits/iterator.rs:LL:COL + | + = note: this trait is not const + ::: $SRC_DIR/core/src/iter/traits/iterator.rs:LL:COL + | + = note: this method is not const = note: calls in constants are limited to constant functions, tuple structs and tuple variants error: aborting due to 83 previous errors diff --git a/tests/ui/where-clauses/unsupported_attribute.stderr b/tests/ui/where-clauses/unsupported_attribute.stderr index e69eff976c3f1..9ebc14c40a145 100644 --- a/tests/ui/where-clauses/unsupported_attribute.stderr +++ b/tests/ui/where-clauses/unsupported_attribute.stderr @@ -64,7 +64,7 @@ error: `#[deprecated]` attribute cannot be used on where predicates LL | #[deprecated] T: Trait, | ^^^^^^^^^^^^^ | - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements error: `#[deprecated]` attribute cannot be used on where predicates --> $DIR/unsupported_attribute.rs:25:5 @@ -72,7 +72,7 @@ error: `#[deprecated]` attribute cannot be used on where predicates LL | #[deprecated] 'a: 'static, | ^^^^^^^^^^^^^ | - = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, and use statements + = help: `#[deprecated]` can be applied to associated consts, associated types, constants, crates, data types, enum variants, foreign statics, functions, inherent impl blocks, macro defs, modules, statics, struct fields, traits, type aliases, unions, and use statements error: `#[automatically_derived]` attribute cannot be used on where predicates --> $DIR/unsupported_attribute.rs:26:5 diff --git a/triagebot.toml b/triagebot.toml index eb25d6e1b2015..1572c4c8d0456 100644 --- a/triagebot.toml +++ b/triagebot.toml @@ -1182,11 +1182,11 @@ cc = ["@Muscraft"] [mentions."compiler/rustc_errors/src/translation.rs"] message = "`rustc_errors::translation` was changed" -cc = ["@davidtwco", "@TaKO8Ki", "@JonathanBrouwer"] +cc = ["@davidtwco", "@TaKO8Ki"] [mentions."compiler/rustc_macros/src/diagnostics"] message = "`rustc_macros::diagnostics` was changed" -cc = ["@davidtwco", "@TaKO8Ki", "@JonathanBrouwer"] +cc = ["@davidtwco", "@TaKO8Ki"] [mentions."compiler/rustc_public"] message = "This PR changes rustc_public" diff --git a/typos.toml b/typos.toml index e486a7c1722cd..920234a9381bc 100644 --- a/typos.toml +++ b/typos.toml @@ -1,6 +1,3 @@ -# Config for the `typos` crate, used by `./x test tidy --extra-checks=spellcheck`. -# See also: https://github.com/crate-ci/typos/blob/v1.28.2/docs/reference.md - [files] extend-exclude = [ # exclude git (sub)modules and generated content @@ -16,66 +13,57 @@ extend-exclude = [ ] [default.extend-words] -# Allowlist for words that look like typos but are not, or aren't worth fixing -# right now. Entries should look like `mipsel = "mipsel"`. +# Add exclusions here, lines should be like `x = "x"`, where `x` is excluded word. # -# tidy-alphabetical-start -arange = "arange" # short for A-range +# Also see docs: https://github.com/crate-ci/typos/blob/v1.28.2/docs/reference.md +arange = "arange" childs = "childs" clonable = "clonable" -filetimes = "filetimes" # short for "file times", not a typo for "lifetimes" +Datas = "Datas" +filetimes = "filetimes" leafs = "leafs" -makro = "makro" # deliberate misspelling to avoid `macro` keyword +makro = "makro" misformed = "misformed" moreso = "moreso" -numer = "numer" # short for numerator, not a typo for "number" -optin = "optin" # short for opt-in +optin = "optin" publically = "publically" -rplace = "rplace" # short for R-place +rplace = "rplace" +smove = "smove" splitted = "splitted" -taits = "taits" # lowercase for TAITs (type alias impl trait) +taits = "taits" targetting = "targetting" unparseable = "unparseable" unstability = "unstability" -unstalled = "unstalled" # short for un-stalled -# tidy-alphabetical-end +unstalled = "unstalled" +numer = "numer" -# Denylist to forbid misspelled words that aren't detected by the built-in -# dictionary. Entries should look like `mipsel = ""` or `mipsel = "misspell"`; -# the non-empty form can be automatically fixed by `--bless`. -# -# tidy-alphabetical-start -definitinon = "definition" -similarlty = "similarity" -# tidy-alphabetical-end +# this can be valid word, depends on dictionary edition +#matcheable = "matcheable" [default.extend-identifiers] -# Allowlist for specific identifiers that should be permitted even though they -# appear to contain typos that would be forbidden in other identifiers. -# -# For example, you might want to allow a specific constant like -# `DNS_ERROR_INVAILD_VIRTUALIZATION_INSTANCE_NAME`, but still want to forbid -# the typo `INVAILD` in other places. +# An entry goes here if the typo is part of some existing ident +# where you want to keep it, but don't want to allow +# such typos everywhere. # -# tidy-alphabetical-start +# I.e. you don't want (or can't) fix some constant name, like +# `DNS_ERROR_INVAILD_VIRTUALIZATION_INSTANCE_NAME` but actually +# want to see `INVAILD` typo fixed in other places. +debug_aranges = "debug_aranges" DNS_ERROR_INVAILD_VIRTUALIZATION_INSTANCE_NAME = "DNS_ERROR_INVAILD_VIRTUALIZATION_INSTANCE_NAME" +EnzymeTypeTreeShiftIndiciesEq = "EnzymeTypeTreeShiftIndiciesEq" +EnzymeTypeTreeShiftIndiciesEqFn = "EnzymeTypeTreeShiftIndiciesEqFn" +shift_indicies_eq = "shift_indicies_eq" ERRNO_ACCES = "ERRNO_ACCES" ERROR_DS_FILTER_USES_CONTRUCTED_ATTRS = "ERROR_DS_FILTER_USES_CONTRUCTED_ATTRS" ERROR_DS_NOT_AUTHORITIVE_FOR_DST_NC = "ERROR_DS_NOT_AUTHORITIVE_FOR_DST_NC" ERROR_FILENAME_EXCED_RANGE = "ERROR_FILENAME_EXCED_RANGE" ERROR_MCA_OCCURED = "ERROR_MCA_OCCURED" ERROR_REQ_NOT_ACCEP = "ERROR_REQ_NOT_ACCEP" -EnzymeTypeTreeShiftIndiciesEq = "EnzymeTypeTreeShiftIndiciesEq" -EnzymeTypeTreeShiftIndiciesEqFn = "EnzymeTypeTreeShiftIndiciesEqFn" -Oppen = "Oppen" # Derek C. Oppen, author of "Pretty Printing" (1979) +Oppen = "Oppen" # typos treats this as two different camelcase words (`SETTIN` and `Gs`) # Tracked in: https://github.com/crate-ci/typos/issues/745 SETTINGs = "SETTINGs" -debug_aranges = "debug_aranges" # debug A-ranges -key_smove = "key_smove" # shifted move key, used by terminfo -shift_indicies_eq = "shift_indicies_eq" -tolen = "tolen" # length of "to" buffer, used by `sendto` in Windows sockets -# tidy-alphabetical-end +tolen = "tolen" [default] extend-ignore-words-re = [

(&mut self, predicate: P) -> Option where P: FnMut(Self::Item) -> bool, @@ -3224,7 +3178,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn max(self) -> Option where Self: Sized, @@ -3261,7 +3214,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn min(self) -> Option where Self: Sized, @@ -3284,7 +3236,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iter_cmp_by_key", since = "1.6.0")] - #[rustc_non_const_trait_method] fn max_by_key(self, f: F) -> Option where Self: Sized, @@ -3318,7 +3269,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iter_max_by", since = "1.15.0")] - #[rustc_non_const_trait_method] fn max_by(self, compare: F) -> Option where Self: Sized, @@ -3346,7 +3296,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iter_cmp_by_key", since = "1.6.0")] - #[rustc_non_const_trait_method] fn min_by_key(self, f: F) -> Option where Self: Sized, @@ -3380,7 +3329,6 @@ pub const trait Iterator { /// ``` #[inline] #[stable(feature = "iter_min_by", since = "1.15.0")] - #[rustc_non_const_trait_method] fn min_by(self, compare: F) -> Option where Self: Sized, @@ -3418,7 +3366,6 @@ pub const trait Iterator { #[inline] #[doc(alias = "reverse")] #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn rev(self) -> Rev where Self: Sized + DoubleEndedIterator, @@ -3455,7 +3402,6 @@ pub const trait Iterator { /// assert_eq!(z, [3, 6]); /// ``` #[stable(feature = "rust1", since = "1.0.0")] - #[rustc_non_const_trait_method] fn unzip(self) -> (FromA, FromB) where FromA: Default + Extend, @@ -3487,7 +3433,6 @@ pub const trait Iterator { /// ``` #[stable(feature = "iter_copied", since = "1.36.0")] #[rustc_diagnostic_item = "iter_copied"] - #[rustc_non_const_trait_method] fn copied<'a, T>(self) -> Copied where T: Copy + 'a, @@ -3536,7 +3481,6 @@ pub const trait Iterator { /// ``` #[stable(feature = "rust1", since = "1.0.0")] #[rustc_diagnostic_item = "iter_cloned"] - #[rustc_non_const_trait_method] fn cloned<'a, T>(self) -> Cloned where T: Clone + 'a, @@ -3568,7 +3512,6 @@ pub const trait Iterator { /// ``` #[stable(feature = "rust1", since = "1.0.0")] #[inline] - #[rustc_non_const_trait_method] fn cycle(self) -> Cycle where Self: Sized + Clone, @@ -3612,7 +3555,6 @@ pub const trait Iterator { /// ``` #[track_caller] #[unstable(feature = "iter_array_chunks", issue = "100450")] - #[rustc_non_const_trait_method] fn array_chunks(self) -> ArrayChunks where Self: Sized, @@ -3649,7 +3591,6 @@ pub const trait Iterator { /// assert_eq!(sum, -0.0_f32); /// ``` #[stable(feature = "iter_arith", since = "1.11.0")] - #[rustc_non_const_trait_method] fn sum(self) -> S where Self: Sized, @@ -3682,7 +3623,6 @@ pub const trait Iterator { /// assert_eq!(factorial(5), 120); /// ``` #[stable(feature = "iter_arith", since = "1.11.0")] - #[rustc_non_const_trait_method] fn product