Fix tests for removal of extern "unadjusted" outside of LLVM intrinsics

Author: bjorn3

tests/codegen-llvm/const-vector.rs

@@ -6,16 +6,17 @@
 
 // This test checks that constants of SIMD type are passed as immediate vectors.
 // We ensure that both vector representations (struct with fields and struct wrapping array) work.
+#![allow(non_camel_case_types)]
 #![crate_type = "lib"]
 #![feature(abi_unadjusted)]
+#![feature(arm_target_feature)]
 #![feature(const_trait_impl)]
+#![feature(link_llvm_intrinsics)]
+#![feature(mips_target_feature)]
 #![feature(repr_simd)]
+#![feature(riscv_target_feature)]
 #![feature(rustc_attrs)]
 #![feature(simd_ffi)]
-#![feature(arm_target_feature)]
-#![feature(mips_target_feature)]
-#![allow(non_camel_case_types)]
-#![feature(riscv_target_feature)]
 
 #[path = "../auxiliary/minisimd.rs"]
 mod minisimd;
@@ -25,14 +26,14 @@ use minisimd::{PackedSimd as Simd, f32x2, i8x2};
 // that they are called with a const vector
 
 extern "unadjusted" {
-    fn test_i8x2(a: i8x2);
-    fn test_i8x2_two_args(a: i8x2, b: i8x2);
-    fn test_i8x2_mixed_args(a: i8x2, c: i32, b: i8x2);
-    fn test_i8x2_arr(a: i8x2);
-    fn test_f32x2(a: f32x2);
-    fn test_f32x2_arr(a: f32x2);
-    fn test_simd(a: Simd<i32, 4>);
-    fn test_simd_unaligned(a: Simd<i32, 3>);
+    #[link_name = "llvm.vector.reduce.add.v2i8"]
+    fn test_i8x2_two_args(a: i8x2, b: i8x2) -> i8;
+    #[link_name = "llvm.vector.insert.v2i8.i8"]
+    fn test_i8x2_mixed_args(a: i8x2, b: i8x2, c: u32);
+    #[link_name = "llvm.vector.reduce.add.v2f32"]
+    fn test_f32x2(a: f32x2, b: f32x2) -> f32;
+    #[link_name = "llvm.vector.reduce.add.v3i32"]
+    fn test_simd_unaligned(a: Simd<i32, 3>, b: Simd<i32, 3>) -> i32;
 }
 
 // Ensure the packed variant of the simd struct does not become a const vector
@@ -46,35 +47,29 @@ extern "unadjusted" {
 #[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
 pub fn do_call() {
     unsafe {
-        // CHECK: call void @test_i8x2(<2 x i8> <i8 32, i8 64>
-        test_i8x2(const { i8x2::from_array([32, 64]) });
-
-        // CHECK: call void @test_i8x2_two_args(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>
+        // CHECK: call i8 @llvm.vector.reduce.add.v2i8(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>)
         test_i8x2_two_args(
             const { i8x2::from_array([32, 64]) },
             const { i8x2::from_array([8, 16]) },
         );
 
-        // CHECK: call void @test_i8x2_mixed_args(<2 x i8> <i8 32, i8 64>, i32 43, <2 x i8> <i8 8, i8 16>
+        // CHECK: call void @llvm.vector.insert.v2i8.i8(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>, i32 0)
         test_i8x2_mixed_args(
             const { i8x2::from_array([32, 64]) },
-            43,
             const { i8x2::from_array([8, 16]) },
+            0,
         );
 
-        // CHECK: call void @test_i8x2_arr(<2 x i8> <i8 32, i8 64>
-        test_i8x2_arr(const { i8x2::from_array([32, 64]) });
-
-        // CHECK: call void @test_f32x2(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2(const { f32x2::from_array([0.32, 0.64]) });
-
-        // CHECK: void @test_f32x2_arr(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>
-        test_f32x2_arr(const { f32x2::from_array([0.32, 0.64]) });
-
-        // CHECK: call void @test_simd(<4 x i32> <i32 2, i32 4, i32 6, i32 8>
-        test_simd(const { Simd::<i32, 4>([2, 4, 6, 8]) });
+        // CHECK: call float @llvm.vector.reduce.add.v2f32(<2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>, <2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000>)
+        test_f32x2(
+            const { f32x2::from_array([0.32, 0.64]) },
+            const { f32x2::from_array([0.32, 0.64]) },
+        );
 
-        // CHECK: call void @test_simd_unaligned(%"minisimd::PackedSimd<i32, 3>" %1
-        test_simd_unaligned(const { Simd::<i32, 3>([2, 4, 6]) });
+        // CHECK: call i32 @llvm.vector.reduce.add.v3i32(%"minisimd::PackedSimd<i32, 3>"
+        test_simd_unaligned(
+            const { Simd::<i32, 3>([2, 4, 6]) },
+            const { Simd::<i32, 3>([2, 4, 6]) },
+        );
     }
 }

tests/codegen-llvm/simd/unpadded-simd.rs

@@ -1,19 +1,14 @@
 // Make sure that no 0-sized padding is inserted in structs and that
 // structs are represented as expected by Neon intrinsics in LLVM.
 // See #87254.
+//@ only-aarch64
 
 #![crate_type = "lib"]
-#![feature(repr_simd, abi_unadjusted)]
 
-#[derive(Copy, Clone)]
-#[repr(simd)]
-pub struct int16x4_t(pub [i16; 4]);
+use std::arch::aarch64::{int16x4x2_t, vld1_s16_x2};
 
-#[derive(Copy, Clone)]
-pub struct int16x4x2_t(pub int16x4_t, pub int16x4_t);
-
-// CHECK: %int16x4x2_t = type { <4 x i16>, <4 x i16> }
 #[no_mangle]
-extern "unadjusted" fn takes_int16x4x2_t(t: int16x4x2_t) -> int16x4x2_t {
-    t
+unsafe extern "C" fn returns_int16x4x2_t(a: *const i16) -> int16x4x2_t {
+    // CHECK: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0
+    vld1_s16_x2(a)
 }