RISC-V also has sane nontemporal stores

Author: RalfJung

Diff for: compiler/rustc_codegen_llvm/src/builder.rs

@@ -735,7 +735,8 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
                 // a hint, and use regular stores everywhere else.
                 // (In the future, we could alternatively ensure that an sfence gets emitted after a sequence of movnt
                 // before any kind of synchronizing operation. But it's not clear how to do that with LLVM.)
-                const WELL_BEHAVED_NONTEMPORAL_ARCHS: &[&str] = &["aarch64", "arm"];
+                const WELL_BEHAVED_NONTEMPORAL_ARCHS: &[&str] =
+                    &["aarch64", "arm", "riscv32", "riscv64"];
 
                 let use_nontemporal =
                     WELL_BEHAVED_NONTEMPORAL_ARCHS.contains(&&*self.cx.tcx.sess.target.arch);