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rustup
1 parent 3a2252b commit df19b85

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14 files changed

+22
-54
lines changed

14 files changed

+22
-54
lines changed

rust-version

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
e1b28cd2f16bd5b832183d7968cae3bb9213e78d
1+
4065b89b1e7287047d7d6c65e7abd7b8ee70bcf0

src/concurrency/data_race.rs

Lines changed: 3 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -530,12 +530,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
530530

531531
this.validate_atomic_rmw(place, atomic)?;
532532

533-
this.buffered_atomic_rmw(
534-
val.to_scalar(),
535-
place,
536-
atomic,
537-
old.to_scalar(),
538-
)?;
533+
this.buffered_atomic_rmw(val.to_scalar(), place, atomic, old.to_scalar())?;
539534
Ok(old)
540535
}
541536

@@ -586,12 +581,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
586581

587582
this.validate_atomic_rmw(place, atomic)?;
588583

589-
this.buffered_atomic_rmw(
590-
new_val.to_scalar(),
591-
place,
592-
atomic,
593-
old.to_scalar(),
594-
)?;
584+
this.buffered_atomic_rmw(new_val.to_scalar(), place, atomic, old.to_scalar())?;
595585

596586
// Return the old value.
597587
Ok(old)
@@ -633,10 +623,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: MiriEvalContextExt<'mir, 'tcx> {
633623
} else {
634624
true
635625
};
636-
let res = Immediate::ScalarPair(
637-
old.to_scalar(),
638-
Scalar::from_bool(cmpxchg_success).into(),
639-
);
626+
let res = Immediate::ScalarPair(old.to_scalar(), Scalar::from_bool(cmpxchg_success));
640627

641628
// Update ptr depending on comparison.
642629
// if successful, perform a full rw-atomic validation

src/concurrency/weak_memory.rs

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -77,9 +77,7 @@ use std::{
7777
collections::VecDeque,
7878
};
7979

80-
use rustc_const_eval::interpret::{
81-
alloc_range, AllocRange, InterpResult, MPlaceTy, Scalar,
82-
};
80+
use rustc_const_eval::interpret::{alloc_range, AllocRange, InterpResult, MPlaceTy, Scalar};
8381
use rustc_data_structures::fx::FxHashMap;
8482

8583
use crate::*;
@@ -417,11 +415,7 @@ impl StoreElement {
417415
/// buffer regardless of subsequent loads by the same thread; if the earliest load of another
418416
/// thread doesn't happen before the current one, then no subsequent load by the other thread
419417
/// can happen before the current one.
420-
fn load_impl(
421-
&self,
422-
index: VectorIdx,
423-
clocks: &ThreadClockSet,
424-
) -> Scalar<Provenance> {
418+
fn load_impl(&self, index: VectorIdx, clocks: &ThreadClockSet) -> Scalar<Provenance> {
425419
let _ = self.loads.borrow_mut().try_insert(index, clocks.clock[index]);
426420
self.val
427421
}

src/shims/ffi_support.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
1313
/// Extract the scalar value from the result of reading a scalar from the machine,
1414
/// and convert it to a `CArg`.
1515
fn scalar_to_carg(
16-
k: ScalarMaybeUninit<Provenance>,
16+
k: Scalar<Provenance>,
1717
arg_type: Ty<'tcx>,
1818
cx: &impl HasDataLayout,
1919
) -> InterpResult<'tcx, CArg> {

src/shims/intrinsics/simd.rs

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -396,11 +396,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
396396
let dest_len = u32::try_from(dest_len).unwrap();
397397
let bitmask_len = u32::try_from(bitmask_len).unwrap();
398398

399-
let mask: u64 = this
400-
.read_scalar(mask)?
401-
.to_bits(mask.layout.size)?
402-
.try_into()
403-
.unwrap();
399+
let mask: u64 =
400+
this.read_scalar(mask)?.to_bits(mask.layout.size)?.try_into().unwrap();
404401
for i in 0..dest_len {
405402
let mask = mask
406403
& 1u64

src/shims/os_str.rs

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -156,8 +156,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
156156
.unwrap(); // not a ZST, so we will get a result
157157
for (offset, wchar) in u16_vec.into_iter().chain(iter::once(0x0000)).enumerate() {
158158
let offset = u64::try_from(offset).unwrap();
159-
alloc
160-
.write_scalar(alloc_range(size2 * offset, size2), Scalar::from_u16(wchar).into())?;
159+
alloc.write_scalar(alloc_range(size2 * offset, size2), Scalar::from_u16(wchar))?;
161160
}
162161
Ok((true, string_length))
163162
}

src/shims/unix/freebsd/foreign_items.rs

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
2626
"pthread_set_name_np" => {
2727
let [thread, name] =
2828
this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
29-
let res = this.pthread_setname_np(
30-
this.read_scalar(thread)?.check_init()?,
31-
this.read_scalar(name)?.check_init()?,
32-
)?;
29+
let res =
30+
this.pthread_setname_np(this.read_scalar(thread)?, this.read_scalar(name)?)?;
3331
this.write_scalar(res, dest)?;
3432
}
3533

src/shims/unix/linux/foreign_items.rs

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -68,10 +68,8 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
6868
"pthread_setname_np" => {
6969
let [thread, name] =
7070
this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
71-
let res = this.pthread_setname_np(
72-
this.read_scalar(thread)?.check_init()?,
73-
this.read_scalar(name)?.check_init()?,
74-
)?;
71+
let res =
72+
this.pthread_setname_np(this.read_scalar(thread)?, this.read_scalar(name)?)?;
7573
this.write_scalar(res, dest)?;
7674
}
7775

src/shims/unix/macos/foreign_items.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
176176
"pthread_setname_np" => {
177177
let [name] = this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
178178
let thread = this.pthread_self()?;
179-
this.pthread_setname_np(thread, this.read_scalar(name)?.check_init()?)?;
179+
this.pthread_setname_np(thread, this.read_scalar(name)?)?;
180180
}
181181

182182
// Incomplete shims that we "stub out" just to get pre-main initialization code to work.

src/shims/unix/sync.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ fn mutex_get_or_create_id<'mir, 'tcx: 'mir>(
119119
.atomic_compare_exchange_scalar(
120120
&value_place,
121121
&ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
122-
next_id.to_u32_scalar().into(),
122+
next_id.to_u32_scalar(),
123123
AtomicRwOrd::Relaxed,
124124
AtomicReadOrd::Relaxed,
125125
false,
@@ -160,7 +160,7 @@ fn rwlock_get_or_create_id<'mir, 'tcx: 'mir>(
160160
.atomic_compare_exchange_scalar(
161161
&value_place,
162162
&ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
163-
next_id.to_u32_scalar().into(),
163+
next_id.to_u32_scalar(),
164164
AtomicRwOrd::Relaxed,
165165
AtomicReadOrd::Relaxed,
166166
false,
@@ -243,7 +243,7 @@ fn cond_get_or_create_id<'mir, 'tcx: 'mir>(
243243
.atomic_compare_exchange_scalar(
244244
&value_place,
245245
&ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
246-
next_id.to_u32_scalar().into(),
246+
next_id.to_u32_scalar(),
247247
AtomicRwOrd::Relaxed,
248248
AtomicReadOrd::Relaxed,
249249
false,

src/shims/windows/dlsym.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
112112
Dlsym::SetThreadDescription => {
113113
let [handle, name] = check_arg_count(args)?;
114114

115-
let handle = this.read_scalar(handle)?.check_init()?;
115+
let handle = this.read_scalar(handle)?;
116116

117117
let name = this.read_wide_str(this.read_pointer(name)?)?;
118118

src/shims/windows/handle.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
158158
fn CloseHandle(&mut self, handle_op: &OpTy<'tcx, Provenance>) -> InterpResult<'tcx> {
159159
let this = self.eval_context_mut();
160160

161-
let handle = this.read_scalar(handle_op)?.check_init()?;
161+
let handle = this.read_scalar(handle_op)?;
162162

163163
match Handle::from_scalar(handle, this)? {
164164
Some(Handle::Thread(thread)) =>

src/shims/windows/sync.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ fn srwlock_get_or_create_id<'mir, 'tcx: 'mir>(
1414
.atomic_compare_exchange_scalar(
1515
&value_place,
1616
&ImmTy::from_uint(0u32, ecx.machine.layouts.u32),
17-
next_id.to_u32_scalar().into(),
17+
next_id.to_u32_scalar(),
1818
AtomicRwOrd::Relaxed,
1919
AtomicReadOrd::Relaxed,
2020
false,

src/shims/windows/thread.rs

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,14 +20,10 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
2020
let this = self.eval_context_mut();
2121

2222
let security = this.read_pointer(security_op)?;
23-
2423
// stacksize is ignored, but still needs to be a valid usize
2524
this.read_scalar(stacksize_op)?.to_machine_usize(this)?;
26-
2725
let start_routine = this.read_pointer(start_op)?;
28-
2926
let func_arg = this.read_immediate(arg_op)?;
30-
3127
let flags = this.read_scalar(flags_op)?.to_u32()?;
3228

3329
let thread = if this.ptr_is_null(this.read_pointer(thread_op)?)? {
@@ -66,8 +62,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx
6662
) -> InterpResult<'tcx, u32> {
6763
let this = self.eval_context_mut();
6864

69-
let handle = this.read_scalar(handle_op)?.check_init()?;
70-
65+
let handle = this.read_scalar(handle_op)?;
7166
let timeout = this.read_scalar(timeout_op)?.to_u32()?;
7267

7368
let thread = match Handle::from_scalar(handle, this)? {

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