Incorrect interrupt preemption description #627
Description
I was checking the preemption logic and, as I can see, the original issue from #575 is still in place.
Lets assume:
IPRIOLEN = 8
mipreemptcfg.preemptmsk = 4
As I understand, we should have 16 preemption levels in such configuration.
The documentation states
NIPPRIO_MASK = ~(2^(mipreemptcfg.preemptmsk) - 1)
which gives us NIPPRIO_MASK = 0xFFFF_FFF0
Let's consider the following sequence:
mithreshold = 0x255 (initial)
1'st interrupt starts pending, with iprio = 7.
Documentation states that interrupt considered disabled, when the following condition holds:
iprio[i] & NIPPRIO_MASK >= xithreshold
For this interrupt:
7 & 0xFFFF_FFF0 >= 0x255 ---> false, so interrupt is enabled.
When the interrupt trap happens, the following actions are performed:
mpistatus.pithreshold = mithreshold = 0x255
mithreshold = iprio = 7
After that, the 2'nd interrupt starts pending, with iprio = 6.
For this interrupt:
6 & 0xFFFF_FFF0 >= 7 ---> false, so interrupt is enabled.
Hence, the the second interrupt is enabled, and can preempt the first one.
However, from my understanding, both interrupts (iprio = 6 and 7) are in the same preemption level and they should not preempt each other.
Am I missing something here?
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