Current ACLIC spec has two interrupt types: major and external interrupts.

To achieve interrupts nesting and vectoring for both interrupt types the ACLIC spec introduces several new CSRs and extensions:

• new mivt, sivt, meivt, seivt CSRs for major and external IVTs
• new Smaiae extension to provide
  • stopi, mtopi CSRs which needed for information about priority and identity of current top major interrupt
  • iprio0-15 iCSRs array to have configurable priority for major interrupts

We want to propose an alternative approach, which is that we unify major and external interrupts:

• In ACLIC mode, ACLIC becomes the hart's primary - and only - interrupt controller. The major interrupts are forwarded to ACLIC, according to their major IID. The 'CLINT' is not used.
• When ACLIC mode is disabled (legacy mode) major interrupts are routed to CLINT (as in RISC-V ISA). The ACLIC is an external interrupt controller. In that mode there is no configurable priority for major interrupts, no vectoring, no nesting.

The resource-constrained systems targeted by ACLIC are likely to have limited number of major local interrupt sources (M-timer, S-timer, M-software interrupts). Among all of them, only the M-timer interrupt is mandatory, according to the RISC-V ISA spec. So the resources duplication between CLINT and ACLIC is minimal.

Advantages of the proposed approach

• a unified interrupt identity space, simplifying both HW and SW
  • no need separate IVTs for major and external interrupts
    • no need in new mivt, sivt, meivt, seivt CSRs. Existing xtvec CSRs can be used for vector base for all interrupts.
  • no need in mtopi, stopi CSRs
  • no need in mithreshold, sithreshold CSRs
  • no need in iprio0-15 iCSRs array
    • all interrupt priority numbers are identical
  • simplified interrupt handler logic
    • no need to deal with both major & external IIDs
  • simplified interrupt configuration - all interrupts are configured the same way
  • simplified tpush logic of Smtp extension
  • no need in Smaia/Ssaia dependency & no need in new Smaiae extension
    • if we drop AIA dependency we can also drop mvip, mviph, mvien, mvienh, miph, siph, mieh, sieh, midelegh CSRs
• fully compatible with RISC-V ISA
• Smaia/Ssaia extensions can be added, if required
• trivial further size reduction:
  • i.e.: application-specific IC with stricter resource constraints (and without requirement of being fully compatible to RISC-V) can implement ACLIC without CLINT at all. No ACLIC architectural changes needed for that, HW still be fully compatible with ACLIC handling mode

Since this approach offers a minimalistic ACLIC implementation, it may be more beneficial to use it as the default rather than as a separate extension.