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one cpu ok
1 parent a03e1bd commit a5b4eb5

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4 files changed

+39
-16
lines changed

4 files changed

+39
-16
lines changed

Cargo.lock

Lines changed: 9 additions & 6 deletions
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platforms/axplat-aarch64-dyn/Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,5 +17,5 @@ axplat = {workspace = true}
1717
fdt-parser = "0.4"
1818
heapless = "0.8"
1919
memory_addr = "0.3"
20-
pie-boot = {version = "0.2.2"}
20+
pie-boot = {version = "0.2.6"}
2121
spin = "0.10"

platforms/axplat-aarch64-dyn/axconfig.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ package = "axplat-aarch64-dyn" # str
1212
# Platform family (deprecated).
1313
family = "" # str
1414
# Number of CPUs.
15-
cpu-num = 256 # uint
15+
cpu-num = 1 # uint
1616
# No need.
1717
phys-memory-base = 0 # uint
1818
# No need.

platforms/axplat-aarch64-dyn/src/mem.rs

Lines changed: 28 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2,17 +2,26 @@ use core::ops::Range;
22

33
use axplat::mem::{MemIf, RawRange};
44
use heapless::Vec;
5-
use memory_addr::{PhysAddr, VirtAddr};
5+
use memory_addr::{MemoryAddr, PhysAddr, VirtAddr};
66
use pie_boot::{KIMAGE_VADDR, KLINER_OFFSET, MemoryRegionKind, boot_info};
7-
use spin::{Mutex, Once};
7+
use spin::{Mutex, Once, RwLock};
88

99
struct MemIfImpl;
1010

1111
static RAM_LIST: Once<Vec<RawRange, 32>> = Once::new();
1212
static RESERVED_LIST: Once<Vec<RawRange, 32>> = Once::new();
13-
static MMIO: Mutex<Vec<RawRange, 32>> = Mutex::new(Vec::new());
13+
static MMIO: Once<Vec<RawRange, 32>> = Once::new();
14+
static mut VA_OFFSET: usize = 0;
15+
16+
fn va_offset() -> usize {
17+
unsafe { VA_OFFSET }
18+
}
1419

1520
pub fn setup() {
21+
unsafe {
22+
VA_OFFSET = boot_info().kimage_start_vma as usize - boot_info().kimage_start_lma as usize
23+
};
24+
1625
RAM_LIST.call_once(|| {
1726
let mut ram_list = Vec::new();
1827
for region in boot_info()
@@ -28,6 +37,7 @@ pub fn setup() {
2837

2938
RESERVED_LIST.call_once(|| {
3039
let mut ram_list = Vec::new();
40+
3141
for region in boot_info()
3242
.memory_regions
3343
.iter()
@@ -43,6 +53,16 @@ pub fn setup() {
4353
}
4454
ram_list
4555
});
56+
57+
MMIO.call_once(|| {
58+
let mut mmio_list = Vec::new();
59+
if let Some(debug) = &boot_info().debug_console {
60+
let start = (debug.base as usize).align_down_4k();
61+
let _ = mmio_list.push((start, 0x1000));
62+
}
63+
64+
mmio_list
65+
});
4666
}
4767

4868
#[impl_plat_interface]
@@ -68,20 +88,20 @@ impl MemIf for MemIfImpl {
6888

6989
/// Returns all device memory (MMIO) ranges on the platform.
7090
fn mmio_ranges() -> &'static [RawRange] {
71-
&[]
91+
MMIO.wait()
7292
}
7393

7494
fn phys_to_virt(p: PhysAddr) -> VirtAddr {
7595
if kimage_range_phys().contains(&p) {
76-
VirtAddr::from_usize(p.as_usize() + KIMAGE_VADDR)
96+
VirtAddr::from_usize(p.as_usize() + va_offset())
7797
} else {
7898
// MMIO or other reserved regions
7999
VirtAddr::from_usize(p.as_usize() + KLINER_OFFSET)
80100
}
81101
}
82102
fn virt_to_phys(p: VirtAddr) -> PhysAddr {
83103
if (KIMAGE_VADDR..KLINER_OFFSET).contains(&p.as_usize()) {
84-
PhysAddr::from_usize(p.as_usize() - KIMAGE_VADDR)
104+
PhysAddr::from_usize(p.as_usize() - va_offset())
85105
} else {
86106
PhysAddr::from_usize(p.as_usize() - KLINER_OFFSET)
87107
}
@@ -94,7 +114,7 @@ fn kimage_range_phys() -> Range<PhysAddr> {
94114
fn _ekernel();
95115
}
96116

97-
let start = PhysAddr::from_usize(_skernel as usize - KIMAGE_VADDR);
98-
let end = PhysAddr::from_usize(_ekernel as usize - KIMAGE_VADDR);
117+
let start = PhysAddr::from_usize(KIMAGE_VADDR - va_offset());
118+
let end = PhysAddr::from_usize(_ekernel as usize - va_offset());
99119
start..end
100120
}

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