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Fabian Schuiki
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Merge remote-tracking branch 'github/master'
Conflicts: .gitignore Bender.yml
2 parents 54659f6 + 6eb166f commit 4d05b1f

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.gitignore

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.*
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!.git*
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/Bender.lock
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!.editorconfig
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build
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/Bender.local
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/Bender.lock

Bender.yml

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package:
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name: axi_mem_if
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authors: [ "Florian Zaruba <zarubaf@iis.ee.ethz.ch>"]
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dependencies:
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axi_slice: { git: "git@iis-git.ee.ethz.ch:sasa/axi_slice.git", version: 1.1.2 }
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axi: { git: "git@iis-git.ee.ethz.ch:sasa/axi.git", rev: master }
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sources:
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- axi_mem_if.sv
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- axi_mem_if_wrap.sv
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- axi_mem_if_var_latency.sv
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- src/axi2mem.sv
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- src/deprecated/axi_mem_if.sv
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- src/deprecated/axi_mem_if_var_latency.sv
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- src/deprecated/axi_mem_if_wrap.sv

CHANGELOG.md

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# Changelog
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All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/)
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and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.html).
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## [Unreleased]
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## [0.1.0]
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- Commit initial version

axi_mem_if.core

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CAPI=2:
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name : pulp-platform.org::axi_mem_if:0
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filesets:
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rtl:
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files:
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- axi2mem.sv
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- axi_mem_if.sv
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- axi_mem_if_var_latency.sv
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- axi_mem_if_wrap.sv
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file_type : systemVerilogSource
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targets:
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default:
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filesets : [rtl]
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axi2mem.sv renamed to src/axi2mem.sv

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// Copyright 2018 ETH Zurich and University of Bologna.
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// Copyright and related rights are licensed under the Solderpad Hardware
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// License, Version 0.51 (the License); you may not use this file except in
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// License, Version 0.51 (the "License"); you may not use this file except in
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// compliance with the License. You may obtain a copy of the License at
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// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
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// or agreed to in writing, software, hardware and materials distributed under
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// this License is distributed on an AS IS BASIS, WITHOUT WARRANTIES OR
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// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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//
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// Copyright 2014-2018 ETH Zurich and University of Bologna.
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// Copyright and related rights are licensed under the Solderpad Hardware
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// License, Version 0.51 (the “License”); you may not use this file except in
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// compliance with the License. You may obtain a copy of the License at
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// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
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// or agreed to in writing, software, hardware and materials distributed under
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// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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//
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// Author: Florian Zaruba, ETH Zurich
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// Date: 05.07.2017
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// Description: Wrap of AXI to MEM adapter
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//
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//
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// Copyright (C) 2017 ETH Zurich, University of Bologna
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// All rights reserved.
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//
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// This code is under development and not yet released to the public.
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// Until it is released, the code is under the copyright of ETH Zurich and
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// the University of Bologna, and may contain confidential and/or unpublished
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// work. Any reuse/redistribution is strictly forbidden without written
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// permission from ETH Zurich.
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//
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// Bug fixes and contributions will eventually be released under the
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// SolderPad open hardware license in the context of the PULP platform
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// (http://www.pulp-platform.org), under the copyright of ETH Zurich and the
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// University of Bologna.
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//
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module axi_mem_if_wrap #(
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parameter AXI4_ADDRESS_WIDTH = 64,

src_files.yml

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axi_mem_if:
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files: [
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axi_mem_if.sv,
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axi_mem_if_wrap.sv,
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axi_mem_if_var_latency.sv,
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src/deprecated/axi_mem_if.sv,
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src/deprecated/axi_mem_if_wrap.sv,
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src/deprecated/axi_mem_if_var_latency.sv,
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]

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