diff --git a/doc/hal.txt b/doc/hal.txt new file mode 100644 index 0000000..ffef9c3 --- /dev/null +++ b/doc/hal.txt @@ -0,0 +1,61 @@ +What the heck? An Atheros HAL? Here? +==================================== + +The aim of this work is to migrate the driver away from a very Linux-centric +take on things and more towards something that can be easily leveraged +on multiple platforms. + +This was one of the HAL design goals back for the Wireless device support. +Yes, another goal was _binary_ interface and object sharing - we don't +have to worry about this. We are doing well if we're able to compile +and use shared parts of the driver across multiple platforms. + +At a very top level, the ethernet driver has a very small set of +interfaces to the kernel: + +* probe/attach; +* suspend/resume (if required); +* interrupt registration and callback, ithread, or appropriate; +* a datapath (TX and RX); +* a control path (up/down, ioctl(), etc); +* some statistics path (eg ethtool statistics). + +Each of these modules have both machine dependent and independent parts. + +The aim of this "HAL-ification" of alx is to isolate out the hardware +interface stuff into separate files and make those files compilable +on multiple platforms. To that end, there are a few "requirements" for +portable driver code. This list isn't exhaustive and will grow/change +over time: + +* The types being used by those shared routines must be generic and + not assume a specific compiler or environment. Notably, 'bool', + 'u8/u16/u32' can't be used; + +* Care must be taken when assuming packed structures - as different + compilers allow for different kinds of packing; + +* Same deal with inlining things; + +* You -must not assume- that atomics and locking primitives are + available in the hardware code. Anything that requires synchronisation + or ordering must be done by the upper layer driver and OS dependent + code; + +* You can't use OS specific defines, typedefs, etc in the code. + This does mean that you may end up defining HAL_ typedefs and + enums for things that exist in UNIX, then write functions which + simply map the OS type to the HAL_ type. + +In addition, some non-HAL code may be shared. For example, code +which maintains the TX and RX descriptor arrays. Here, we may +wish to use locks, atomics and other primitives. However we can't +assume that we can use those primitives across multiple operating +systems - each OS has a set of what's allowed and what's not allowed. +For example, Windows/MacOSX doesn't allow locks in the interrupt path +whereas Linux/FreeBSD interrupt threads allow locks. + +For now, this work will just focus on separating out the hardware code +enough to get the device to probe/attach. Once that's done, the rest +of the driver can be broken up into pieces that make sense to share +across operating systems, with whatever the relevant caveats are. diff --git a/src/alx.h b/src/alx.h index bd0fa1c..3d56f80 100644 --- a/src/alx.h +++ b/src/alx.h @@ -17,6 +17,7 @@ #ifndef _ALX_H_ #define _ALX_H_ +#if 0 #include #include #include @@ -29,6 +30,8 @@ #include #include #include +#endif + #include "alx_hw.h" /* specific error info */ @@ -444,8 +447,8 @@ struct alx_hw_stats { */ struct alx_ring_header { void *desc; /* virt addr */ - dma_addr_t dma; /* phy addr */ - u32 size; /* length in bytes */ + A_DMA_ADDR dma; /* phy addr */ + A_UINT32 size; /* length in bytes */ }; /* @@ -456,7 +459,7 @@ struct alx_buffer { struct sk_buff *skb; /* socket buffer */ DEFINE_DMA_UNMAP_ADDR(dma); /* DMA address */ DEFINE_DMA_UNMAP_LEN(size); /* buffer size */ - u16 flags; /* information of this buffer */ + A_UINT16 flags; /* information of this buffer */ }; #define ALX_BUF_TX_FIRSTFRAG 0x1 @@ -465,18 +468,18 @@ struct alx_rx_queue { struct net_device *netdev; struct device *dev; /* device pointer for dma operation */ struct rrd_desc *rrd_hdr; /* rrd ring virtual addr */ - dma_addr_t rrd_dma; /* rrd ring physical addr */ + A_DMA_ADDR rrd_dma; /* rrd ring physical addr */ struct rfd_desc *rfd_hdr; /* rfd ring virtual addr */ - dma_addr_t rfd_dma; /* rfd ring physical addr */ + A_DMA_ADDR rfd_dma; /* rfd ring physical addr */ struct alx_buffer *bf_info; /* info for rx-skbs */ - u16 count; /* number of ring elements */ - u16 pidx; /* rfd producer index */ - u16 cidx; /* rfd consumer index */ - u16 rrd_cidx; - u16 p_reg; /* register saving producer index */ - u16 c_reg; /* register saving consumer index */ - u16 qidx; /* queue index */ + A_UINT16 count; /* number of ring elements */ + A_UINT16 pidx; /* rfd producer index */ + A_UINT16 cidx; /* rfd consumer index */ + A_UINT16 rrd_cidx; + A_UINT16 p_reg; /* register saving producer index */ + A_UINT16 c_reg; /* register saving consumer index */ + A_UINT16 qidx; /* queue index */ unsigned long flag; struct sk_buff_head list; @@ -488,14 +491,14 @@ struct alx_tx_queue { struct net_device *netdev; struct device *dev; /* device pointer for dma operation */ struct tpd_desc *tpd_hdr; /* tpd ring virtual addr */ - dma_addr_t tpd_dma; /* tpd ring physical addr */ + A_DMA_ADDR tpd_dma; /* tpd ring physical addr */ struct alx_buffer *bf_info; /* info for tx-skbs pending on HW */ - u16 count; /* number of ring elements */ - u16 pidx; /* producer index */ - atomic_t cidx; /* consumer index */ - u16 p_reg; /* register saving producer index */ - u16 c_reg; /* register saving consumer index */ - u16 qidx; /* queue index */ + A_UINT16 count; /* number of ring elements */ + A_UINT16 pidx; /* producer index */ + A_ATOMIC cidx; /* consumer index */ + A_UINT16 p_reg; /* register saving producer index */ + A_UINT16 c_reg; /* register saving consumer index */ + A_UINT16 qidx; /* queue index */ }; #define ALX_TX_WAKEUP_THRESH(_tq) ((_tq)->count / 4) @@ -507,7 +510,7 @@ struct alx_napi { struct alx_rx_queue *rxq; struct alx_tx_queue *txq; int vec_idx; - u32 vec_mask; + A_UINT32 vec_mask; char irq_lbl[IFNAMSIZ]; }; @@ -540,15 +543,15 @@ enum ALX_FLAGS { *board specific private data structure */ struct alx_adapter { - u8 __iomem *hw_addr; /* memory mapped PCI base address */ + A_UINT8 __iomem *hw_addr; /* memory mapped PCI base address */ - u8 mac_addr[ETH_ALEN]; /* current mac address */ - u8 perm_addr[ETH_ALEN]; /* permanent mac address */ + A_UINT8 mac_addr[ETH_ALEN]; /* current mac address */ + A_UINT8 perm_addr[ETH_ALEN]; /* permanent mac address */ struct net_device *netdev; struct pci_dev *pdev; - u16 bd_number; /* board number;*/ + A_UINT16 bd_number; /* board number;*/ unsigned int nr_vec; /* totally msix vectors */ struct msix_entry *msix_ent; /* msix entries */ @@ -563,53 +566,53 @@ struct alx_adapter { int nr_txq; /* number of napi for TX-Q */ int nr_rxq; /* number of napi for RX-Q */ int nr_napi; /* total napi for TX-Q/RX-Q */ - u16 mtu; /* MTU */ - u16 imt; /* interrupt moderation timer */ - u8 dma_chnl; /* number of DMA channels */ - u8 max_dma_chnl; - u32 rx_ctrl; /* main rx control */ - u32 mc_hash[2]; /* multicast addr hash table */ - - u8 rss_key[40]; /* RSS hash algorithm key */ - u32 rss_idt[32]; /* RSS indirection table */ - u16 rss_idt_size; /* RSS indirection table size */ - u8 rss_hash_type; /* RSS hash type */ - - u32 wrr[ALX_MAX_TX_QUEUES]; /* weight round robin + A_UINT16 mtu; /* MTU */ + A_UINT16 imt; /* interrupt moderation timer */ + A_UINT8 dma_chnl; /* number of DMA channels */ + A_UINT8 max_dma_chnl; + A_UINT32 rx_ctrl; /* main rx control */ + A_UINT32 mc_hash[2]; /* multicast addr hash table */ + + A_UINT8 rss_key[40]; /* RSS hash algorithm key */ + A_UINT32 rss_idt[32]; /* RSS indirection table */ + A_UINT16 rss_idt_size; /* RSS indirection table size */ + A_UINT8 rss_hash_type; /* RSS hash type */ + + A_UINT32 wrr[ALX_MAX_TX_QUEUES]; /* weight round robin * for multiple-tx-Q */ - u32 wrr_ctrl; /* prioirty control */ + A_UINT32 wrr_ctrl; /* prioirty control */ - u32 imask; /* interrupt mask for ALX_IMR */ - u32 smb_timer; /* statistic counts refresh + A_UINT32 imask; /* interrupt mask for ALX_IMR */ + A_UINT32 smb_timer; /* statistic counts refresh * timeout, million-seconds */ - spinlock_t smb_lock; /* lock for updating stats */ + A_SPINLOCK smb_lock; /* lock for updating stats */ - bool link_up; /* link up flag */ - u16 link_speed; /* current link speed */ - u8 link_duplex; /* current link duplex */ + HAL_BOOL link_up; /* link up flag */ + A_UINT16 link_speed; /* current link speed */ + A_UINT8 link_duplex; /* current link duplex */ - u32 adv_cfg; /* auto-neg advertisement + A_UINT32 adv_cfg; /* auto-neg advertisement * or force mode config */ - u8 flowctrl; /* flow control */ + A_UINT8 flowctrl; /* flow control */ struct work_struct task; /* any delayed work */ struct net_device_stats net_stats; /* statistics counters */ struct alx_hw_stats hw_stats; /* statistics counters, * same order with hw */ - u32 sleep_ctrl; /* control used when sleep */ - atomic_t irq_sem; /* interrupt sync */ - u16 msg_enable; /* msg level */ + A_UINT32 sleep_ctrl; /* control used when sleep */ + A_ATOMIC irq_sem; /* interrupt sync */ + A_UINT16 msg_enable; /* msg level */ DECLARE_BITMAP(flags, ALX_FLAG_NUMBER_OF_FLAGS); - spinlock_t mdio_lock; /* used for MII bus access */ + A_SPINLOCK mdio_lock; /* used for MII bus access */ struct mdio_if_info mdio; - u16 phy_id[2]; + A_UINT16 phy_id[2]; - bool lnk_patch; /* PHY link patch flag */ - bool hib_patch; /* PHY hibernation patch flag */ + HAL_BOOL lnk_patch; /* PHY link patch flag */ + HAL_BOOL hib_patch; /* PHY hibernation patch flag */ }; #define ALX_VID(_a) ((_a)->pdev->vendor) @@ -626,36 +629,6 @@ struct alx_adapter { #define ALX_FLAG_CLEAR(_adpt, _FLAG) (\ clear_bit(ALX_FLAG_##_FLAG, (_adpt)->flags)) - -/* write to 8bit register via pci memory space */ -#define ALX_MEM_W8(s, reg, val) (writeb((val), ((s)->hw_addr + reg))) - -/* read from 8bit register via pci memory space */ -#define ALX_MEM_R8(s, reg, pdat) (\ - *(u8 *)(pdat) = readb((s)->hw_addr + reg)) - -/* write to 16bit register via pci memory space */ -#define ALX_MEM_W16(s, reg, val) (writew((val), ((s)->hw_addr + reg))) - -/* read from 16bit register via pci memory space */ -#define ALX_MEM_R16(s, reg, pdat) (\ - *(u16 *)(pdat) = readw((s)->hw_addr + reg)) - -/* write to 32bit register via pci memory space */ -#define ALX_MEM_W32(s, reg, val) (writel((val), ((s)->hw_addr + reg))) - -/* read from 32bit register via pci memory space */ -#define ALX_MEM_R32(s, reg, pdat) (\ - *(u32 *)(pdat) = readl((s)->hw_addr + reg)) - -/* read from 16bit register via pci config space */ -#define ALX_CFG_R16(s, reg, pdat) (\ - pci_read_config_word((s)->pdev, (reg), (pdat))) - -/* write to 16bit register via pci config space */ -#define ALX_CFG_W16(s, reg, val) (\ - pci_write_config_word((s)->pdev, (reg), (val))) - /* flush regs */ #define ALX_MEM_FLUSH(s) (readl((s)->hw_addr)) diff --git a/src/alx_ethtool.c b/src/alx_ethtool.c index d32372c..f1e962f 100644 --- a/src/alx_ethtool.c +++ b/src/alx_ethtool.c @@ -17,6 +17,8 @@ #include #include +#include "ah_osdep.h" + #include "alx.h" static int alx_get_settings(struct net_device *netdev, @@ -58,7 +60,7 @@ static int alx_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) { struct alx_adapter *adpt = netdev_priv(netdev); - u32 adv_cfg; + A_UINT32 adv_cfg; int err = 0; while (test_and_set_bit(ALX_FLAG_RESETING, adpt->flags)) @@ -137,8 +139,8 @@ static int alx_set_pauseparam(struct net_device *netdev, { struct alx_adapter *adpt = netdev_priv(netdev); int err = 0; - bool reconfig_phy = false; - u8 fc = 0; + HAL_BOOL reconfig_phy = AH_FALSE; + A_UINT8 fc = 0; if (pause->tx_pause) fc |= ALX_FC_TX; @@ -153,10 +155,10 @@ static int alx_set_pauseparam(struct net_device *netdev, /* restart auto-neg for auto-mode */ if (adpt->adv_cfg & ADVERTISED_Autoneg) { if (!((fc ^ adpt->flowctrl) & ALX_FC_ANEG)) - reconfig_phy = true; /* auto/force change */ + reconfig_phy = AH_RUE; /* auto/force change */ if (fc & adpt->flowctrl & ALX_FC_ANEG && (fc ^ adpt->flowctrl) & (ALX_FC_RX | ALX_FC_TX)) - reconfig_phy = true; + reconfig_phy = AH_TRUE; } if (reconfig_phy) { @@ -180,21 +182,21 @@ static int alx_set_pauseparam(struct net_device *netdev, return err; } -static u32 alx_get_msglevel(struct net_device *netdev) +static A_UINT32 alx_get_msglevel(struct net_device *netdev) { struct alx_adapter *adpt = netdev_priv(netdev); return adpt->msg_enable; } -static void alx_set_msglevel(struct net_device *netdev, u32 data) +static void alx_set_msglevel(struct net_device *netdev, A_UINT32 data) { struct alx_adapter *adpt = netdev_priv(netdev); adpt->msg_enable = data; } -static const u32 hw_regs[] = { +static const A_UINT32 hw_regs[] = { ALX_DEV_CAP, ALX_DEV_CTRL, ALX_LNK_CAP, ALX_LNK_CTRL, ALX_UE_SVRT, ALX_EFLD, ALX_SLD, ALX_PPHY_MISC1, ALX_PPHY_MISC2, ALX_PDLL_TRNS1, @@ -237,7 +239,7 @@ static void alx_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *buff) { struct alx_adapter *adpt = netdev_priv(netdev); - u32 *p = buff; + A_UINT32 *p = buff; int i; regs->version = (ALX_DID(adpt) << 16) | (ALX_REVID(adpt) << 8) | 1; @@ -248,7 +250,7 @@ static void alx_get_regs(struct net_device *netdev, ALX_MEM_R32(adpt, hw_regs[i], p); /* last one for PHY Link Status */ - alx_read_phy_reg(adpt, MII_BMSR, (u16 *)p); + alx_read_phy_reg(adpt, MII_BMSR, (A_UINT16 *)p); } static void alx_get_drvinfo(struct net_device *netdev, diff --git a/src/alx_hw.c b/src/alx_hw.c index 6310984..4468094 100644 --- a/src/alx_hw.c +++ b/src/alx_hw.c @@ -14,10 +14,16 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#if 0 #include #include #include #include +#endif + +#include "ah_osdep.h" + +#include "ah_osinc.h" #include "alx.h" @@ -25,10 +31,10 @@ /* get permanent mac address from */ -int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr) +int alx_get_perm_macaddr(struct alx_adapter *adpt, A_UINT8 *addr) { - u32 val, mac0, mac1; - u16 flag, i; + A_UINT32 val, mac0, mac1; + A_UINT16 flag, i; #define INTN_LOADED 0x1 #define EXTN_LOADED 0x2 @@ -44,7 +50,7 @@ int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr) /* addr should be big-endian */ *(__be32 *)(addr + 2) = cpu_to_be32(mac0); - *(__be16 *)addr = cpu_to_be16((u16)mac1); + *(__be16 *)addr = cpu_to_be16((A_UINT16)mac1); if (is_valid_ether_addr(addr)) return 0; @@ -55,13 +61,13 @@ int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr) ALX_MEM_R32(adpt, ALX_SLD, &val); if ((val & (ALX_SLD_STAT | ALX_SLD_START)) == 0) break; - mdelay(1); + OS_MDELAY(1); } if (i == ALX_SLD_MAX_TO) goto out; ALX_MEM_W32(adpt, ALX_SLD, val | ALX_SLD_START); for (i = 0; i < ALX_SLD_MAX_TO; i++) { - mdelay(1); + OS_MDELAY(1); ALX_MEM_R32(adpt, ALX_SLD, &val); if ((val & ALX_SLD_START) == 0) break; @@ -82,13 +88,13 @@ int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr) ALX_EFLD_START)) == 0) { break; } - mdelay(1); + OS_MDELAY(1); } if (i == ALX_SLD_MAX_TO) goto out; ALX_MEM_W32(adpt, ALX_EFLD, val | ALX_EFLD_START); for (i = 0; i < ALX_SLD_MAX_TO; i++) { - mdelay(1); + OS_MDELAY(1); ALX_MEM_R32(adpt, ALX_EFLD, &val); if ((val & ALX_EFLD_START) == 0) break; @@ -104,9 +110,9 @@ int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr) return ALX_ERR_ALOAD; } -void alx_set_macaddr(struct alx_adapter *adpt, u8 *addr) +void alx_set_macaddr(struct alx_adapter *adpt, A_UINT8 *addr) { - u32 val; + A_UINT32 val; /* for example: 00-0B-6A-F6-00-DC * STAD0=6AF600DC, STAD1=000B. @@ -119,7 +125,7 @@ void alx_set_macaddr(struct alx_adapter *adpt, u8 *addr) void alx_enable_osc(struct alx_adapter *adpt) { - u32 val; + A_UINT32 val; /* rising edge */ ALX_MEM_R32(adpt, ALX_MISC, &val); @@ -127,9 +133,9 @@ void alx_enable_osc(struct alx_adapter *adpt) ALX_MEM_W32(adpt, ALX_MISC, val | ALX_MISC_INTNLOSC_OPEN); } -void alx_reset_osc(struct alx_adapter *adpt, u8 rev) +void alx_reset_osc(struct alx_adapter *adpt, A_UINT8 rev) { - u32 val, val2; + A_UINT32 val, val2; /* clear Internal OSC settings, switching OSC by hw itself */ ALX_MEM_R32(adpt, ALX_MISC3, &val); @@ -164,18 +170,18 @@ void alx_reset_osc(struct alx_adapter *adpt, u8 rev) ALX_MEM_W32(adpt, ALX_MISC, val); } - udelay(20); + OS_UDELAY(20); } int alx_reset_mac(struct alx_adapter *adpt) { - u32 val, pmctrl; + A_UINT32 val, pmctrl; int i, ret; - u8 rev; - bool a_cr; + A_UINT8 rev; + HAL_BOOL a_cr; pmctrl = 0; - rev = (u8)ALX_REVID(adpt); + rev = (A_UINT8)ALX_REVID(adpt); a_cr = ALX_REV_A(rev) && ALX_WITH_CR(adpt); /* disable all interrupts, RXQ/TXQ */ @@ -206,22 +212,22 @@ int alx_reset_mac(struct alx_adapter *adpt) val | ALX_MASTER_DMA_MAC_RST | ALX_MASTER_OOB_DIS); /* make sure it's real idle */ - udelay(10); + OS_UDELAY(10); for (i = 0; i < ALX_DMA_MAC_RST_TO; i++) { ALX_MEM_R32(adpt, ALX_RFD_PIDX, &val); if (val == 0) break; - udelay(10); + OS_UDELAY(10); } for (; i < ALX_DMA_MAC_RST_TO; i++) { ALX_MEM_R32(adpt, ALX_MASTER, &val); if ((val & ALX_MASTER_DMA_MAC_RST) == 0) break; - udelay(10); + OS_UDELAY(10); } if (i == ALX_DMA_MAC_RST_TO) return ALX_ERR_RSTMAC; - udelay(10); + OS_UDELAY(10); if (a_cr) { /* set ALX_MASTER_PCLKSEL_SRDS (affect by soft-rst, PERST) */ @@ -243,7 +249,7 @@ int alx_reset_mac(struct alx_adapter *adpt) if (ALX_REV_A(rev)) val &= ~ALX_MISC_ISO_EN; ALX_MEM_W32(adpt, ALX_MISC, val); - udelay(20); + OS_UDELAY(20); /* driver control speed/duplex, hash-alg */ ALX_MEM_W32(adpt, ALX_MAC_CTRL, adpt->rx_ctrl); @@ -260,11 +266,11 @@ int alx_reset_mac(struct alx_adapter *adpt) * completely reset phy, all settings/workaround will be re-configureed * hib_en: enable/disable hibernation on PHY */ -void alx_reset_phy(struct alx_adapter *adpt, bool hib_en) +void alx_reset_phy(struct alx_adapter *adpt, HAL_BOOL hib_en) { int i; - u32 val; - u16 phy_val; + A_UINT32 val; + A_UINT16 phy_val; /* (DSP)reset PHY core */ ALX_MEM_R32(adpt, ALX_PHY_CTRL, &val); @@ -278,12 +284,12 @@ void alx_reset_phy(struct alx_adapter *adpt, bool hib_en) else val &= ~(ALX_PHY_CTRL_HIB_PULSE | ALX_PHY_CTRL_HIB_EN); ALX_MEM_W32(adpt, ALX_PHY_CTRL, val); - udelay(10); /* 5us is enough */ + OS_UDELAY(10); /* 5us is enough */ ALX_MEM_W32(adpt, ALX_PHY_CTRL, val | ALX_PHY_CTRL_DSPRST_OUT); /* delay 800us */ for (i = 0; i < ALX_PHY_CTRL_DSPRST_TO; i++) - udelay(10); + OS_UDELAY(10); /* phy power saving & hib */ if (hib_en) { @@ -362,9 +368,9 @@ void alx_reset_phy(struct alx_adapter *adpt, bool hib_en) */ void alx_reset_pcie(struct alx_adapter *adpt) { - u32 val; - u16 val16; - u8 rev = (u8)ALX_REVID(adpt); + A_UINT32 val; + A_UINT16 val16; + A_UINT8 rev = (A_UINT8)ALX_REVID(adpt); /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */ ALX_CFG_R16(adpt, PCI_COMMAND, &val16); @@ -409,7 +415,7 @@ void alx_reset_pcie(struct alx_adapter *adpt) ALX_FLAG(adpt, CAP_L0S), ALX_FLAG(adpt, CAP_L1)); - udelay(10); + OS_UDELAY(10); } /* alx_stop_mac @@ -418,15 +424,15 @@ void alx_reset_pcie(struct alx_adapter *adpt) */ int alx_stop_mac(struct alx_adapter *adpt) { - u32 rxq, txq, val; - u16 i; + A_UINT32 rxq, txq, val; + A_UINT16 i; ALX_MEM_R32(adpt, ALX_RXQ0, &rxq); ALX_MEM_W32(adpt, ALX_RXQ0, rxq & ~ALX_RXQ0_EN); ALX_MEM_R32(adpt, ALX_TXQ0, &txq); ALX_MEM_W32(adpt, ALX_TXQ0, txq & ~ALX_TXQ0_EN); - udelay(40); + OS_UDELAY(40); adpt->rx_ctrl &= ~(ALX_MAC_CTRL_RX_EN | ALX_MAC_CTRL_TX_EN); ALX_MEM_W32(adpt, ALX_MAC_CTRL, adpt->rx_ctrl); @@ -435,7 +441,7 @@ int alx_stop_mac(struct alx_adapter *adpt) ALX_MEM_R32(adpt, ALX_MAC_STS, &val); if (!(val & ALX_MAC_STS_IDLE)) break; - udelay(10); + OS_UDELAY(10); } return (ALX_DMA_MAC_RST_TO == i) ? ALX_ERR_RSTMAC : 0; @@ -446,7 +452,7 @@ int alx_stop_mac(struct alx_adapter *adpt) */ void alx_start_mac(struct alx_adapter *adpt) { - u32 mac, txq, rxq; + A_UINT32 mac, txq, rxq; ALX_MEM_R32(adpt, ALX_RXQ0, &rxq); ALX_MEM_W32(adpt, ALX_RXQ0, rxq | ALX_RXQ0_EN); @@ -466,7 +472,7 @@ void alx_start_mac(struct alx_adapter *adpt) } /* set flow control on MAC side */ -void alx_cfg_mac_fc(struct alx_adapter *adpt, u8 fc) +void alx_cfg_mac_fc(struct alx_adapter *adpt, A_UINT8 fc) { if (fc & ALX_FC_RX) adpt->rx_ctrl |= ALX_MAC_CTRL_RX_EN; @@ -482,10 +488,10 @@ void alx_cfg_mac_fc(struct alx_adapter *adpt, u8 fc) } /* enable/disable aspm support */ -void alx_enable_aspm(struct alx_adapter *adpt, bool l0s_en, bool l1_en) +void alx_enable_aspm(struct alx_adapter *adpt, HAL_BOOL l0s_en, HAL_BOOL l1_en) { - u32 pmctrl; - u8 rev = (u8)ALX_REVID(adpt); + A_UINT32 pmctrl; + A_UINT8 rev = (A_UINT8)ALX_REVID(adpt); ALX_MEM_R32(adpt, ALX_PMCTRL, &pmctrl); @@ -520,9 +526,9 @@ void alx_enable_aspm(struct alx_adapter *adpt, bool l0s_en, bool l1_en) /* translate ethtool adv /speed/duplex settting to hw specific value */ -u32 ethadv_to_hw_cfg(struct alx_adapter *adpt, u32 ethadv_cfg) +A_UINT32 ethadv_to_hw_cfg(struct alx_adapter *adpt, A_UINT32 ethadv_cfg) { - u32 cfg = 0; + A_UINT32 cfg = 0; if (ethadv_cfg & ADVERTISED_Autoneg) { /* auto-neg */ cfg |= ALX_DRV_PHY_AUTO; @@ -568,10 +574,10 @@ u32 ethadv_to_hw_cfg(struct alx_adapter *adpt, u32 ethadv_cfg) * ethadv: * format from ethtool, we use it for both autoneg and force mode */ -int alx_setup_speed_duplex(struct alx_adapter *adpt, u32 ethadv, u8 flowctrl) +int alx_setup_speed_duplex(struct alx_adapter *adpt, A_UINT32 ethadv, A_UINT8 flowctrl) { - u16 adv, giga, cr; - u32 val; + A_UINT16 adv, giga, cr; + A_UINT32 val; int err = 0; /* clear flag */ @@ -626,18 +632,18 @@ int alx_setup_speed_duplex(struct alx_adapter *adpt, u32 ethadv, u8 flowctrl) /* do post setting on phy if link up/down event occur */ -void alx_post_phy_link(struct alx_adapter *adpt, u16 speed, bool az_en) +void alx_post_phy_link(struct alx_adapter *adpt, A_UINT16 speed, HAL_BOOL az_en) { - u16 phy_val, len, agc; - u8 revid = (u8)ALX_REVID(adpt); - bool adj_th; + A_UINT16 phy_val, len, agc; + A_UINT8 revid = (A_UINT8)ALX_REVID(adpt); + HAL_BOOL adj_th; if (revid != ALX_REV_B0 && revid != ALX_REV_A1 && revid != ALX_REV_A0) { return; } - adj_th = (revid == ALX_REV_B0) ? true : false; + adj_th = (revid == ALX_REV_B0) ? AH_TRUE : AH_FALSE; /* 1000BT/AZ, wrong cable length */ if (speed != SPEED_0) { /* link up */ @@ -717,9 +723,9 @@ void alx_post_phy_link(struct alx_adapter *adpt, u16 speed, bool az_en) * 1. phy link must be established before calling this function * 2. wol option (pattern,magic,link,etc.) is configed before call it. */ -int alx_pre_suspend(struct alx_adapter *adpt, u16 speed) +int alx_pre_suspend(struct alx_adapter *adpt, A_UINT16 speed) { - u32 master, mac, phy, val; + A_UINT32 master, mac, phy, val; int err = 0; ALX_MEM_R32(adpt, ALX_MASTER, &master); @@ -774,16 +780,16 @@ int alx_pre_suspend(struct alx_adapter *adpt, u16 speed) } /* wait mdio module to be idle */ -bool __alx_wait_mdio_idle(struct alx_adapter *adpt) +HAL_BOOL __alx_wait_mdio_idle(struct alx_adapter *adpt) { - u32 val; + A_UINT32 val; int i; for (i = 0; i < ALX_MDIO_MAX_AC_TO; i++) { ALX_MEM_R32(adpt, ALX_MDIO, &val); if (!(val & ALX_MDIO_BUSY)) break; - udelay(10); + OS_UDELAY(10); } return i == ALX_MDIO_MAX_AC_TO; } @@ -794,10 +800,10 @@ bool __alx_wait_mdio_idle(struct alx_adapter *adpt) * dev: device address (see IEEE 802.3 DEVAD, PRTAD is fixed to 0) * reg: register to read */ -int __alx_read_phy_core(struct alx_adapter *adpt, bool ext, u8 dev, - u16 reg, u16 *phy_data) +int __alx_read_phy_core(struct alx_adapter *adpt, HAL_BOOL ext, A_UINT8 dev, + A_UINT16 reg, A_UINT16 *phy_data) { - u32 val, clk_sel; + A_UINT32 val, clk_sel; int err; *phy_data = 0; @@ -829,7 +835,7 @@ int __alx_read_phy_core(struct alx_adapter *adpt, bool ext, u8 dev, err = ALX_ERR_MIIBUSY; else { ALX_MEM_R32(adpt, ALX_MDIO, &val); - *phy_data = (u16)FIELD_GETX(val, ALX_MDIO_DATA); + *phy_data = (A_UINT16)FIELD_GETX(val, ALX_MDIO_DATA); err = 0; } @@ -842,10 +848,10 @@ int __alx_read_phy_core(struct alx_adapter *adpt, bool ext, u8 dev, * dev: device address (see IEEE 802.3 DEVAD, PRTAD is fixed to 0) * reg: register to write */ -int __alx_write_phy_core(struct alx_adapter *adpt, bool ext, u8 dev, - u16 reg, u16 phy_data) +int __alx_write_phy_core(struct alx_adapter *adpt, HAL_BOOL ext, A_UINT8 dev, + A_UINT16 reg, A_UINT16 phy_data) { - u32 val, clk_sel; + A_UINT32 val, clk_sel; int err = 0; /* use slow clock when it's in hibernation status */ @@ -878,31 +884,31 @@ int __alx_write_phy_core(struct alx_adapter *adpt, bool ext, u8 dev, } /* read from PHY normal register */ -int __alx_read_phy_reg(struct alx_adapter *adpt, u16 reg, u16 *phy_data) +int __alx_read_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *phy_data) { - return __alx_read_phy_core(adpt, false, 0, reg, phy_data); + return __alx_read_phy_core(adpt, AH_FALSE, 0, reg, phy_data); } /* write to PHY normal register */ -int __alx_write_phy_reg(struct alx_adapter *adpt, u16 reg, u16 phy_data) +int __alx_write_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 phy_data) { - return __alx_write_phy_core(adpt, false, 0, reg, phy_data); + return __alx_write_phy_core(adpt, AH_FALSE, 0, reg, phy_data); } /* read from PHY extension register */ -int __alx_read_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 *pdata) +int __alx_read_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 *pdata) { - return __alx_read_phy_core(adpt, true, dev, reg, pdata); + return __alx_read_phy_core(adpt, AH_TRUE, dev, reg, pdata); } /* write to PHY extension register */ -int __alx_write_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 data) +int __alx_write_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 data) { - return __alx_write_phy_core(adpt, true, dev, reg, data); + return __alx_write_phy_core(adpt, AH_TRUE, dev, reg, data); } /* read from PHY debug port */ -int __alx_read_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 *pdata) +int __alx_read_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *pdata) { int err; @@ -916,7 +922,7 @@ int __alx_read_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 *pdata) } /* write to PHY debug port */ -int __alx_write_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 data) +int __alx_write_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 data) { int err; @@ -929,76 +935,76 @@ int __alx_write_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 data) return err; } -int alx_read_phy_reg(struct alx_adapter *adpt, u16 reg, u16 *phy_data) +int alx_read_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *phy_data) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_read_phy_reg(adpt, reg, phy_data); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -int alx_write_phy_reg(struct alx_adapter *adpt, u16 reg, u16 phy_data) +int alx_write_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 phy_data) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_write_phy_reg(adpt, reg, phy_data); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -int alx_read_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 *pdata) +int alx_read_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 *pdata) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_read_phy_ext(adpt, dev, reg, pdata); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -int alx_write_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 data) +int alx_write_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 data) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_write_phy_ext(adpt, dev, reg, data); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -int alx_read_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 *pdata) +int alx_read_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *pdata) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_read_phy_dbg(adpt, reg, pdata); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -int alx_write_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 data) +int alx_write_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 data) { int err; - spin_lock(&adpt->mdio_lock); + OS_SPIN_LOCK(&adpt->mdio_lock); err = __alx_write_phy_dbg(adpt, reg, data); - spin_unlock(&adpt->mdio_lock); + OS_SPIN_UNLOCK(&adpt->mdio_lock); return err; } -u16 alx_get_phy_config(struct alx_adapter *adpt) +A_UINT16 alx_get_phy_config(struct alx_adapter *adpt) { - u32 val; - u16 phy_val; + A_UINT32 val; + A_UINT16 phy_val; ALX_MEM_R32(adpt, ALX_PHY_CTRL, &val); /* phy in rst */ @@ -1012,28 +1018,28 @@ u16 alx_get_phy_config(struct alx_adapter *adpt) alx_read_phy_reg(adpt, ALX_MII_DBG_ADDR, &phy_val); if (ALX_PHY_INITED == phy_val) - return (u16) val; + return (A_UINT16) val; return ALX_DRV_PHY_UNKNOWN; } -bool alx_phy_configed(struct alx_adapter *adpt) +HAL_BOOL alx_phy_configed(struct alx_adapter *adpt) { - u32 cfg, hw_cfg; + A_UINT32 cfg, hw_cfg; cfg = ethadv_to_hw_cfg(adpt, adpt->adv_cfg); cfg = FIELD_GETX(cfg, ALX_DRV_PHY); hw_cfg = alx_get_phy_config(adpt); if (hw_cfg == ALX_DRV_PHY_UNKNOWN) - return false; + return AH_FALSE; return cfg == hw_cfg; } -int alx_get_phy_link(struct alx_adapter *adpt, bool *link_up, u16 *speed) +int alx_get_phy_link(struct alx_adapter *adpt, HAL_BOOL *link_up, A_UINT16 *speed) { struct pci_dev *pdev = adpt->pdev; - u16 bmsr, giga; + A_UINT16 bmsr, giga; int err; err = alx_read_phy_reg(adpt, MII_BMSR, &bmsr); @@ -1042,11 +1048,11 @@ int alx_get_phy_link(struct alx_adapter *adpt, bool *link_up, u16 *speed) goto out; if (!(bmsr & BMSR_LSTATUS)) { - *link_up = false; + *link_up = AH_FALSE; goto out; } - *link_up = true; + *link_up = AH_TRUE; /* speed/duplex result is saved in PHY Specific Status Register */ err = alx_read_phy_reg(adpt, ALX_MII_GIGA_PSSR, &giga); @@ -1081,7 +1087,7 @@ int alx_get_phy_link(struct alx_adapter *adpt, bool *link_up, u16 *speed) int alx_clear_phy_intr(struct alx_adapter *adpt) { - u16 isr; + A_UINT16 isr; /* clear interrupt status by read it */ return alx_read_phy_reg(adpt, ALX_MII_ISR, &isr); @@ -1089,7 +1095,7 @@ int alx_clear_phy_intr(struct alx_adapter *adpt) int alx_config_wol(struct alx_adapter *adpt) { - u32 wol; + A_UINT32 wol; int err = 0; wol = 0; diff --git a/src/alx_hw.h b/src/alx_hw.h index fc7f602..48ef974 100644 --- a/src/alx_hw.h +++ b/src/alx_hw.h @@ -17,15 +17,18 @@ #ifndef ALX_HW_H_ #define ALX_HW_H_ +#if 0 #include #include +#endif + #include "alx.h" #define FIELD_GETX(_x, _name) (((_x) >> (_name##_SHIFT)) & (_name##_MASK)) #define FIELD_SETS(_x, _name, _v) (\ (_x) = \ ((_x) & ~((_name##_MASK) << (_name##_SHIFT))) |\ -(((u16)(_v) & (_name##_MASK)) << (_name##_SHIFT))) +(((A_UINT16)(_v) & (_name##_MASK)) << (_name##_SHIFT))) #define FIELD_SET32(_x, _name, _v) (\ (_x) = \ ((_x) & ~((_name##_MASK) << (_name##_SHIFT))) |\ @@ -36,28 +39,28 @@ struct alx_adapter; /* function prototype */ -int alx_get_perm_macaddr(struct alx_adapter *adpt, u8 *addr); -void alx_reset_phy(struct alx_adapter *adpt, bool hib_en); +int alx_get_perm_macaddr(struct alx_adapter *adpt, A_UINT8 *addr); +void alx_reset_phy(struct alx_adapter *adpt, HAL_BOOL hib_en); void alx_reset_pcie(struct alx_adapter *adpt); -void alx_enable_aspm(struct alx_adapter *adpt, bool l0s_en, bool l1_en); -int alx_setup_speed_duplex(struct alx_adapter *adpt, u32 ethadv, u8 flowctrl); -void alx_post_phy_link(struct alx_adapter *adpt, u16 speed, bool az_en); -int alx_pre_suspend(struct alx_adapter *adpt, u16 speed); -int alx_read_phy_reg(struct alx_adapter *adpt, u16 reg, u16 *phy_data); -int alx_write_phy_reg(struct alx_adapter *adpt, u16 reg, u16 phy_data); -int alx_read_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 *pdata); -int alx_write_phy_ext(struct alx_adapter *adpt, u8 dev, u16 reg, u16 data); -int alx_read_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 *pdata); -int alx_write_phy_dbg(struct alx_adapter *adpt, u16 reg, u16 data); -int alx_get_phy_link(struct alx_adapter *adpt, bool *link_up, u16 *speed); +void alx_enable_aspm(struct alx_adapter *adpt, HAL_BOOL l0s_en, HAL_BOOL l1_en); +int alx_setup_speed_duplex(struct alx_adapter *adpt, A_UINT32 ethadv, A_UINT8 flowctrl); +void alx_post_phy_link(struct alx_adapter *adpt, A_UINT16 speed, HAL_BOOL az_en); +int alx_pre_suspend(struct alx_adapter *adpt, A_UINT16 speed); +int alx_read_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *phy_data); +int alx_write_phy_reg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 phy_data); +int alx_read_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 *pdata); +int alx_write_phy_ext(struct alx_adapter *adpt, A_UINT8 dev, A_UINT16 reg, A_UINT16 data); +int alx_read_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 *pdata); +int alx_write_phy_dbg(struct alx_adapter *adpt, A_UINT16 reg, A_UINT16 data); +int alx_get_phy_link(struct alx_adapter *adpt, HAL_BOOL *link_up, A_UINT16 *speed); int alx_clear_phy_intr(struct alx_adapter *adpt); int alx_config_wol(struct alx_adapter *adpt); -void alx_cfg_mac_fc(struct alx_adapter *adpt, u8 fc); +void alx_cfg_mac_fc(struct alx_adapter *adpt, A_UINT8 fc); void alx_start_mac(struct alx_adapter *adpt); int alx_stop_mac(struct alx_adapter *adpt); int alx_reset_mac(struct alx_adapter *adpt); -void alx_set_macaddr(struct alx_adapter *adpt, u8 *addr); -bool alx_phy_configed(struct alx_adapter *adpt); +void alx_set_macaddr(struct alx_adapter *adpt, A_UINT8 *addr); +HAL_BOOL alx_phy_configed(struct alx_adapter *adpt); /******************************************************************************/ /* register definition */ diff --git a/src/alx_main.c b/src/alx_main.c index 008bb5f..07a4d7d 100644 --- a/src/alx_main.c +++ b/src/alx_main.c @@ -23,6 +23,8 @@ #include #include +#include "ah_osdep.h" + #include "alx.h" char alx_drv_name[] = "alx"; @@ -75,9 +77,9 @@ static inline void alx_cancel_work(struct alx_adapter *adpt) cancel_work_sync(&adpt->task); } -void alx_add_mc_addr(struct alx_adapter *adpt, u8 *addr) +void alx_add_mc_addr(struct alx_adapter *adpt, A_UINT8 *addr) { - u32 crc32, bit, reg; + A_UINT32 crc32, bit, reg; crc32 = ether_crc(ETH_ALEN, addr); @@ -161,13 +163,13 @@ static void alx_free_napis(struct alx_adapter *adpt) adpt->qnapi[i] = NULL; } } -static u16 tx_pidx_reg[] = {ALX_TPD_PRI0_PIDX, ALX_TPD_PRI1_PIDX, +static A_UINT16 tx_pidx_reg[] = {ALX_TPD_PRI0_PIDX, ALX_TPD_PRI1_PIDX, ALX_TPD_PRI2_PIDX, ALX_TPD_PRI3_PIDX}; -static u16 tx_cidx_reg[] = {ALX_TPD_PRI0_CIDX, ALX_TPD_PRI1_CIDX, +static A_UINT16 tx_cidx_reg[] = {ALX_TPD_PRI0_CIDX, ALX_TPD_PRI1_CIDX, ALX_TPD_PRI2_CIDX, ALX_TPD_PRI3_CIDX}; -static u32 tx_vect_mask[] = {ALX_ISR_TX_Q0, ALX_ISR_TX_Q1, +static A_UINT32 tx_vect_mask[] = {ALX_ISR_TX_Q0, ALX_ISR_TX_Q1, ALX_ISR_TX_Q2, ALX_ISR_TX_Q3}; -static u32 rx_vect_mask[] = {ALX_ISR_RX_Q0, ALX_ISR_RX_Q1, +static A_UINT32 rx_vect_mask[] = {ALX_ISR_RX_Q0, ALX_ISR_RX_Q1, ALX_ISR_RX_Q2, ALX_ISR_RX_Q3, ALX_ISR_RX_Q4, ALX_ISR_RX_Q5, ALX_ISR_RX_Q6, ALX_ISR_RX_Q7}; @@ -201,7 +203,7 @@ static int alx_alloc_napis(struct alx_adapter *adpt) txq->p_reg = tx_pidx_reg[i]; txq->c_reg = tx_cidx_reg[i]; txq->count = adpt->tx_ringsz; - txq->qidx = (u16)i; + txq->qidx = (A_UINT16)i; np->vec_mask |= tx_vect_mask[i]; adpt->imask |= tx_vect_mask[i]; } @@ -216,7 +218,7 @@ static int alx_alloc_napis(struct alx_adapter *adpt) rxq->p_reg = ALX_RFD_PIDX; rxq->c_reg = ALX_RFD_CIDX; rxq->count = adpt->rx_ringsz; - rxq->qidx = (u16)i; + rxq->qidx = (A_UINT16)i; np->vec_mask |= rx_vect_mask[i]; adpt->imask |= rx_vect_mask[i]; } @@ -231,7 +233,7 @@ static int alx_alloc_napis(struct alx_adapter *adpt) static int alx_alloc_rings(struct alx_adapter *adpt) { struct alx_buffer *bf; - u8 *desc; + A_UINT8 *desc; dma_addr_t dma; int i, size, hw_rxrng, offset; @@ -341,7 +343,7 @@ static int alx_alloc_rxring_buf(struct alx_adapter *adpt, struct alx_buffer *cur_buf; struct rfd_desc *rfd; dma_addr_t dma; - u16 cur, next, count = 0; + A_UINT16 cur, next, count = 0; next = cur = rxq->pidx; if (++next == rxq->count) @@ -381,7 +383,7 @@ static int alx_alloc_rxring_buf(struct alx_adapter *adpt, if (count) { wmb(); rxq->pidx = cur; - ALX_MEM_W16(adpt, rxq->p_reg, (u16)cur); + ALX_MEM_W16(adpt, rxq->p_reg, (A_UINT16)cur); } return count; @@ -390,7 +392,7 @@ static int alx_alloc_rxring_buf(struct alx_adapter *adpt, static void alx_free_rxring_buf(struct alx_rx_queue *rxq) { struct alx_buffer *cur_buf; - u16 i; + A_UINT16 i; if (rxq == NULL) return; @@ -506,7 +508,7 @@ static void alx_free_all_ring_resources(struct alx_adapter *adpt) static inline int alx_tpd_avail(struct alx_tx_queue *txq) { - u16 cidx = atomic_read(&txq->cidx); + A_UINT16 cidx = atomic_read(&txq->cidx); return txq->pidx >= cidx ? txq->count + cidx - txq->pidx - 1 : @@ -515,16 +517,16 @@ static inline int alx_tpd_avail(struct alx_tx_queue *txq) -static bool alx_clean_tx_irq(struct alx_tx_queue *txq) +static HAL_BOOL alx_clean_tx_irq(struct alx_tx_queue *txq) { struct alx_adapter *adpt = netdev_priv(txq->netdev); struct netdev_queue *netque; - u16 hw_cidx, sw_cidx; + A_UINT16 hw_cidx, sw_cidx; unsigned int total_bytes = 0, total_packets = 0; int budget = ALX_DEFAULT_TX_WORK; if (ALX_FLAG(adpt, HALT)) - return true; + return AH_TRUE; netque = netdev_get_tx_queue(adpt->netdev, txq->qidx); sw_cidx = atomic_read(&txq->cidx); @@ -563,12 +565,12 @@ static bool alx_clean_tx_irq(struct alx_tx_queue *txq) return sw_cidx == hw_cidx; } -static inline bool alx_skb_dequeue_n(struct alx_rx_queue *rxq, int max_pkts, +static inline HAL_BOOL alx_skb_dequeue_n(struct alx_rx_queue *rxq, int max_pkts, struct sk_buff_head *list) { struct alx_adapter *adpt = netdev_priv(rxq->netdev); - bool use_lock = !ALX_FLAG(adpt, CAP_MRQ); - bool empty; + HAL_BOOL use_lock = !ALX_FLAG(adpt, CAP_MRQ); + HAL_BOOL empty; struct sk_buff *skb; int count = 0; @@ -596,7 +598,7 @@ static inline void alx_skb_queue_tail(struct alx_rx_queue *rxq, struct sk_buff *skb) { struct alx_adapter *adpt = netdev_priv(rxq->netdev); - bool use_lock = !ALX_FLAG(adpt, CAP_MRQ); + HAL_BOOL use_lock = !ALX_FLAG(adpt, CAP_MRQ); if (use_lock) spin_lock(&rxq->list.lock); @@ -607,18 +609,18 @@ static inline void alx_skb_queue_tail(struct alx_rx_queue *rxq, spin_unlock(&rxq->list.lock); } -static bool alx_dispatch_skb(struct alx_rx_queue *rxq) +static HAL_BOOL alx_dispatch_skb(struct alx_rx_queue *rxq) { struct alx_adapter *adpt = netdev_priv(rxq->netdev); struct rrd_desc *rrd; struct alx_buffer *rxb; struct sk_buff *skb; - u16 length, rfd_cleaned = 0; + A_UINT16 length, rfd_cleaned = 0; struct alx_rx_queue *tmp_rxq; int qnum; if (test_and_set_bit(ALX_RQ_USING, &rxq->flag)) - return false; + return AH_FALSE; while (1) { rrd = rxq->rrd_hdr + rxq->rrd_cidx; @@ -634,7 +636,7 @@ static bool alx_dispatch_skb(struct alx_rx_queue *rxq) /* reset chip */ ALX_FLAG_SET(adpt, TASK_RESET); alx_schedule_work(adpt); - return true; + return AH_TRUE; } rxb = rxq->bf_info + rxq->cidx; dma_unmap_single(rxq->dev, @@ -679,7 +681,7 @@ static bool alx_dispatch_skb(struct alx_rx_queue *rxq) } /* vlan tag */ if (rrd->word3 & (1 << RRD_VLTAGGED_SHIFT)) { - u16 tag = ntohs(FIELD_GETX(rrd->word2, RRD_VLTAG)); + A_UINT16 tag = ntohs(FIELD_GETX(rrd->word2, RRD_VLTAG)); __vlan_hwaccel_put_tag(skb, ntohs(tag)); } qnum = FIELD_GETX(rrd->word2, RRD_RSSQ) % adpt->nr_rxq; @@ -703,7 +705,7 @@ static bool alx_dispatch_skb(struct alx_rx_queue *rxq) clear_bit(ALX_RQ_USING, &rxq->flag); - return true; + return AH_TRUE; } static inline struct alx_rx_queue *alx_hw_rxq(struct alx_rx_queue *rxq) @@ -715,7 +717,7 @@ static inline struct alx_rx_queue *alx_hw_rxq(struct alx_rx_queue *rxq) static void __alx_configure_rss(struct alx_adapter *adpt) { - u32 ctrl; + A_UINT32 ctrl; int i; ALX_MEM_R32(adpt, ALX_RXQ0, &ctrl); @@ -753,11 +755,11 @@ static inline struct napi_struct *alx_rxq_to_napi( return &adpt->qnapi[rxq->qidx]->napi; } -static bool alx_clean_rx_irq(struct alx_rx_queue *rxq, int budget) +static HAL_BOOL alx_clean_rx_irq(struct alx_rx_queue *rxq, int budget) { struct sk_buff_head list; int empty; - bool collect; + HAL_BOOL collect; __skb_queue_head_init(&list); collect = alx_dispatch_skb(alx_hw_rxq(rxq)); @@ -826,9 +828,9 @@ static void alx_disable_msix(struct alx_adapter *adpt) ALX_FLAG_CLEAR(adpt, USING_MSIX); } -static void alx_mask_msix(struct alx_adapter *adpt, int index, bool mask) +static void alx_mask_msix(struct alx_adapter *adpt, int index, HAL_BOOL mask) { - u32 reg, val; + A_UINT32 reg, val; reg = ALX_MSIX_ENTRY_BASE + index * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; @@ -870,7 +872,7 @@ static void alx_irq_enable(struct alx_adapter *adpt) /* enable all individual MSIX IRQs */ for (i = 0; i < adpt->nr_vec; i++) - alx_mask_msix(adpt, i, false); + alx_mask_msix(adpt, i, AH_FALSE); } static void alx_irq_disable(struct alx_adapter *adpt) @@ -885,7 +887,7 @@ static void alx_irq_disable(struct alx_adapter *adpt) if (ALX_FLAG(adpt, USING_MSIX)) { for (i = 0; i < adpt->nr_vec; i++) { - alx_mask_msix(adpt, i, true); + alx_mask_msix(adpt, i, AH_TRUE); synchronize_irq(adpt->msix_ent[i].vector); } } else { @@ -897,7 +899,7 @@ static int alx_request_irq(struct alx_adapter *adpt) { struct pci_dev *pdev = adpt->pdev; int err; - u32 msi_ctrl; + A_UINT32 msi_ctrl; adpt->imask = ALX_ISR_MISC; msi_ctrl = FIELDX(ALX_MSI_RETRANS_TM, adpt->imt >> 1); @@ -1003,17 +1005,17 @@ static int __devinit alx_identify_hw(struct alx_adapter *adpt) return err; } -static bool __devinit alx_get_phy_id(struct alx_adapter *adpt) +static HAL_BOOL __devinit alx_get_phy_id(struct alx_adapter *adpt) { /* prtad is fixed to 0 for all of chips */ if (mdio45_probe(&adpt->mdio, 0)) - return false; + return AH_FALSE; if (alx_read_phy_reg(adpt, MII_PHYSID1, &adpt->phy_id[0]) || alx_read_phy_reg(adpt, MII_PHYSID2, &adpt->phy_id[1])) - return false; + return AH_FALSE; - return true; + return AH_TRUE; } /* some issues are relavant to specific platforms @@ -1021,11 +1023,11 @@ static bool __devinit alx_get_phy_id(struct alx_adapter *adpt) * vendor id, subsystem id and revision number */ struct alx_platform_patch { - u16 pci_did; /* pci device id */ - u8 pci_rev; /* pci revision id */ - u16 subsystem_vid; - u16 subsystem_did; - u32 pflag; /* patch flag */ + A_UINT16 pci_did; /* pci device id */ + A_UINT8 pci_rev; /* pci revision id */ + A_UINT16 subsystem_vid; + A_UINT16 subsystem_did; + A_UINT32 pflag; /* patch flag */ #define ALX_PF_LINK 0x00001 /* PHY link issue */ #define ALX_PF_HIB 0x00002 /* Hibernatation issue */ #define ALX_PF_ANY_REV 0x10000 /* not care revision number */ @@ -1047,15 +1049,15 @@ static void __devinit alx_patch_assign(struct alx_adapter *adpt) (plats[i].pflag & ALX_PF_ANY_REV || plats[i].pci_rev == adpt->pdev->revision)) { if (plats[i].pflag & ALX_PF_LINK) - adpt->lnk_patch = true; + adpt->lnk_patch = AH_TRUE; if (plats[i].pflag & ALX_PF_HIB) - adpt->hib_patch = true; + adpt->hib_patch = AH_TRUE; } i++; } } -static const u8 def_rss_key[40] __devinitdata = { +static const A_UINT8 def_rss_key[40] __devinitdata = { 0xE2, 0x91, 0xD7, 0x3D, 0x18, 0x05, 0xEC, 0x6C, 0x2A, 0x94, 0xB3, 0x0D, 0xA5, 0x4F, 0x2B, 0xEC, 0xEA, 0x49, 0xAF, 0x7C, 0xE2, 0x14, 0xAD, 0x3D, @@ -1066,7 +1068,7 @@ static const u8 def_rss_key[40] __devinitdata = { static void alx_init_def_rss_idt(struct alx_adapter *adpt) { int i, x, y; - u32 val; + A_UINT32 val; for (i = 0; i < adpt->rss_idt_size; i++) { val = ethtool_rxfh_indir_default(i, adpt->nr_rxq); @@ -1106,7 +1108,7 @@ static int __devinit alx_init_sw(struct alx_adapter *adpt) adpt->sleep_ctrl = ALX_SLEEP_WOL_MAGIC | ALX_SLEEP_WOL_PHY; adpt->imt = 200; /* 200us */ adpt->dma_chnl = adpt->max_dma_chnl; - adpt->link_up = false; /* PHY init status */ + adpt->link_up = AH_FALSE; /* PHY init status */ adpt->link_duplex = 0; adpt->link_speed = SPEED_0; adpt->adv_cfg = ADVERTISED_Autoneg | @@ -1201,9 +1203,9 @@ static int alx_change_mtu(struct net_device *netdev, int new_mtu) */ static void alx_configure(struct alx_adapter *adpt) { - u32 val, raw_mtu, max_payload; - u16 val16; - u8 chip_rev = ALX_REVID(adpt); + A_UINT32 val, raw_mtu, max_payload; + A_UINT16 val16; + A_UINT8 chip_rev = ALX_REVID(adpt); /* mac address */ alx_set_macaddr(adpt, adpt->mac_addr); @@ -1347,7 +1349,7 @@ static int __alx_open(struct alx_adapter *adpt) napi_enable(&(adpt->qnapi[i]->napi)); /* clear old interrupts */ - ALX_MEM_W32(adpt, ALX_ISR, (u32)~ALX_ISR_DIS); + ALX_MEM_W32(adpt, ALX_ISR, (A_UINT32)~ALX_ISR_DIS); alx_irq_enable(adpt); @@ -1375,7 +1377,7 @@ static void alx_halt(struct alx_adapter *adpt) /* stop TX/RX */ alx_stop_mac(adpt); /* disable L0S/L1 */ - alx_enable_aspm(adpt, false, false); + alx_enable_aspm(adpt, AH_FALSE, AH_FALSE); netif_carrier_off(netdev); for (i = 0; i < adpt->nr_napi; i++) @@ -1404,7 +1406,7 @@ static void alx_activate(struct alx_adapter *adpt) napi_enable(&(adpt->qnapi[i]->napi)); /* clear old interrupts */ - ALX_MEM_W32(adpt, ALX_ISR, (u32)~ALX_ISR_DIS); + ALX_MEM_W32(adpt, ALX_ISR, (A_UINT32)~ALX_ISR_DIS); alx_irq_enable(adpt); @@ -1423,7 +1425,7 @@ static void __alx_stop(struct alx_adapter *adpt) alx_free_all_ring_resources(adpt); } -static bool alx_enable_msix(struct alx_adapter *adpt) +static HAL_BOOL alx_enable_msix(struct alx_adapter *adpt) { int nr_txq, nr_rxq, vec_req; int i, err; @@ -1437,7 +1439,7 @@ static bool alx_enable_msix(struct alx_adapter *adpt) if (vec_req <= 2) { netdev_info(adpt->netdev, "cpu core num is less, MSI-X isn't necessary\n"); - return false; /* try msi */ + return AH_FALSE; /* try msi */ } adpt->msix_ent = kcalloc(vec_req, @@ -1445,7 +1447,7 @@ static bool alx_enable_msix(struct alx_adapter *adpt) GFP_KERNEL); if (!adpt->msix_ent) { netdev_info(adpt->netdev, "can't alloc msix entries\n"); - return false; + return AH_FALSE; } for (i = 0; i < vec_req; i++) adpt->msix_ent[i].entry = i; @@ -1455,7 +1457,7 @@ static bool alx_enable_msix(struct alx_adapter *adpt) kfree(adpt->msix_ent); adpt->msix_ent = NULL; netdev_info(adpt->netdev, "can't enable MSI-X interrupt\n"); - return false; + return AH_FALSE; } adpt->nr_txq = nr_txq; @@ -1463,7 +1465,7 @@ static bool alx_enable_msix(struct alx_adapter *adpt) adpt->nr_vec = vec_req; adpt->nr_napi = vec_req - 1; - return true; + return AH_TRUE; } static void alx_init_intr(struct alx_adapter *adpt) @@ -1489,11 +1491,11 @@ static void alx_init_ring_ptrs(struct alx_adapter *adpt) { struct alx_napi *np; int i, tx_idx, rx_idx; - u32 addr_hi; - u16 txring_header_reg[] = {ALX_TPD_PRI0_ADDR_LO, ALX_TPD_PRI1_ADDR_LO, + A_UINT32 addr_hi; + A_UINT16 txring_header_reg[] = {ALX_TPD_PRI0_ADDR_LO, ALX_TPD_PRI1_ADDR_LO, ALX_TPD_PRI2_ADDR_LO, ALX_TPD_PRI3_ADDR_LO}; - u16 rfdring_header_reg[] = {ALX_RFD_ADDR_LO}; - u16 rrdring_header_reg[] = {ALX_RRD_ADDR_LO}; + A_UINT16 rfdring_header_reg[] = {ALX_RFD_ADDR_LO}; + A_UINT16 rrdring_header_reg[] = {ALX_RRD_ADDR_LO}; tx_idx = 0; rx_idx = 0; @@ -1531,7 +1533,7 @@ static void alx_init_ring_ptrs(struct alx_adapter *adpt) ALX_MEM_W32(adpt, ALX_SRAM9, ALX_SRAM_LOAD_PTR); } -static void alx_show_speed(struct net_device *dev, u16 speed) +static void alx_show_speed(struct net_device *dev, A_UINT16 speed) { char *desc; @@ -1551,8 +1553,8 @@ static void alx_show_speed(struct net_device *dev, u16 speed) static void alx_check_link(struct alx_adapter *adpt) { - u16 speed, old_speed; - bool link_up; + A_UINT16 speed, old_speed; + HAL_BOOL link_up; int i, err; if (ALX_FLAG(adpt, HALT)) @@ -1578,7 +1580,7 @@ static void alx_check_link(struct alx_adapter *adpt) alx_show_speed(adpt->netdev, speed); adpt->link_duplex = speed % 10; adpt->link_speed = speed - adpt->link_duplex; - adpt->link_up = true; + adpt->link_up = AH_TRUE; alx_post_phy_link(adpt, adpt->link_speed, ALX_FLAG(adpt, CAP_AZ)); @@ -1596,12 +1598,12 @@ static void alx_check_link(struct alx_adapter *adpt) /* link changed from 'up' to 'down' */ netif_carrier_off(adpt->netdev); - adpt->link_up = false; + adpt->link_up = AH_FALSE; adpt->link_speed = SPEED_0; netdev_info(adpt->netdev, "NIC Link Down\n"); alx_stop_mac(adpt); - alx_enable_aspm(adpt, false, ALX_FLAG(adpt, CAP_L1)); + alx_enable_aspm(adpt, AH_FALSE, ALX_FLAG(adpt, CAP_L1)); alx_post_phy_link(adpt, SPEED_0, ALX_FLAG(adpt, CAP_AZ)); /* free any pending tx skbs */ @@ -1645,11 +1647,11 @@ static int alx_stop(struct net_device *netdev) return 0; } -static int alx_select_powersaving_speed(struct alx_adapter *adpt, u16 *speed) +static int alx_select_powersaving_speed(struct alx_adapter *adpt, A_UINT16 *speed) { int i, err; - u16 spd, lpa; - bool linkup; + A_UINT16 spd, lpa; + HAL_BOOL linkup; err = alx_get_phy_link(adpt, &linkup, &spd); if (err) @@ -1687,8 +1689,8 @@ static int alx_select_powersaving_speed(struct alx_adapter *adpt, u16 *speed) /* wait for linkup */ for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { - u16 speed2; - bool link_on; + A_UINT16 speed2; + HAL_BOOL link_on; msleep(100); err = alx_get_phy_link(adpt, &link_on, &speed2); @@ -1710,12 +1712,12 @@ static int alx_select_powersaving_speed(struct alx_adapter *adpt, u16 *speed) return err; } -static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) +static int __alx_shutdown(struct pci_dev *pdev, HAL_BOOL *wol_en) { struct alx_adapter *adpt = pci_get_drvdata(pdev); struct net_device *netdev = adpt->netdev; int err; - u16 speed; + A_UINT16 speed; netif_device_detach(netdev); if (netif_running(netdev)) @@ -1737,10 +1739,10 @@ static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) if (err) goto out; - *wol_en = false; + *wol_en = AH_FALSE; if (adpt->sleep_ctrl & ALX_SLEEP_ACTIVE) { - device_set_wakeup_enable(&pdev->dev, true); - *wol_en = true; + device_set_wakeup_enable(&pdev->dev, AH_TRUE); + *wol_en = AH_TRUE; } pci_disable_device(pdev); @@ -1752,7 +1754,7 @@ static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) static void alx_shutdown(struct pci_dev *pdev) { int err; - bool wol_en; + HAL_BOOL wol_en; err = __alx_shutdown(pdev, &wol_en); if (likely(!err)) { @@ -1769,7 +1771,7 @@ static int alx_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); int err; - bool wol_en; + HAL_BOOL wol_en; err = __alx_shutdown(pdev, &wol_en); if (unlikely(err)) { @@ -1779,7 +1781,7 @@ static int alx_suspend(struct device *dev) if (wol_en) { pci_prepare_to_sleep(pdev); } else { - pci_wake_from_d3(pdev, false); + pci_wake_from_d3(pdev, AH_FALSE); pci_set_power_state(pdev, PCI_D3hot); } @@ -1804,7 +1806,7 @@ static int alx_resume(struct device *dev) pci_enable_wake(pdev, PCI_D3hot, 0); pci_enable_wake(pdev, PCI_D3cold, 0); - adpt->link_up = false; + adpt->link_up = AH_FALSE; adpt->link_speed = SPEED_0; alx_reset_pcie(adpt); @@ -1839,8 +1841,8 @@ static int alx_resume(struct device *dev) /* alx_update_hw_stats - Update the board statistics counters. */ static void alx_update_hw_stats(struct alx_adapter *adpt) { - u16 reg; - u32 data; + A_UINT16 reg; + A_UINT32 data; unsigned long *p; if (ALX_FLAG(adpt, HALT) || ALX_FLAG(adpt, RESETING)) @@ -1966,10 +1968,10 @@ static irqreturn_t alx_msix_ring(int irq, void *data) { struct alx_napi *np = data; struct alx_adapter *adpt = np->adpt; - u32 intr; + A_UINT32 intr; /* mask interrupt to ACK chip */ - alx_mask_msix(adpt, np->vec_idx, true); + alx_mask_msix(adpt, np->vec_idx, AH_TRUE); ALX_MEM_R32(adpt, ALX_ISR, &intr); intr &= ~np->vec_mask; @@ -1982,12 +1984,12 @@ static irqreturn_t alx_msix_ring(int irq, void *data) return IRQ_HANDLED; } -static inline bool alx_handle_intr_misc(struct alx_adapter *adpt, u32 intr) +static inline HAL_BOOL alx_handle_intr_misc(struct alx_adapter *adpt, A_UINT32 intr) { if (unlikely(intr & ALX_ISR_FATAL)) { ALX_FLAG_SET(adpt, TASK_RESET); alx_schedule_work(adpt); - return true; + return AH_TRUE; } if (intr & ALX_ISR_ALERT) @@ -2009,16 +2011,16 @@ static inline bool alx_handle_intr_misc(struct alx_adapter *adpt, u32 intr) alx_schedule_work(adpt); } - return false; + return AH_FALSE; } static irqreturn_t alx_intr_msix_misc(int irq, void *data) { struct alx_adapter *adpt = data; - u32 intr; + A_UINT32 intr; /* mask interrupt to ACK chip */ - alx_mask_msix(adpt, 0, true); + alx_mask_msix(adpt, 0, AH_TRUE); /* read interrupt status */ ALX_MEM_R32(adpt, ALX_ISR, &intr); @@ -2032,12 +2034,12 @@ static irqreturn_t alx_intr_msix_misc(int irq, void *data) /* enable interrupt again */ if (!ALX_FLAG(adpt, HALT)) - alx_mask_msix(adpt, 0, false); + alx_mask_msix(adpt, 0, AH_FALSE); return IRQ_HANDLED; } -static inline irqreturn_t alx_intr_1(struct alx_adapter *adpt, u32 intr) +static inline irqreturn_t alx_intr_1(struct alx_adapter *adpt, A_UINT32 intr) { /* ACK interrupt */ ALX_MEM_W32(adpt, ALX_ISR, ALX_ISR_DIS); @@ -2062,7 +2064,7 @@ static inline irqreturn_t alx_intr_1(struct alx_adapter *adpt, u32 intr) static irqreturn_t alx_intr_msi(int irq, void *data) { struct alx_adapter *adpt = data; - u32 intr; + A_UINT32 intr; /* read interrupt status */ ALX_MEM_R32(adpt, ALX_ISR, &intr); @@ -2073,7 +2075,7 @@ static irqreturn_t alx_intr_msi(int irq, void *data) static irqreturn_t alx_intr_legacy(int irq, void *data) { struct alx_adapter *adpt = data; - u32 intr; + A_UINT32 intr; /* read interrupt status */ ALX_MEM_R32(adpt, ALX_ISR, &intr); @@ -2088,7 +2090,7 @@ static int alx_poll(struct napi_struct *napi, int budget) { struct alx_napi *np = container_of(napi, struct alx_napi, napi); struct alx_adapter *adpt = np->adpt; - bool complete = true; + HAL_BOOL complete = AH_TRUE; if (np->txq) complete = alx_clean_tx_irq(np->txq); @@ -2104,7 +2106,7 @@ static int alx_poll(struct napi_struct *napi, int budget) /* enable interrupt */ if (!ALX_FLAG(adpt, HALT)) { if (ALX_FLAG(adpt, USING_MSIX)) - alx_mask_msix(adpt, np->vec_idx, false); + alx_mask_msix(adpt, np->vec_idx, AH_FALSE); else ALX_MEM_W32(adpt, ALX_IMR, adpt->imask); ALX_MEM_FLUSH(adpt); @@ -2138,7 +2140,7 @@ static inline int alx_tpd_req(struct sk_buff *skb) static int alx_tx_csum(struct sk_buff *skb, struct tpd_desc *first) { - u8 cso, css; + A_UINT8 cso, css; if (skb->ip_summed != CHECKSUM_PARTIAL) return 0; @@ -2226,7 +2228,7 @@ static int alx_tx_map(struct alx_tx_queue *txq, struct sk_buff *skb) struct tpd_desc *tpd, *first_tpd; struct alx_buffer *buf, *first_buf; dma_addr_t dma; - u16 producer, maplen, f; + A_UINT16 producer, maplen, f; producer = txq->pidx; @@ -2400,10 +2402,10 @@ static void alx_tx_timeout(struct net_device *dev) } static int alx_mdio_read(struct net_device *netdev, - int prtad, int devad, u16 addr) + int prtad, int devad, A_UINT16 addr) { struct alx_adapter *adpt = netdev_priv(netdev); - u16 val; + A_UINT16 val; int err; if (prtad != adpt->mdio.prtad) @@ -2418,7 +2420,7 @@ static int alx_mdio_read(struct net_device *netdev, } static int alx_mdio_write(struct net_device *netdev, - int prtad, int devad, u16 addr, u16 val) + int prtad, int devad, A_UINT16 addr, A_UINT16 val) { struct alx_adapter *adpt = netdev_priv(netdev); int err; @@ -2489,7 +2491,7 @@ alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct net_device *netdev; struct alx_adapter *adpt = NULL; - bool phy_cfged; + HAL_BOOL phy_cfged; int bars, pm_cap, err; static int cards_found; diff --git a/src/alx_regops.h b/src/alx_regops.h new file mode 100644 index 0000000..9446ad1 --- /dev/null +++ b/src/alx_regops.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2012 Qualcomm Atheros, Inc. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef __ALX_REGOPS_H__ +#define __ALX_REGOPS_H__ + +/* write to 8bit register via pci memory space */ +#define ALX_MEM_W8(s, reg, val) (writeb((val), ((s)->hw_addr + reg))) + +/* read from 8bit register via pci memory space */ +#define ALX_MEM_R8(s, reg, pdat) (\ + *(A_UINT8 *)(pdat) = readb((s)->hw_addr + reg)) + +/* write to 16bit register via pci memory space */ +#define ALX_MEM_W16(s, reg, val) (writew((val), ((s)->hw_addr + reg))) + +/* read from 16bit register via pci memory space */ +#define ALX_MEM_R16(s, reg, pdat) (\ + *(A_UINT16 *)(pdat) = readw((s)->hw_addr + reg)) + +/* write to 32bit register via pci memory space */ +#define ALX_MEM_W32(s, reg, val) (writel((val), ((s)->hw_addr + reg))) + +/* read from 32bit register via pci memory space */ +#define ALX_MEM_R32(s, reg, pdat) (\ + *(A_UINT32 *)(pdat) = readl((s)->hw_addr + reg)) + +/* read from 16bit register via pci config space */ +#define ALX_CFG_R16(s, reg, pdat) (\ + pci_read_config_word((s)->pdev, (reg), (pdat))) + +/* write to 16bit register via pci config space */ +#define ALX_CFG_W16(s, reg, val) (\ + pci_write_config_word((s)->pdev, (reg), (val))) + +/* flush regs */ +#define ALX_MEM_FLUSH(s) (readl((s)->hw_addr)) + + +#endif /* __ALX_REGOPS_H__ */ diff --git a/src/os/freebsd/Makefile b/src/os/freebsd/Makefile new file mode 100644 index 0000000..a0fa050 --- /dev/null +++ b/src/os/freebsd/Makefile @@ -0,0 +1,10 @@ +# $FreeBSD: release/9.0.0/sys/modules/ae/Makefile 185571 2008-12-02 21:37:28Z bz $ + +KMOD= if_alx + +CFLAGS+= -I. +.PATH: ${.CURDIR}/../../ + +SRCS= alx_hw.c + +.include diff --git a/src/os/freebsd/ah_osdep.h b/src/os/freebsd/ah_osdep.h new file mode 100644 index 0000000..0f1832d --- /dev/null +++ b/src/os/freebsd/ah_osdep.h @@ -0,0 +1,109 @@ +#ifndef __AH_OSDEP_H__ +#define __AH_OSDEP_H__ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include + +/* + * FreeBSD-specific typedefs. + */ +typedef int HAL_BOOL; +/* XXX TODO: true/false as typedefs? */ +#define AH_FALSE 0 +#define AH_TRUE 1 + +#define BIT(x) (1 << (x)) + +typedef uint8_t A_UINT8; +typedef uint16_t A_UINT16; +typedef uint32_t A_UINT32; + +/* XXX TODO: make the below types A_xxx */ +typedef uint16_t __le16; +typedef uint32_t __le32; +typedef uint64_t __le64; + +typedef uint16_t __be16; +typedef uint32_t __be32; +typedef uint64_t __be64; + +#define be32_to_cpu(x) be32toh(x) +#define be16_to_cpu(x) be16toh(x) + +#define cpu_to_be32(x) htobe32(x) +#define cpu_to_be16(x) htobe16(x) + +/* XXX not likely right for 64 bit platforms! */ +typedef uint32_t A_DMA_ADDR; + +/* XXX also, and this requires atomic _function calls_ to drive */ +typedef uint32_t A_ATOMIC; + +#if 0 +/* write to 8bit register via pci memory space */ +#define ALX_MEM_W8(s, reg, val) (writeb((val), ((s)->hw_addr + reg))) + +/* read from 8bit register via pci memory space */ +#define ALX_MEM_R8(s, reg, pdat) (\ + *(A_UINT8 *)(pdat) = readb((s)->hw_addr + reg)) + +/* write to 16bit register via pci memory space */ +#define ALX_MEM_W16(s, reg, val) (writew((val), ((s)->hw_addr + reg))) + +/* read from 16bit register via pci memory space */ +#define ALX_MEM_R16(s, reg, pdat) (\ + *(A_UINT16 *)(pdat) = readw((s)->hw_addr + reg)) + +/* write to 32bit register via pci memory space */ +#define ALX_MEM_W32(s, reg, val) (writel((val), ((s)->hw_addr + reg))) + +/* read from 32bit register via pci memory space */ +#define ALX_MEM_R32(s, reg, pdat) (\ + *(A_UINT32 *)(pdat) = readl((s)->hw_addr + reg)) + +/* read from 16bit register via pci config space */ +#define ALX_CFG_R16(s, reg, pdat) (\ + pci_read_config_word((s)->pdev, (reg), (pdat))) + +/* write to 16bit register via pci config space */ +#define ALX_CFG_W16(s, reg, val) (\ + pci_write_config_word((s)->pdev, (reg), (val))) + +/* flush regs */ +#define ALX_MEM_FLUSH(s) (readl((s)->hw_addr)) +#endif + +/* XXX undo this */ +#define __iomem + +#define ALX_MEM_W8(s, reg, val) +#define ALX_MEM_R8(s, reg, pdat) +#define ALX_MEM_W16(s, reg, val) +#define ALX_MEM_R16(s, reg, pdat) +#define ALX_MEM_W32(s, reg, val) +#define ALX_MEM_R32(s, reg, pdat) + +#define ALX_CFG_R16(s, reg, pdat) +#define ALX_CFG_W16(s, reg, val) + + +/* Sleep functions */ +#define OS_UDELAY(s) DELAY(s) +#define OS_MDELAY(s) DELAY(s) + +/* Spinlocks */ +typedef struct mtx A_SPINLOCK; +#define OS_SPIN_LOCK(s) mtx_lock_spin(s) +#define OS_SPIN_UNLOCK(s) mtx_unlock_spin(s) +/* XXX init, free */ + +#endif /* __AH_OSDEP_H__ */ diff --git a/src/os/freebsd/ah_osinc.h b/src/os/freebsd/ah_osinc.h new file mode 100644 index 0000000..ce8ca90 --- /dev/null +++ b/src/os/freebsd/ah_osinc.h @@ -0,0 +1,5 @@ +#ifndef __AH_OSINC_H__ +#define __AH_OSINC_H__ + + +#endif /* __AH_OSINC_H__ */ diff --git a/src/os/linux/ah_osdep.h b/src/os/linux/ah_osdep.h new file mode 100644 index 0000000..3d611aa --- /dev/null +++ b/src/os/linux/ah_osdep.h @@ -0,0 +1,16 @@ +#ifndef __AH_OSDEP_H__ +#define __AH_OSDEP_H__ + +/* + * These are just linux specific typedefs for now. + */ +typedef bool HAL_BOOL; +/* XXX TODO: true/false as typedefs? */ +#define AH_FALSE false +#define AH_TRUE true + +typedef u8 A_UINT8; +typedef u16 A_UINT16; +typedef u32 A_UINT32; + +#endif /* __AH_OSDEP_H__ */