First commit

Author: matiasilva

Diff for: Makefile

@@ -0,0 +1,47 @@
+PROJ_DIR := src/
+DEVICES_DIR := devices/
+
+PROJ = $(PROJ_DIR)/stopwatch
+
+all: $(PROJ).rpt $(PROJ).bin
+
+$(PROJ).json: $(PROJ).v
+	yosys -ql $(PROJ).yslog -p 'synth_ice40 -top top -json $@' $<
+
+$(PROJ).asc: $(PROJ).json icebreaker.pcf
+	nextpnr-ice40 -ql $(PROJ).nplog --up5k --package sg48 --freq 12 --asc $@ --pcf $(DEVICES_DIR)/icebreaker.pcf --json $<
+
+$(PROJ).bin: $(PROJ).asc
+	icepack $< $@
+
+$(PROJ).rpt: $(PROJ).asc
+	icetime -d up5k -c 12 -mtr $@ $<
+
+$(PROJ)_tb: $(PROJ)_tb.v $(PROJ).v
+	iverilog -o $@ $^
+
+$(PROJ)_tb.vcd: $(PROJ)_tb
+	vvp -N $< +vcd=$@
+
+$(PROJ)_syn.v: $(PROJ).json
+	yosys -p 'read_json $^; write_verilog $@'
+
+$(PROJ)_syntb: $(PROJ)_tb.v $(PROJ)_syn.v
+	iverilog -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
+
+$(PROJ)_syntb.vcd: $(PROJ)_syntb
+	vvp -N $< +vcd=$@
+
+prog: $(PROJ).bin
+	iceprog $<
+
+sudo-prog: $(PROJ).bin
+	@echo 'Executing prog as root!!!'
+	sudo iceprog $<
+
+clean:
+	rm -f $(PROJ).yslog $(PROJ).nplog $(PROJ).json $(PROJ).asc $(PROJ).rpt $(PROJ).bin
+	rm -f $(PROJ)_tb $(PROJ)_tb.vcd $(PROJ)_syn.v $(PROJ)_syntb $(PROJ)_syntb.vcd
+
+.SECONDARY:
+.PHONY: all prog clean

Diff for: README.md

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+# FPGA projects
+
+This repo houses a collection of projects that use the iCEBreaker FPGA and the open source suite of tools for simulation, synthesis and place-and-route.

Diff for: devices/icebreaker.pcf

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+# 12 MHz clock
+set_io -nowarn CLK        35
+
+# RS232
+set_io -nowarn RX          6
+set_io -nowarn TX          9
+
+# LEDs and Button
+set_io -nowarn BTN_N      10
+set_io -nowarn LEDR_N     11
+set_io -nowarn LEDG_N     37
+
+# RGB LED Driver
+set_io -nowarn LED_RED_N  39
+set_io -nowarn LED_GRN_N  40
+set_io -nowarn LED_BLU_N  41
+
+# SPI Flash
+set_io -nowarn FLASH_SCK  15
+set_io -nowarn FLASH_SSB  16
+set_io -nowarn FLASH_IO0  14
+set_io -nowarn FLASH_IO1  17
+set_io -nowarn FLASH_IO2  12
+set_io -nowarn FLASH_IO3  13
+
+# PMOD 1A
+set_io -nowarn P1A1        4
+set_io -nowarn P1A2        2
+set_io -nowarn P1A3       47
+set_io -nowarn P1A4       45
+set_io -nowarn P1A7        3
+set_io -nowarn P1A8       48
+set_io -nowarn P1A9       46
+set_io -nowarn P1A10      44
+
+# PMOD 1B
+set_io -nowarn P1B1       43
+set_io -nowarn P1B2       38
+set_io -nowarn P1B3       34
+set_io -nowarn P1B4       31
+set_io -nowarn P1B7       42
+set_io -nowarn P1B8       36
+set_io -nowarn P1B9       32
+set_io -nowarn P1B10      28
+
+# LEDs and Buttons (PMOD 2)
+set_io -nowarn LED1       26
+set_io -nowarn LED2       27
+set_io -nowarn LED3       25
+set_io -nowarn LED4       23
+set_io -nowarn LED5       21
+set_io -nowarn BTN1       20
+set_io -nowarn BTN2       19
+set_io -nowarn BTN3       18

Diff for: src/counter/counter.v

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+module counter(
+    input CLK,
+	output P1A1, P1A2, P1A3, P1A4, P1A7, P1A8, P1A9, P1A10
+);
+
+/*
+    using the 1bitsquared 7 segment display PMOD
+
+    ////AAAA////        ////AAAA//// 
+    //        //        //        //
+    FF        BB        FF        BB
+    //        //        //        //
+    ////GGGG////        ////GGGG////
+    //        //        //        //
+    EE        CC        EE        CC
+    //        //        //        //
+    ////DDDD////        ////DDDD////
+
+    pin assignments:
+    AA --> P1A1
+    AB --> P1A2
+    AC --> P1A3
+    AD --> P1A4
+    AE --> P1A7
+    AF --> P1A8
+    AG --> P1A9
+    CA --> P1A10 (mux for digits)
+    (decimal point unconnected)
+*/
+    localparam COUNT_MAX = 99;
+
+    reg [7:0] count;
+    wire [3:0] msd; // most significant digit
+    wire [3:0] lsd;
+
+    always @(*) begin
+        
+    end
+
+    wire ss_ctrl;
+    wire [6:0] ss_bits;
+	wire [7:0] seven_segment = {ss_ctrl, ss_bits}; // control and data bus
+	assign { P1A10, P1A9, P1A8, P1A7, P1A4, P1A3, P1A2, P1A1 } = seven_segment; // assign to PMOD
+
+    seven_seg_decoder ss_decode_u(
+        .din()
+    );
+
+    module seven_seg_decoder (
+        input [3:0] din,
+        output [6:0] dout
+    );
+        reg digit;
+        always @(*) begin
+            digit = 7'b 1000000; // no latches
+            case (din)
+                4'h0: digit = 7'b 0111111;
+                4'h1: digit = 7'b 0000110;
+                4'h2: digit = 7'b 1011011;
+                4'h3: digit = 7'b 1011011;
+                4'h4: digit = 7'b 1100110;
+                4'h5: digit = 7'b 1101101;
+                4'h6: digit = 7'b 1111101;
+                4'h7: digit = 7'b 0000111;
+                4'h8: digit = 7'b 1011011;
+                4'h9: digit = 7'b 1101111;
+                4'hA: digit = 7'b 1110111;
+                4'hB: digit = 7'b 1111100;
+                4'hC: digit = 7'b 0111001;
+                4'hD: digit = 7'b 1011110;
+                4'hE: digit = 7'b 1111001;
+                4'hF: digit = 7'b 1110001;
+            endcase
+        end
+        assign dout = digit;
+    endmodule
+
+endmodule