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#include " bus/nscsi/cd.h"
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#include " bus/nscsi/devices.h"
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#include " bus/nubus/nubus.h"
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+ #include " bus/nubus/cards.h"
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#include " bus/rs232/rs232.h"
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#include " cpu/powerpc/ppc.h"
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#include " machine/6522via.h"
@@ -120,9 +121,9 @@ class macpdm_state : public driver_device
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void sndi_err_irq (int state);
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void vblank_irq (int state);
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- [[maybe_unused]] void slot2_irq (int state);
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- [[maybe_unused]] void slot1_irq (int state);
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- void slot0_irq (int state);
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+ void slot2_irq_w (int state);
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+ void slot1_irq_w (int state);
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+ void slot0_irq_w (int state);
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void fdc_irq (int state);
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void fdc_drq (int state);
@@ -167,6 +168,8 @@ class macpdm_state : public driver_device
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uint8_t hmc_r (offs_t offset);
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void hmc_w (offs_t offset, uint8_t data);
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+ void ram_size ();
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+
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uint32_t id_r ();
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uint8_t diag_r (offs_t offset);
@@ -247,6 +250,7 @@ macpdm_state::macpdm_state(const machine_config &mconfig, device_type type, cons
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void macpdm_state::driver_init ()
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{
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m_maincpu->space ().install_ram (0 , m_ram->mask (), 0 , m_ram->pointer ());
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+
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m_model_id = 0xa55a3011 ;
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// 7100 = a55a3012
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// 8100 = a55a3013
@@ -567,22 +571,25 @@ void macpdm_state::scsi_w(offs_t offset, uint8_t data)
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uint8_t macpdm_state::hmc_r (offs_t offset)
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{
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- return (m_hmc_reg >> m_hmc_bit) & 1 ? 0x80 : 0x00 ;
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+ const uint8_t rv = (m_hmc_reg >> m_hmc_bit) & 1 ;
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+ m_hmc_bit++;
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+ return rv;
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}
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void macpdm_state::hmc_w (offs_t offset, uint8_t data)
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{
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if (offset & 8 )
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m_hmc_bit = 0 ;
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else {
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- if (data & 0x80 )
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+ if (data & 1 )
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m_hmc_buffer |= u64 (1 ) << m_hmc_bit;
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else
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m_hmc_buffer &= ~(u64 (1 ) << m_hmc_bit);
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m_hmc_bit ++;
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if (m_hmc_bit == 35 ) {
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m_hmc_reg = m_hmc_buffer & ~3 ; // csiz is readonly, we pretend there isn't a l2 cache
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- m_video->set_vram_offset (m_hmc_reg & 0x200000000 ? 0x100000 : 0 );
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+ m_video->set_vram_offset (m_hmc_reg & 0x200000000 ? 0 : 0x100000 );
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+ ram_size ();
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logerror (" HMC l2=%c%c%c%c%c vbase=%c%s mbram=%cM size=%x%s romd=%d refresh=%02x w=%c%c%c%c ras=%d%d%d%d\n " ,
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m_hmc_reg & 0x008000000 ? ' +' : ' -' , // l2_en
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m_hmc_reg & 0x400000000 ? ' 3' : ' 2' , // l2_init
@@ -592,19 +599,79 @@ void macpdm_state::hmc_w(offs_t offset, uint8_t data)
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m_hmc_reg & 0x200000000 ? ' 1' : ' 0' , // vbase
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m_hmc_reg & 0x100000000 ? " vtst" : " " , // vtst
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m_hmc_reg & 0x080000000 ? ' 8' : ' 4' , // mb_ram
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- (m_hmc_reg >> 29 ) & 3 , // size
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+ (uint32_t )(( m_hmc_reg >> 29 ) & 3 ), // size
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m_hmc_reg & 0x001000000 ? " nblrom" : " " , // nblrom
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- 12 - 2 *((m_hmc_reg >> 22 ) & 3 ), // romd
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- (m_hmc_reg >> 16 ) & 0x3f , // rfsh
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+ ( uint32_t )( 12 - 2 *((m_hmc_reg >> 22 ) & 3 )), // romd
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+ (uint32_t )(( m_hmc_reg >> 16 ) & 0x3f ), // rfsh
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m_hmc_reg & 0x000000008 ? ' 3' : ' 2' , // winit
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m_hmc_reg & 0x000000004 ? ' 3' : ' 2' , // wbrst
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m_hmc_reg & 0x000008000 ? ' 1' : ' 2' , // wcasp
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m_hmc_reg & 0x000004000 ? ' 1' : ' 2' , // wcasd
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- 3 - ((m_hmc_reg >> 12 ) & 3 ), // rdac
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- 6 - ((m_hmc_reg >> 8 ) & 3 ), // rasd
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- 5 - ((m_hmc_reg >> 6 ) & 3 ), // rasp
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- 4 - ((m_hmc_reg >> 4 ) & 3 )); // rcasd
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+ (uint32_t )(3 - ((m_hmc_reg >> 12 ) & 3 )), // rdac
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+ (uint32_t )(6 - ((m_hmc_reg >> 8 ) & 3 )), // rasd
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+ (uint32_t )(5 - ((m_hmc_reg >> 6 ) & 3 )), // rasp
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+ (uint32_t )(4 - ((m_hmc_reg >> 4 ) & 3 ))); // rcasd
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+ }
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+ }
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+ }
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+
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+ /*
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+ PDM uses a variant on the V8/Sonora style memory controller.
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+ - Motherboard RAM can be 4 or 8 MiB
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+ - The hardware officially limits SIMMs to 2, 8, or 32 MiB, and SIMMs must be installed in pairs
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+ - In reality, 128 MiB SIMMs will also work.
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+ - 6100 has only 2 SIMM slots, so valid sizes are 8MiB (no SIMMs), 12MiB (2 MiB SIMM x2),
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+ 24MiB (8 MiB SIMM x2), 72MiB (32 MiB SIMM x2), and 264MiB (128 MiB SIMM x2)
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+ - 7100 has 4 SIMM slots, allowing RAM up to 520MiB (128 MiB SIMM x4)
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+ - 8100 has 8 SIMM slots, which add valid sizes up to 264 MiB (32 MiB SIMM x8)
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+ */
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+ void macpdm_state::ram_size (){
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+ static const uint32_t sizes[4 ] = { 128 *1024 *1024 , 2 *1024 *1024 , 8 *1024 *1024 , 32 *1024 *1024 };
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+ const u8 config = (m_hmc_reg >> 29 ) & 3 ; // 0 = 128MiB, 1 = 2MiB, 2 = 8MiB, 3 = 32MiB
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+ const u8 mb_size = (m_hmc_reg & 0x00800000 ) ? 1 : 0 ;
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+ address_space &space = m_maincpu->space (AS_PROGRAM);
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+ const u32 total_ram = m_ram->size ();
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+ const u32 mb_ram_size = (mb_size ? 8 *1024 *1024 : 4 *1024 *1024 );
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+
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+ // SIMMs must be in identical pairs, so any leftover RAM after the motherboard 8MiB is
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+ // the number of slots times the SIMM size.
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+ const u32 simm_size = (total_ram - mb_ram_size) / 2 ;
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+
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+ u8 *mb_ram = (u8 *)m_ram->pointer ();
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+ u8 *ram_a = mb_ram + mb_ram_size;
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+ u8 *ram_b = ram_a + simm_size;
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+
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+ // unmap the first GB of address space (reserved for RAM)
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+ space.unmap_readwrite (0x00000000 , 0x3fffffff );
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+
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+ // map the motherboard 8MB
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+ space.install_ram (0x00000000 , 0x007fffff , 0 , (void *)mb_ram);
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+
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+ // install RAM A
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+ if (simm_size > 0 )
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+ {
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+ if (simm_size <= 8 *1024 *1024 )
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+ {
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+ space.install_ram (mb_ram_size, mb_ram_size + simm_size - 1 , 0 , (void *)ram_a);
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+ }
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+ else
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+ {
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+ space.install_ram (mb_ram_size, sizes[config] - 1 , 0 , (void *)(ram_a + mb_ram_size));
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}
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+
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+ // install a complete image of RAM A in the slot above the top of memory (which is actually where the ROM code looks for it)
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+ const u32 alias_base = (sizes[config] * 2 );
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+ space.install_ram (alias_base, alias_base + simm_size - 1 , 0 , (void *)ram_a);
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+
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+ // install RAM B
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+ u32 b_base = sizes[config];
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+
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+ if (simm_size < (128 *1024 *1024 ))
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+ {
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+ b_base += mb_ram_size;
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+ }
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+
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+ space.install_ram (b_base, b_base + simm_size - 1 , 0 , (void *)ram_b);
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}
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}
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@@ -680,16 +747,21 @@ void macpdm_state::vblank_irq(int state)
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via2_irq_slot_set (0x40 , state);
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}
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- void macpdm_state::slot2_irq (int state)
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+ void macpdm_state::slot2_irq_w (int state)
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{
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via2_irq_slot_set (0x20 , state);
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}
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- void macpdm_state::slot1_irq (int state)
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+ void macpdm_state::slot1_irq_w (int state)
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{
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via2_irq_slot_set (0x10 , state);
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}
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+ void macpdm_state::slot0_irq_w (int state)
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+ {
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+ via2_irq_slot_set (0x08 , state);
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+ }
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+
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void macpdm_state::sndo_dma_irq (int state)
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{
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m_dma_irq_2 &= ~DMA2_IRQ_SND_OUT;
@@ -1190,7 +1262,16 @@ void macpdm_state::macpdm(machine_config &config)
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RAM (config, m_ram);
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m_ram->set_default_size (" 8M" );
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- m_ram->set_extra_options (" 16M,32M,64M,128M" );
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+ m_ram->set_extra_options (" 12M,24M,72M,264M" );
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+
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+ nubus_device &nubus (NUBUS (config, " nubus" , 0 ));
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+ nubus.set_space (m_maincpu, AS_PROGRAM);
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+ nubus.out_irqc_callback ().set (FUNC (macpdm_state::slot0_irq_w));
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+ nubus.out_irqd_callback ().set (FUNC (macpdm_state::slot1_irq_w));
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+ nubus.out_irqe_callback ().set (FUNC (macpdm_state::slot2_irq_w));
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+
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+ // 6100 with the NuBus adapter has one slot, slot $E
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+ NUBUS_SLOT (config, " nbe" , " nubus" , powermac_nubus_cards, nullptr );
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MACADB (config, m_macadb, IO_CLOCK/2 );
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CUDA_V2XX (config, m_cuda, XTAL (32'768 ));
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