[dv] Made dedicated gitignore file and add coverage files

Author: marnovandermaas

.gitignore

@@ -18,27 +18,6 @@ ibex_simple_system_pcount.csv
 # Python cache files
 __pycache__
 
-# This is generated by VCS when running DV simulations with WAVE=1.
-/dv/uvm/core_ibex/ucli.key
-
-# This is generated by UVM when running simulations and doesn't seem
-# to be something you can disable.
-/dv/uvm/core_ibex/tr_db.log
-
-# This is the default output directory in dv/uvm/core_ibex and
-# contains auto-generated files from building and running tests.
-/dv/uvm/core_ibex/out
-
-# This is generated by the Makefile based on the ibex configuration
-/dv/uvm/core_ibex/riscv_dv_extension/riscv_core_setting.sv
-
 # This is generated by Questa tool when running DV simulations
 modelsim.ini
 
-# This is generated by Xcelium when running DV simulations, even with WAVE=0
-/dv/uvm/core_ibex/waves.shm
-
-# Log files generated by Cadence tools when running DV simulations
-/dv/uvm/core_ibex/xrun.history
-/dv/uvm/core_ibex/xrun.log
-/dv/uvm/core_ibex/xmsc.log

dv/uvm/core_ibex/.gitignore

@@ -0,0 +1,25 @@
+# This is generated by VCS when running DV simulations with WAVE=1.
+ucli.key
+
+# This is generated by UVM when running simulations and doesn't seem
+# to be something you can disable.
+tr_db.log
+
+# This is the default output directory in dv/uvm/core_ibex and
+# contains auto-generated files from building and running tests.
+out
+
+# This is generated by the Makefile based on the ibex configuration
+riscv_dv_extension/riscv_core_setting.sv
+
+# This is generated by Xcelium when running DV simulations, even with WAVE=0
+waves.shm
+
+# Log files generated by Cadence tools when running DV simulations
+xrun.history
+xrun.log
+xmsc.log
+
+# Generated by coverage
+imc.key
+mdv.log