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vectgen_V2.dsn
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(pcb /Users/admin/Development/vectgen/vectgen_v3.old/vectgen_V2.dsn
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "KiCad's Pcbnew")
(host_version "(6.0.10-0)")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu
(type signal)
(property
(index 0)
)
)
(layer B.Cu
(type signal)
(property
(index 1)
)
)
(boundary
(path pcb 0 166370 -134620 71120 -134620 71120 -36830 166370 -36830
166370 -134620)
)
(via "Via[0-1]_800:400_um")
(rule
(width 250)
(clearance 200.1)
(clearance 200.1 (type default_smd))
(clearance 50 (type smd_smd))
)
)
(placement
(component "TerminalBlock:TerminalBlock_bornier-4_P5.08mm"
(place J3 111760.000000 -128270.000000 front 0.000000 (PN Screw_Terminal_01x04))
)
(component MountingHole:MountingHole_3.7mm_Pad_TopBottom
(place H1 161290.000000 -41910.000000 front 0.000000 (PN MountingHole))
)
(component "Package_TO_SOT_THT:TO-92"
(place Q1 125730.000000 -103865.000000 front 0.000000 (PN 2N3904))
)
(component "Package_TO_SOT_THT:TO-92::1"
(place Q2 125730.000000 -114300.000000 front 0.000000 (PN 2N3904))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal
(place R8 137160.000000 -73660.000000 front 0.000000 (PN 10K))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::1
(place R9 138430.000000 -107480.000000 front 0.000000 (PN 10K))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm
(place C1 147360.000000 -92710.000000 front 0.000000 (PN .01uF))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::1
(place C10 113070.000000 -100965.000000 front 0.000000 (PN 150pF))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::2
(place R14 138430.000000 -115100.000000 front 0.000000 (PN 220))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::3
(place R11 137160.000000 -69850.000000 front 0.000000 (PN 3.3M))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::2
(place C11 133310.000000 -69850.000000 front 180.000000 (PN .1uF))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::4
(place R13 137160.000000 -66040.000000 front 0.000000 (PN 220))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::3
(place C7 88940.000000 -41910.000000 front 0.000000 (PN 10uF))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::5
(place R5 111760.000000 -62230.000000 front 0.000000 (PN 30K))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::6
(place R4 113030.000000 -109220.000000 front 0.000000 (PN 15K))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
(place JP1 76200.000000 -115570.000000 front 0.000000 (PN FLASH_EN))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::7
(place R7 120650.000000 -116675.000000 front 180.000000 (PN 2.2K))
)
(component "Package_TO_SOT_THT:TO-92_Inline"
(place U2 100330.000000 -52070.000000 front 0.000000 (PN "L4931-3.3"))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::4
(place C8 100370.000000 -62230.000000 front 0.000000 (PN .1uF))
)
(component Capacitor_THT:C_Rect_L11.0mm_W2.8mm_P10.00mm_MKT
(place C13 137240.000000 -78740.000000 front 0.000000 (PN .01uF))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::5
(place C3 114300.000000 -87630.000000 front 180.000000 (PN .01uF))
)
(component MountingHole:MountingHole_3.7mm_Pad_TopBottom::1
(place H3 76200.000000 -129540.000000 front 0.000000 (PN MountingHole))
)
(component "TerminalBlock:TerminalBlock_bornier-4_P5.08mm::1"
(place J2 134620.000000 -128270.000000 front 0.000000 (PN Screw_Terminal_01x04))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::6
(place C5 93940.000000 -52070.000000 front 180.000000 (PN .1uF))
)
(component "vectgen_v3.my_library:WT32-ETH01"
(place U1 83820.000000 -88270.000000 front 0.000000 (PN "WT32-ETH01"))
)
(component Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical
(place RV1 157490.000000 -118110.000000 front 0.000000 (PN 10K))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::7
(place C9 111800.000000 -74295.000000 front 0.000000 (PN 150pF))
)
(component Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical::1
(place RV2 157490.000000 -83820.000000 front 0.000000 (PN 10K))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::8
(place C12 135850.000000 -110490.000000 front 180.000000 (PN .1uF))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
(place J1 76200.000000 -99075.000000 front 0.000000 (PN USB))
)
(component "Package_DIP:DIP-14_W7.62mm"
(place IC2 116850.000000 -80005.000000 front 0.000000 (PN LF347D))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::9
(place C6 93940.000000 -46990.000000 front 180.000000 (PN 10uF))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::10
(place C4 127040.000000 -87630.000000 front 0.000000 (PN .01uF))
)
(component Capacitor_THT:C_Rect_L11.0mm_W2.8mm_P10.00mm_MKT::1
(place C14 112395.000000 -121285.000000 front 0.000000 (PN .01uF))
)
(component Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::11
(place C2 133350.000000 -92710.000000 front 180.000000 (PN .01uF))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::8
(place R2 113030.000000 -105390.000000 front 0.000000 (PN 10K))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::9
(place R1 119380.000000 -69850.000000 front 180.000000 (PN 10K))
)
(component MountingHole:MountingHole_3.7mm_Pad_TopBottom::2
(place H4 161290.000000 -129540.000000 front 0.000000 (PN MountingHole))
)
(component MountingHole:MountingHole_3.7mm_Pad_TopBottom::3
(place H2 76200.000000 -41910.000000 front 0.000000 (PN MountingHole))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::10
(place R12 138750.000000 -111290.000000 front 0.000000 (PN 3.3M))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::11
(place R10 125730.000000 -120510.000000 front 0.000000 (PN 27))
)
(component Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical::2
(place RV3 157490.000000 -100330.000000 front 0.000000 (PN 10K))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::12
(place R6 113030.000000 -113030.000000 front 0.000000 (PN 30K))
)
(component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::13
(place R3 111760.000000 -66040.000000 front 0.000000 (PN 15K))
)
(component "Package_DIP:DIP-14_W7.62mm::1"
(place IC3 88910.000000 -57145.000000 front 0.000000 (PN MCP4922))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical::1
(place SW1 76200.000000 -87630.000000 front 0.000000 (PN RESET))
)
(component "Package_DIP:DIP-16_W7.62mm"
(place IC1 137170.000000 -85105.000000 front 0.000000 (PN ADG201A))
)
)
(library
(image "TerminalBlock:TerminalBlock_bornier-4_P5.08mm"
(outline (path signal 120 -2540 3810 -2540 -3810))
(outline (path signal 120 -2540 3810 17780 3810))
(outline (path signal 120 17780 -3810 17780 3810))
(outline (path signal 120 17780 -2540 -2540 -2540))
(outline (path signal 120 -2540 -3810 17780 -3810))
(outline (path signal 50 17970 -4000 -2730 -4000))
(outline (path signal 50 -2730 4000 -2730 -4000))
(outline (path signal 50 17970 -4000 17970 4000))
(outline (path signal 50 -2730 4000 17970 4000))
(outline (path signal 100 -2480 -2550 17720 -2550))
(outline (path signal 100 17720 3750 17720 -3750))
(outline (path signal 100 17720 -3750 -2430 -3750))
(outline (path signal 100 -2480 3750 17720 3750))
(outline (path signal 100 -2430 -3750 -2480 -3750))
(outline (path signal 100 -2480 -3750 -2480 3750))
(pin Rect[A]Pad_3000x3000_um 1 0 0)
(pin Round[A]Pad_3000_um 2 5080 0)
(pin Round[A]Pad_3000_um 3 10160 0)
(pin Round[A]Pad_3000_um 4 15240 0)
)
(image MountingHole:MountingHole_3.7mm_Pad_TopBottom
(outline (path signal 50 3950 0 3930.37 -393.293 3871.68 -782.677 3774.51 -1164.28
3639.83 -1534.32 3468.97 -1889.1 3263.64 -2225.11 3025.88 -2539.01
2758.03 -2827.67 2462.78 -3088.23 2143.06 -3318.1 1802.03 -3514.99
1443.1 -3676.95 1069.82 -3802.37 685.91 -3889.99 295.184 -3938.95
-98.476 -3948.77 -491.158 -3919.34 -878.958 -3850.97 -1258.02 -3744.31
-1624.58 -3600.45 -1975 -3420.8 -2305.79 -3207.16 -2613.66 -2961.64
-2895.55 -2686.68 -3148.67 -2385.03 -3370.5 -2059.67 -3558.83 -1713.84
-3711.79 -1350.98 -3827.86 -974.692 -3905.88 -588.717 -3945.09 -196.891
-3945.09 196.891 -3905.88 588.717 -3827.86 974.692 -3711.79 1350.98
-3558.83 1713.84 -3370.5 2059.67 -3148.67 2385.03 -2895.55 2686.68
-2613.66 2961.64 -2305.79 3207.16 -1975 3420.8 -1624.58 3600.45
-1258.02 3744.31 -878.958 3850.97 -491.158 3919.34 -98.476 3948.77
295.184 3938.95 685.91 3889.99 1069.82 3802.37 1443.1 3676.95
1802.03 3514.99 2143.06 3318.1 2462.78 3088.23 2758.03 2827.67
3025.88 2539.01 3263.64 2225.11 3468.97 1889.1 3639.83 1534.32
3774.51 1164.28 3871.68 782.677 3930.37 393.293 3950 0))
(outline (path signal 150 3700 0 3680.39 -380.438 3621.77 -756.843 3524.75 -1125.22
3390.37 -1481.68 3220.05 -1822.43 3015.61 -2143.86 2779.19 -2442.56
2513.31 -2715.38 2220.79 -2959.41 1904.73 -3172.06 1568.48 -3351.1
1215.61 -3494.61 849.845 -3601.08 475.074 -3669.37 95.267 -3698.77
-285.549 -3688.97 -663.339 -3640.05 -1034.1 -3552.55 -1393.89 -3427.4
-1738.91 -3265.91 -2065.5 -3069.8 -2370.2 -2841.16 -2649.76 -2582.39
-2901.24 -2296.26 -3121.97 -1985.78 -3309.6 -1654.25 -3462.15 -1305.18
-3578 -942.283 -3655.93 -569.395 -3695.09 -190.471 -3695.09 190.471
-3655.93 569.395 -3578 942.283 -3462.15 1305.18 -3309.6 1654.25
-3121.97 1985.78 -2901.24 2296.26 -2649.76 2582.39 -2370.2 2841.16
-2065.5 3069.8 -1738.91 3265.91 -1393.89 3427.4 -1034.1 3552.55
-663.339 3640.05 -285.549 3688.97 95.267 3698.77 475.074 3669.37
849.845 3601.08 1215.61 3494.61 1568.48 3351.1 1904.73 3172.06
2220.79 2959.41 2513.31 2715.38 2779.19 2442.56 3015.61 2143.86
3220.05 1822.43 3390.37 1481.68 3524.75 1125.22 3621.77 756.843
3680.39 380.438 3700 0))
(pin Round[A]Pad_4100_um 1 0 0)
(pin Round[T]Pad_7400_um 1@1 0 0)
(pin Round[B]Pad_7400_um 1@2 0 0)
)
(image "Package_TO_SOT_THT:TO-92"
(outline (path signal 120 -530 -1850 3070 -1850))
(outline (path signal 0 -818.944 -1646.79 -998.024 -1389.85 -1145.66 -1113.63
-1259.81 -821.986 -1338.89 -518.94 -1381.8 -208.701 -1387.95 104.431
-1357.25 416.116 -1290.13 722.032 -1187.52 1017.94 -1050.84 1299.73
-881.986 1563.51 -683.299 1805.61 -457.532 2022.68 -207.817 2211.71
62.385 2370.08 349.328 2495.59 649.035 2586.51 957.35 2641.56
1270 2660 1270 2660 1312.43 2642.43 1330 2600 1312.43 2557.57
1270 2540 1270 2540 971.455 2522.39 677.049 2469.82 390.862 2383.01
116.864 2263.16 -141.149 2111.93 -379.599 1931.43 -595.18 1724.15
-784.904 1492.97 -946.141 1241.1 -1076.65 972.016 -1174.64 689.459
-1238.73 397.344 -1268.04 99.72 -1262.17 -199.286 -1221.2 -495.53
-1145.68 -784.903 -1036.68 -1063.4 -895.707 -1327.15 -724.706 -1572.5
-526.052 -1796.05 -508.478 -1838.48 -526.052 -1880.9 -568.478 -1898.48
-610.904 -1880.9 -610.905 -1880.9))
(outline (path signal 0 1210 2600 1227.57 2642.43 1270 2660 1582.65 2641.56 1890.96 2586.5
2190.67 2495.59 2477.61 2370.08 2747.82 2211.71 2997.53 2022.68
3223.3 1805.61 3421.99 1563.51 3590.84 1299.73 3727.52 1017.94
3830.13 722.032 3897.25 416.116 3927.95 104.431 3921.8 -208.701
3878.89 -518.94 3799.81 -821.985 3685.66 -1113.63 3538.02 -1389.85
3358.94 -1646.79 3150.9 -1880.9 3108.48 -1898.48 3066.05 -1880.9
3048.48 -1838.48 3066.05 -1796.05 3066.05 -1796.05 3264.7 -1572.5
3435.71 -1327.15 3576.68 -1063.4 3685.68 -784.903 3761.2 -495.529
3802.17 -199.286 3808.04 99.72 3778.73 397.344 3714.64 689.459
3616.65 972.016 3486.14 1241.1 3324.9 1492.97 3135.18 1724.15
2919.6 1931.43 2681.15 2111.93 2423.14 2263.16 2149.14 2383.01
1862.95 2469.82 1568.55 2522.39 1270 2540 1227.57 2557.57))
(outline (path signal 50 4000 -2010 4000 2730))
(outline (path signal 50 4000 -2010 -1460 -2010))
(outline (path signal 50 -1460 2730 -1460 -2010))
(outline (path signal 50 -1460 2730 4000 2730))
(outline (path signal 100 -500 -1750 3000 -1750))
(outline (path signal 0 -887.18 -1321.92 -1027.6 -1059.21 -1136.17 -781.813 -1211.39 -493.579
-1252.2 -198.502 -1258.05 99.327 -1228.85 395.779 -1165.01 686.744
-1067.41 968.189 -937.415 1236.21 -776.813 1487.1 -587.836 1717.37
-373.104 1923.83 -135.593 2103.62 121.404 2254.25 394.324 2373.62
679.383 2460.1 972.63 2512.46 1270 2530 1305.36 2515.36 1320 2480
1305.36 2444.64 1270 2430 969.427 2411.34 673.47 2355.64
386.676 2263.77 113.448 2137.12 -142.017 1977.65 -375.794 1787.81
-584.294 1570.51 -764.315 1329.08 -913.09 1067.25 -1028.34 789.02
-1108.28 498.673 -1151.7 200.668 -1157.92 -100.42 -1126.86 -399.965
-1058.98 -693.367 -955.329 -976.12 -817.501 -1243.88 -647.611 -1492.54
-448.269 -1718.27 -448.27 -1718.27 -433.625 -1753.62 -448.27 -1788.98
-483.625 -1803.62 -518.98 -1788.98 -716.852 -1566.31))
(outline (path signal 0 1220 2480 1234.64 2515.36 1270 2530 1567.37 2512.46 1860.62 2460.1
2145.68 2373.62 2418.6 2254.25 2675.59 2103.62 2913.1 1923.83
3127.84 1717.37 3316.81 1487.1 3477.41 1236.21 3607.41 968.189
3705.01 686.744 3768.85 395.779 3798.05 99.327 3792.2 -198.502
3751.39 -493.579 3676.17 -781.813 3567.6 -1059.21 3427.18 -1321.92
3256.85 -1566.31 3058.98 -1788.98 3023.62 -1803.62 2988.27 -1788.98
2973.62 -1753.62 2988.27 -1718.27 2988.27 -1718.27 3187.61 -1492.54
3357.5 -1243.88 3495.33 -976.12 3598.98 -693.367 3666.86 -399.965
3697.92 -100.42 3691.7 200.668 3648.28 498.673 3568.34 789.02
3453.09 1067.25 3304.32 1329.08 3124.29 1570.51 2915.79 1787.81
2682.02 1977.65 2426.55 2137.12 2153.32 2263.77 1866.53 2355.64
1570.57 2411.34 1270 2430 1234.64 2444.64))
(pin Rect[A]Pad_1300x1300_um 1 0 0)
(pin Round[A]Pad_1300_um 2 1270 1270)
(pin Round[A]Pad_1300_um 3 2540 0)
)
(image "Package_TO_SOT_THT:TO-92::1"
(outline (path signal 120 -530 -1850 3070 -1850))
(outline (path signal 0 -818.944 -1646.79 -998.024 -1389.85 -1145.66 -1113.63
-1259.81 -821.986 -1338.89 -518.94 -1381.8 -208.701 -1387.95 104.431
-1357.25 416.116 -1290.13 722.032 -1187.52 1017.94 -1050.84 1299.73
-881.986 1563.51 -683.299 1805.61 -457.532 2022.68 -207.817 2211.71
62.385 2370.08 349.328 2495.59 649.035 2586.51 957.35 2641.56
1270 2660 1270 2660 1312.43 2642.43 1330 2600 1312.43 2557.57
1270 2540 1270 2540 971.455 2522.39 677.049 2469.82 390.862 2383.01
116.864 2263.16 -141.149 2111.93 -379.599 1931.43 -595.18 1724.15
-784.904 1492.97 -946.141 1241.1 -1076.65 972.016 -1174.64 689.459
-1238.73 397.344 -1268.04 99.72 -1262.17 -199.286 -1221.2 -495.53
-1145.68 -784.903 -1036.68 -1063.4 -895.707 -1327.15 -724.706 -1572.5
-526.052 -1796.05 -508.478 -1838.48 -526.052 -1880.9 -568.478 -1898.48
-610.904 -1880.9 -610.905 -1880.9))
(outline (path signal 0 1210 2600 1227.57 2642.43 1270 2660 1582.65 2641.56 1890.96 2586.5
2190.67 2495.59 2477.61 2370.08 2747.82 2211.71 2997.53 2022.68
3223.3 1805.61 3421.99 1563.51 3590.84 1299.73 3727.52 1017.94
3830.13 722.032 3897.25 416.116 3927.95 104.431 3921.8 -208.701
3878.89 -518.94 3799.81 -821.985 3685.66 -1113.63 3538.02 -1389.85
3358.94 -1646.79 3150.9 -1880.9 3108.48 -1898.48 3066.05 -1880.9
3048.48 -1838.48 3066.05 -1796.05 3066.05 -1796.05 3264.7 -1572.5
3435.71 -1327.15 3576.68 -1063.4 3685.68 -784.903 3761.2 -495.529
3802.17 -199.286 3808.04 99.72 3778.73 397.344 3714.64 689.459
3616.65 972.016 3486.14 1241.1 3324.9 1492.97 3135.18 1724.15
2919.6 1931.43 2681.15 2111.93 2423.14 2263.16 2149.14 2383.01
1862.95 2469.82 1568.55 2522.39 1270 2540 1227.57 2557.57))
(outline (path signal 50 -1460 2730 -1460 -2010))
(outline (path signal 50 -1460 2730 4000 2730))
(outline (path signal 50 4000 -2010 4000 2730))
(outline (path signal 50 4000 -2010 -1460 -2010))
(outline (path signal 100 -500 -1750 3000 -1750))
(outline (path signal 0 -887.18 -1321.92 -1027.6 -1059.21 -1136.17 -781.813 -1211.39 -493.579
-1252.2 -198.502 -1258.05 99.327 -1228.85 395.779 -1165.01 686.744
-1067.41 968.189 -937.415 1236.21 -776.813 1487.1 -587.836 1717.37
-373.104 1923.83 -135.593 2103.62 121.404 2254.25 394.324 2373.62
679.383 2460.1 972.63 2512.46 1270 2530 1305.36 2515.36 1320 2480
1305.36 2444.64 1270 2430 969.427 2411.34 673.47 2355.64
386.676 2263.77 113.448 2137.12 -142.017 1977.65 -375.794 1787.81
-584.294 1570.51 -764.315 1329.08 -913.09 1067.25 -1028.34 789.02
-1108.28 498.673 -1151.7 200.668 -1157.92 -100.42 -1126.86 -399.965
-1058.98 -693.367 -955.329 -976.12 -817.501 -1243.88 -647.611 -1492.54
-448.269 -1718.27 -448.27 -1718.27 -433.625 -1753.62 -448.27 -1788.98
-483.625 -1803.62 -518.98 -1788.98 -716.852 -1566.31))
(outline (path signal 0 1220 2480 1234.64 2515.36 1270 2530 1567.37 2512.46 1860.62 2460.1
2145.68 2373.62 2418.6 2254.25 2675.59 2103.62 2913.1 1923.83
3127.84 1717.37 3316.81 1487.1 3477.41 1236.21 3607.41 968.189
3705.01 686.744 3768.85 395.779 3798.05 99.327 3792.2 -198.502
3751.39 -493.579 3676.17 -781.813 3567.6 -1059.21 3427.18 -1321.92
3256.85 -1566.31 3058.98 -1788.98 3023.62 -1803.62 2988.27 -1788.98
2973.62 -1753.62 2988.27 -1718.27 2988.27 -1718.27 3187.61 -1492.54
3357.5 -1243.88 3495.33 -976.12 3598.98 -693.367 3666.86 -399.965
3697.92 -100.42 3691.7 200.668 3648.28 498.673 3568.34 789.02
3453.09 1067.25 3304.32 1329.08 3124.29 1570.51 2915.79 1787.81
2682.02 1977.65 2426.55 2137.12 2153.32 2263.77 1866.53 2355.64
1570.57 2411.34 1270 2430 1234.64 2444.64))
(pin Rect[A]Pad_1300x1300_um 1 0 0)
(pin Round[A]Pad_1300_um 2 1270 1270)
(pin Round[A]Pad_1300_um 3 2540 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 7620 0 5610 0))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 5610 -800 5610 800))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::1
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 7620 0 5610 0))
(outline (path signal 100 2010 800 2010 -800))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 0 -1250 5000 -1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::1
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 5000 1250 0 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::2
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 7620 0 5610 0))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::3
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 7620 0 5610 0))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::2
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 5000 1250 0 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::4
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 7620 0 5610 0))
(outline (path signal 100 5610 800 2010 800))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::3
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 5000 1250 0 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::5
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 7620 0 5610 0))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::6
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 0 0 2010 0))
(outline (path signal 100 7620 0 5610 0))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
(outline (path signal 120 -1330 0 -1330 1330))
(outline (path signal 120 -1330 -1270 1330 -1270))
(outline (path signal 120 -1330 -1270 -1330 -3870))
(outline (path signal 120 1330 -1270 1330 -3870))
(outline (path signal 120 -1330 -3870 1330 -3870))
(outline (path signal 120 -1330 1330 0 1330))
(outline (path signal 50 -1800 -4350 1800 -4350))
(outline (path signal 50 -1800 1800 -1800 -4350))
(outline (path signal 50 1800 -4350 1800 1800))
(outline (path signal 50 1800 1800 -1800 1800))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 -1270 -3810 -1270 635))
(outline (path signal 100 1270 -3810 -1270 -3810))
(outline (path signal 100 1270 1270 1270 -3810))
(pin Rect[A]Pad_1700x1700_um 1 0 0)
(pin Oval[A]Pad_1700x1700_um 2 0 -2540)
)
(image Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal::7
(outline (path signal 120 1890 -920 5730 -920))
(outline (path signal 120 940 0 1890 0))
(outline (path signal 120 5730 -920 5730 920))
(outline (path signal 120 6680 0 5730 0))
(outline (path signal 120 1890 920 1890 -920))
(outline (path signal 120 5730 920 1890 920))
(outline (path signal 50 8570 1050 -950 1050))
(outline (path signal 50 -950 -1050 8570 -1050))
(outline (path signal 50 -950 1050 -950 -1050))
(outline (path signal 50 8570 -1050 8570 1050))
(outline (path signal 100 5610 -800 5610 800))
(outline (path signal 100 5610 800 2010 800))
(outline (path signal 100 7620 0 5610 0))
(outline (path signal 100 2010 -800 5610 -800))
(outline (path signal 100 2010 800 2010 -800))
(outline (path signal 100 0 0 2010 0))
(pin Round[A]Pad_1400_um 1 0 0)
(pin Oval[A]Pad_1400x1400_um 2 7620 0)
)
(image "Package_TO_SOT_THT:TO-92_Inline"
(outline (path signal 120 -530 -1850 3070 -1850))
(outline (path signal 0 -818.944 -1646.79 -998.024 -1389.85 -1145.66 -1113.63
-1259.81 -821.986 -1338.89 -518.94 -1381.8 -208.701 -1387.95 104.431
-1357.25 416.116 -1290.13 722.032 -1187.52 1017.94 -1050.84 1299.73
-881.986 1563.51 -683.299 1805.61 -457.532 2022.68 -207.817 2211.71
62.385 2370.08 349.328 2495.59 649.035 2586.51 957.35 2641.56
1270 2660 1270 2660 1312.43 2642.43 1330 2600 1312.43 2557.57
1270 2540 1270 2540 971.455 2522.39 677.049 2469.82 390.862 2383.01
116.864 2263.16 -141.149 2111.93 -379.599 1931.43 -595.18 1724.15
-784.904 1492.97 -946.141 1241.1 -1076.65 972.016 -1174.64 689.459
-1238.73 397.344 -1268.04 99.72 -1262.17 -199.286 -1221.2 -495.53
-1145.68 -784.903 -1036.68 -1063.4 -895.707 -1327.15 -724.706 -1572.5
-526.052 -1796.05 -508.478 -1838.48 -526.052 -1880.9 -568.478 -1898.48
-610.904 -1880.9 -610.905 -1880.9))
(outline (path signal 0 1210 2600 1227.57 2642.43 1270 2660 1582.65 2641.56 1890.96 2586.5
2190.67 2495.59 2477.61 2370.08 2747.82 2211.71 2997.53 2022.68
3223.3 1805.61 3421.99 1563.51 3590.84 1299.73 3727.52 1017.94
3830.13 722.032 3897.25 416.116 3927.95 104.431 3921.8 -208.701
3878.89 -518.94 3799.81 -821.985 3685.66 -1113.63 3538.02 -1389.85
3358.94 -1646.79 3150.9 -1880.9 3108.48 -1898.48 3066.05 -1880.9
3048.48 -1838.48 3066.05 -1796.05 3066.05 -1796.05 3264.7 -1572.5
3435.71 -1327.15 3576.68 -1063.4 3685.68 -784.903 3761.2 -495.529
3802.17 -199.286 3808.04 99.72 3778.73 397.344 3714.64 689.459
3616.65 972.016 3486.14 1241.1 3324.9 1492.97 3135.18 1724.15
2919.6 1931.43 2681.15 2111.93 2423.14 2263.16 2149.14 2383.01
1862.95 2469.82 1568.55 2522.39 1270 2540 1227.57 2557.57))
(outline (path signal 50 4000 -2010 -1460 -2010))
(outline (path signal 50 -1460 2730 -1460 -2010))
(outline (path signal 50 4000 -2010 4000 2730))
(outline (path signal 50 -1460 2730 4000 2730))
(outline (path signal 100 -500 -1750 3000 -1750))
(outline (path signal 0 -887.18 -1321.92 -1027.6 -1059.21 -1136.17 -781.813 -1211.39 -493.579
-1252.2 -198.502 -1258.05 99.327 -1228.85 395.779 -1165.01 686.744
-1067.41 968.189 -937.415 1236.21 -776.813 1487.1 -587.836 1717.37
-373.104 1923.83 -135.593 2103.62 121.404 2254.25 394.324 2373.62
679.383 2460.1 972.63 2512.46 1270 2530 1305.36 2515.36 1320 2480
1305.36 2444.64 1270 2430 969.427 2411.34 673.47 2355.64
386.676 2263.77 113.448 2137.12 -142.017 1977.65 -375.794 1787.81
-584.294 1570.51 -764.315 1329.08 -913.09 1067.25 -1028.34 789.02
-1108.28 498.673 -1151.7 200.668 -1157.92 -100.42 -1126.86 -399.965
-1058.98 -693.367 -955.329 -976.12 -817.501 -1243.88 -647.611 -1492.54
-448.269 -1718.27 -448.27 -1718.27 -433.625 -1753.62 -448.27 -1788.98
-483.625 -1803.62 -518.98 -1788.98 -716.852 -1566.31))
(outline (path signal 0 1220 2480 1234.64 2515.36 1270 2530 1567.37 2512.46 1860.62 2460.1
2145.68 2373.62 2418.6 2254.25 2675.59 2103.62 2913.1 1923.83
3127.84 1717.37 3316.81 1487.1 3477.41 1236.21 3607.41 968.189
3705.01 686.744 3768.85 395.779 3798.05 99.327 3792.2 -198.502
3751.39 -493.579 3676.17 -781.813 3567.6 -1059.21 3427.18 -1321.92
3256.85 -1566.31 3058.98 -1788.98 3023.62 -1803.62 2988.27 -1788.98
2973.62 -1753.62 2988.27 -1718.27 2988.27 -1718.27 3187.61 -1492.54
3357.5 -1243.88 3495.33 -976.12 3598.98 -693.367 3666.86 -399.965
3697.92 -100.42 3691.7 200.668 3648.28 498.673 3568.34 789.02
3453.09 1067.25 3304.32 1329.08 3124.29 1570.51 2915.79 1787.81
2682.02 1977.65 2426.55 2137.12 2153.32 2263.77 1866.53 2355.64
1570.57 2411.34 1270 2430 1234.64 2444.64))
(pin Rect[A]Pad_1050x1500_um 1 0 0)
(pin Oval[A]Pad_1050x1500_um 2 1270 0)
(pin Oval[A]Pad_1050x1500_um 3 2540 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::4
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 1250 0 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Capacitor_THT:C_Rect_L11.0mm_W2.8mm_P10.00mm_MKT
(outline (path signal 120 10620 -925 10620 -1520))
(outline (path signal 120 -620 -1520 10620 -1520))
(outline (path signal 120 -620 1520 -620 925))
(outline (path signal 120 -620 -925 -620 -1520))
(outline (path signal 120 10620 1520 10620 925))
(outline (path signal 120 -620 1520 10620 1520))
(outline (path signal 50 11050 1650 -1050 1650))
(outline (path signal 50 -1050 1650 -1050 -1650))
(outline (path signal 50 -1050 -1650 11050 -1650))
(outline (path signal 50 11050 -1650 11050 1650))
(outline (path signal 100 10500 -1400 10500 1400))
(outline (path signal 100 10500 1400 -500 1400))
(outline (path signal 100 -500 -1400 10500 -1400))
(outline (path signal 100 -500 1400 -500 -1400))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 10000 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::5
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image MountingHole:MountingHole_3.7mm_Pad_TopBottom::1
(outline (path signal 150 3700 0 3680.39 -380.438 3621.77 -756.843 3524.75 -1125.22
3390.37 -1481.68 3220.05 -1822.43 3015.61 -2143.86 2779.19 -2442.56
2513.31 -2715.38 2220.79 -2959.41 1904.73 -3172.06 1568.48 -3351.1
1215.61 -3494.61 849.845 -3601.08 475.074 -3669.37 95.267 -3698.77
-285.549 -3688.97 -663.339 -3640.05 -1034.1 -3552.55 -1393.89 -3427.4
-1738.91 -3265.91 -2065.5 -3069.8 -2370.2 -2841.16 -2649.76 -2582.39
-2901.24 -2296.26 -3121.97 -1985.78 -3309.6 -1654.25 -3462.15 -1305.18
-3578 -942.283 -3655.93 -569.395 -3695.09 -190.471 -3695.09 190.471
-3655.93 569.395 -3578 942.283 -3462.15 1305.18 -3309.6 1654.25
-3121.97 1985.78 -2901.24 2296.26 -2649.76 2582.39 -2370.2 2841.16
-2065.5 3069.8 -1738.91 3265.91 -1393.89 3427.4 -1034.1 3552.55
-663.339 3640.05 -285.549 3688.97 95.267 3698.77 475.074 3669.37
849.845 3601.08 1215.61 3494.61 1568.48 3351.1 1904.73 3172.06
2220.79 2959.41 2513.31 2715.38 2779.19 2442.56 3015.61 2143.86
3220.05 1822.43 3390.37 1481.68 3524.75 1125.22 3621.77 756.843
3680.39 380.438 3700 0))
(outline (path signal 50 3950 0 3930.37 -393.293 3871.68 -782.677 3774.51 -1164.28
3639.83 -1534.32 3468.97 -1889.1 3263.64 -2225.11 3025.88 -2539.01
2758.03 -2827.67 2462.78 -3088.23 2143.06 -3318.1 1802.03 -3514.99
1443.1 -3676.95 1069.82 -3802.37 685.91 -3889.99 295.184 -3938.95
-98.476 -3948.77 -491.158 -3919.34 -878.958 -3850.97 -1258.02 -3744.31
-1624.58 -3600.45 -1975 -3420.8 -2305.79 -3207.16 -2613.66 -2961.64
-2895.55 -2686.68 -3148.67 -2385.03 -3370.5 -2059.67 -3558.83 -1713.84
-3711.79 -1350.98 -3827.86 -974.692 -3905.88 -588.717 -3945.09 -196.891
-3945.09 196.891 -3905.88 588.717 -3827.86 974.692 -3711.79 1350.98
-3558.83 1713.84 -3370.5 2059.67 -3148.67 2385.03 -2895.55 2686.68
-2613.66 2961.64 -2305.79 3207.16 -1975 3420.8 -1624.58 3600.45
-1258.02 3744.31 -878.958 3850.97 -491.158 3919.34 -98.476 3948.77
295.184 3938.95 685.91 3889.99 1069.82 3802.37 1443.1 3676.95
1802.03 3514.99 2143.06 3318.1 2462.78 3088.23 2758.03 2827.67
3025.88 2539.01 3263.64 2225.11 3468.97 1889.1 3639.83 1534.32
3774.51 1164.28 3871.68 782.677 3930.37 393.293 3950 0))
(pin Round[T]Pad_7400_um 1 0 0)
(pin Round[A]Pad_4100_um 1@1 0 0)
(pin Round[B]Pad_7400_um 1@2 0 0)
)
(image "TerminalBlock:TerminalBlock_bornier-4_P5.08mm::1"
(outline (path signal 120 17780 -2540 -2540 -2540))
(outline (path signal 120 17780 -3810 17780 3810))
(outline (path signal 120 -2540 -3810 17780 -3810))
(outline (path signal 120 -2540 3810 -2540 -3810))
(outline (path signal 120 -2540 3810 17780 3810))
(outline (path signal 50 -2730 4000 17970 4000))
(outline (path signal 50 17970 -4000 17970 4000))
(outline (path signal 50 17970 -4000 -2730 -4000))
(outline (path signal 50 -2730 4000 -2730 -4000))
(outline (path signal 100 -2480 3750 17720 3750))
(outline (path signal 100 -2480 -2550 17720 -2550))
(outline (path signal 100 -2430 -3750 -2480 -3750))
(outline (path signal 100 17720 -3750 -2430 -3750))
(outline (path signal 100 -2480 -3750 -2480 3750))
(outline (path signal 100 17720 3750 17720 -3750))
(pin Rect[A]Pad_3000x3000_um 1 0 0)
(pin Round[A]Pad_3000_um 2 5080 0)
(pin Round[A]Pad_3000_um 3 10160 0)
(pin Round[A]Pad_3000_um 4 15240 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::6
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 0 1250 0 -1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image "vectgen_v3.my_library:WT32-ETH01"
(outline (path signal 120 24130 -45720 -1270 -45720 -1270 10160 24130 10160))
(outline (path signal 120 -1270 1330 1270 1330 1270 -31750 -1270 -31750))
(outline (path signal 120 24130 1270 21590 1270 21590 -31750 24130 -31750))
(outline (path signal 50 -1270 10160 24130 10160 24130 -45720 -1270 -45720))
(outline (path signal 100 24130 -46990 -1270 -46990 -1270 10160 24130 10160))
(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 2 0 -2540)
(pin Oval[A]Pad_1600x1600_um 3 0 -5080)
(pin Oval[A]Pad_1600x1600_um 4 0 -7620)
(pin Oval[A]Pad_1600x1600_um 5 0 -10160)
(pin Oval[A]Pad_1600x1600_um 6 0 -12700)
(pin Oval[A]Pad_1600x1600_um 7 0 -15240)
(pin Oval[A]Pad_1600x1600_um 8 0 -17780)
(pin Oval[A]Pad_1600x1600_um 9 0 -20320)
(pin Oval[A]Pad_1600x1600_um 10 0 -22860)
(pin Oval[A]Pad_1600x1600_um 11 0 -25400)
(pin Oval[A]Pad_1600x1600_um 12 0 -27940)
(pin Oval[A]Pad_1600x1600_um 13 0 -30480)
(pin Oval[A]Pad_1600x1600_um 14 22860 -30480)
(pin Oval[A]Pad_1600x1600_um 15 22860 -27940)
(pin Oval[A]Pad_1600x1600_um 16 22860 -25400)
(pin Oval[A]Pad_1600x1600_um 17 22860 -22860)
(pin Oval[A]Pad_1600x1600_um 18 22860 -20320)
(pin Oval[A]Pad_1600x1600_um 19 22860 -17780)
(pin Oval[A]Pad_1600x1600_um 20 22860 -15240)
(pin Oval[A]Pad_1600x1600_um 21 22860 -12700)
(pin Oval[A]Pad_1600x1600_um 22 22860 -10160)
(pin Oval[A]Pad_1600x1600_um 23 22860 -7620)
(pin Oval[A]Pad_1600x1600_um 24 22860 -5080)
(pin Oval[A]Pad_1600x1600_um 25 22860 -2540)
(pin Oval[A]Pad_1600x1600_um 26 22860 0)
)
(image Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical
(outline (path signal 120 -7425 2530 -7425 -2540))
(outline (path signal 120 -7425 -2540 2345 -2540))
(outline (path signal 120 2345 2530 2345 -2540))
(outline (path signal 120 -7425 2530 2345 2530))
(outline (path signal 50 2500 2700 -7600 2700))
(outline (path signal 50 -7600 -2700 2500 -2700))
(outline (path signal 50 2500 -2700 2500 2700))
(outline (path signal 50 -7600 2700 -7600 -2700))
(outline (path signal 100 2225 2410 -7305 2410))
(outline (path signal 100 -7305 2410 -7305 -2420))
(outline (path signal 100 2225 -2420 2225 2410))
(outline (path signal 100 -7305 -2420 2225 -2420))
(outline (path signal 100 955 -2235 956 -66))
(outline (path signal 100 955 -2235 956 -66))
(outline (path signal 100 2050 -1150 2031.36 -1351.21 1976.06 -1545.56 1885.99 -1726.44
1764.21 -1887.7 1614.88 -2023.83 1443.08 -2130.2 1254.66 -2203.2
1056.03 -2240.33 853.966 -2240.33 655.339 -2203.2 466.917 -2130.2
295.115 -2023.83 145.785 -1887.7 24.012 -1726.44 -66.057 -1545.56
-121.356 -1351.21 -140 -1150 -121.356 -948.794 -66.057 -754.44
24.012 -573.557 145.785 -412.303 295.115 -276.171 466.917 -169.796
655.339 -96.801 853.966 -59.671 1056.03 -59.671 1254.66 -96.801
1443.08 -169.796 1614.88 -276.171 1764.21 -412.303 1885.99 -573.557
1976.06 -754.44 2031.36 -948.794 2050 -1150))
(pin Round[A]Pad_1440_um 1 0 0)
(pin Round[A]Pad_1440_um 2 -2540 0)
(pin Round[A]Pad_1440_um 3 -5080 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::7
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical::1
(outline (path signal 120 -7425 2530 -7425 -2540))
(outline (path signal 120 -7425 2530 2345 2530))
(outline (path signal 120 -7425 -2540 2345 -2540))
(outline (path signal 120 2345 2530 2345 -2540))
(outline (path signal 50 -7600 2700 -7600 -2700))
(outline (path signal 50 2500 -2700 2500 2700))
(outline (path signal 50 -7600 -2700 2500 -2700))
(outline (path signal 50 2500 2700 -7600 2700))
(outline (path signal 100 -7305 2410 -7305 -2420))
(outline (path signal 100 2225 -2420 2225 2410))
(outline (path signal 100 2225 2410 -7305 2410))
(outline (path signal 100 -7305 -2420 2225 -2420))
(outline (path signal 100 955 -2235 956 -66))
(outline (path signal 100 955 -2235 956 -66))
(outline (path signal 100 2050 -1150 2031.36 -1351.21 1976.06 -1545.56 1885.99 -1726.44
1764.21 -1887.7 1614.88 -2023.83 1443.08 -2130.2 1254.66 -2203.2
1056.03 -2240.33 853.966 -2240.33 655.339 -2203.2 466.917 -2130.2
295.115 -2023.83 145.785 -1887.7 24.012 -1726.44 -66.057 -1545.56
-121.356 -1351.21 -140 -1150 -121.356 -948.794 -66.057 -754.44
24.012 -573.557 145.785 -412.303 295.115 -276.171 466.917 -169.796
655.339 -96.801 853.966 -59.671 1056.03 -59.671 1254.66 -96.801
1443.08 -169.796 1614.88 -276.171 1764.21 -412.303 1885.99 -573.557
1976.06 -754.44 2031.36 -948.794 2050 -1150))
(pin Round[A]Pad_1440_um 1 0 0)
(pin Round[A]Pad_1440_um 2 -2540 0)
(pin Round[A]Pad_1440_um 3 -5080 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::8
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 100 0 -1250 5000 -1250))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
(outline (path signal 120 -1330 -1270 -1330 -6410))
(outline (path signal 120 1330 -1270 1330 -6410))
(outline (path signal 120 -1330 1330 0 1330))
(outline (path signal 120 -1330 0 -1330 1330))
(outline (path signal 120 -1330 -6410 1330 -6410))
(outline (path signal 120 -1330 -1270 1330 -1270))
(outline (path signal 50 -1800 1800 -1800 -6850))
(outline (path signal 50 1800 1800 -1800 1800))
(outline (path signal 50 -1800 -6850 1800 -6850))
(outline (path signal 50 1800 -6850 1800 1800))
(outline (path signal 100 1270 -6350 -1270 -6350))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 -6350 -1270 635))
(outline (path signal 100 1270 1270 1270 -6350))
(outline (path signal 100 -1270 635 -635 1270))
(pin Rect[A]Pad_1700x1700_um 1 0 0)
(pin Oval[A]Pad_1700x1700_um 2 0 -2540)
(pin Oval[A]Pad_1700x1700_um 3 0 -5080)
)
(image "Package_DIP:DIP-14_W7.62mm"
(outline (path signal 120 6460 1330 4810 1330))
(outline (path signal 120 2810 1330 1160 1330))
(outline (path signal 120 6460 -16570 6460 1330))
(outline (path signal 120 1160 -16570 6460 -16570))
(outline (path signal 120 1160 1330 1160 -16570))
(outline (path signal 0 4852.43 1372.43 4870 1330 4851.95 1135.23 4798.42 947.084
4711.23 771.982 4593.35 615.883 4448.79 484.102 4282.48 381.127
4100.08 310.465 3907.8 274.522 3712.2 274.522 3519.92 310.465
3337.52 381.127 3171.21 484.102 3026.65 615.883 2908.77 771.982
2821.58 947.084 2768.05 1135.23 2750 1330 2767.57 1372.43
2810 1390 2852.43 1372.43 2870 1330 2888.06 1146.62 2941.55 970.278
3028.42 807.764 3145.32 665.32 3287.76 548.419 3450.28 461.553
3626.61 408.062 3810 390 3993.39 408.062 4169.72 461.553
4332.24 548.419 4474.68 665.32 4591.58 807.764 4678.45 970.278
4731.94 1146.62 4750 1330 4767.57 1372.43 4810 1390))
(outline (path signal 50 8700 -16800 8700 1550))
(outline (path signal 50 -1100 1550 -1100 -16800))
(outline (path signal 50 -1100 -16800 8700 -16800))
(outline (path signal 50 8700 1550 -1100 1550))
(outline (path signal 100 635 -16510 635 270))
(outline (path signal 100 635 270 1635 1270))
(outline (path signal 100 6985 -16510 635 -16510))
(outline (path signal 100 1635 1270 6985 1270))
(outline (path signal 100 6985 1270 6985 -16510))
(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 2 0 -2540)
(pin Oval[A]Pad_1600x1600_um 3 0 -5080)
(pin Oval[A]Pad_1600x1600_um 4 0 -7620)
(pin Oval[A]Pad_1600x1600_um 5 0 -10160)
(pin Oval[A]Pad_1600x1600_um 6 0 -12700)
(pin Oval[A]Pad_1600x1600_um 7 0 -15240)
(pin Oval[A]Pad_1600x1600_um 8 7620 -15240)
(pin Oval[A]Pad_1600x1600_um 9 7620 -12700)
(pin Oval[A]Pad_1600x1600_um 10 7620 -10160)
(pin Oval[A]Pad_1600x1600_um 11 7620 -7620)
(pin Oval[A]Pad_1600x1600_um 12 7620 -5080)
(pin Oval[A]Pad_1600x1600_um 13 7620 -2540)
(pin Oval[A]Pad_1600x1600_um 14 7620 0)
)
(image Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm::9
(outline (path signal 120 -120 -1370 5120 -1370))
(outline (path signal 120 5120 -1055 5120 -1370))
(outline (path signal 120 -120 1370 5120 1370))
(outline (path signal 120 -120 -1055 -120 -1370))
(outline (path signal 120 5120 1370 5120 1055))
(outline (path signal 120 -120 1370 -120 1055))
(outline (path signal 50 -1050 -1500 6050 -1500))
(outline (path signal 50 6050 1500 -1050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 6050 -1500 6050 1500))
(outline (path signal 100 0 1250 0 -1250))
(outline (path signal 100 5000 -1250 5000 1250))
(outline (path signal 100 5000 1250 0 1250))
(outline (path signal 100 0 -1250 5000 -1250))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 5000 0)
)