diff --git a/edk2-rockchip/Platform/Firefly/ROC-RK3566-PC/ROC-RK3566-PC.dsc b/edk2-rockchip/Platform/Firefly/ROC-RK3566-PC/ROC-RK3566-PC.dsc
index de7be3215..7ae68c950 100644
--- a/edk2-rockchip/Platform/Firefly/ROC-RK3566-PC/ROC-RK3566-PC.dsc
+++ b/edk2-rockchip/Platform/Firefly/ROC-RK3566-PC/ROC-RK3566-PC.dsc
@@ -497,6 +497,7 @@
   gRk356xTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Firefly/ROC-RK3568-PC/ROC-RK3568-PC.dsc b/edk2-rockchip/Platform/Firefly/ROC-RK3568-PC/ROC-RK3568-PC.dsc
index 54ab9d166..64bee8af6 100644
--- a/edk2-rockchip/Platform/Firefly/ROC-RK3568-PC/ROC-RK3568-PC.dsc
+++ b/edk2-rockchip/Platform/Firefly/ROC-RK3568-PC/ROC-RK3568-PC.dsc
@@ -517,6 +517,7 @@
   gRk356xTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/OrangePi/OrangePi3B/OrangePi3B.dsc b/edk2-rockchip/Platform/OrangePi/OrangePi3B/OrangePi3B.dsc
index 546d42bae..9f046eace 100644
--- a/edk2-rockchip/Platform/OrangePi/OrangePi3B/OrangePi3B.dsc
+++ b/edk2-rockchip/Platform/OrangePi/OrangePi3B/OrangePi3B.dsc
@@ -504,6 +504,7 @@
   gRk356xTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Pine64/PineTab2/PineTab2.dsc b/edk2-rockchip/Platform/Pine64/PineTab2/PineTab2.dsc
index 8f3726b0f..f719e2b80 100644
--- a/edk2-rockchip/Platform/Pine64/PineTab2/PineTab2.dsc
+++ b/edk2-rockchip/Platform/Pine64/PineTab2/PineTab2.dsc
@@ -487,6 +487,7 @@
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
   gRk356xTokenSpaceGuid.PcdMultiPhy1Mode|L"MultiPhy1Mode"|gConfigDxeFormSetGuid|0x0|0
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Pine64/Quartz64/Quartz64.dsc b/edk2-rockchip/Platform/Pine64/Quartz64/Quartz64.dsc
index d0e77eb9a..2da533ddf 100644
--- a/edk2-rockchip/Platform/Pine64/Quartz64/Quartz64.dsc
+++ b/edk2-rockchip/Platform/Pine64/Quartz64/Quartz64.dsc
@@ -502,6 +502,7 @@
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
   gRk356xTokenSpaceGuid.PcdMultiPhy1Mode|L"MultiPhy1Mode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdFanMode|L"FanMode"|gConfigDxeFormSetGuid|0x0|1
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Pine64/SOQuartz/SOQuartz.dsc b/edk2-rockchip/Platform/Pine64/SOQuartz/SOQuartz.dsc
index e99bd9077..f005a11c6 100644
--- a/edk2-rockchip/Platform/Pine64/SOQuartz/SOQuartz.dsc
+++ b/edk2-rockchip/Platform/Pine64/SOQuartz/SOQuartz.dsc
@@ -483,6 +483,7 @@
   gRk356xTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Radxa/CM3/CM3.dsc b/edk2-rockchip/Platform/Radxa/CM3/CM3.dsc
index 84f86f215..556a276f0 100644
--- a/edk2-rockchip/Platform/Radxa/CM3/CM3.dsc
+++ b/edk2-rockchip/Platform/Radxa/CM3/CM3.dsc
@@ -493,6 +493,7 @@ gRk356xTokenSpaceGuid.PcdSystemTableMode|L"CpuClock"|gConfigDxeFormSetGuid|0x0|1
   gRk356xTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gConfigDxeFormSetGuid|0x0|0
   gRk356xTokenSpaceGuid.PcdCpuClock|L"CpuClock"|gConfigDxeFormSetGuid|0x0|2
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|L"CustomCpuClock"|gConfigDxeFormSetGuid|0x0|816
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|L"MemAttrProtocolEnable"|gConfigDxeFormSetGuid|1
 
   #
   # Common UEFI ones.
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.c b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.c
index a66ab190e..191d82d7b 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.c
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.c
@@ -1,6 +1,7 @@
 /** @file
  *
  *  Copyright (c) 2023, Jared McNeill <jmcneill@invisible.ca>
+ *  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
  *  Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
  *  Copyright (c) 2018 - 2020, Andrei Warkentin <andrey.warkentin@gmail.com>
  *
@@ -25,6 +26,7 @@
 #include <Library/GpioLib.h>
 #include <Protocol/ArmScmi.h>
 #include <Protocol/ArmScmiClockProtocol.h>
+#include <Protocol/MemoryAttribute.h>
 #include <ConfigVars.h>
 #include "ConfigDxeFormSetGuid.h"
 #include "ConfigDxe.h"
@@ -261,9 +263,7 @@ SetupVariables (
 {
   UINTN      Size;
   UINT32     Var32;
-#if FAN_GPIO_BANK != 0xFF
   BOOLEAN    VarBool;
-#endif
   EFI_STATUS Status;
 
   /*
@@ -280,6 +280,15 @@ SetupVariables (
     ASSERT_EFI_ERROR (Status);
   }
 
+  Size = sizeof (BOOLEAN);
+  Status = gRT->GetVariable (L"MemAttrProtocolEnable",
+                             &gConfigDxeFormSetGuid,
+                             NULL, &Size, &VarBool);
+  if (EFI_ERROR (Status)) {
+    Status = PcdSetBoolS (PcdMemAttrProtocolEnable, PcdGetBool (PcdMemAttrProtocolEnable));
+    ASSERT_EFI_ERROR (Status);
+  }
+
   Size = sizeof (UINT32);
   Status = gRT->GetVariable (L"CpuClock",
                   &gConfigDxeFormSetGuid,
@@ -403,6 +412,77 @@ RemoveTables (
 }
 
 
+/**
+  This function uninstalls the recently added EFI_MEMORY_ATTRIBUTE_PROTOCOL
+  to workaround older versions of OS loaders/shims using it incorrectly and
+  throwing a Synchronous Exception.
+
+  Source: https://github.com/edk2-porting/edk2-rk3588/commit/842db13abdcf46a2cc45570806dd7c0e0bc00db8
+
+  See:
+    - https://github.com/microsoft/mu_silicon_arm_tiano/issues/124
+    - https://edk2.groups.io/g/devel/topic/99631663
+**/
+STATIC
+VOID
+EFIAPI
+UninstallMemoryAttributeProtocol (
+  VOID
+  )
+{
+  EFI_STATUS                      Status;
+  EFI_HANDLE                      *Handles;
+  UINTN                           HandleCount;
+  EFI_MEMORY_ATTRIBUTE_PROTOCOL   *MemoryAttributeProtocol;
+
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
+                  &gEfiMemoryAttributeProtocolGuid,
+                  NULL,
+                  &HandleCount,
+                  &Handles
+                  );
+  ASSERT_EFI_ERROR (Status);
+  ASSERT (HandleCount == 1);
+
+  Status = gBS->HandleProtocol (
+                  Handles[0],
+                  &gEfiMemoryAttributeProtocolGuid,
+                  (VOID **)&MemoryAttributeProtocol
+                  );
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gBS->UninstallMultipleProtocolInterfaces (
+                  Handles[0],
+                  &gEfiMemoryAttributeProtocolGuid,
+                  MemoryAttributeProtocol,
+                  NULL
+                  );
+  ASSERT_EFI_ERROR (Status);
+
+  gBS->FreePool (Handles);
+}
+
+
+STATIC
+VOID
+EFIAPI
+RemoveMemAttrProtocol (
+  EFI_EVENT           Event,
+  VOID                *Context
+  )
+{
+  gBS->CloseEvent (Event);
+
+  if (PcdGetBool (PcdMemAttrProtocolEnable) == TRUE) {
+    return;
+  }
+
+  DEBUG ((DEBUG_INFO, "Removing EFI_MEMORY_ATTRIBUTE_PROTOCOL\n"));
+  UninstallMemoryAttributeProtocol ();
+}
+
+
 EFI_STATUS
 EFIAPI
 ConfigInitialize (
@@ -411,7 +491,7 @@ ConfigInitialize (
   )
 {
   EFI_STATUS                      Status;
-  EFI_EVENT                       EndOfDxeEvent;
+  EFI_EVENT                       Event;
 
   Status = SetupVariables ();
   if (Status != EFI_SUCCESS) {
@@ -426,15 +506,19 @@ ConfigInitialize (
   }
 
   Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_NOTIFY, RemoveTables,
-                               NULL, &gEfiEndOfDxeEventGroupGuid, &EndOfDxeEvent);
+                               NULL, &gEfiEndOfDxeEventGroupGuid, &Event);
   ASSERT_EFI_ERROR (Status);
 
   Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_NOTIFY, RemoveTables,
-                               NULL, &gEfiAcpiTableGuid, &EndOfDxeEvent);
+                               NULL, &gEfiAcpiTableGuid, &Event);
   ASSERT_EFI_ERROR (Status);
   
   Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_NOTIFY, RemoveTables,
-                               NULL, &gEfiAcpi10TableGuid, &EndOfDxeEvent);
+                               NULL, &gEfiAcpi10TableGuid, &Event);
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_NOTIFY, RemoveMemAttrProtocol,
+                               NULL, &gEfiEndOfDxeEventGroupGuid, &Event);
   ASSERT_EFI_ERROR (Status);
 
   return EFI_SUCCESS;
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.inf b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.inf
index 7c0fb7d64..90d2455db 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.inf
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxe.inf
@@ -61,6 +61,7 @@
   gEfiAcpi10TableGuid
 
 [Protocols]
+  gEfiMemoryAttributeProtocolGuid             ## CONSUMES
 
 [FixedPcd]
   gRk356xTokenSpaceGuid.PcdFanGpioBank
@@ -73,6 +74,7 @@
   gRk356xTokenSpaceGuid.PcdCustomCpuClock
   gRk356xTokenSpaceGuid.PcdMultiPhy1Mode
   gRk356xTokenSpaceGuid.PcdFanMode
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable
 
 [Depex]
   gPcdProtocolGuid
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.uni b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.uni
index 80928fd4f..ac617c124 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.uni
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.uni
@@ -21,6 +21,9 @@
 #string STR_SYSCONFIG_SYSTAB_BOTH     #language en-US "ACPI + Devicetree"
 #string STR_SYSCONFIG_SYSTAB_DT       #language en-US "Devicetree"
 
+#string STR_SYSCONFIG_MEMATTR_PROMPT    #language en-US "EFI_MEMORY_ATTRIBUTE_PROTOCOL Support"
+#string STR_SYSCONFIG_MEMATTR_HELP      #language en-US "Disable EFI_MEMORY_ATTRIBUTE_PROTOCOL support to work around buggy Linux distributions."
+
 #string STR_SYSCONFIG_CPUCLOCK_PROMPT   #language en-US "CPU Clock"
 #string STR_SYSCONFIG_CPUCLOCK_HELP     #language en-US "CPU Speed"
 #string STR_SYSCONFIG_CPUCLOCK_LOW      #language en-US "Low"
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.vfr b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.vfr
index fea68bc10..b125aedf1 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.vfr
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Drivers/ConfigDxe/ConfigDxeHii.vfr
@@ -31,6 +31,11 @@ formset
       name  = SystemTableMode,
       guid  = CONFIGDXE_FORM_SET_GUID;
 
+    efivarstore MEMATTR_VARSTORE_DATA,
+      attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+      name  = MemAttrProtocolEnable,
+      guid  = CONFIGDXE_FORM_SET_GUID;
+
     efivarstore CPUCLOCK_VARSTORE_DATA,
       attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
       name  = CpuClock,
@@ -68,6 +73,13 @@ formset
             option text = STRING_TOKEN(STR_SYSCONFIG_SYSTAB_DT), value = SYSTEM_TABLE_MODE_DT, flags = 0;
         endoneof;
 
+        checkbox varid = MemAttrProtocolEnable.Enable,
+            prompt      = STRING_TOKEN(STR_SYSCONFIG_MEMATTR_PROMPT),
+            help        = STRING_TOKEN(STR_SYSCONFIG_MEMATTR_HELP),
+            flags       = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED,
+            default     = 1,
+        endcheckbox;
+
         oneof varid = CpuClock.Clock,
             prompt      = STRING_TOKEN(STR_SYSCONFIG_CPUCLOCK_PROMPT),
             help        = STRING_TOKEN(STR_SYSCONFIG_CPUCLOCK_HELP),
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Include/ConfigVars.h b/edk2-rockchip/Platform/Rockchip/Rk356x/Include/ConfigVars.h
index c1b2399e9..cc7420bf7 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Include/ConfigVars.h
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Include/ConfigVars.h
@@ -18,6 +18,10 @@ typedef struct {
   UINT32 Mode;
 } SYSTEM_TABLE_MODE_VARSTORE_DATA;
 
+typedef struct {
+  BOOLEAN Enable;
+} MEMATTR_VARSTORE_DATA;
+
 typedef struct {
 #define CPUCLOCK_LOW     0
 #define CPUCLOCK_DEFAULT 1
diff --git a/edk2-rockchip/Platform/Rockchip/Rk356x/Rk356x.dec b/edk2-rockchip/Platform/Rockchip/Rk356x/Rk356x.dec
index 6b9fb3a75..dd80c4cc2 100755
--- a/edk2-rockchip/Platform/Rockchip/Rk356x/Rk356x.dec
+++ b/edk2-rockchip/Platform/Rockchip/Rk356x/Rk356x.dec
@@ -64,3 +64,4 @@
   gRk356xTokenSpaceGuid.PcdCustomCpuClock|816|UINT32|0x00004003
   gRk356xTokenSpaceGuid.PcdMultiPhy1Mode|0|UINT32|0x00004004
   gRk356xTokenSpaceGuid.PcdFanMode|FALSE|BOOLEAN|0x00040005
+  gRk356xTokenSpaceGuid.PcdMemAttrProtocolEnable|TRUE|BOOLEAN|0x00040006
\ No newline at end of file