From 9d46cca57637cfd086499970a8f5d5669ba9bfa0 Mon Sep 17 00:00:00 2001 From: tswan22 Date: Sat, 1 Nov 2025 12:51:31 -0400 Subject: [PATCH] add STM32U3 device (adjusted from STM32U0) --- README.rst | 2 ++ src/common/tusb_mcu.h | 5 ++++ src/portable/st/stm32_fsdev/fsdev_stm32.h | 28 +++++++++++++++++++++++ src/tusb_option.h | 1 + 4 files changed, 36 insertions(+) diff --git a/README.rst b/README.rst index 3ea1bd0186..23e427ec95 100644 --- a/README.rst +++ b/README.rst @@ -212,6 +212,8 @@ Supported CPUs | +----+------------------------+--------+------+-----------+------------------------+-------------------+ | | U0 | ✔ | ✖ | ✖ | stm32_fsdev | | | +----+------------------------+--------+------+-----------+------------------------+-------------------+ +| | U3 | ✔ | | ✖ | stm32_fsdev | | +| +----+------------------------+--------+------+-----------+------------------------+-------------------+ | | U5 | 535, 545 | ✔ | | ✖ | stm32_fsdev | | | | +------------------------+--------+------+-----------+------------------------+-------------------+ | | | 575, 585 | ✔ | ✔ | ✖ | dwc2 | | diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 0b8ed10596..6941e1a311 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -337,6 +337,11 @@ #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 +#elif TU_CHECK_MCU(OPT_MCU_STM32U3) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 + #elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h index 63b50f13da..30ffadc359 100644 --- a/src/portable/st/stm32_fsdev/fsdev_stm32.h +++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h @@ -225,6 +225,32 @@ #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY #define USB_CNTR_FSUSP USB_CNTR_SUSPEN +#elif CFG_TUSB_MCU == OPT_MCU_STM32U3 + #include "stm32u3xx.h" + #define FSDEV_PMA_SIZE (2048u) + #define FSDEV_BUS_32BIT + #define FSDEV_HAS_SBUF_ISO 1 // This is assumed to work but has not been tested... + #define USB USB_DRD_FS + + #define USB_EP_CTR_RX USB_EP_VTRX + #define USB_EP_CTR_TX USB_EP_VTTX + #define USB_EP_T_FIELD USB_CHEP_UTYPE + #define USB_EPREG_MASK USB_CHEP_REG_MASK + #define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK + #define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK + #define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1 + #define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2 + #define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1 + #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2 + #define USB_EPRX_STAT USB_CH_RX_VALID + #define USB_EPKIND_MASK USB_EP_KIND_MASK + #define USB_CNTR_FRES USB_CNTR_USBRST + #define USB_CNTR_RESUME USB_CNTR_L2RES + #define USB_ISTR_EP_ID USB_ISTR_IDN + #define USB_EPADDR_FIELD USB_CHEP_ADDR + #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY + #define USB_CNTR_FSUSP USB_CNTR_SUSPEN + #else #error You are using an untested or unimplemented STM32 variant. Please update the driver. // This includes U0 @@ -338,6 +364,8 @@ static const IRQn_Type fsdev_irq[] = { USB_IRQn, #elif CFG_TUSB_MCU == OPT_MCU_STM32U0 USB_DRD_FS_IRQn, + #elif CFG_TUSB_MCU == OPT_MCU_STM32U3 + USB_FS_IRQn, #else #error Unknown arch in USB driver #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 14404c59c4..b78fbca308 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -98,6 +98,7 @@ #define OPT_MCU_STM32C0 318 ///< ST C0 #define OPT_MCU_STM32N6 319 ///< ST N6 #define OPT_MCU_STM32WBA 320 ///< ST WBA +#define OPT_MCU_STM32U3 321 ///< ST U3 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56