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output.txt
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Total number of row buffer updates : 15
Total number of instructions executed completely per core: -
Core 1: 19
CPI: 10.4737
Memory contents (non-zero)
1000-1003 = 1
Cycle numbers Instructions CORE1 Register CORE1 MRM DRAM Fowarded instructions (if any)
1 add $t0, $t0, 1 $t0 = 1 IDLE IDLE ----
2 sw $t0, 1000($zero) IDLE IDLE IDLE ----
3 add $t2, $t2, 100 $t2 = 100 Pushing into MRM Buffer IDLE ----
4 lw $t1, 1004($zero) IDLE Finding a new row for DRAM IDLE ----
5 lw $t3, 1028($zero) IDLE passing new instruction to DRAM: sw $t0 1000 and Pushing into MRM Buffer IDLE ----
6 lw $t4, 1024($zero) IDLE Pushing into MRM Buffer Activate row 0 ----
7 Read : lw $t3, 1000($zero) IDLE Pushing into MRM Buffer Activate row 0 ----
8 IDLE IDLE IDLE Activate row 0 ----
9 IDLE IDLE IDLE Activate row 0 ----
10 IDLE IDLE IDLE Activate row 0 ----
11 IDLE IDLE IDLE Activate row 0 ----
12 IDLE IDLE IDLE Activate row 0 ----
13 IDLE IDLE IDLE Activate row 0 ----
14 IDLE IDLE IDLE Activate row 0 ----
15 IDLE IDLE IDLE Activate row 0 ----
16 IDLE IDLE IDLE Column Access 1000 ----
17 IDLE IDLE passing new instruction to DRAM: lw $t1 1004 1000-1003=1 ----
18 IDLE IDLE IDLE Column Access 1004 ----
19 IDLE IDLE Finding a new row for DRAM Column Access 1004 ----
20 IDLE $t1 = 0 passing new instruction to DRAM: lw $t3 1028 IDLE ----
21 IDLE IDLE IDLE Writeback row 0 ----
22 IDLE IDLE IDLE Writeback row 0 ----
23 IDLE IDLE IDLE Writeback row 0 ----
24 IDLE IDLE IDLE Writeback row 0 ----
25 IDLE IDLE IDLE Writeback row 0 ----
26 IDLE IDLE IDLE Writeback row 0 ----
27 IDLE IDLE IDLE Writeback row 0 ----
28 IDLE IDLE IDLE Writeback row 0 ----
29 IDLE IDLE IDLE Writeback row 0 ----
30 IDLE IDLE IDLE Writeback row 0 ----
31 IDLE IDLE IDLE Activate row 1 ----
32 IDLE IDLE IDLE Activate row 1 ----
33 IDLE IDLE IDLE Activate row 1 ----
34 IDLE IDLE IDLE Activate row 1 ----
35 IDLE IDLE IDLE Activate row 1 ----
36 IDLE IDLE IDLE Activate row 1 ----
37 IDLE IDLE IDLE Activate row 1 ----
38 IDLE IDLE IDLE Activate row 1 ----
39 IDLE IDLE IDLE Activate row 1 ----
40 IDLE IDLE IDLE Activate row 1 ----
41 IDLE IDLE IDLE Column Access 4 ----
42 IDLE IDLE passing new instruction to DRAM: lw $t4 1024 Column Access 4 ----
43 lw $t3, 1000($zero) $t3 = 0 IDLE Column Access 0 ----
44 lw $t1, 2000($zero) IDLE Pushing into MRM Buffer Column Access 0 ----
45 lw $t2, 3000($zero) $t4 = 0 Finding a new row for DRAM and Pushing into MRM Buffer IDLE ----
46 Read : lw $t3, 4000($zero) IDLE passing new instruction to DRAM: lw $t3 1000 and Pushing into MRM Buffer IDLE ----
47 IDLE IDLE IDLE Activate row 0 ----
48 IDLE IDLE IDLE Activate row 0 ----
49 IDLE IDLE IDLE Activate row 0 ----
50 IDLE IDLE IDLE Activate row 0 ----
51 IDLE IDLE IDLE Activate row 0 ----
52 IDLE IDLE IDLE Activate row 0 ----
53 IDLE IDLE IDLE Activate row 0 ----
54 IDLE IDLE IDLE Activate row 0 ----
55 IDLE IDLE IDLE Activate row 0 ----
56 IDLE IDLE IDLE Activate row 0 ----
57 IDLE IDLE IDLE Column Access 1000 ----
58 IDLE IDLE Finding a new row for DRAM Column Access 1000 ----
59 lw $t3, 4000($zero) $t3 = 1 passing new instruction to DRAM: lw $t1 2000 IDLE ----
60 sw $t4, 5000($zero) IDLE Pushing into MRM Buffer Activate row 1 ----
61 sw $t5, 2000($zero) IDLE Pushing into MRM Buffer Activate row 1 ----
62 lw $t6, 2004($zero) IDLE Pushing into MRM Buffer Activate row 1 ----
63 Read : lw $t1, 3000($zero) IDLE Pushing into MRM Buffer Activate row 1 ----
64 IDLE IDLE IDLE Activate row 1 ----
65 IDLE IDLE IDLE Activate row 1 ----
66 IDLE IDLE IDLE Activate row 1 ----
67 IDLE IDLE IDLE Activate row 1 ----
68 IDLE IDLE IDLE Activate row 1 ----
69 IDLE IDLE IDLE Activate row 1 ----
70 IDLE IDLE IDLE Column Access 976 ----
71 IDLE IDLE passing new instruction to DRAM: sw $t5 2000 Column Access 976 ----
72 lw $t1, 3000($zero) $t1 = 0 IDLE Column Access 976 ----
73 Read : sw $t1, 3000($zero) IDLE passing new instruction to DRAM: lw $t6 2004 and Pushing into MRM Buffer 2000-2003=0 ----
74 IDLE IDLE IDLE Column Access 980 ----
75 IDLE IDLE Finding a new row for DRAM Column Access 980 ----
76 IDLE $t6 = 0 passing new instruction to DRAM: lw $t2 3000 IDLE ----
77 IDLE IDLE IDLE Writeback row 1 ----
78 IDLE IDLE IDLE Writeback row 1 ----
79 IDLE IDLE IDLE Writeback row 1 ----
80 IDLE IDLE IDLE Writeback row 1 ----
81 IDLE IDLE IDLE Writeback row 1 ----
82 IDLE IDLE IDLE Writeback row 1 ----
83 IDLE IDLE IDLE Writeback row 1 ----
84 IDLE IDLE IDLE Writeback row 1 ----
85 IDLE IDLE IDLE Writeback row 1 ----
86 IDLE IDLE IDLE Writeback row 1 ----
87 IDLE IDLE IDLE Activate row 2 ----
88 IDLE IDLE IDLE Activate row 2 ----
89 IDLE IDLE IDLE Activate row 2 ----
90 IDLE IDLE IDLE Activate row 2 ----
91 IDLE IDLE IDLE Activate row 2 ----
92 IDLE IDLE IDLE Activate row 2 ----
93 IDLE IDLE IDLE Activate row 2 ----
94 IDLE IDLE IDLE Activate row 2 ----
95 IDLE IDLE IDLE Activate row 2 ----
96 IDLE IDLE IDLE Activate row 2 ----
97 IDLE IDLE IDLE Column Access 952 ----
98 IDLE IDLE passing new instruction to DRAM: lw $t1 3000 Column Access 952 ----
99 IDLE $t2 = 0 IDLE Column Access 952 ----
100 IDLE IDLE Finding a new row for DRAM Column Access 952 ----
101 sw $t1, 3000($zero) $t1 = 0 passing new instruction to DRAM: lw $t3 4000 IDLE ----
102 lw $t1, 3004($zero) IDLE Pushing into MRM Buffer Activate row 3 ----
103 lw $t1, 1000($zero) IDLE Pushing into MRM Buffer Activate row 3 ----
104 sw $t2, 1004($zero) IDLE Pushing into MRM Buffer Activate row 3 ----
105 Read : lw $t1, 5000($zero) IDLE Pushing into MRM Buffer Activate row 3 ----
106 IDLE IDLE IDLE Activate row 3 ----
107 IDLE IDLE IDLE Activate row 3 ----
108 IDLE IDLE IDLE Activate row 3 ----
109 IDLE IDLE IDLE Activate row 3 ----
110 IDLE IDLE IDLE Activate row 3 ----
111 IDLE IDLE IDLE Activate row 3 ----
112 IDLE IDLE IDLE Column Access 928 ----
113 IDLE IDLE Finding a new row for DRAM Column Access 928 ----
114 IDLE $t3 = 0 passing new instruction to DRAM: sw $t4 5000 IDLE ----
115 IDLE IDLE IDLE Activate row 4 ----
116 IDLE IDLE IDLE Activate row 4 ----
117 IDLE IDLE IDLE Activate row 4 ----
118 IDLE IDLE IDLE Activate row 4 ----
119 IDLE IDLE IDLE Activate row 4 ----
120 IDLE IDLE IDLE Activate row 4 ----
121 IDLE IDLE IDLE Activate row 4 ----
122 IDLE IDLE IDLE Activate row 4 ----
123 IDLE IDLE IDLE Activate row 4 ----
124 IDLE IDLE IDLE Activate row 4 ----
125 IDLE IDLE IDLE Column Access 904 ----
126 IDLE IDLE Finding a new row for DRAM 5000-5003=0 ----
127 IDLE IDLE passing new instruction to DRAM: sw $t1 3000 IDLE ----
128 IDLE IDLE IDLE Writeback row 4 ----
129 IDLE IDLE IDLE Writeback row 4 ----
130 IDLE IDLE IDLE Writeback row 4 ----
131 IDLE IDLE IDLE Writeback row 4 ----
132 IDLE IDLE IDLE Writeback row 4 ----
133 IDLE IDLE IDLE Writeback row 4 ----
134 IDLE IDLE IDLE Writeback row 4 ----
135 IDLE IDLE IDLE Writeback row 4 ----
136 IDLE IDLE IDLE Writeback row 4 ----
137 IDLE IDLE IDLE Writeback row 4 ----
138 IDLE IDLE IDLE Activate row 2 ----
139 IDLE IDLE IDLE Activate row 2 ----
140 IDLE IDLE IDLE Activate row 2 ----
141 IDLE IDLE IDLE Activate row 2 ----
142 IDLE IDLE IDLE Activate row 2 ----
143 IDLE IDLE IDLE Activate row 2 ----
144 IDLE IDLE IDLE Activate row 2 ----
145 IDLE IDLE IDLE Activate row 2 ----
146 IDLE IDLE IDLE Activate row 2 ----
147 IDLE IDLE IDLE Activate row 2 ----
148 IDLE IDLE IDLE Column Access 952 ----
149 IDLE IDLE Finding a new row for DRAM 3000-3003=0 ----
150 IDLE IDLE passing new instruction to DRAM: lw $t1 1000 IDLE ----
151 IDLE IDLE IDLE Writeback row 2 ----
152 IDLE IDLE IDLE Writeback row 2 ----
153 IDLE IDLE IDLE Writeback row 2 ----
154 IDLE IDLE IDLE Writeback row 2 ----
155 IDLE IDLE IDLE Writeback row 2 ----
156 IDLE IDLE IDLE Writeback row 2 ----
157 IDLE IDLE IDLE Writeback row 2 ----
158 IDLE IDLE IDLE Writeback row 2 ----
159 IDLE IDLE IDLE Writeback row 2 ----
160 IDLE IDLE IDLE Writeback row 2 ----
161 IDLE IDLE IDLE Activate row 0 ----
162 IDLE IDLE IDLE Activate row 0 ----
163 IDLE IDLE IDLE Activate row 0 ----
164 IDLE IDLE IDLE Activate row 0 ----
165 IDLE IDLE IDLE Activate row 0 ----
166 IDLE IDLE IDLE Activate row 0 ----
167 IDLE IDLE IDLE Activate row 0 ----
168 IDLE IDLE IDLE Activate row 0 ----
169 IDLE IDLE IDLE Activate row 0 ----
170 IDLE IDLE IDLE Activate row 0 ----
171 IDLE IDLE IDLE Column Access 1000 ----
172 IDLE IDLE passing new instruction to DRAM: sw $t2 1004 Column Access 1000 ----
173 lw $t1, 5000($zero) $t1 = 1 IDLE Column Access 1004 ----
174 IDLE IDLE Pushing into MRM Buffer 1004-1007=0 ----
175 IDLE IDLE Finding a new row for DRAM IDLE ----
176 IDLE IDLE passing new instruction to DRAM: lw $t1 5000 IDLE ----
177 IDLE IDLE IDLE Writeback row 0 ----
178 IDLE IDLE IDLE Writeback row 0 ----
179 IDLE IDLE IDLE Writeback row 0 ----
180 IDLE IDLE IDLE Writeback row 0 ----
181 IDLE IDLE IDLE Writeback row 0 ----
182 IDLE IDLE IDLE Writeback row 0 ----
183 IDLE IDLE IDLE Writeback row 0 ----
184 IDLE IDLE IDLE Writeback row 0 ----
185 IDLE IDLE IDLE Writeback row 0 ----
186 IDLE IDLE IDLE Writeback row 0 ----
187 IDLE IDLE IDLE Activate row 4 ----
188 IDLE IDLE IDLE Activate row 4 ----
189 IDLE IDLE IDLE Activate row 4 ----
190 IDLE IDLE IDLE Activate row 4 ----
191 IDLE IDLE IDLE Activate row 4 ----
192 IDLE IDLE IDLE Activate row 4 ----
193 IDLE IDLE IDLE Activate row 4 ----
194 IDLE IDLE IDLE Activate row 4 ----
195 IDLE IDLE IDLE Activate row 4 ----
196 IDLE IDLE IDLE Activate row 4 ----
197 IDLE IDLE IDLE Column Access 904 ----
198 IDLE IDLE IDLE Column Access 904 ----
199 IDLE $t1 = 0 IDLE IDLE ----
200 IDLE IDLE IDLE IDLE ----
201 IDLE IDLE IDLE IDLE ----
202 IDLE IDLE IDLE IDLE ----
203 IDLE IDLE IDLE IDLE ----
204 IDLE IDLE IDLE IDLE ----
205 IDLE IDLE IDLE IDLE ----
206 IDLE IDLE IDLE IDLE ----
207 IDLE IDLE IDLE IDLE ----
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