diff --git a/.gitignore b/.gitignore index eacd999..aed1a35 100755 --- a/.gitignore +++ b/.gitignore @@ -67,3 +67,4 @@ tool_validation.* *_dump.txt /test-erase/* /binaries +/RAM_Routines/STM_write_erase.zip diff --git a/Makefile b/Makefile index a2b0c08..42ed582 100644 --- a/Makefile +++ b/Makefile @@ -1,13 +1,19 @@ # Project: stm8gal CC = gcc -CFLAGS = -c -Wall -I./RAM_Routines +CFLAGS = -c -Wall -I./RAM_Routines/write_erase -I./RAM_Routines/verify_CRC32 #CFLAGS += -DDEBUG LDFLAGS = -g3 -lm SOURCES = bootloader.c hexfile.c main.c misc.c serial_comm.c spi_Arduino_comm.c verify_CRC32.c INCLUDES = misc.h bootloader.h hexfile.h serial_comm.h spi_spidev_comm.h spi_Arduino_comm.h verify_CRC32.h main.h -RAMROUTINES = RAM_Routines/E_W_ROUTINEs_128K_ver_2.1.s19 RAM_Routines/E_W_ROUTINEs_128K_ver_2.0.s19 RAM_Routines/E_W_ROUTINEs_256K_ver_1.0.s19 RAM_Routines/E_W_ROUTINEs_32K_ver_1.3.s19 RAM_Routines/E_W_ROUTINEs_32K_ver_1.4.s19 RAM_Routines/E_W_ROUTINEs_128K_ver_2.2.s19 RAM_Routines/E_W_ROUTINEs_32K_ver_1.0.s19 RAM_Routines/E_W_ROUTINEs_128K_ver_2.4.s19 RAM_Routines/E_W_ROUTINEs_32K_ver_1.2.s19 RAM_Routines/E_W_ROUTINEs_32K_verL_1.0.s19 RAM_Routines/E_W_ROUTINEs_8K_verL_1.0.s19 -RAMINCLUDES = $(RAMROUTINES:.s19=.h) +RAMINCLUDES = \ + RAM_Routines/write_erase/erase_write_verL_8k_1.0_inc.h \ + RAM_Routines/write_erase/erase_write_ver_32k_1.0_inc.h \ + RAM_Routines/write_erase/erase_write_ver_32k_1.2_inc.h \ + RAM_Routines/write_erase/erase_write_ver_32k_1.3_inc.h \ + RAM_Routines/write_erase/erase_write_ver_128k_2.0_inc.h \ + RAM_Routines/write_erase/erase_write_ver_128k_2.1_inc.h \ + RAM_Routines/write_erase/erase_write_ver_128k_2.2_inc.h OBJDIR = Objects OBJECTS = $(patsubst %.c, $(OBJDIR)/%.o, $(SOURCES)) BIN = stm8gal @@ -45,10 +51,6 @@ $(OBJDIR): clean: ${RM} $(OBJECTS) $(OBJDIR) $(BIN) $(BIN).exe *~ .DS_Store -# convert RAM routines to C headers for inclusion into stm8gal -%.h: %.s19 $(RAMROUTINES) - xxd -i $< > $@ - # link application $(BIN): $(OBJECTS) $(OBJDIR) $(CC) $(LDFLAGS) $(OBJECTS) -o $@ diff --git a/Makefile.win b/Makefile.win index 807734e..fb79545 100644 --- a/Makefile.win +++ b/Makefile.win @@ -6,12 +6,12 @@ CC = gcc.exe WINDRES = windres.exe OBJ = Objects/main.o Objects/misc.o Objects/serial_comm.o Objects/bootloader.o Objects/hexfile.o Objects/spi_Arduino_comm.o Objects/verify_CRC32.o LINKOBJ = Objects/main.o Objects/misc.o Objects/serial_comm.o Objects/bootloader.o Objects/hexfile.o Objects/spi_Arduino_comm.o Objects/verify_CRC32.o -LIBS = -L"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/lib32" -static-libgcc -m32 -INCS = -I"C:/Program Files/Dev-Cpp/MinGW64/include" -I"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include" -I"./RAM_Routines" -CXXINCS = -I"C:/Program Files/Dev-Cpp/MinGW64/include" -I"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include/c++" -I"./RAM_Routines" +LIBS = -L"C:/Program Files/Dev-Cpp/MinGW64/lib" -L"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/lib" -static-libgcc +INCS = -I"C:/Program Files/Dev-Cpp/MinGW64/include" -I"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include" -I"./RAM_Routines/write_erase" -I"./RAM_Routines/verify_CRC32" +CXXINCS = -I"C:/Program Files/Dev-Cpp/MinGW64/include" -I"C:/Program Files/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include" -I"C:/Program Files/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include/c++" -I"./RAM_Routines/write_erase" -I"./RAM_Routines/verify_CRC32" BIN = stm8gal.exe -CXXFLAGS = $(CXXINCS) -m32 -std=gnu99 -CFLAGS = $(INCS) -m32 -std=gnu99 +CXXFLAGS = $(CXXINCS) -std=gnu99 +CFLAGS = $(INCS) -std=gnu99 RM = rm.exe -f .PHONY: all all-before all-after clean clean-custom diff --git a/RAM_Routines/E_W_ROUTINEs_128K_ver_2.0.h b/RAM_Routines/E_W_ROUTINEs_128K_ver_2.0.h deleted file mode 100644 index 2645bb4..0000000 --- a/RAM_Routines/E_W_ROUTINEs_128K_ver_2.0.h +++ /dev/null @@ -1,67 +0,0 @@ -unsigned char STM8_Routines_E_W_ROUTINEs_128K_ver_2_0_s19[] = { - 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0x30, 0x31, 0x44, 0x30, 0x38, 0x31, 0x41, 0x39, 0x0d, 0x0a, 0x53, 0x39, - 0x30, 0x33, 0x46, 0x46, 0x46, 0x46, 0x46, 0x45 -}; -unsigned int STM8_Routines_E_W_ROUTINEs_256K_ver_1_0_s19_len = 896; diff --git a/RAM_Routines/E_W_ROUTINEs_32K_verL_1.0.h b/RAM_Routines/E_W_ROUTINEs_32K_verL_1.0.h deleted file mode 100644 index 09662e2..0000000 --- a/RAM_Routines/E_W_ROUTINEs_32K_verL_1.0.h +++ /dev/null @@ -1,3 +0,0 @@ -unsigned char STM8_Routines_E_W_ROUTINEs_32K_verL_1_0_s19[] = { -}; -unsigned int STM8_Routines_E_W_ROUTINEs_32K_verL_1_0_s19_len = 0; diff --git a/RAM_Routines/E_W_ROUTINEs_32K_ver_1.0.h b/RAM_Routines/E_W_ROUTINEs_32K_ver_1.0.h deleted file mode 100644 index b304ce8..0000000 --- a/RAM_Routines/E_W_ROUTINEs_32K_ver_1.0.h +++ /dev/null @@ -1,57 +0,0 @@ -unsigned char STM8_Routines_E_W_ROUTINEs_32K_ver_1_0_s19[] = { - 0x53, 0x30, 0x30, 0x46, 0x30, 0x30, 0x30, 0x30, 0x34, 0x34, 0x36, 0x35, - 0x36, 0x32, 0x37, 0x35, 0x36, 0x37, 0x35, 0x43, 0x36, 0x32, 0x36, 0x43, - 0x32, 0x45, 0x37, 0x33, 0x36, 0x44, 0x33, 0x38, 0x39, 0x39, 0x0d, 0x0a, - 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0x35, 0x30, 0x35, 0x46, 0x46, 0x42, 0x32, 0x30, 0x30, 0x34, 0x37, 0x32, - 0x31, 0x30, 0x30, 0x30, 0x39, 0x37, 0x43, 0x44, 0x38, 0x41, 0x0d, 0x0a, - 0x53, 0x31, 0x31, 0x33, 0x30, 0x31, 0x39, 0x30, 0x36, 0x30, 0x36, 0x33, - 0x39, 0x46, 0x42, 0x31, 0x38, 0x38, 0x32, 0x37, 0x30, 0x33, 0x35, 0x43, - 0x32, 0x30, 0x44, 0x42, 0x37, 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, - 0x31, 0x30, 0x37, 0x32, 0x42, 0x30, 0x0d, 0x0a, 0x53, 0x31, 0x31, 0x33, - 0x30, 0x31, 0x41, 0x30, 0x30, 0x30, 0x35, 0x30, 0x35, 0x46, 0x30, 0x37, - 0x37, 0x32, 0x30, 0x35, 0x35, 0x30, 0x35, 0x46, 0x46, 0x42, 0x32, 0x30, - 0x32, 0x34, 0x37, 0x32, 0x31, 0x30, 0x30, 0x30, 0x39, 0x37, 0x32, 0x30, - 0x46, 0x37, 0x0d, 0x0a, 0x53, 0x31, 0x31, 0x33, 0x30, 0x31, 0x42, 0x30, - 0x31, 0x45, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, - 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, - 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x45, 0x41, 0x0d, 0x0a, - 0x53, 0x31, 0x31, 0x33, 0x30, 0x31, 0x43, 0x30, 0x39, 0x44, 0x39, 0x44, - 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, - 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, 0x39, 0x44, - 0x39, 0x44, 0x38, 0x31, 0x37, 0x37, 0x0d, 0x0a, 0x53, 0x39, 0x30, 0x33, - 0x46, 0x46, 0x46, 0x46, 0x46, 0x45, 0x0d, 0x0a -}; -unsigned int STM8_Routines_E_W_ROUTINEs_32K_ver_1_4_s19_len = 884; diff --git a/RAM_Routines/E_W_ROUTINEs_8K_verL_1.0.h b/RAM_Routines/E_W_ROUTINEs_8K_verL_1.0.h deleted file mode 100644 index 677b7de..0000000 --- a/RAM_Routines/E_W_ROUTINEs_8K_verL_1.0.h +++ /dev/null @@ -1,5 +0,0 @@ -unsigned char STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19[] = { - 0x53, 0x31, 0x30, 0x34, 0x30, 0x31, 0x45, 0x41, 0x42, 0x32, 0x35, 0x45, - 0x0d, 0x0a, 0x53, 0x39, 0x30, 0x33, 0x46, 0x46, 0x46, 0x46, 0x46, 0x45 -}; -unsigned int STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19_len = 24; diff --git a/RAM_Routines/SLA0048_STSW-STM8068.pdf b/RAM_Routines/SLA0048_STSW-STM8068.pdf deleted file mode 100644 index 239380e..0000000 Binary files a/RAM_Routines/SLA0048_STSW-STM8068.pdf and /dev/null differ diff --git a/RAM_Routines/STM_SW_license.pdf b/RAM_Routines/STM_SW_license.pdf deleted file mode 100644 index bf53342..0000000 Binary files a/RAM_Routines/STM_SW_license.pdf and /dev/null differ diff --git a/RAM_Routines/verify_CRC32_STM8L_32k_v1.1.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8L_32k_v1.1.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8L_32k_v1.1.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8L_32k_v1.1.h diff --git a/RAM_Routines/verify_CRC32_STM8L_32k_v1.2.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8L_32k_v1.2.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8L_32k_v1.2.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8L_32k_v1.2.h diff --git a/RAM_Routines/verify_CRC32_STM8L_64k_v1.1.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8L_64k_v1.1.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8L_64k_v1.1.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8L_64k_v1.1.h diff --git a/RAM_Routines/verify_CRC32_STM8L_8k_v1.0.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8L_8k_v1.0.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8L_8k_v1.0.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8L_8k_v1.0.h diff --git a/RAM_Routines/verify_CRC32_STM8S_128k_v2.1.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8S_128k_v2.1.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8S_128k_v2.1.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8S_128k_v2.1.h diff --git a/RAM_Routines/verify_CRC32_STM8S_128k_v2.2.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8S_128k_v2.2.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8S_128k_v2.2.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8S_128k_v2.2.h diff --git a/RAM_Routines/verify_CRC32_STM8S_32k_v1.2.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8S_32k_v1.2.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8S_32k_v1.2.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8S_32k_v1.2.h diff --git a/RAM_Routines/verify_CRC32_STM8S_32k_v1.3.h b/RAM_Routines/verify_CRC32/verify_CRC32_STM8S_32k_v1.3.h similarity index 100% rename from RAM_Routines/verify_CRC32_STM8S_32k_v1.3.h rename to RAM_Routines/verify_CRC32/verify_CRC32_STM8S_32k_v1.3.h diff --git a/RAM_Routines/verify_CRC32_STM8S_128k_v2.4.h b/RAM_Routines/verify_CRC32_STM8S_128k_v2.4.h deleted file mode 100644 index 19a81ce..0000000 --- a/RAM_Routines/verify_CRC32_STM8S_128k_v2.4.h +++ /dev/null @@ -1,46 +0,0 @@ -unsigned char bin_verify_CRC32_STM8S_128k_v2_4_ihx[] = { - 0x3a, 0x32, 0x30, 0x30, 0x32, 0x31, 0x30, 0x30, 0x30, 0x35, 0x35, 0x35, - 0x30, 0x43, 0x36, 0x30, 0x30, 0x30, 0x34, 0x37, 0x32, 0x35, 0x46, 0x35, - 0x30, 0x43, 0x36, 0x41, 0x45, 0x46, 0x46, 0x46, 0x46, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x45, 0x41, 0x45, 0x46, 0x46, 0x46, 0x46, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x43, 0x43, 0x45, 0x30, 0x32, 0x46, 0x41, 0x43, 0x33, 0x30, - 0x32, 0x46, 0x36, 0x43, 0x36, 0x30, 0x32, 0x46, 0x39, 0x43, 0x32, 0x30, - 0x32, 0x37, 0x41, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x32, 0x33, 0x30, 0x30, - 0x30, 0x46, 0x35, 0x43, 0x36, 0x30, 0x32, 0x46, 0x38, 0x43, 0x32, 0x30, - 0x32, 0x46, 0x34, 0x32, 0x35, 0x34, 0x35, 0x38, 0x38, 0x39, 0x32, 0x42, - 0x43, 0x30, 0x32, 0x46, 0x35, 0x43, 0x37, 0x30, 0x30, 0x30, 0x33, 0x38, - 0x34, 0x33, 0x42, 0x30, 0x30, 0x30, 0x33, 0x43, 0x45, 0x30, 0x32, 0x46, - 0x45, 0x38, 0x39, 0x43, 0x45, 0x30, 0x32, 0x46, 0x43, 0x38, 0x39, 0x43, - 0x44, 0x30, 0x32, 0x42, 0x43, 0x34, 0x37, 0x0a, 0x3a, 0x32, 0x30, 0x30, - 0x32, 0x35, 0x30, 0x30, 0x30, 0x35, 0x42, 0x30, 0x35, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x45, 0x39, 0x30, 0x43, 0x46, 0x30, 0x32, 0x46, 0x43, 0x43, - 0x45, 0x30, 0x32, 0x46, 0x36, 0x39, 0x30, 0x43, 0x45, 0x30, 0x32, 0x46, - 0x34, 0x35, 0x43, 0x32, 0x36, 0x30, 0x32, 0x39, 0x30, 0x35, 0x43, 0x43, - 0x46, 0x30, 0x32, 0x46, 0x36, 0x39, 0x30, 0x43, 0x46, 0x30, 0x32, 0x46, - 0x34, 0x33, 0x35, 0x35, 0x35, 0x35, 0x30, 0x45, 0x30, 0x41, 0x32, 0x0a, - 0x3a, 0x32, 0x30, 0x30, 0x32, 0x37, 0x30, 0x30, 0x30, 0x33, 0x35, 0x30, - 0x35, 0x35, 0x30, 0x45, 0x31, 0x33, 0x35, 0x41, 0x41, 0x35, 0x30, 0x45, - 0x30, 0x33, 0x35, 0x37, 0x46, 0x35, 0x30, 0x44, 0x31, 0x32, 0x30, 0x41, - 0x37, 0x43, 0x36, 0x30, 0x32, 0x46, 0x46, 0x34, 0x33, 0x39, 0x37, 0x43, - 0x36, 0x30, 0x32, 0x46, 0x45, 0x34, 0x33, 0x39, 0x35, 0x43, 0x36, 0x30, - 0x32, 0x46, 0x44, 0x34, 0x33, 0x39, 0x30, 0x39, 0x37, 0x43, 0x36, 0x30, - 0x32, 0x32, 0x32, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x32, 0x39, 0x30, 0x30, - 0x30, 0x46, 0x43, 0x34, 0x33, 0x39, 0x30, 0x39, 0x35, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x45, 0x39, 0x30, 0x43, 0x46, 0x30, 0x32, 0x46, 0x43, 0x35, - 0x35, 0x30, 0x30, 0x30, 0x34, 0x35, 0x30, 0x43, 0x36, 0x33, 0x35, 0x30, - 0x31, 0x35, 0x33, 0x30, 0x34, 0x43, 0x36, 0x35, 0x33, 0x30, 0x32, 0x37, - 0x32, 0x35, 0x46, 0x35, 0x33, 0x30, 0x32, 0x33, 0x35, 0x30, 0x31, 0x35, - 0x33, 0x32, 0x34, 0x43, 0x36, 0x30, 0x45, 0x0a, 0x3a, 0x32, 0x30, 0x30, - 0x32, 0x42, 0x30, 0x30, 0x30, 0x35, 0x33, 0x32, 0x32, 0x37, 0x32, 0x35, - 0x46, 0x35, 0x33, 0x32, 0x32, 0x43, 0x43, 0x30, 0x32, 0x42, 0x39, 0x43, - 0x43, 0x36, 0x30, 0x32, 0x45, 0x37, 0x42, 0x30, 0x37, 0x31, 0x38, 0x30, - 0x36, 0x36, 0x42, 0x30, 0x36, 0x31, 0x45, 0x30, 0x35, 0x31, 0x36, 0x30, - 0x33, 0x41, 0x36, 0x30, 0x38, 0x39, 0x30, 0x35, 0x34, 0x35, 0x36, 0x32, - 0x34, 0x31, 0x31, 0x30, 0x31, 0x41, 0x38, 0x32, 0x30, 0x35, 0x46, 0x0a, - 0x3a, 0x31, 0x32, 0x30, 0x32, 0x44, 0x30, 0x30, 0x30, 0x30, 0x31, 0x41, - 0x38, 0x38, 0x33, 0x30, 0x31, 0x39, 0x30, 0x30, 0x31, 0x41, 0x38, 0x42, - 0x38, 0x39, 0x30, 0x30, 0x31, 0x41, 0x38, 0x45, 0x44, 0x39, 0x30, 0x30, - 0x31, 0x34, 0x41, 0x32, 0x36, 0x45, 0x37, 0x38, 0x31, 0x36, 0x46, 0x0a, - 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a -}; -unsigned int bin_verify_CRC32_STM8S_128k_v2_4_ihx_len = 516; diff --git a/RAM_Routines/verify_CRC32_STM8S_32k_v1.4.h b/RAM_Routines/verify_CRC32_STM8S_32k_v1.4.h deleted file mode 100644 index 771be70..0000000 --- a/RAM_Routines/verify_CRC32_STM8S_32k_v1.4.h +++ /dev/null @@ -1,46 +0,0 @@ -unsigned char bin_verify_CRC32_STM8S_32k_v1_4_ihx[] = { - 0x3a, 0x32, 0x30, 0x30, 0x32, 0x31, 0x30, 0x30, 0x30, 0x35, 0x35, 0x35, - 0x30, 0x43, 0x36, 0x30, 0x30, 0x30, 0x34, 0x37, 0x32, 0x35, 0x46, 0x35, - 0x30, 0x43, 0x36, 0x41, 0x45, 0x46, 0x46, 0x46, 0x46, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x45, 0x41, 0x45, 0x46, 0x46, 0x46, 0x46, 0x43, 0x46, 0x30, - 0x32, 0x46, 0x43, 0x43, 0x45, 0x30, 0x32, 0x46, 0x41, 0x43, 0x33, 0x30, - 0x32, 0x46, 0x36, 0x43, 0x36, 0x30, 0x32, 0x46, 0x39, 0x43, 0x32, 0x30, - 0x32, 0x37, 0x41, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x32, 0x33, 0x30, 0x30, - 0x30, 0x46, 0x35, 0x43, 0x36, 0x30, 0x32, 0x46, 0x38, 0x43, 0x32, 0x30, - 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0x33, 0x41, 0x36, 0x30, 0x38, 0x39, 0x30, 0x35, 0x34, 0x35, 0x36, 0x32, - 0x34, 0x31, 0x31, 0x30, 0x31, 0x41, 0x38, 0x32, 0x30, 0x36, 0x35, 0x0a, - 0x3a, 0x31, 0x32, 0x30, 0x32, 0x44, 0x30, 0x30, 0x30, 0x30, 0x31, 0x41, - 0x38, 0x38, 0x33, 0x30, 0x31, 0x39, 0x30, 0x30, 0x31, 0x41, 0x38, 0x42, - 0x38, 0x39, 0x30, 0x30, 0x31, 0x41, 0x38, 0x45, 0x44, 0x39, 0x30, 0x30, - 0x31, 0x34, 0x41, 0x32, 0x36, 0x45, 0x37, 0x38, 0x31, 0x36, 0x46, 0x0a, - 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a -}; -unsigned int bin_verify_CRC32_STM8S_32k_v1_4_ihx_len = 516; diff --git a/RAM_Routines/write_erase/LICENSE.txt b/RAM_Routines/write_erase/LICENSE.txt new file mode 100644 index 0000000..f433b1a --- /dev/null +++ b/RAM_Routines/write_erase/LICENSE.txt @@ -0,0 +1,177 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + + 9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + + END OF TERMS AND CONDITIONS diff --git a/RAM_Routines/write_erase/Readme.md b/RAM_Routines/write_erase/Readme.md new file mode 100644 index 0000000..8c5dac7 --- /dev/null +++ b/RAM_Routines/write_erase/Readme.md @@ -0,0 +1,3 @@ +STM8 RAM write/erase OSS routines from [https://github.com/basilhussain/stm8-bootloader-erase-write](https://github.com/basilhussain/stm8-bootloader-erase-write) + +Note: these replace the proprietary w/e routines by STMicro \ No newline at end of file diff --git a/RAM_Routines/write_erase/erase_write_verL_8k_1.0_inc.h b/RAM_Routines/write_erase/erase_write_verL_8k_1.0_inc.h new file mode 100644 index 0000000..4634d03 --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_verL_8k_1.0_inc.h @@ -0,0 +1,27 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_verL_8k_1_0_ihx[] = { + 0x3a, 0x30, 0x31, 0x30, 0x31, 0x45, 0x41, 0x30, 0x30, 0x42, 0x32, 0x36, + 0x32, 0x0a, 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, + 0x46, 0x0a +}; +unsigned int bin_erase_write_verL_8k_1_0_ihx_len = 26; diff --git a/RAM_Routines/write_erase/erase_write_ver_128k_2.0_inc.h b/RAM_Routines/write_erase/erase_write_ver_128k_2.0_inc.h new file mode 100644 index 0000000..113cf3f --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_128k_2.0_inc.h @@ -0,0 +1,92 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_128k_2_0_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x43, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x39, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x38, 0x37, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x46, 0x36, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x43, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x38, 0x44, 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0x39, 0x37, 0x34, 0x46, 0x30, 0x32, 0x35, + 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, 0x46, 0x30, + 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x31, 0x36, 0x32, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x44, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, + 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, 0x30, 0x39, + 0x38, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, 0x31, 0x35, + 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, 0x43, 0x32, + 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x39, 0x43, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x38, 0x32, 0x30, 0x30, 0x35, 0x42, 0x33, + 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, 0x44, 0x36, + 0x30, 0x38, 0x37, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, + 0x43, 0x43, 0x35, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x41, 0x32, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, 0x39, 0x38, + 0x38, 0x43, 0x44, 0x30, 0x31, 0x43, 0x44, 0x35, 0x42, 0x30, 0x33, 0x37, + 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x44, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, 0x32, 0x30, + 0x43, 0x30, 0x30, 0x38, 0x45, 0x33, 0x43, 0x0a, 0x3a, 0x31, 0x34, 0x30, + 0x31, 0x43, 0x32, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, 0x36, 0x43, + 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, 0x44, 0x38, + 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, 0x34, 0x39, + 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x45, 0x34, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, 0x36, 0x35, + 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, 0x33, 0x41, + 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, 0x37, 0x46, + 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, 0x33, 0x32, + 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x38, 0x37, 0x38, + 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x37, 0x38, 0x32, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, 0x30, 0x30, + 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, 0x33, 0x43, + 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, 0x3a, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_128k_2_0_ihx_len = 814; diff --git a/RAM_Routines/write_erase/erase_write_ver_128k_2.1_inc.h b/RAM_Routines/write_erase/erase_write_ver_128k_2.1_inc.h new file mode 100644 index 0000000..38d4db5 --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_128k_2.1_inc.h @@ -0,0 +1,92 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_128k_2_1_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x43, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x39, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x38, 0x43, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x46, 0x31, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x43, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x38, 0x44, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x38, 0x31, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x41, 0x45, 0x30, 0x30, 0x38, 0x41, 0x37, 0x46, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x38, 0x31, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x34, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x41, 0x31, 0x38, 0x30, 0x32, + 0x36, 0x31, 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x30, 0x39, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, + 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x36, 0x30, 0x32, 0x35, 0x30, 0x35, 0x41, 0x36, 0x30, + 0x32, 0x46, 0x37, 0x32, 0x30, 0x30, 0x39, 0x37, 0x42, 0x30, 0x33, 0x41, + 0x31, 0x32, 0x30, 0x32, 0x35, 0x30, 0x33, 0x41, 0x36, 0x30, 0x31, 0x46, + 0x37, 0x37, 0x42, 0x30, 0x33, 0x38, 0x30, 0x0a, 0x3a, 0x30, 0x43, 0x30, + 0x31, 0x34, 0x30, 0x30, 0x30, 0x39, 0x37, 0x34, 0x46, 0x30, 0x32, 0x35, + 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, 0x46, 0x30, + 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x31, 0x38, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x44, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, + 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, 0x30, 0x39, + 0x38, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, 0x31, 0x35, + 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, 0x43, 0x32, + 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x37, 0x45, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x41, 0x30, 0x30, 0x30, 0x35, 0x42, 0x33, + 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, 0x44, 0x36, + 0x30, 0x38, 0x43, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, + 0x43, 0x41, 0x32, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x43, 0x30, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, 0x39, 0x38, + 0x38, 0x43, 0x44, 0x30, 0x31, 0x45, 0x42, 0x35, 0x42, 0x30, 0x33, 0x37, + 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x44, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, 0x32, 0x30, + 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, 0x30, 0x0a, 0x3a, 0x31, 0x34, 0x30, + 0x31, 0x45, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, 0x36, 0x43, + 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, 0x44, 0x38, + 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, 0x34, 0x39, + 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x43, 0x36, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, 0x36, 0x35, + 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, 0x33, 0x41, + 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, 0x37, 0x46, + 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, 0x33, 0x32, + 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x38, 0x43, 0x38, + 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x37, 0x37, 0x44, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, 0x30, 0x30, + 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, 0x33, 0x43, + 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, 0x3a, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_128k_2_1_ihx_len = 814; diff --git a/RAM_Routines/write_erase/erase_write_ver_128k_2.2_inc.h b/RAM_Routines/write_erase/erase_write_ver_128k_2.2_inc.h new file mode 100644 index 0000000..43c1e0c --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_128k_2.2_inc.h @@ -0,0 +1,92 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_128k_2_2_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x42, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x41, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x38, 0x41, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x46, 0x33, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x42, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x38, 0x45, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x38, 0x31, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x41, 0x45, 0x30, 0x30, 0x38, 0x41, 0x37, 0x46, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x38, 0x31, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x34, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x41, 0x31, 0x38, 0x30, 0x32, + 0x36, 0x31, 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x30, 0x39, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, + 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x36, 0x30, 0x32, 0x35, 0x30, 0x35, 0x41, 0x36, 0x30, + 0x32, 0x46, 0x37, 0x32, 0x30, 0x30, 0x39, 0x37, 0x42, 0x30, 0x33, 0x41, + 0x31, 0x32, 0x30, 0x32, 0x35, 0x30, 0x33, 0x41, 0x36, 0x30, 0x31, 0x46, + 0x37, 0x37, 0x42, 0x30, 0x33, 0x38, 0x30, 0x0a, 0x3a, 0x30, 0x43, 0x30, + 0x31, 0x34, 0x30, 0x30, 0x30, 0x39, 0x37, 0x34, 0x46, 0x30, 0x32, 0x35, + 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, 0x46, 0x30, + 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x31, 0x38, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x43, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, + 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, 0x30, 0x39, + 0x38, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, 0x31, 0x35, + 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, 0x43, 0x32, + 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x37, 0x46, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x41, 0x30, 0x30, 0x30, 0x35, 0x42, 0x33, + 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, 0x44, 0x36, + 0x30, 0x38, 0x41, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, + 0x43, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x43, 0x30, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, 0x39, 0x38, + 0x38, 0x43, 0x44, 0x30, 0x31, 0x45, 0x42, 0x35, 0x42, 0x30, 0x33, 0x37, + 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x43, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, 0x32, 0x30, + 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, 0x31, 0x0a, 0x3a, 0x31, 0x34, 0x30, + 0x31, 0x45, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, 0x36, 0x43, + 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, 0x43, 0x38, + 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, 0x34, 0x39, + 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x43, 0x37, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, 0x36, 0x35, + 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, 0x33, 0x41, + 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, 0x37, 0x46, + 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, 0x33, 0x32, + 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x38, 0x41, 0x38, + 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x37, 0x37, 0x46, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, 0x30, 0x30, + 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, 0x33, 0x43, + 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, 0x3a, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_128k_2_2_ihx_len = 814; diff --git a/RAM_Routines/write_erase/erase_write_ver_128k_2.4_inc.h b/RAM_Routines/write_erase/erase_write_ver_128k_2.4_inc.h new file mode 100644 index 0000000..1d1e924 --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_128k_2.4_inc.h @@ -0,0 +1,92 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_128k_2_4_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x42, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x41, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x38, 0x41, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x46, 0x33, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x42, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x38, 0x45, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x38, 0x31, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x41, 0x45, 0x30, 0x30, 0x38, 0x41, 0x37, 0x46, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x38, 0x31, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x34, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x41, 0x31, 0x38, 0x30, 0x32, + 0x36, 0x31, 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x30, 0x39, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, + 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x36, 0x30, 0x32, 0x35, 0x30, 0x35, 0x41, 0x36, 0x30, + 0x32, 0x46, 0x37, 0x32, 0x30, 0x30, 0x39, 0x37, 0x42, 0x30, 0x33, 0x41, + 0x31, 0x32, 0x30, 0x32, 0x35, 0x30, 0x33, 0x41, 0x36, 0x30, 0x31, 0x46, + 0x37, 0x37, 0x42, 0x30, 0x33, 0x38, 0x30, 0x0a, 0x3a, 0x30, 0x43, 0x30, + 0x31, 0x34, 0x30, 0x30, 0x30, 0x39, 0x37, 0x34, 0x46, 0x30, 0x32, 0x35, + 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, 0x46, 0x30, + 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x31, 0x38, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x43, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, + 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, 0x30, 0x39, + 0x38, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, 0x31, 0x35, + 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, 0x43, 0x32, + 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x37, 0x46, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x41, 0x30, 0x30, 0x30, 0x35, 0x42, 0x33, + 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, 0x46, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, 0x44, 0x36, + 0x30, 0x38, 0x41, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, + 0x43, 0x41, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x43, 0x30, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, 0x39, 0x38, + 0x38, 0x43, 0x44, 0x30, 0x31, 0x45, 0x42, 0x35, 0x42, 0x30, 0x33, 0x37, + 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x43, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, 0x32, 0x30, + 0x43, 0x30, 0x30, 0x38, 0x45, 0x30, 0x31, 0x0a, 0x3a, 0x31, 0x34, 0x30, + 0x31, 0x45, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, 0x36, 0x43, + 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, 0x43, 0x38, + 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, 0x34, 0x39, + 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x43, 0x37, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, 0x36, 0x35, + 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, 0x33, 0x41, + 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, 0x37, 0x46, + 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, 0x33, 0x32, + 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x38, 0x41, 0x38, + 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x37, 0x37, 0x46, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, 0x30, 0x30, + 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, 0x33, 0x43, + 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, 0x3a, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_128k_2_4_ihx_len = 814; diff --git a/RAM_Routines/write_erase/erase_write_ver_32k_1.0_inc.h b/RAM_Routines/write_erase/erase_write_ver_32k_1.0_inc.h new file mode 100644 index 0000000..f57072b --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_32k_1.0_inc.h @@ -0,0 +1,85 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_32k_1_0_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x37, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x45, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x35, 0x46, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x31, 0x45, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x37, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x39, 0x32, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x32, 0x30, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x41, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x32, 0x30, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x39, 0x37, 0x34, 0x46, 0x30, + 0x32, 0x33, 0x39, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x35, 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, + 0x46, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x46, 0x0a, 0x3a, 0x32, + 0x30, 0x30, 0x31, 0x32, 0x46, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x38, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, + 0x45, 0x30, 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, + 0x30, 0x39, 0x34, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, + 0x31, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, + 0x43, 0x32, 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x44, + 0x38, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x34, 0x46, 0x30, 0x30, 0x35, + 0x42, 0x33, 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x34, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, + 0x31, 0x43, 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, + 0x44, 0x36, 0x30, 0x35, 0x46, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, + 0x31, 0x39, 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x37, 0x31, 0x43, 0x32, 0x34, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x36, + 0x46, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, + 0x39, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x39, 0x41, 0x35, 0x42, 0x30, + 0x33, 0x37, 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, + 0x30, 0x30, 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, + 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x41, 0x37, 0x0a, 0x3a, 0x31, + 0x34, 0x30, 0x31, 0x38, 0x46, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x38, 0x38, 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, + 0x34, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x31, + 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, + 0x36, 0x35, 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, + 0x33, 0x41, 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, + 0x37, 0x46, 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, + 0x33, 0x32, 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x35, + 0x46, 0x38, 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, + 0x30, 0x46, 0x37, 0x41, 0x41, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, + 0x30, 0x30, 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, + 0x33, 0x43, 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, + 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_32k_1_0_ihx_len = 732; diff --git a/RAM_Routines/write_erase/erase_write_ver_32k_1.2_inc.h b/RAM_Routines/write_erase/erase_write_ver_32k_1.2_inc.h new file mode 100644 index 0000000..02874d7 --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_32k_1.2_inc.h @@ -0,0 +1,85 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_32k_1_2_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x37, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x45, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x36, 0x44, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x31, 0x30, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x37, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x39, 0x32, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x32, 0x30, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x41, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x32, 0x30, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x39, 0x37, 0x34, 0x46, 0x30, + 0x32, 0x33, 0x39, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x35, 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, + 0x46, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x46, 0x0a, 0x3a, 0x32, + 0x30, 0x30, 0x31, 0x35, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x38, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, + 0x45, 0x30, 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, + 0x30, 0x39, 0x34, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, + 0x31, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, + 0x43, 0x32, 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x42, + 0x37, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x37, 0x30, 0x30, 0x30, 0x35, + 0x42, 0x33, 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x34, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, + 0x31, 0x43, 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, + 0x44, 0x36, 0x30, 0x36, 0x44, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, + 0x31, 0x39, 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x37, 0x31, 0x43, 0x46, 0x35, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x39, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, + 0x39, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x42, 0x42, 0x35, 0x42, 0x30, + 0x33, 0x37, 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, + 0x30, 0x30, 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, + 0x30, 0x39, 0x38, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, + 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x36, 0x35, 0x0a, 0x3a, 0x31, + 0x34, 0x30, 0x31, 0x42, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x38, 0x38, 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, + 0x34, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x46, + 0x42, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, + 0x36, 0x35, 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, + 0x33, 0x41, 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, + 0x37, 0x46, 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, + 0x33, 0x32, 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x36, + 0x44, 0x38, 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, + 0x30, 0x46, 0x37, 0x39, 0x43, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, + 0x30, 0x30, 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, + 0x33, 0x43, 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, + 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_32k_1_2_ihx_len = 732; diff --git a/RAM_Routines/write_erase/erase_write_ver_32k_1.3_inc.h b/RAM_Routines/write_erase/erase_write_ver_32k_1.3_inc.h new file mode 100644 index 0000000..43e422b --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_32k_1.3_inc.h @@ -0,0 +1,85 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_32k_1_3_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x36, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x46, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x36, 0x35, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x31, 0x38, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x36, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x39, 0x33, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x32, 0x30, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x41, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x32, 0x30, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x39, 0x37, 0x34, 0x46, 0x30, + 0x32, 0x33, 0x39, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x35, 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, + 0x46, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x46, 0x0a, 0x3a, 0x32, + 0x30, 0x30, 0x31, 0x35, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x37, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, + 0x45, 0x30, 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, + 0x30, 0x39, 0x34, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, + 0x31, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, + 0x43, 0x32, 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x42, + 0x38, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x37, 0x30, 0x30, 0x30, 0x35, + 0x42, 0x33, 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x34, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, + 0x31, 0x43, 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, + 0x44, 0x36, 0x30, 0x36, 0x35, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, + 0x31, 0x39, 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x37, 0x31, 0x43, 0x46, 0x44, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x39, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, + 0x39, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x42, 0x42, 0x35, 0x42, 0x30, + 0x33, 0x37, 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, + 0x30, 0x30, 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, + 0x30, 0x39, 0x37, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, + 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x36, 0x36, 0x0a, 0x3a, 0x31, + 0x34, 0x30, 0x31, 0x42, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x37, 0x38, 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, + 0x34, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x46, + 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, + 0x36, 0x35, 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, + 0x33, 0x41, 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, + 0x37, 0x46, 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, + 0x33, 0x32, 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x36, + 0x35, 0x38, 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, + 0x30, 0x46, 0x37, 0x41, 0x34, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, + 0x30, 0x30, 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, + 0x33, 0x43, 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, + 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_32k_1_3_ihx_len = 732; diff --git a/RAM_Routines/write_erase/erase_write_ver_32k_1.4_inc.h b/RAM_Routines/write_erase/erase_write_ver_32k_1.4_inc.h new file mode 100644 index 0000000..7434bac --- /dev/null +++ b/RAM_Routines/write_erase/erase_write_ver_32k_1.4_inc.h @@ -0,0 +1,85 @@ +/******************************************************************************* + * + * Replacement open-source erase/write RAM routines for STM8 ROM bootloader + * https://github.com/basilhussain/stm8-bootloader-erase-write + * + * Copyright 2021 Basil Hussain + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +unsigned char bin_erase_write_ver_32k_1_4_ihx[] = { + 0x3a, 0x32, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x38, 0x39, 0x37, + 0x32, 0x35, 0x46, 0x30, 0x30, 0x39, 0x36, 0x37, 0x32, 0x30, 0x38, 0x30, + 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, 0x30, 0x30, 0x33, 0x43, 0x44, 0x30, + 0x31, 0x30, 0x31, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, 0x31, 0x43, + 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x33, 0x41, 0x35, 0x46, 0x37, + 0x42, 0x30, 0x31, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, 0x30, 0x46, + 0x36, 0x39, 0x46, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x30, 0x43, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x30, 0x38, 0x38, 0x34, 0x30, + 0x46, 0x30, 0x32, 0x37, 0x42, 0x30, 0x32, 0x41, 0x31, 0x30, 0x38, 0x32, + 0x34, 0x32, 0x31, 0x43, 0x44, 0x36, 0x30, 0x36, 0x33, 0x33, 0x35, 0x32, + 0x30, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x44, 0x46, 0x35, 0x30, 0x35, + 0x43, 0x43, 0x44, 0x30, 0x30, 0x46, 0x34, 0x43, 0x44, 0x30, 0x33, 0x30, + 0x30, 0x43, 0x37, 0x30, 0x30, 0x31, 0x41, 0x0a, 0x3a, 0x32, 0x30, 0x30, + 0x30, 0x45, 0x30, 0x30, 0x30, 0x39, 0x36, 0x43, 0x45, 0x30, 0x30, 0x38, + 0x42, 0x31, 0x43, 0x30, 0x30, 0x38, 0x30, 0x43, 0x46, 0x30, 0x30, 0x38, + 0x42, 0x30, 0x43, 0x30, 0x32, 0x32, 0x30, 0x44, 0x39, 0x30, 0x43, 0x30, + 0x31, 0x32, 0x30, 0x42, 0x46, 0x38, 0x35, 0x38, 0x31, 0x35, 0x46, 0x34, + 0x46, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x35, 0x43, 0x41, + 0x33, 0x30, 0x30, 0x30, 0x34, 0x32, 0x35, 0x46, 0x36, 0x39, 0x33, 0x0a, + 0x3a, 0x32, 0x30, 0x30, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x31, 0x34, + 0x42, 0x32, 0x30, 0x43, 0x44, 0x30, 0x33, 0x31, 0x30, 0x38, 0x34, 0x38, + 0x31, 0x33, 0x35, 0x30, 0x30, 0x30, 0x30, 0x38, 0x41, 0x37, 0x42, 0x30, + 0x33, 0x41, 0x31, 0x32, 0x30, 0x32, 0x36, 0x30, 0x39, 0x33, 0x35, 0x30, + 0x30, 0x30, 0x30, 0x38, 0x43, 0x33, 0x35, 0x34, 0x30, 0x30, 0x30, 0x38, + 0x42, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x39, 0x37, 0x34, 0x46, 0x30, + 0x32, 0x33, 0x39, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x31, 0x32, 0x30, 0x30, + 0x30, 0x35, 0x38, 0x35, 0x38, 0x31, 0x43, 0x38, 0x30, 0x30, 0x30, 0x43, + 0x46, 0x30, 0x30, 0x38, 0x42, 0x38, 0x31, 0x41, 0x46, 0x0a, 0x3a, 0x32, + 0x30, 0x30, 0x31, 0x35, 0x30, 0x30, 0x30, 0x38, 0x38, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x37, 0x37, 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, + 0x45, 0x30, 0x32, 0x32, 0x30, 0x31, 0x39, 0x37, 0x32, 0x30, 0x30, 0x30, + 0x30, 0x39, 0x34, 0x30, 0x32, 0x32, 0x30, 0x30, 0x41, 0x33, 0x35, 0x38, + 0x31, 0x35, 0x30, 0x35, 0x42, 0x33, 0x35, 0x37, 0x45, 0x35, 0x30, 0x35, + 0x43, 0x32, 0x30, 0x30, 0x38, 0x33, 0x35, 0x30, 0x31, 0x35, 0x30, 0x42, + 0x38, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x37, 0x30, 0x30, 0x30, 0x35, + 0x42, 0x33, 0x35, 0x46, 0x45, 0x35, 0x30, 0x35, 0x43, 0x37, 0x32, 0x35, + 0x46, 0x30, 0x30, 0x39, 0x34, 0x30, 0x46, 0x30, 0x31, 0x37, 0x42, 0x30, + 0x31, 0x43, 0x31, 0x30, 0x30, 0x38, 0x38, 0x32, 0x32, 0x32, 0x41, 0x43, + 0x44, 0x36, 0x30, 0x36, 0x33, 0x39, 0x30, 0x35, 0x46, 0x37, 0x42, 0x30, + 0x31, 0x39, 0x30, 0x39, 0x37, 0x35, 0x46, 0x37, 0x42, 0x30, 0x31, 0x39, + 0x37, 0x31, 0x43, 0x46, 0x46, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x31, 0x39, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x46, 0x36, 0x39, 0x30, 0x38, + 0x39, 0x38, 0x38, 0x43, 0x44, 0x30, 0x31, 0x42, 0x42, 0x35, 0x42, 0x30, + 0x33, 0x37, 0x32, 0x30, 0x44, 0x30, 0x30, 0x38, 0x45, 0x30, 0x32, 0x32, + 0x30, 0x30, 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, + 0x30, 0x39, 0x37, 0x30, 0x43, 0x30, 0x31, 0x32, 0x30, 0x43, 0x46, 0x37, + 0x32, 0x30, 0x43, 0x30, 0x30, 0x38, 0x45, 0x36, 0x36, 0x0a, 0x3a, 0x31, + 0x34, 0x30, 0x31, 0x42, 0x30, 0x30, 0x30, 0x30, 0x32, 0x32, 0x30, 0x30, + 0x36, 0x43, 0x44, 0x30, 0x33, 0x30, 0x30, 0x43, 0x37, 0x30, 0x30, 0x39, + 0x37, 0x38, 0x34, 0x38, 0x31, 0x37, 0x42, 0x30, 0x33, 0x31, 0x45, 0x30, + 0x34, 0x39, 0x32, 0x41, 0x37, 0x30, 0x30, 0x38, 0x41, 0x38, 0x31, 0x46, + 0x43, 0x0a, 0x3a, 0x32, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x30, 0x43, + 0x36, 0x35, 0x30, 0x35, 0x46, 0x41, 0x35, 0x30, 0x31, 0x32, 0x37, 0x30, + 0x33, 0x41, 0x36, 0x30, 0x31, 0x38, 0x31, 0x41, 0x35, 0x30, 0x34, 0x32, + 0x37, 0x46, 0x32, 0x34, 0x46, 0x38, 0x31, 0x34, 0x46, 0x31, 0x31, 0x30, + 0x33, 0x32, 0x32, 0x30, 0x45, 0x38, 0x38, 0x43, 0x44, 0x36, 0x30, 0x36, + 0x33, 0x38, 0x34, 0x35, 0x46, 0x39, 0x37, 0x31, 0x43, 0x30, 0x30, 0x30, + 0x30, 0x46, 0x37, 0x41, 0x36, 0x0a, 0x3a, 0x30, 0x39, 0x30, 0x33, 0x32, + 0x30, 0x30, 0x30, 0x34, 0x43, 0x32, 0x30, 0x45, 0x45, 0x37, 0x42, 0x30, + 0x33, 0x43, 0x37, 0x30, 0x30, 0x38, 0x38, 0x38, 0x31, 0x32, 0x43, 0x0a, + 0x3a, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x46, 0x46, 0x0a +}; +unsigned int bin_erase_write_ver_32k_1_4_ihx_len = 732; diff --git a/README.md b/README.md index 25cdfcf..b13abc3 100644 --- a/README.md +++ b/README.md @@ -19,7 +19,9 @@ Georg # License / Disclaimer - _stm8gal_ and it's source code is distributed under the Apache License Version 2.0 (see [License](LICENSE)) -- exception is some RAM code, which is required for flash programming. This code is available on the [STM Homepage](http://www.st.com/web/catalog/tools/FM147/CL1794/SC1807/SS1754/PF258008). All rights to this RAM code remain with STM under the provided, proprietary license. +- required flash write/erase RAM routines by Basil Hussain is distributed under the Apache License Version 2.0. Sources are available from [https://github.com/basilhussain/stm8-bootloader-erase-write](https://github.com/basilhussain/stm8-bootloader-erase-write) + +- optimized CRC32 calculation by Basil Hussain is distributed under the MIT License. Sources are available from [https://github.com/basilhussain/stm8-crc](https://github.com/basilhussain/stm8-crc) *** @@ -313,6 +315,14 @@ If you are aware of bugs, please drop me a note or start an [issue](https://gith # Revision History +v1.5.0 (2021-01-23) + - replaced write/erase RAM routines by STM with OSS routines (see https://github.com/gicking/stm8gal/issues/4) + - removed STM8S 32kB v1.4 and 128kB v2.4. According to STM support were never released and development is stopped + - removed STM8S 256kB v1.0. According to STM support variant was never released and development is stopped + - fixed bug in v1.4.3 which prevented flash write/erase after CRC32-verify + +---------------- + v1.4.3 (2021-01-09) - fixed bug in SPI read-back after write - fixed bug in CRC32-verify (see https://github.com/gicking/stm8gal/issues/20) diff --git a/bootloader.c b/bootloader.c index 69bd562..004924b 100644 --- a/bootloader.c +++ b/bootloader.c @@ -22,6 +22,15 @@ #include #endif +// device dependent flash w/e routines (from https://github.com/basilhussain/stm8-bootloader-erase-write) +#include "erase_write_verL_8k_1.0_inc.h" +#include "erase_write_ver_32k_1.0_inc.h" +#include "erase_write_ver_32k_1.2_inc.h" +#include "erase_write_ver_32k_1.3_inc.h" +#include "erase_write_ver_128k_2.0_inc.h" +#include "erase_write_ver_128k_2.1_inc.h" +#include "erase_write_ver_128k_2.2_inc.h" + /** \fn uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) @@ -34,8 +43,8 @@ synchronize with microcontroller bootloader. For UART synchronize baudrate. */ -uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) { - +uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) +{ int i, count; int lenTx, lenRx, len; char Tx[1000], Rx[1000]; @@ -67,8 +76,8 @@ uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) { // synchronize. Repeat until NACK received (problems re-synchronizing with ACK -> wait for NACK) count = 0; - do { - + do + { // send command if (physInterface == UART) len = send_port(ptrPort, 0, lenTx, Tx); @@ -82,9 +91,11 @@ uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) { Error("in 'bsl_sync()': sending command failed (expect %d, sent %d)", lenTx, len); // receive response - if (physInterface == UART) { + if (physInterface == UART) + { len = receive_port(ptrPort, 0, lenRx, Rx); - if ((len==1) && (Rx[0]== Tx[0])) { // check for 1-wire echo + if ((len==1) && (Rx[0]== Tx[0])) + { // check for 1-wire echo len = receive_port(ptrPort, 0, lenRx, Rx); } } @@ -104,13 +115,15 @@ uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) { } while ((count<50) && ((len!=lenRx) || ((Rx[0]!=ACK) && (Rx[0]!=NACK)))); // check if ok - if ((len==lenRx) && (Rx[0]==ACK)) { + if ((len==lenRx) && (Rx[0]==ACK)) + { if (verbose == SILENT) printf("done\n"); else if (verbose > SILENT) printf("done (ACK)\n"); } - else if ((len==lenRx) && (Rx[0]==NACK)) { + else if ((len==lenRx) && (Rx[0]==NACK)) + { if (verbose == SILENT) printf("done\n"); else if (verbose > SILENT) @@ -147,8 +160,8 @@ uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose) { auto-detect UART bootloader mode (see AppNote UM0560). This information is required to set the correct data parity and determine if local echo is required. */ -uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) { - +uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) +{ int len, lenTx, lenRx; char Tx[1000], Rx[1000]; uint8_t uartMode = 255; @@ -165,7 +178,8 @@ uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) { set_parity(ptrPort, 2); lenTx = 2; lenRx = 1; Tx[0] = 0x00; Tx[1] = (Tx[0] ^ 0xFF); Rx[0] = 0x00; - do { + do + { len = send_port(ptrPort, 0, lenTx, Tx); len = receive_port(ptrPort, 0, lenRx, Rx); //printf("\nmode 1: %d 0x%02x\n", len, (uint8_t) (Rx[0])); @@ -173,15 +187,18 @@ uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) { } while (len==0); // tested empirically... - if (Rx[0] == ACK) { // UART mode 0: 2-wire duplex, no SW reply, even parity + if (Rx[0] == ACK) // UART mode 0: 2-wire duplex, no SW reply, even parity + { uartMode = 0; set_parity(ptrPort, 2); } - else if (Rx[0] == Tx[0]) { // UART mode 1: 1-wire reply, no SW reply, no parity + else if (Rx[0] == Tx[0]) // UART mode 1: 1-wire reply, no SW reply, no parity + { uartMode = 1; set_parity(ptrPort, 0); } - else if (Rx[0] == NACK) { // UART mode 2: 2-wire reply, SW reply, no parity + else if (Rx[0] == NACK) // UART mode 2: 2-wire reply, SW reply, no parity + { uartMode = 2; set_parity(ptrPort, 0); } @@ -195,7 +212,8 @@ uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) { flush_port(ptrPort); // print message - if (verbose == CHATTY) { + if (verbose == CHATTY) + { if (uartMode == 0) printf("done (duplex)\n"); else if (uartMode == 1) @@ -225,11 +243,129 @@ uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose) { \return communication status (0=ok, 1=fail) + upload RAM routines required for flash write & erase. Respective RAM routines depend on device family, bootloader version and flash size. + Used RAM routines under OSS license are from https://github.com/basilhussain/stm8-bootloader-erase-write. + Optionally proprietary STM RAM routines are available from http://www.st.com/web/catalog/tools/FM147/CL1794/SC1807/SS1754/PF258008 +*/ +uint8_t bsl_uploadWriteErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int flashsize, uint8_t versBSL, uint8_t family, uint8_t verbose) +{ + char *ptrRAM = NULL; // pointer to array with RAM routines + int lenRAM; // length of RAM array + uint16_t *imageBuf; // RAM image buffer (high byte != 0 indicates value is set) + uint64_t addrStart, addrStop, numData; // image data range + + // STM8L >8kB does not need to upload RAM routines -> Skip + if ((family == STM8L) && (flashsize>8)) + return(0); + + // for STM8S and STM8L 8kB upload device dependent RAM routines + if ((flashsize==8) && (versBSL==0x10)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_verL_8k_1_0_ihx; + lenRAM = bin_erase_write_verL_8k_1_0_ihx_len; + } + else if ((flashsize==32) && (versBSL==0x10)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_0_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_32k_1_0_ihx; + lenRAM = bin_erase_write_ver_32k_1_0_ihx_len; + } + else if ((flashsize==32) && (versBSL==0x12)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_2_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_32k_1_2_ihx; + lenRAM = bin_erase_write_ver_32k_1_2_ihx_len; + } + else if ((flashsize==32) && (versBSL==0x13)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_3_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_32k_1_3_ihx; + lenRAM = bin_erase_write_ver_32k_1_3_ihx_len; + } + else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x20)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_0_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_128k_2_0_ihx; + lenRAM = bin_erase_write_ver_128k_2_0_ihx_len; + } + else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x21)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_1_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_128k_2_1_ihx; + lenRAM = bin_erase_write_ver_128k_2_1_ihx_len; + } + else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x22)) + { + #ifdef DEBUG + printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_2_s19 \n"); + #endif + ptrRAM = (char*) bin_erase_write_ver_128k_2_2_ihx; + lenRAM = bin_erase_write_ver_128k_2_2_ihx_len; + } + else + Error("unsupported device"); + + + // allocate and init RAM image (>1MByte requires dynamic allocation) + if (!(imageBuf = malloc((LENIMAGEBUF + 1) * sizeof(*imageBuf)))) + Error("Cannot allocate image buffer, try reducing LENIMAGEBUF"); + memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); + + // convert correct array containing ihx file to RAM image + convert_ihx(ptrRAM, lenRAM, imageBuf, MUTE); + + // get image size + get_image_size(imageBuf, 0, LENIMAGEBUF, &addrStart, &addrStop, &numData); + + // upload RAM routines to STM8 + if (verbose == CHATTY) + printf(" upload RAM routines ... "); + fflush(stdout); + bsl_memWrite(ptrPort, physInterface, uartMode, imageBuf, addrStart, addrStop, MUTE); + if (verbose == CHATTY) + printf("done (%dB in 0x%" PRIx64 " - 0x%" PRIx64 ")\n", (int) numData, addrStart, addrStop); + fflush(stdout); + + // release memory for image + free(imageBuf); + + // return success + return(0); + +} // bsl_uploadWriteErase + + +/** + \fn uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int *flashsize, uint8_t *versBSL, uint8_t *family, uint8_t verbose) + + \param[in] ptrPort handle to communication port + \param[in] physInterface bootloader interface: 0=UART (default), 1=SPI via Arduino, 2=SPI via SPIDEV + \param[in] uartMode UART bootloader mode: 0=duplex, 1=1-wire, 2=2-wire reply + \param[out] flashsize size of flashsize in kB (required for correct W/E routines) + \param[out] versBSL BSL version number (required for correct W/E routines) + \param[out] family STM8 family (STM8S=1, STM8L=2) + \param[in] verbose verbosity level (0=SILENT, 1=INFORM, 2=CHATTY) + + \return communication status (0=ok, 1=fail) + query microcontroller type and BSL version info. This information is required to select correct version of flash write/erase routines */ -uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int *flashsize, uint8_t *vers, uint8_t *family, uint8_t verbose) { - +uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int *flashsize, uint8_t *versBSL, uint8_t *family, uint8_t verbose) +{ int i; int lenTx, lenRx, len; char Tx[1000], Rx[1000]; @@ -256,7 +392,8 @@ uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int ///////// // reduce timeout for faster check - if (physInterface == UART) { + if (physInterface == UART) + { set_timeout(ptrPort, 200); } @@ -295,7 +432,8 @@ uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int #endif // restore timeout to avoid timeouts during flash operation - if (physInterface == UART) { + if (physInterface == UART) + { set_timeout(ptrPort, TIMEOUT); } @@ -366,24 +504,26 @@ uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int #endif // copy version number - *vers = Rx[2]; + *versBSL = Rx[2]; // print message - if (*family == STM8S) { + if (*family == STM8S) + { if (verbose == SILENT) printf("done (STM8S; %dkB)\n", *flashsize); else if (verbose == INFORM) printf("done (STM8S; %dkB flash)\n", *flashsize); else if (verbose == CHATTY) - printf("done (STM8S; %dkB flash; BSL v%x.%x)\n", *flashsize, (((*vers)&0xF0)>>4), ((*vers) & 0x0F)); + printf("done (STM8S; %dkB flash; BSL v%x.%x)\n", *flashsize, (((*versBSL)&0xF0)>>4), ((*versBSL) & 0x0F)); } - else { + else + { if (verbose == SILENT) printf("done (STM8L; %dkB)\n", *flashsize); else if (verbose == INFORM) printf("done (STM8L; %dkB flash)\n", *flashsize); else if (verbose == CHATTY) - printf("done (STM8L; %dkB flash; BSL v%x.%x)\n", *flashsize, (((*vers)&0xF0)>>4), ((*vers) & 0x0F)); + printf("done (STM8L; %dkB flash; BSL v%x.%x)\n", *flashsize, (((*versBSL)&0xF0)>>4), ((*versBSL) & 0x0F)); } fflush(stdout); @@ -409,8 +549,8 @@ uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int read from microcontroller memory via READ command. */ -uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addrStart, uint64_t addrStop, uint16_t *imageBuf, uint8_t verbose) { - +uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addrStart, uint64_t addrStop, uint16_t *imageBuf, uint8_t verbose) +{ int i, lenTx, lenRx, len; char Tx[1000], Rx[1000]; uint64_t addr, addrStep, numBytes, countBytes; @@ -419,19 +559,22 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin numBytes = addrStop - addrStart + 1; // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { if (numBytes > 1024) printf(" read %1.1fkB ", (float) numBytes/1024.0); else printf(" read %dB ", (int) numBytes); } - else if (verbose == INFORM) { + else if (verbose == INFORM) + { if (numBytes > 1024) printf(" read %1.1fkB ", (float) numBytes/1024.0); else printf(" read %dB ", (int) numBytes); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numBytes > 1024) printf(" read %1.1fkB in 0x%" PRIx64 " to 0x%" PRIx64 " ", (float) numBytes/1024.0, addrStart, addrStop); else @@ -463,8 +606,8 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin // loop over addresses in 128B steps (required by SPI via Arduino) countBytes = 0; addrStep = 128; - for (addr=addrStart; addr<=addrStop; addr+=addrStep) { - + for (addr=addrStart; addr<=addrStop; addr+=addrStep) + { // if addr too close to end of range reduce stepsize if (addr+128 > addrStop) addrStep = addrStop - addr + 1; @@ -583,7 +726,8 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin //fprintf(stderr, "%d\n", (int) lenRx); } #if defined(USE_SPIDEV) - else if (physInterface == SPI_SPIDEV) { + else if (physInterface == SPI_SPIDEV) + { len = receive_spi_spidev(ptrPort, lenRx, Rx); //fprintf(stderr, "%d\n", (int) lenRx); } @@ -596,26 +740,31 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin Error("in 'bsl_memRead()': at 0x%02x ACK3 failure (expect 0x%02x, received 0x%02x)", addr, (uint8_t) ACK, (uint8_t) (Rx[0])); // copy data to buffer. Set HB to indicate data read - for (i=1; i 1024) printf("%c read %1.1fkB / %1.1fkB ", '\r', (float) countBytes/1024.0, (float) numBytes/1024.0); else printf("%c read %dB / %dB ", '\r', (int) countBytes, (int) numBytes); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numBytes > 1024) printf("%c read %1.1fkB / %1.1fkB from 0x%" PRIx64 " to 0x%" PRIx64 " ", '\r', (float) countBytes/1024.0, (float) numBytes/1024.0, addrStart, addrStop); else @@ -630,13 +779,15 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin // print message if (verbose == SILENT) printf(" done\n"); - else if (verbose == INFORM) { + else if (verbose == INFORM) + { if (numBytes > 1024) printf("%c read %1.1fkB / %1.1fkB ... done \n", '\r', (float) countBytes/1024.0, (float) numBytes/1024.0); else printf("%c read %dB / %dB ... done \n", '\r', (int) countBytes, (int) numBytes); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numBytes > 1024) printf("%c read %1.1fkB / %1.1fkB from 0x%" PRIx64 " to 0x%" PRIx64 " ... done \n", '\r', (float) countBytes/1024.0, (float) numBytes/1024.0, addrStart, addrStop); else @@ -665,8 +816,8 @@ uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uin check if microcontrolles address exists. Specifically read 1B from microcontroller memory via READ command. If it fails, memory doesn't exist. Used to get STM8 type */ -uint8_t bsl_memCheck(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) { - +uint8_t bsl_memCheck(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) +{ int i, lenTx, lenRx, len; char Tx[1000], Rx[1000]; @@ -757,7 +908,8 @@ uint8_t bsl_memCheck(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui Error("in 'bsl_memCheck()': at 0x%02x ACK2 timeout (expect %d, received %d)", addr, lenRx, len); // check acknowledge -> on NACK memory cannot be read -> return 0 - if (Rx[0]!=ACK) { + if (Rx[0]!=ACK) + { return(0); } @@ -820,8 +972,8 @@ uint8_t bsl_memCheck(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui sector erase for microcontroller flash. Use with care! */ -uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) { - +uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) +{ int i; int lenTx, lenRx, len; char Tx[1000], Rx[1000]; @@ -832,13 +984,16 @@ uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uart sector = (addr - PFLASH_START)/PFLASH_BLOCKSIZE; // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { printf(" erase sector ... "); } - else if (verbose == INFORM) { + else if (verbose == INFORM) + { printf(" erase flash sector %d ... ", (int) sector); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (addr>0xFFFFFF) printf(" erase flash sector %d @ 0x%" PRIx64 " ... ", (int) sector, addr); else if (addr>0xFFFF) @@ -945,12 +1100,14 @@ uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uart // receive response if (physInterface == UART) len = receive_port(ptrPort, uartMode, lenRx, Rx); - else if (physInterface == SPI_ARDUINO) { + else if (physInterface == SPI_ARDUINO) + { SLEEP(40); // wait >30ms*(N=0+1) for sector erase before requesting response (see UM0560, SPI timing) len = receive_spi_Arduino(ptrPort, lenRx, Rx); } #if defined(USE_SPIDEV) - else if (physInterface == SPI_SPIDEV) { + else if (physInterface == SPI_SPIDEV) + { SLEEP(40); // wait >30ms*(N=0+1) for sector erase before requesting response (see UM0560, SPI timing) len = receive_spi_spidev(ptrPort, lenRx, Rx); } @@ -970,10 +1127,12 @@ uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uart // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { printf("done\n"); } - else if ((verbose == INFORM) || (verbose == CHATTY)) { + else if ((verbose == INFORM) || (verbose == CHATTY)) + { printf("done, time %dms\n", (int)(tStop-tStart)); } fflush(stdout); @@ -997,17 +1156,19 @@ uint8_t bsl_flashSectorErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uart mass erase microcontroller P-flash and D-flash/EEPROM. Use with care! */ -uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint8_t verbose) { - +uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint8_t verbose) +{ int i, lenTx, lenRx, len; char Tx[1000], Rx[1000]; uint64_t tStart, tStop; // measure time [ms] for erase (for COMM timeout) // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { printf(" mass erase ... "); } - else if ((verbose == INFORM) || (verbose == CHATTY)) { + else if ((verbose == INFORM) || (verbose == CHATTY)) + { printf(" flash mass erase ... "); } fflush(stdout); @@ -1065,8 +1226,8 @@ uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMo // send 0xFF+0x00 to trigger mass erase ///// - // increase timeout for long erase. Measured 3.3s for 128kB STM8 -> set to 4s - set_timeout(ptrPort, 4000); + // increase timeout for long erase. Measured 3.3s for 128kB STM8 -> set to 5s + set_timeout(ptrPort, 10000); // construct pattern lenTx = 2; @@ -1093,12 +1254,14 @@ uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMo // receive response if (physInterface == UART) len = receive_port(ptrPort, uartMode, lenRx, Rx); - else if (physInterface == SPI_ARDUINO) { + else if (physInterface == SPI_ARDUINO) + { SLEEP(1100); // wait >30ms*(N=32+1) for sector erase before requesting response (see UM0560, SPI timing) len = receive_spi_Arduino(ptrPort, lenRx, Rx); } #if defined(USE_SPIDEV) - else if (physInterface == SPI_SPIDEV) { + else if (physInterface == SPI_SPIDEV) + { SLEEP(1100); // wait >30ms*(N=32+1) for sector erase before requesting response (see UM0560, SPI timing) len = receive_spi_spidev(ptrPort, lenRx, Rx); } @@ -1118,10 +1281,12 @@ uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMo // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { printf("done\n"); } - else if ((verbose == INFORM) || (verbose == CHATTY)) { + else if ((verbose == INFORM) || (verbose == CHATTY)) + { printf("done, time %1.1fs\n", (float)(tStop-tStart)/1000.0); } fflush(stdout); @@ -1148,8 +1313,8 @@ uint8_t bsl_flashMassErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMo upload data to microcontroller memory via WRITE command */ -uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint16_t *imageBuf, uint64_t addrStart, uint64_t addrStop, uint8_t verbose) { - +uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint16_t *imageBuf, uint64_t addrStart, uint64_t addrStop, uint8_t verbose) +{ uint64_t numData, countBytes, countBlock; // size of memory image const uint64_t maxBlock = 128; // max. length of write block char Tx[1000], Rx[1000]; // communication buffers @@ -1162,19 +1327,22 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui get_image_size(imageBuf, addrStart, addrStop, &addrStart, &addrStop, &numData); // print message - if (verbose == SILENT) { + if (verbose == SILENT) + { if (numData > 1024) printf(" write %1.1fkB ", (float) numData/1024.0); else printf(" write %dB ", (int) numData); } - else if (verbose == INFORM) { + else if (verbose == INFORM) + { if (numData > 1024) printf(" write %1.1fkB ", (float) numData/1024.0); else printf(" write %dB ", (int) numData); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numData > 1024) printf(" write %1.1fkB in 0x%" PRIx64 " to 0x%" PRIx64 " ", (float) numData/1024.0, addrStart, addrStop); else @@ -1196,8 +1364,8 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui countBytes = 0; countBlock = 0; uint64_t addr = addrStart; - while (addr <= addrStop) { - + while (addr <= addrStop) + { // find next data byte (=start address of next block) while (((imageBuf[addr] & 0xFF00) == 0) && (addr <= addrStop)) addr++; @@ -1209,7 +1377,8 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui // set length of next data block: max 128B and align with 128 for speed (see UM0560 section 3.4) int lenBlock = 1; - while ((lenBlock < maxBlock) && ((addr+lenBlock) <= addrStop) && (imageBuf[addr+lenBlock] & 0xFF00) && ((addr+lenBlock) % maxBlock)) { + while ((lenBlock < maxBlock) && ((addr+lenBlock) <= addrStop) && (imageBuf[addr+lenBlock] & 0xFF00) && ((addr+lenBlock) % maxBlock)) + { lenBlock++; } //printf("0x%04x 0x%04x %d\n", addrBlock, addrBlock+lenBlock-1, lenBlock); @@ -1304,7 +1473,8 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui lenTx = 0; Tx[lenTx++] = lenBlock-1; // -1 from BSL chk = lenBlock-1; - for (j=0; j= PFLASH_START) && (addrBlock % 128)) // wait for flash write finished before requesting response (see UM0560, SPI timing) SLEEP(1200); // for not 128-aligned data wait >1.1s else @@ -1338,7 +1509,8 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui len = receive_spi_Arduino(ptrPort, lenRx, Rx); } #if defined(USE_SPIDEV) - else if (physInterface == SPI_SPIDEV) { + else if (physInterface == SPI_SPIDEV) + { if ((addrBlock >= PFLASH_START) && (addrBlock % 128)) // wait for flash write finished before requesting response (see UM0560, SPI timing) SLEEP(1200); // for not 128-aligned data wait >1.1s else @@ -1354,19 +1526,23 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui Error("in 'bsl_memWrite()': at 0x%02x ACK3 failure (expect 0x%02x, received 0x%02x)", addr, (uint8_t) ACK, (uint8_t) (Rx[0])); // print progress - if (((++countBlock) % 8) == 0) { - if (verbose == SILENT) { + if (((++countBlock) % 8) == 0) + { + if (verbose == SILENT) + { printf("."); if ((countBlock % (10*8)) == 0) printf(" "); } - else if (verbose == INFORM) { + else if (verbose == INFORM) + { if (numData > 1024) printf("%c write %1.1fkB / %1.1fkB ", '\r', (float) countBytes/1024.0, (float) numData/1024.0); else printf("%c write %dB / %dB ", '\r', (int) countBytes, (int) numData); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numData > 1024) printf("%c write %1.1fkB / %1.1fkB in 0x%" PRIx64 " to 0x%" PRIx64 " ", '\r', (float) countBytes/1024.0, (float) numData/1024.0, addrStart, addrStop); else @@ -1383,13 +1559,15 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui // print message if (verbose == SILENT) printf(" done\n"); - else if (verbose == INFORM) { + else if (verbose == INFORM) + { if (numData > 1024) printf("%c write %1.1fkB / %1.1fkB ... done \n", '\r', (float) countBytes/1024.0, (float) numData/1024.0); else printf("%c write %dB / %dB ... done \n", '\r', (int) countBytes, (int) numData); } - else if (verbose == CHATTY) { + else if (verbose == CHATTY) + { if (numData > 1024) printf("%c write %1.1fkB / %1.1fkB in 0x%" PRIx64 " to 0x%" PRIx64 " ... done \n", '\r', (float) countBytes/1024.0, (float) numData/1024.0, addrStart, addrStop); else @@ -1418,8 +1596,8 @@ uint8_t bsl_memWrite(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, ui Read microntroller flash memory and compare to specified RAM image. */ -uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint16_t *imageBuf, uint64_t addrStart, uint64_t addrStop, uint8_t verbose) { - +uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint16_t *imageBuf, uint64_t addrStart, uint64_t addrStop, uint8_t verbose) +{ // allocate and clear temporary RAM buffer (>1MByte requires dynamic allocation) uint16_t *tmpImageBuf; // RAM image buffer (high byte != 0 indicates value is set) if (!(tmpImageBuf = malloc(LENIMAGEBUF * sizeof(*tmpImageBuf)))) @@ -1429,8 +1607,8 @@ uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, u // loop over image and read all consecutive data blocks. Skip undefined data to avoid illegal read. uint64_t addr = addrStart; - while (addr <= addrStop) { - + while (addr <= addrStop) + { // find next data byte in image (=start address for next read) while (((imageBuf[addr] & 0xFF00) == 0) && (addr <= addrStop)) addr++; @@ -1441,7 +1619,8 @@ uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, u // set length of next read-out int lenRead = 1; - while (((addr+lenRead) <= addrStop) && (imageBuf[addr+lenRead] & 0xFF00)) { + while (((addr+lenRead) <= addrStop) && (imageBuf[addr+lenRead] & 0xFF00)) + { lenRead++; } //printf("0x%04x 0x%04x %d\n", addr, addr+lenBlock-1, lenRead); @@ -1461,8 +1640,10 @@ uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, u fflush(stdout); // compare defined data data entries (HB!=0x00) - for (addr=addrStart; addr<=addrStop; addr++) { - if (imageBuf[addr] & 0xFF00) { + for (addr=addrStart; addr<=addrStop; addr++) + { + if (imageBuf[addr] & 0xFF00) + { if ((imageBuf[addr] & 0xFF) != (tmpImageBuf[addr] & 0xFF)) Error("verify failed at address 0x%" PRIx64 " (0x%02x vs 0x%02x)", addr, (uint8_t) (imageBuf[addr]&0xFF), (uint8_t) (tmpImageBuf[addr]&0xFF)); } // if data defined @@ -1496,8 +1677,8 @@ uint8_t bsl_memVerify(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, u jump to address and continue code execution. Generally RAM or flash starting address */ -uint8_t bsl_jumpTo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) { - +uint8_t bsl_jumpTo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addr, uint8_t verbose) +{ int i; int lenTx, lenRx, len; char Tx[1000], Rx[1000]; diff --git a/bootloader.h b/bootloader.h index a4bfce3..8bafe01 100644 --- a/bootloader.h +++ b/bootloader.h @@ -51,7 +51,10 @@ uint8_t bsl_sync(HANDLE ptrPort, uint8_t physInterface, uint8_t verbose); uint8_t bsl_getUartMode(HANDLE ptrPort, uint8_t verbose); /// get microcontroller type and BSL version -uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int *flashsize, uint8_t *vers, uint8_t *family, uint8_t verbose); +uint8_t bsl_getInfo(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int *flashsize, uint8_t *versBSL, uint8_t *family, uint8_t verbose); + +/// upload RAM routines required for flash write & erase +uint8_t bsl_uploadWriteErase(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, int flashsize, uint8_t versBSL, uint8_t family, uint8_t verbose); /// read from microcontroller memory uint8_t bsl_memRead(HANDLE ptrPort, uint8_t physInterface, uint8_t uartMode, uint64_t addrStart, uint64_t addrStop, uint16_t *imageBuf, uint8_t verbose); diff --git a/images/test_matrix.png b/images/test_matrix.png index 71ec748..e9325f5 100644 Binary files a/images/test_matrix.png and b/images/test_matrix.png differ diff --git a/main.c b/main.c index c8c854c..0e2e61f 100644 --- a/main.c +++ b/main.c @@ -69,19 +69,6 @@ #include "version.h" -// device dependent flash w/e routines -#include "E_W_ROUTINEs_8K_verL_1.0.h" -#include "E_W_ROUTINEs_32K_ver_1.0.h" -#include "E_W_ROUTINEs_32K_ver_1.2.h" -#include "E_W_ROUTINEs_32K_ver_1.3.h" -#include "E_W_ROUTINEs_32K_ver_1.4.h" -//#include "E_W_ROUTINEs_32K_verL_1.0.h" // empty -#include "E_W_ROUTINEs_128K_ver_2.0.h" -#include "E_W_ROUTINEs_128K_ver_2.1.h" -#include "E_W_ROUTINEs_128K_ver_2.2.h" -#include "E_W_ROUTINEs_128K_ver_2.4.h" -#include "E_W_ROUTINEs_256K_ver_1.0.h" - // max length of filenames #define STRLEN 1000 @@ -630,7 +617,7 @@ int main(int argc, char ** argv) { if (verbose == INFORM) printf(" open Arduino port '%s' ... ", portname); else if (verbose == CHATTY) - printf(" open Arduino port '%s' with %gkBaud SPI ... ", portname, (float) ARDUINO_BAUDRATE / 1000.0); + printf(" open Arduino port '%s' with %gkBaud ... ", portname, (float) ARDUINO_BAUDRATE / 1000.0); fflush(stdout); ptrPort = init_port(portname, ARDUINO_BAUDRATE, 100, 8, 0, 1, 0, 0); if ((verbose == INFORM) || (verbose == CHATTY)) @@ -760,118 +747,8 @@ int main(int argc, char ** argv) { // get bootloader info for selecting RAM w/e routines for flash bsl_getInfo(ptrPort, physInterface, uartMode, &flashsize, &versBSL, &family, verbose); - // for STM8S and 8kB STM8L upload RAM routines, else skip - if ((family == STM8S) || (flashsize==8)) { - - char *ptrRAM = NULL; // pointer to array with RAM routines - int lenRAM; // length of RAM array - - // select device dependent flash routines for upload - if ((flashsize==8) && (versBSL==0x10)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_8K_verL_1_0_s19_len; - } - else if ((flashsize==32) && (versBSL==0x10)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_0_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_32K_ver_1_0_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_32K_ver_1_0_s19_len; - } - else if ((flashsize==32) && (versBSL==0x12)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_2_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_32K_ver_1_2_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_32K_ver_1_2_s19_len; - } - else if ((flashsize==32) && (versBSL==0x13)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_3_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_32K_ver_1_3_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_32K_ver_1_3_s19_len; - } - else if ((flashsize==32) && (versBSL==0x14)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_32K_ver_1_4_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_32K_ver_1_4_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_32K_ver_1_4_s19_len; - } - else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x20)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_0_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_128K_ver_2_0_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_128K_ver_2_0_s19_len; - } - #ifdef DONIX - else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x20)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_32K_verL_1_0_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_32K_verL_1_0_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_32K_verL_1_0_s19_len; - } - #endif // DONIX - else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x21)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_1_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_128K_ver_2_1_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_128K_ver_2_1_s19_len; - } - else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x22)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_2_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_128K_ver_2_2_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_128K_ver_2_2_s19_len; - } - else if (((flashsize==64) || (flashsize==128)) && (versBSL==0x24)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_128K_ver_2_4_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_128K_ver_2_4_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_128K_ver_2_4_s19_len; - } - else if ((flashsize==256) && (versBSL==0x10)) { - #ifdef DEBUG - printf("header STM8_Routines_E_W_ROUTINEs_256K_ver_1_0_s19 \n"); - #endif - ptrRAM = (char*) STM8_Routines_E_W_ROUTINEs_256K_ver_1_0_s19; - lenRAM = STM8_Routines_E_W_ROUTINEs_256K_ver_1_0_s19_len; - } - else - Error("unsupported device"); - - - // clear image buffer - memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); - - // convert correct array containing s19 file to RAM image - convert_s19(ptrRAM, lenRAM, imageBuf, MUTE); - - // get image size - get_image_size(imageBuf, 0, LENIMAGEBUF, &addrStart, &addrStop, &numData); - - // upload RAM routines to STM8 - if (verbose == CHATTY) - printf(" upload RAM routines ... "); - fflush(stdout); - bsl_memWrite(ptrPort, physInterface, uartMode, imageBuf, addrStart, addrStop, MUTE); - if (verbose == CHATTY) - printf("done (%dB in 0x%" PRIx64 " - 0x%" PRIx64 ")\n", (int) numData, addrStart, addrStop); - fflush(stdout); - - // clear memory image again - memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); - - } // if STM8S or low-density STM8L -> upload RAM code + // upload RAM routines for flash write & erase + bsl_uploadWriteErase(ptrPort, physInterface, uartMode, flashsize, versBSL, family, verbose); ///////////////// @@ -1000,8 +877,11 @@ int main(int argc, char ** argv) { // optionally verify upload if (verifyUpload == 0) // skip verify ; - else if (verifyUpload == 1) // compare CRC32 checksums + else if (verifyUpload == 1) // compare CRC32 checksums. Requires re-uploading w/e routines, which are cleared by ROM-BL by "GO" command + { verify_crc32(ptrPort, family, flashsize, versBSL, physInterface, uartMode, imageBuf, addrStart, addrStop, verbose); + bsl_uploadWriteErase(ptrPort, physInterface, uartMode, flashsize, versBSL, family, MUTE); + } else if (verifyUpload == 2) // read back memory and compare bsl_memVerify(ptrPort, physInterface, uartMode, imageBuf, addrStart, addrStop, verbose); else @@ -1010,6 +890,39 @@ int main(int argc, char ** argv) { // clear memory image again memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); + +/* + /// xxx + char *ptrRAM = NULL; // pointer to array with RAM routines + int lenRAM; // length of RAM array + +ptrRAM = (char*) bin_erase_write_ver_128k_2_1_ihx; +lenRAM = bin_erase_write_ver_128k_2_1_ihx_len; + + // clear image buffer + memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); + + // convert correct array containing ihx file to RAM image + convert_ihx(ptrRAM, lenRAM, imageBuf, MUTE); + + // get image size + get_image_size(imageBuf, 0, LENIMAGEBUF, &addrStart, &addrStop, &numData); + + // upload RAM routines to STM8 + if (verbose == CHATTY) + printf(" upload RAM routines ... "); + fflush(stdout); + bsl_memWrite(ptrPort, physInterface, uartMode, imageBuf, addrStart, addrStop, MUTE); + if (verbose == CHATTY) + printf("done (%dB in 0x%" PRIx64 " - 0x%" PRIx64 ")\n", (int) numData, addrStart, addrStop); + fflush(stdout); + + // clear memory image again + memset(imageBuf, 0, (LENIMAGEBUF + 1) * sizeof(*imageBuf)); + +/// xxx bis hier +*/ + } // write diff --git a/misc.h b/misc.h index 6ebcf27..f6415e5 100644 --- a/misc.h +++ b/misc.h @@ -38,7 +38,7 @@ #include #define SLEEP(a) Sleep(a) //< for sleep(ms) use system specific routines #elif defined(__APPLE__) || defined(__unix__) - #define SLEEP(a) usleep((int32_t) a*1000L) //< for sleep(ms) use system specific routines + #define SLEEP(a) usleep((int32_t) (a)*1000L) //< for sleep(ms) use system specific routines #else #error OS not supported #endif diff --git a/stm8gal.dev b/stm8gal.dev index 93b3af4..188a70d 100644 --- a/stm8gal.dev +++ b/stm8gal.dev @@ -1,11 +1,11 @@ [Project] FileName=stm8gal.dev Name=stm8gal -UnitCount=36 +UnitCount=32 Type=1 Ver=2 ObjFiles= -Includes=.\RAM_Routines +Includes=.\RAM_Routines\write_erase;.\RAM_Routines\verify_CRC32 Libs= PrivateResource= ResourceIncludes= @@ -20,7 +20,7 @@ ObjectOutput=Objects OverrideOutput=0 OverrideOutputName=stm8gal.exe HostApplication= -Folders=RAM_Routines +Folders=RAM_Routines,RAM_Routines/verify_CRC32,RAM_Routines/write_erase CommandLine=-p COM9 -b 38400 -v -f test.s19 UseCustomMakefile=0 CustomMakefile= @@ -181,9 +181,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit14] -FileName=RAM_Routines\E_W_ROUTINEs_8K_verL_1.0.h +FileName=verify_CRC32.c CompileCpp=0 -Folder=RAM_Routines +Folder= Compile=1 Link=1 Priority=1000 @@ -191,9 +191,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit15] -FileName=RAM_Routines\E_W_ROUTINEs_32K_ver_1.0.h +FileName=verify_CRC32.h CompileCpp=0 -Folder=RAM_Routines +Folder= Compile=1 Link=1 Priority=1000 @@ -201,9 +201,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit16] -FileName=RAM_Routines\E_W_ROUTINEs_32K_ver_1.2.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8L_8k_v1.0.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -211,9 +211,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit17] -FileName=RAM_Routines\E_W_ROUTINEs_32K_ver_1.3.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8L_32k_v1.1.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -221,9 +221,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit18] -FileName=RAM_Routines\E_W_ROUTINEs_32K_ver_1.4.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8L_32k_v1.2.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -231,9 +231,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit19] -FileName=RAM_Routines\E_W_ROUTINEs_32K_verL_1.0.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8L_64k_v1.1.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -241,9 +241,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit20] -FileName=RAM_Routines\E_W_ROUTINEs_128K_ver_2.0.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8S_32k_v1.2.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -251,9 +251,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit21] -FileName=RAM_Routines\E_W_ROUTINEs_128K_ver_2.1.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8S_32k_v1.3.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -261,9 +261,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit22] -FileName=RAM_Routines\E_W_ROUTINEs_128K_ver_2.2.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8S_128k_v2.1.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -271,9 +271,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit23] -FileName=RAM_Routines\E_W_ROUTINEs_128K_ver_2.4.h +FileName=RAM_Routines\verify_CRC32\verify_CRC32_STM8S_128k_v2.2.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/verify_CRC32 Compile=1 Link=1 Priority=1000 @@ -281,9 +281,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit24] -FileName=RAM_Routines\E_W_ROUTINEs_256K_ver_1.0.h +FileName=RAM_Routines\write_erase\erase_write_ver_32k_1.0_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -291,9 +291,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit25] -FileName=verify_CRC32.c +FileName=RAM_Routines\write_erase\erase_write_ver_32k_1.2_inc.h CompileCpp=0 -Folder= +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -301,9 +301,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit26] -FileName=verify_CRC32.h +FileName=RAM_Routines\write_erase\erase_write_ver_32k_1.3_inc.h CompileCpp=0 -Folder= +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -311,9 +311,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit27] -FileName=RAM_Routines\verify_CRC32_STM8L_8k_v1.0.h +FileName=RAM_Routines\write_erase\erase_write_ver_32k_1.4_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -321,9 +321,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit28] -FileName=RAM_Routines\verify_CRC32_STM8L_32k_v1.1.h +FileName=RAM_Routines\write_erase\erase_write_ver_128k_2.0_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -331,9 +331,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit29] -FileName=RAM_Routines\verify_CRC32_STM8L_32k_v1.2.h +FileName=RAM_Routines\write_erase\erase_write_ver_128k_2.1_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -341,9 +341,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit30] -FileName=RAM_Routines\verify_CRC32_STM8L_64k_v1.1.h +FileName=RAM_Routines\write_erase\erase_write_ver_128k_2.2_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -351,9 +351,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit31] -FileName=RAM_Routines\verify_CRC32_STM8S_32k_v1.2.h +FileName=RAM_Routines\write_erase\erase_write_ver_128k_2.4_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 @@ -361,9 +361,9 @@ OverrideBuildCmd=0 BuildCmd= [Unit32] -FileName=RAM_Routines\verify_CRC32_STM8S_32k_v1.3.h +FileName=RAM_Routines\write_erase\erase_write_verL_8k_1.0_inc.h CompileCpp=0 -Folder=RAM_Routines +Folder=RAM_Routines/write_erase Compile=1 Link=1 Priority=1000 diff --git a/stm8gal.layout b/stm8gal.layout index dbf0be2..61dc29b 100644 --- a/stm8gal.layout +++ b/stm8gal.layout @@ -4,9 +4,9 @@ Order=0,6,8 [Editor_0] Open=1 Top=0 -CursorCol=25 -CursorRow=1046 -TopLine=954 +CursorCol=1 +CursorRow=935 +TopLine=931 LeftChar=1 [Editor_1] Open=0 diff --git a/test_matrix.ods b/test_matrix.ods index 4d7f339..a4dda8d 100644 Binary files a/test_matrix.ods and b/test_matrix.ods differ diff --git a/verify_CRC32.c b/verify_CRC32.c index ab06c48..2922460 100644 --- a/verify_CRC32.c +++ b/verify_CRC32.c @@ -21,17 +21,15 @@ #include "verify_CRC32.h" // include RAM routines for supported devices -#include "RAM_Routines/verify_CRC32_STM8L_8k_v1.0.h" -#include "RAM_Routines/verify_CRC32_STM8L_32k_v1.1.h" -#include "RAM_Routines/verify_CRC32_STM8L_32k_v1.2.h" -#include "RAM_Routines/verify_CRC32_STM8L_64k_v1.1.h" -#include "RAM_Routines/verify_CRC32_STM8S_32k_v1.2.h" -#include "RAM_Routines/verify_CRC32_STM8S_32k_v1.3.h" -#include "RAM_Routines/verify_CRC32_STM8S_32k_v1.4.h" +#include "verify_CRC32_STM8L_8k_v1.0.h" +#include "verify_CRC32_STM8L_32k_v1.1.h" +#include "verify_CRC32_STM8L_32k_v1.2.h" +#include "verify_CRC32_STM8L_64k_v1.1.h" -#include "RAM_Routines/verify_CRC32_STM8S_128k_v2.1.h" -#include "RAM_Routines/verify_CRC32_STM8S_128k_v2.2.h" -#include "RAM_Routines/verify_CRC32_STM8S_128k_v2.4.h" +#include "verify_CRC32_STM8S_32k_v1.2.h" +#include "verify_CRC32_STM8S_32k_v1.3.h" +#include "verify_CRC32_STM8S_128k_v2.1.h" +#include "verify_CRC32_STM8S_128k_v2.2.h" uint8_t upload_crc32_code(HANDLE ptrPort, uint8_t family, int flashsize, uint8_t versBSL, uint8_t physInterface, uint8_t uartMode) @@ -89,13 +87,6 @@ uint8_t upload_crc32_code(HANDLE ptrPort, uint8_t family, int flashsize, uint8_t #endif convert_ihx((char*) bin_verify_CRC32_STM8S_32k_v1_3_ihx, bin_verify_CRC32_STM8S_32k_v1_3_ihx_len, imageBuf, MUTE); // STM8S / STM8AF "medium density" BL v1.3 } - else if ((family == STM8S) && (flashsize==32) && (versBSL==0x14)) - { - #ifdef DEBUG - printf("header verify_CRC32_STM8S_32k_v1_4_ihx\n"); - #endif - convert_ihx((char*) bin_verify_CRC32_STM8S_32k_v1_4_ihx, bin_verify_CRC32_STM8S_32k_v1_4_ihx_len, imageBuf, MUTE); // STM8S / STM8AF "medium density" BL v1.4 - } else if ((family == STM8S) && ((flashsize==64) || (flashsize==128)) && (versBSL==0x21)) { #ifdef DEBUG @@ -110,13 +101,6 @@ uint8_t upload_crc32_code(HANDLE ptrPort, uint8_t family, int flashsize, uint8_t #endif convert_ihx((char*) bin_verify_CRC32_STM8S_128k_v2_2_ihx, bin_verify_CRC32_STM8S_128k_v2_2_ihx_len, imageBuf, MUTE); // STM8S / STM8AF "high density" BL v2.2 } - else if ((family == STM8S) && ((flashsize==64) || (flashsize==128)) && (versBSL==0x24)) - { - #ifdef DEBUG - printf("header verify_CRC32_STM8S_128k_v2_4_ihx\n"); - #endif - convert_ihx((char*) bin_verify_CRC32_STM8S_128k_v2_4_ihx, bin_verify_CRC32_STM8S_128k_v2_4_ihx_len, imageBuf, MUTE); // STM8S / STM8AF "high density" BL v2.4 - } else { Error("bootloader does not support CRC32 verify, use read-out instead (family=%d, flash=%dkB, BL v%d)", (int) family, (int) flashsize, (int) versBSL); @@ -287,24 +271,29 @@ uint8_t verify_crc32(HANDLE ptrPort, uint8_t family, int flashsize, uint8_t vers if ((physInterface == 1) || (physInterface == 2)) { //fprintf(stderr,"\ntest: %d\n", (int) (25L*lenCheck/1024L)); - SLEEP(100L + 25L*lenCheck/1024L); + SLEEP(500L + 25L*lenCheck/1024L); } // re-synchronize after re-start of ROM-BSL bsl_sync(ptrPort, physInterface, MUTE); - // for UART reset command state machine sending 0x00 until a NACK is received + // For UART reset command state machine sending 0x00 until a NACK is received + // Procedure depends on UART mode (0=duplex, 1=1-wire, 2=2-wire reply). Tested empirically and ugly... if (physInterface == 0) { - char Tx=0x00, Rx; + char Tx[2] = {0x00, 0x00}, Rx; int lenRx; // send (wrong) GET command until NACK is received. Then state machine is ready to receive next command set_timeout(ptrPort, 100); for (int i=0; i<5; i++) { - send_port(ptrPort, 0, 1, &Tx); + if ((uartMode == 0) || (uartMode == 2)) + send_port(ptrPort, 0, 1, Tx); // duplex and 2-wire reply + else + send_port(ptrPort, 0, 2, Tx); // 1-wire lenRx = receive_port(ptrPort, 0, 1, &Rx); + SLEEP(10); if ((lenRx == 1) && (Rx == NACK)) break; } @@ -314,8 +303,14 @@ uint8_t verify_crc32(HANDLE ptrPort, uint8_t family, int flashsize, uint8_t vers if (uartMode == 2) send_port(ptrPort, 0, 1, &Rx); - } // UART interface + // required for 1-wire reply mode + if (uartMode == 1) + { + SLEEP(10); + flush_port(ptrPort); + } + } // UART interface // read out CRC32 checksum from STM8 read_crc32(ptrPort, physInterface, uartMode, &crc32_uC); diff --git a/verify_CRC32/Makefile b/verify_CRC32/Makefile index 837efcb..76ff6be 100644 --- a/verify_CRC32/Makefile +++ b/verify_CRC32/Makefile @@ -14,16 +14,14 @@ OUTPUT_HEADERDIR = include # linker files. Each linker file generates one output binary LINKTARGETS = \ + $(LINKDIR)/STM8L_8k_v1.0.lk \ $(LINKDIR)/STM8L_32k_v1.1.lk \ $(LINKDIR)/STM8L_32k_v1.2.lk \ $(LINKDIR)/STM8L_64k_v1.1.lk \ - $(LINKDIR)/STM8L_8k_v1.0.lk \ - $(LINKDIR)/STM8S_128k_v2.1.lk \ - $(LINKDIR)/STM8S_128k_v2.2.lk \ - $(LINKDIR)/STM8S_128k_v2.4.lk \ $(LINKDIR)/STM8S_32k_v1.2.lk \ $(LINKDIR)/STM8S_32k_v1.3.lk \ - $(LINKDIR)/STM8S_32k_v1.4.lk + $(LINKDIR)/STM8S_128k_v2.1.lk \ + $(LINKDIR)/STM8S_128k_v2.2.lk LINKCOMMON = \ $(LINKDIR)/common.lk @@ -85,7 +83,8 @@ ifeq ($(OS),Windows_NT) else awk -f ./check-seg-size.awk $(BINDIR)/$(basename $(@F)).map xxd -i $@ > $(OUTPUT_HEADERDIR)/$(basename $(@F)).h - cp $(OUTPUT_HEADERDIR)/$(basename $(@F)).h ../RAM_Routines/$(basename $(@F)).h + $(RM) ../RAM_Routines/verify_CRC32/$(basename $(@F)).h + cp $(OUTPUT_HEADERDIR)/$(basename $(@F)).h ../RAM_Routines/verify_CRC32/$(basename $(@F)).h echo endif @@ -110,4 +109,3 @@ clean: $(RM) $(OBJDIR) $(RM) $(BINDIR) $(RM) $(OUTPUT_HEADERDIR) - $(RM) ../RAM_Routines/verify_CRC32_*.h diff --git a/verify_CRC32/link/STM8S_128k_v2.4.lk b/verify_CRC32/link/STM8S_128k_v2.4.lk deleted file mode 100644 index a2c04cd..0000000 --- a/verify_CRC32/link/STM8S_128k_v2.4.lk +++ /dev/null @@ -1,16 +0,0 @@ -; family specific SFR addresses --g _CLK_CKDIVR=0x50C6 --g _IWDG_KR=0x50E0 --g _IWDG_PR=0x50E1 --g _WWDG_CR=0x50D1 --g _TIM2_SR1=0x5302 --g _TIM2_EGR=0x5304 --g _TIM3_SR1=0x5322 --g _TIM3_EGR=0x5324 -; -; ROM-BL specific addresses -;-g _bootloader_entry=0x6000 ; start of ROM-BL -;-g _bootloader_entry=0x601E ; after checking BL activation --g _bootloader_entry=0x602E ; after checking read-out protection -; --e diff --git a/verify_CRC32/link/STM8S_32k_v1.4.lk b/verify_CRC32/link/STM8S_32k_v1.4.lk deleted file mode 100644 index 3147c49..0000000 --- a/verify_CRC32/link/STM8S_32k_v1.4.lk +++ /dev/null @@ -1,16 +0,0 @@ -; family specific SFR addresses --g _CLK_CKDIVR=0x50C6 --g _IWDG_KR=0x50E0 --g _IWDG_PR=0x50E1 --g _WWDG_CR=0x50D1 --g _TIM2_SR1=0x5302 --g _TIM2_EGR=0x5304 --g _TIM3_SR1=0x5322 --g _TIM3_EGR=0x5324 -; -; ROM-BL specific addresses -;-g _bootloader_entry=0x6000 ; start of ROM-BL -;-g _bootloader_entry=0x6018 ; after checking BL activation --g _bootloader_entry=0x6028 ; after checking read-out protection -; --e diff --git a/verify_CRC32/stm8-crc/Readme.md b/verify_CRC32/stm8-crc/Readme.md index 9f4afd7..f612350 100644 --- a/verify_CRC32/stm8-crc/Readme.md +++ b/verify_CRC32/stm8-crc/Readme.md @@ -1,4 +1,4 @@ -CRC32 calculation copied from [https://github.com/basilhussain/stm8-crc](https://github.com/basilhussain/stm8-crc) +CRC32 calculation from [https://github.com/basilhussain/stm8-crc](https://github.com/basilhussain/stm8-crc) Notes: - the code is partially written in [SDCC](http://sdcc.sourceforge.net/) for small code size. Therefore the SDCC toolchain is required for optional compilation diff --git a/version.h b/version.h index bf7e851..399ee1e 100644 --- a/version.h +++ b/version.h @@ -19,7 +19,7 @@ #define _SW_VERSION_H_ /// 16b SW version identifier -#define VERSION ((1<<14) | (4<<6) | (3<<1) | 1) // -> v1.4.3 +#define VERSION ((1<<14) | (5<<6) | (0<<1) | 1) // -> v1.5.0 #endif // _SW_VERSION_H_ @@ -29,6 +29,14 @@ Revision History ---------------- +v1.5.0 (2021-01-23) + - replaced write/erase RAM routines by STM with OSS routines (see https://github.com/gicking/stm8gal/issues/4) + - removed STM8S 32kB v1.4 and 128kB v2.4. According to STM support were never released and development is stopped + - removed STM8S 256kB v1.0. According to STM support variant was never released and development is stopped + - fixed bug in v1.4.3 which prevented flash write/erase after CRC32-verify + +---------------- + v1.4.3 (2021-01-09) - fixed bug in SPI read-back after write - fixed bug in CRC32-verify (see https://github.com/gicking/stm8gal/issues/20)