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mojo_top.luc
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module mojo_top (
input clk, // 50MHz clock
input rst_n, // reset button (active low)
output led [8], // 8 user controllable LEDs
input cclk, // configuration clock, AVR ready when high
output spi_miso, // AVR SPI MISO
input spi_ss, // AVR SPI Slave Select
input spi_mosi, // AVR SPI MOSI
input spi_sck, // AVR SPI Clock
output spi_channel [4], // AVR general purpose pins (used by default to select ADC channel)
input avr_tx, // AVR TX (FPGA RX)
output avr_rx, // AVR RX (FPGA TX)
input avr_rx_busy, // AVR RX buffer full
output a, //input 1
output b, //input 2
output c, //carryin
input out1, //sum
input out2 //carryout
) {
sig rst; // reset signal
.clk(clk) {
// The reset conditioner is used to synchronize the reset signal to the FPGA
// clock. This ensures the entire FPGA comes out of reset at the same time.
reset_conditioner reset_cond;
.rst(rst){
fsm state = {ZEROZEROZERO,ZEROZEROONE,ZEROONEZERO,ONEZEROZERO,ZEROONEONE,ONEZEROONE,ONEONEZERO,ONEONEONE};
evaluation evaluater;
blinker alternator;
}
}
always {
a = 0;
b = 0;
c = 0;
evaluater.a = 0;
evaluater.b = 0;
evaluater.c = 0;
case(state.q){
state.ZEROZEROZERO:
a = 0;
b = 0;
c = 0;
evaluater.a = 0;
evaluater.b = 0;
evaluater.c = 0;
led[0] = 0;
led[1] = 0;
led[2] = 0;
if(alternator.a==1){
state.d=state.ZEROZEROONE;
}
state.ZEROZEROONE:
a = 1;
b = 0;
c = 0;
evaluater.a = 1;
evaluater.b = 0;
evaluater.c = 0;
led[0] = 1;
led[1] = 0;
led[2] = 0;
if(alternator.a==0){
state.d=state.ZEROONEZERO;
}
state.ZEROONEZERO:
a = 0;
b = 1;
c = 0;
evaluater.a = 0;
evaluater.b = 1;
evaluater.c = 0;
led[0] = 0;
led[1] = 1;
led[2] = 0;
if(alternator.a==1){
state.d=state.ONEZEROZERO;
}
state.ONEZEROZERO:
a = 0;
b = 0;
c = 1;
evaluater.a = 0;
evaluater.b = 0;
evaluater.c = 1;
led[0] = 0;
led[1] = 0;
led[2] = 1;
if(alternator.a==0){
state.d=state.ZEROONEONE;
}
state.ZEROONEONE:
a = 1;
b = 1;
c = 0;
evaluater.a = 1;
evaluater.b = 1;
evaluater.c = 0;
led[0] = 1;
led[1] = 1;
led[2] = 0;
if(alternator.a==1){
state.d=state.ONEZEROONE;
}
state.ONEZEROONE:
a = 1;
b = 0;
c = 1;
evaluater.a = 1;
evaluater.b = 0;
evaluater.c = 1;
led[0] = 1;
led[1] = 0;
led[2] = 1;
if(alternator.a==0){
state.d=state.ONEONEZERO;
}
state.ONEONEZERO:
a = 0;
b = 1;
c = 1;
evaluater.a = 0;
evaluater.b = 1;
evaluater.c = 1;
led[0] = 0;
led[1] = 1;
led[2] = 1;
if(alternator.a==1){
state.d=state.ONEONEONE;
}
state.ONEONEONE:
a = 1;
b = 1;
c = 1;
evaluater.a = 1;
evaluater.b = 1;
evaluater.c = 1;
led[0] = 1;
led[1] = 1;
led[2] = 1;
if(alternator.a==0){
state.d=state.ZEROZEROZERO;
}
}
reset_cond.in = ~rst_n; // input raw inverted reset signal
rst = reset_cond.out; // conditioned reset
led[3] = out1;
led[4] = out2;
led[5] = evaluater.fpgasum;
led[6] = evaluater.fpgacarry;
led[7] = (evaluater.fpgasum==out1)&(evaluater.fpgacarry==out2);
spi_miso = bz; // not using SPI
spi_channel = bzzzz; // not using flags
avr_rx = bz; // not using serial port
}
}