esp32s2/esp32c3: Disable reseting target upon GDB connection

gerekon · gerekon · commit 7ec8229c7ff1 · 2021-07-17T04:48:52.000+08:00
diff --git a/tcl/target/esp32c3.cfg b/tcl/target/esp32c3.cfg
@@ -85,9 +85,8 @@ $_TARGETNAME configure -event examine-end {
     arm semihosting_resexit enable
 }
 $_TARGETNAME configure -event gdb-attach {
-    # 'reset' is necessary to disable memory protection which might be enabled by bootloader
     # 'halt' is necessary to auto-probe flash bank when GDB is connected and generate proper memory map
-	reset halt
+    halt
     # by default mask interrupts while stepping
     riscv maskisr steponly
 }
diff --git a/tcl/target/esp32s2.cfg b/tcl/target/esp32s2.cfg
@@ -32,9 +32,8 @@ if { $_RTOS == "none" } {
 }
 
 $_TARGETNAME configure -event gdb-attach {
-    # 'reset' is necessary to disable memory protection which might be enabled by bootloader
     # 'halt' is necessary to auto-probe flash bank when GDB is connected and generate proper memory map
-	reset halt
+	halt
 }
 
 configure_esp_workarea $_TARGETNAME 0x40030000 0x4000 0x3FFE0000 0x18000

Original file line number	Diff line number	Diff line change
`@@ -85,9 +85,8 @@ $_TARGETNAME configure -event examine-end {`
`85`	`85`	`arm semihosting_resexit enable`
`86`	`86`	`}`
`87`	`87`	`$_TARGETNAME configure -event gdb-attach {`
`88`		`- # 'reset' is necessary to disable memory protection which might be enabled by bootloader`
`89`	`88`	`# 'halt' is necessary to auto-probe flash bank when GDB is connected and generate proper memory map`
`90`		`- reset halt`
	`89`	`+ halt`
`91`	`90`	`# by default mask interrupts while stepping`
`92`	`91`	`riscv maskisr steponly`
`93`	`92`	`}`
Original file line number	Diff line number	Diff line change
`@@ -32,9 +32,8 @@ if { $_RTOS == "none" } {`
`32`	`32`	`}`
`33`	`33`
`34`	`34`	`$_TARGETNAME configure -event gdb-attach {`
`35`		`- # 'reset' is necessary to disable memory protection which might be enabled by bootloader`
`36`	`35`	`# 'halt' is necessary to auto-probe flash bank when GDB is connected and generate proper memory map`
`37`		`- reset halt`
	`36`	`+ halt`
`38`	`37`	`}`
`39`	`38`
`40`	`39`	`configure_esp_workarea $_TARGETNAME 0x40030000 0x4000 0x3FFE0000 0x18000`