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Add ESP32-S2 CopyDMA and CryptoDMA (#302)
* Add Copy DMA * Clean up Copy DMA * Add enums * Add Crypto DMA * Re-generate PAC * INT_CLR: Write 1 to clear * Fix address * Merge yamls
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‎esp32s2/src/copy_dma.rs

+180
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#[repr(C)]
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#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
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#[doc = "Register block"]
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pub struct RegisterBlock {
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int_raw: INT_RAW,
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int_st: INT_ST,
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int_ena: INT_ENA,
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int_clr: INT_CLR,
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out_link: OUT_LINK,
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in_link: IN_LINK,
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out_eof_des_addr: OUT_EOF_DES_ADDR,
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in_eof_des_addr: IN_EOF_DES_ADDR,
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out_eof_bfr_des_addr: OUT_EOF_BFR_DES_ADDR,
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inlink_dscr: INLINK_DSCR,
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inlink_dscr_bf0: INLINK_DSCR_BF0,
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_reserved11: [u8; 0x04],
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outlink_dscr: OUTLINK_DSCR,
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outlink_dscr_bf0: OUTLINK_DSCR_BF0,
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_reserved13: [u8; 0x04],
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conf: CONF,
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in_st: IN_ST,
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out_st: OUT_ST,
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_reserved16: [u8; 0xb4],
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date: DATE,
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}
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impl RegisterBlock {
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#[doc = "0x00 - Raw interrupt status"]
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#[inline(always)]
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pub const fn int_raw(&self) -> &INT_RAW {
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&self.int_raw
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}
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#[doc = "0x04 - Masked interrupt status"]
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#[inline(always)]
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pub const fn int_st(&self) -> &INT_ST {
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&self.int_st
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}
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#[doc = "0x08 - Interrupt enable bits"]
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#[inline(always)]
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pub const fn int_ena(&self) -> &INT_ENA {
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&self.int_ena
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}
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#[doc = "0x0c - Interrupt clear bits"]
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#[inline(always)]
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pub const fn int_clr(&self) -> &INT_CLR {
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&self.int_clr
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}
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#[doc = "0x10 - Link descriptor address and control"]
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#[inline(always)]
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pub const fn out_link(&self) -> &OUT_LINK {
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&self.out_link
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}
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#[doc = "0x14 - Link descriptor address and control"]
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#[inline(always)]
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pub const fn in_link(&self) -> &IN_LINK {
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&self.in_link
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}
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#[doc = "0x18 - Transmit descriptor address when EOF occurs"]
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#[inline(always)]
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pub const fn out_eof_des_addr(&self) -> &OUT_EOF_DES_ADDR {
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&self.out_eof_des_addr
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}
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#[doc = "0x1c - Receive descriptor address when EOF occurs"]
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#[inline(always)]
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pub const fn in_eof_des_addr(&self) -> &IN_EOF_DES_ADDR {
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&self.in_eof_des_addr
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}
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#[doc = "0x20 - Transmit descriptor address before the last transmit descriptor"]
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#[inline(always)]
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pub const fn out_eof_bfr_des_addr(&self) -> &OUT_EOF_BFR_DES_ADDR {
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&self.out_eof_bfr_des_addr
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}
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#[doc = "0x24 - Address of current receive descriptor"]
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#[inline(always)]
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pub const fn inlink_dscr(&self) -> &INLINK_DSCR {
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&self.inlink_dscr
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}
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#[doc = "0x28 - Address of last receive descriptor"]
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#[inline(always)]
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pub const fn inlink_dscr_bf0(&self) -> &INLINK_DSCR_BF0 {
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&self.inlink_dscr_bf0
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}
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#[doc = "0x30 - Address of current transmit descriptor"]
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#[inline(always)]
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pub const fn outlink_dscr(&self) -> &OUTLINK_DSCR {
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&self.outlink_dscr
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}
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#[doc = "0x34 - Address of last transmit descriptor"]
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#[inline(always)]
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pub const fn outlink_dscr_bf0(&self) -> &OUTLINK_DSCR_BF0 {
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&self.outlink_dscr_bf0
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}
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#[doc = "0x3c - Copy DMA configuration register"]
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#[inline(always)]
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pub const fn conf(&self) -> &CONF {
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&self.conf
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}
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#[doc = "0x40 - Status register of receiving data"]
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#[inline(always)]
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pub const fn in_st(&self) -> &IN_ST {
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&self.in_st
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}
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#[doc = "0x44 - Status register of transmitting data"]
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#[inline(always)]
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pub const fn out_st(&self) -> &OUT_ST {
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&self.out_st
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}
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#[doc = "0xfc - Copy DMA version control register"]
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#[inline(always)]
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pub const fn date(&self) -> &DATE {
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&self.date
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}
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}
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#[doc = "INT_RAW (r) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
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pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
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#[doc = "Raw interrupt status"]
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pub mod int_raw;
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#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
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pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
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#[doc = "Masked interrupt status"]
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pub mod int_st;
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#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
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pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
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#[doc = "Interrupt enable bits"]
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pub mod int_ena;
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#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
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pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
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#[doc = "Interrupt clear bits"]
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pub mod int_clr;
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#[doc = "OUT_LINK (rw) register accessor: Link descriptor address and control\n\nYou can [`read`](crate::Reg::read) this register and get [`out_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_link`] module"]
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pub type OUT_LINK = crate::Reg<out_link::OUT_LINK_SPEC>;
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#[doc = "Link descriptor address and control"]
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pub mod out_link;
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#[doc = "IN_LINK (rw) register accessor: Link descriptor address and control\n\nYou can [`read`](crate::Reg::read) this register and get [`in_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`in_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_link`] module"]
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pub type IN_LINK = crate::Reg<in_link::IN_LINK_SPEC>;
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#[doc = "Link descriptor address and control"]
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pub mod in_link;
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#[doc = "CONF (r) register accessor: Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
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pub type CONF = crate::Reg<conf::CONF_SPEC>;
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#[doc = "Copy DMA configuration register"]
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pub mod conf;
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#[doc = "OUT_EOF_DES_ADDR (r) register accessor: Transmit descriptor address when EOF occurs\n\nYou can [`read`](crate::Reg::read) this register and get [`out_eof_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_eof_des_addr`] module"]
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pub type OUT_EOF_DES_ADDR = crate::Reg<out_eof_des_addr::OUT_EOF_DES_ADDR_SPEC>;
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#[doc = "Transmit descriptor address when EOF occurs"]
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pub mod out_eof_des_addr;
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#[doc = "IN_EOF_DES_ADDR (r) register accessor: Receive descriptor address when EOF occurs\n\nYou can [`read`](crate::Reg::read) this register and get [`in_eof_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_eof_des_addr`] module"]
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pub type IN_EOF_DES_ADDR = crate::Reg<in_eof_des_addr::IN_EOF_DES_ADDR_SPEC>;
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#[doc = "Receive descriptor address when EOF occurs"]
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pub mod in_eof_des_addr;
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#[doc = "OUT_EOF_BFR_DES_ADDR (r) register accessor: Transmit descriptor address before the last transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`out_eof_bfr_des_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_eof_bfr_des_addr`] module"]
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pub type OUT_EOF_BFR_DES_ADDR = crate::Reg<out_eof_bfr_des_addr::OUT_EOF_BFR_DES_ADDR_SPEC>;
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#[doc = "Transmit descriptor address before the last transmit descriptor"]
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pub mod out_eof_bfr_des_addr;
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#[doc = "INLINK_DSCR (r) register accessor: Address of current receive descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`inlink_dscr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inlink_dscr`] module"]
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pub type INLINK_DSCR = crate::Reg<inlink_dscr::INLINK_DSCR_SPEC>;
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#[doc = "Address of current receive descriptor"]
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pub mod inlink_dscr;
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#[doc = "INLINK_DSCR_BF0 (r) register accessor: Address of last receive descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`inlink_dscr_bf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inlink_dscr_bf0`] module"]
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pub type INLINK_DSCR_BF0 = crate::Reg<inlink_dscr_bf0::INLINK_DSCR_BF0_SPEC>;
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#[doc = "Address of last receive descriptor"]
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pub mod inlink_dscr_bf0;
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#[doc = "OUTLINK_DSCR (r) register accessor: Address of current transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`outlink_dscr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outlink_dscr`] module"]
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pub type OUTLINK_DSCR = crate::Reg<outlink_dscr::OUTLINK_DSCR_SPEC>;
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#[doc = "Address of current transmit descriptor"]
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pub mod outlink_dscr;
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#[doc = "OUTLINK_DSCR_BF0 (r) register accessor: Address of last transmit descriptor\n\nYou can [`read`](crate::Reg::read) this register and get [`outlink_dscr_bf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outlink_dscr_bf0`] module"]
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pub type OUTLINK_DSCR_BF0 = crate::Reg<outlink_dscr_bf0::OUTLINK_DSCR_BF0_SPEC>;
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#[doc = "Address of last transmit descriptor"]
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pub mod outlink_dscr_bf0;
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#[doc = "IN_ST (r) register accessor: Status register of receiving data\n\nYou can [`read`](crate::Reg::read) this register and get [`in_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_st`] module"]
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pub type IN_ST = crate::Reg<in_st::IN_ST_SPEC>;
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#[doc = "Status register of receiving data"]
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pub mod in_st;
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#[doc = "OUT_ST (r) register accessor: Status register of transmitting data\n\nYou can [`read`](crate::Reg::read) this register and get [`out_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_st`] module"]
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pub type OUT_ST = crate::Reg<out_st::OUT_ST_SPEC>;
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#[doc = "Status register of transmitting data"]
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pub mod out_st;
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#[doc = "DATE (rw) register accessor: Copy DMA version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
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pub type DATE = crate::Reg<date::DATE_SPEC>;
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#[doc = "Copy DMA version control register"]
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pub mod date;

‎esp32s2/src/copy_dma/conf.rs

+129
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#[doc = "Register `CONF` reader"]
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pub type R = crate::R<CONF_SPEC>;
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#[doc = "Field `IN_RST` reader - Set this bit to reset in DMA FSM."]
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pub type IN_RST_R = crate::BitReader;
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#[doc = "Field `OUT_RST` reader - Set this bit to reset out DMA FSM."]
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pub type OUT_RST_R = crate::BitReader;
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#[doc = "Field `CMDFIFO_RST` reader - Set this bit to reset in_cmd FIFO and out_cmd FIFO."]
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pub type CMDFIFO_RST_R = crate::BitReader;
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#[doc = "Field `FIFO_RST` reader - Set this bit to reset data in RX FIFO."]
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pub type FIFO_RST_R = crate::BitReader;
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#[doc = "Field `OUT_OWNER` reader - This is used to configure the owner bit in transmit descriptor. This is effective only when you set OUT_AUTO_WRBACK."]
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pub type OUT_OWNER_R = crate::BitReader;
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#[doc = "Field `IN_OWNER` reader - This is used to configure the owner bit in receive descriptor."]
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pub type IN_OWNER_R = crate::BitReader;
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#[doc = "Field `OUT_AUTO_WRBACK` reader - This bit is used to write back out descriptor when hardware has already used this descriptor."]
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pub type OUT_AUTO_WRBACK_R = crate::BitReader;
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#[doc = "Field `CHECK_OWNER` reader - Set this bit to enable owner bit check in descriptor."]
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pub type CHECK_OWNER_R = crate::BitReader;
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#[doc = "1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers.\n\nValue on reset: 0"]
20+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
21+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
22+
pub enum CLK_EN {
23+
#[doc = "0: Support clock only when application writes registers"]
24+
OnWrite = 0,
25+
#[doc = "1: Force clock on for register"]
26+
Force = 1,
27+
}
28+
impl From<CLK_EN> for bool {
29+
#[inline(always)]
30+
fn from(variant: CLK_EN) -> Self {
31+
variant as u8 != 0
32+
}
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}
34+
#[doc = "Field `CLK_EN` reader - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers."]
35+
pub type CLK_EN_R = crate::BitReader<CLK_EN>;
36+
impl CLK_EN_R {
37+
#[doc = "Get enumerated values variant"]
38+
#[inline(always)]
39+
pub const fn variant(&self) -> CLK_EN {
40+
match self.bits {
41+
false => CLK_EN::OnWrite,
42+
true => CLK_EN::Force,
43+
}
44+
}
45+
#[doc = "Support clock only when application writes registers"]
46+
#[inline(always)]
47+
pub fn is_on_write(&self) -> bool {
48+
*self == CLK_EN::OnWrite
49+
}
50+
#[doc = "Force clock on for register"]
51+
#[inline(always)]
52+
pub fn is_force(&self) -> bool {
53+
*self == CLK_EN::Force
54+
}
55+
}
56+
impl R {
57+
#[doc = "Bit 0 - Set this bit to reset in DMA FSM."]
58+
#[inline(always)]
59+
pub fn in_rst(&self) -> IN_RST_R {
60+
IN_RST_R::new((self.bits & 1) != 0)
61+
}
62+
#[doc = "Bit 1 - Set this bit to reset out DMA FSM."]
63+
#[inline(always)]
64+
pub fn out_rst(&self) -> OUT_RST_R {
65+
OUT_RST_R::new(((self.bits >> 1) & 1) != 0)
66+
}
67+
#[doc = "Bit 2 - Set this bit to reset in_cmd FIFO and out_cmd FIFO."]
68+
#[inline(always)]
69+
pub fn cmdfifo_rst(&self) -> CMDFIFO_RST_R {
70+
CMDFIFO_RST_R::new(((self.bits >> 2) & 1) != 0)
71+
}
72+
#[doc = "Bit 3 - Set this bit to reset data in RX FIFO."]
73+
#[inline(always)]
74+
pub fn fifo_rst(&self) -> FIFO_RST_R {
75+
FIFO_RST_R::new(((self.bits >> 3) & 1) != 0)
76+
}
77+
#[doc = "Bit 4 - This is used to configure the owner bit in transmit descriptor. This is effective only when you set OUT_AUTO_WRBACK."]
78+
#[inline(always)]
79+
pub fn out_owner(&self) -> OUT_OWNER_R {
80+
OUT_OWNER_R::new(((self.bits >> 4) & 1) != 0)
81+
}
82+
#[doc = "Bit 5 - This is used to configure the owner bit in receive descriptor."]
83+
#[inline(always)]
84+
pub fn in_owner(&self) -> IN_OWNER_R {
85+
IN_OWNER_R::new(((self.bits >> 5) & 1) != 0)
86+
}
87+
#[doc = "Bit 6 - This bit is used to write back out descriptor when hardware has already used this descriptor."]
88+
#[inline(always)]
89+
pub fn out_auto_wrback(&self) -> OUT_AUTO_WRBACK_R {
90+
OUT_AUTO_WRBACK_R::new(((self.bits >> 6) & 1) != 0)
91+
}
92+
#[doc = "Bit 7 - Set this bit to enable owner bit check in descriptor."]
93+
#[inline(always)]
94+
pub fn check_owner(&self) -> CHECK_OWNER_R {
95+
CHECK_OWNER_R::new(((self.bits >> 7) & 1) != 0)
96+
}
97+
#[doc = "Bit 31 - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers."]
98+
#[inline(always)]
99+
pub fn clk_en(&self) -> CLK_EN_R {
100+
CLK_EN_R::new(((self.bits >> 31) & 1) != 0)
101+
}
102+
}
103+
#[cfg(feature = "impl-register-debug")]
104+
impl core::fmt::Debug for R {
105+
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
106+
f.debug_struct("CONF")
107+
.field("in_rst", &self.in_rst())
108+
.field("out_rst", &self.out_rst())
109+
.field("cmdfifo_rst", &self.cmdfifo_rst())
110+
.field("fifo_rst", &self.fifo_rst())
111+
.field("out_owner", &self.out_owner())
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.field("in_owner", &self.in_owner())
113+
.field("out_auto_wrback", &self.out_auto_wrback())
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.field("check_owner", &self.check_owner())
115+
.field("clk_en", &self.clk_en())
116+
.finish()
117+
}
118+
}
119+
#[doc = "Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
120+
pub struct CONF_SPEC;
121+
impl crate::RegisterSpec for CONF_SPEC {
122+
type Ux = u32;
123+
}
124+
#[doc = "`read()` method returns [`conf::R`](R) reader structure"]
125+
impl crate::Readable for CONF_SPEC {}
126+
#[doc = "`reset()` method sets CONF to value 0"]
127+
impl crate::Resettable for CONF_SPEC {
128+
const RESET_VALUE: u32 = 0;
129+
}

‎esp32s2/src/copy_dma/date.rs

+47
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@@ -0,0 +1,47 @@
1+
#[doc = "Register `DATE` reader"]
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pub type R = crate::R<DATE_SPEC>;
3+
#[doc = "Register `DATE` writer"]
4+
pub type W = crate::W<DATE_SPEC>;
5+
#[doc = "Field `DMA_DATE` reader - This is the version control register."]
6+
pub type DMA_DATE_R = crate::FieldReader<u32>;
7+
#[doc = "Field `DMA_DATE` writer - This is the version control register."]
8+
pub type DMA_DATE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9+
impl R {
10+
#[doc = "Bits 0:31 - This is the version control register."]
11+
#[inline(always)]
12+
pub fn dma_date(&self) -> DMA_DATE_R {
13+
DMA_DATE_R::new(self.bits)
14+
}
15+
}
16+
#[cfg(feature = "impl-register-debug")]
17+
impl core::fmt::Debug for R {
18+
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19+
f.debug_struct("DATE")
20+
.field("dma_date", &self.dma_date())
21+
.finish()
22+
}
23+
}
24+
impl W {
25+
#[doc = "Bits 0:31 - This is the version control register."]
26+
#[inline(always)]
27+
pub fn dma_date(&mut self) -> DMA_DATE_W<DATE_SPEC> {
28+
DMA_DATE_W::new(self, 0)
29+
}
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}
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#[doc = "Copy DMA version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct DATE_SPEC;
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impl crate::RegisterSpec for DATE_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`date::R`](R) reader structure"]
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impl crate::Readable for DATE_SPEC {}
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#[doc = "`write(|w| ..)` method takes [`date::W`](W) writer structure"]
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impl crate::Writable for DATE_SPEC {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets DATE to value 0x1808_2000"]
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impl crate::Resettable for DATE_SPEC {
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const RESET_VALUE: u32 = 0x1808_2000;
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}

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