From 48fd400637ee4cd128a5299c5f789cdd46242b1a Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Tue, 22 Oct 2024 13:34:19 +0200 Subject: [PATCH] Align TWAI command register field names for C6/H2 with other chips --- esp32c6/src/twai0/cmd.rs | 8 ++++---- esp32c6/svd/patches/esp32c6.yaml | 6 ++++++ esp32h2/src/twai0/cmd.rs | 8 ++++---- esp32h2/svd/patches/esp32h2.yaml | 6 ++++++ 4 files changed, 20 insertions(+), 8 deletions(-) diff --git a/esp32c6/src/twai0/cmd.rs b/esp32c6/src/twai0/cmd.rs index 14c6618bc..9520ff143 100644 --- a/esp32c6/src/twai0/cmd.rs +++ b/esp32c6/src/twai0/cmd.rs @@ -8,8 +8,8 @@ pub type ABORT_TX_W<'a, REG> = crate::BitWriter<'a, REG>; pub type RELEASE_BUF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR_DATA_OVERRUN` writer - 1: clear, the data overrun status bit is cleared. 0: no action."] pub type CLEAR_DATA_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SELF_RX_REQUEST` writer - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] -pub type SELF_RX_REQUEST_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SELF_RX_REQ` writer - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] +pub type SELF_RX_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { @@ -44,8 +44,8 @@ impl W { #[doc = "Bit 4 - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] #[inline(always)] #[must_use] - pub fn self_rx_request(&mut self) -> SELF_RX_REQUEST_W { - SELF_RX_REQUEST_W::new(self, 4) + pub fn self_rx_req(&mut self) -> SELF_RX_REQ_W { + SELF_RX_REQ_W::new(self, 4) } } #[doc = "TWAI command register.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/esp32c6/svd/patches/esp32c6.yaml b/esp32c6/svd/patches/esp32c6.yaml index fed5ed409..151a7f17b 100644 --- a/esp32c6/svd/patches/esp32c6.yaml +++ b/esp32c6/svd/patches/esp32c6.yaml @@ -484,3 +484,9 @@ RSA: CLEAR_INTERRUPT: name: INT_CLR access: read-write + +TWAI*: + CMD: + _modify: + SELF_RX_REQUEST: + name: SELF_RX_REQ diff --git a/esp32h2/src/twai0/cmd.rs b/esp32h2/src/twai0/cmd.rs index 14c6618bc..9520ff143 100644 --- a/esp32h2/src/twai0/cmd.rs +++ b/esp32h2/src/twai0/cmd.rs @@ -8,8 +8,8 @@ pub type ABORT_TX_W<'a, REG> = crate::BitWriter<'a, REG>; pub type RELEASE_BUF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR_DATA_OVERRUN` writer - 1: clear, the data overrun status bit is cleared. 0: no action."] pub type CLEAR_DATA_OVERRUN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SELF_RX_REQUEST` writer - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] -pub type SELF_RX_REQUEST_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SELF_RX_REQ` writer - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] +pub type SELF_RX_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { @@ -44,8 +44,8 @@ impl W { #[doc = "Bit 4 - 1: present, a message shall be transmitted and received simultaneously. 0: absent."] #[inline(always)] #[must_use] - pub fn self_rx_request(&mut self) -> SELF_RX_REQUEST_W { - SELF_RX_REQUEST_W::new(self, 4) + pub fn self_rx_req(&mut self) -> SELF_RX_REQ_W { + SELF_RX_REQ_W::new(self, 4) } } #[doc = "TWAI command register.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] diff --git a/esp32h2/svd/patches/esp32h2.yaml b/esp32h2/svd/patches/esp32h2.yaml index 74954d4c3..c107d36de 100644 --- a/esp32h2/svd/patches/esp32h2.yaml +++ b/esp32h2/svd/patches/esp32h2.yaml @@ -500,3 +500,9 @@ RSA: CLEAR_INTERRUPT: name: INT_CLR access: read-write + +TWAI*: + CMD: + _modify: + SELF_RX_REQUEST: + name: SELF_RX_REQ