Make sure FD SPI works after HD SPI (#3176)

* Make sure FD SPI works after HD SPI

* CHANGELOG

* Rename

* Fmt

Author: bjoernQ

esp-hal/CHANGELOG.md

@@ -13,6 +13,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Fixed
 
+- Full-duplex SPI works when mixed with half-duplex SPI (#3176)
+
 ### Removed
 
 ## v1.0.0-beta.0

esp-hal/src/spi/master.rs

@@ -675,6 +675,7 @@ where
     /// Write bytes to SPI. After writing, flush is called to ensure all data
     /// has been transmitted.
     pub fn write(&mut self, words: &[u8]) -> Result<(), Error> {
+        self.driver().setup_full_duplex()?;
         self.driver().write(words)?;
         self.driver().flush()?;
 
@@ -684,11 +685,13 @@ where
     /// Read bytes from SPI. The provided slice is filled with data received
     /// from the slave.
     pub fn read(&mut self, words: &mut [u8]) -> Result<(), Error> {
+        self.driver().setup_full_duplex()?;
         self.driver().read(words)
     }
 
     /// Sends `words` to the slave. Returns the `words` received from the slave.
     pub fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Error> {
+        self.driver().setup_full_duplex()?;
         self.driver().transfer(words)
     }
 }
@@ -880,6 +883,7 @@ impl<'d> Spi<'d, Async> {
         // We need to flush because the blocking transfer functions may return while a
         // transfer is still in progress.
         self.flush_async().await?;
+        self.driver().setup_full_duplex()?;
         self.driver().transfer_in_place_async(words).await
     }
 }
@@ -1747,7 +1751,9 @@ mod dma {
             mut buffer: TX,
         ) -> Result<SpiDmaTransfer<'d, Dm, TX>, (Error, Self, TX)> {
             self.wait_for_idle();
-
+            if let Err(e) = self.driver().setup_full_duplex() {
+                return Err((e, self, buffer));
+            };
             match unsafe { self.start_dma_write(bytes_to_write, &mut buffer) } {
                 Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)),
                 Err(e) => Err((e, self, buffer)),
@@ -1781,6 +1787,9 @@ mod dma {
             mut buffer: RX,
         ) -> Result<SpiDmaTransfer<'d, Dm, RX>, (Error, Self, RX)> {
             self.wait_for_idle();
+            if let Err(e) = self.driver().setup_full_duplex() {
+                return Err((e, self, buffer));
+            };
             match unsafe { self.start_dma_read(bytes_to_read, &mut buffer) } {
                 Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)),
                 Err(e) => Err((e, self, buffer)),
@@ -1818,6 +1827,9 @@ mod dma {
             mut tx_buffer: TX,
         ) -> Result<SpiDmaTransfer<'d, Dm, (RX, TX)>, (Error, Self, RX, TX)> {
             self.wait_for_idle();
+            if let Err(e) = self.driver().setup_full_duplex() {
+                return Err((e, self, rx_buffer, tx_buffer));
+            };
             match unsafe {
                 self.start_dma_transfer(
                     bytes_to_read,
@@ -2081,6 +2093,7 @@ mod dma {
         #[instability::unstable]
         pub fn read(&mut self, words: &mut [u8]) -> Result<(), Error> {
             self.wait_for_idle();
+            self.spi_dma.driver().setup_full_duplex()?;
             for chunk in words.chunks_mut(self.rx_buf.capacity()) {
                 self.rx_buf.set_length(chunk.len());
 
@@ -2106,6 +2119,7 @@ mod dma {
         #[instability::unstable]
         pub fn write(&mut self, words: &[u8]) -> Result<(), Error> {
             self.wait_for_idle();
+            self.spi_dma.driver().setup_full_duplex()?;
             for chunk in words.chunks(self.tx_buf.capacity()) {
                 self.tx_buf.fill(chunk);
 
@@ -2128,6 +2142,7 @@ mod dma {
         #[instability::unstable]
         pub fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> {
             self.wait_for_idle();
+            self.spi_dma.driver().setup_full_duplex()?;
             let chunk_size = min(self.tx_buf.capacity(), self.rx_buf.capacity());
 
             let common_length = min(read.len(), write.len());
@@ -2168,6 +2183,7 @@ mod dma {
         #[instability::unstable]
         pub fn transfer_in_place(&mut self, words: &mut [u8]) -> Result<(), Error> {
             self.wait_for_idle();
+            self.spi_dma.driver().setup_full_duplex()?;
             let chunk_size = min(self.tx_buf.capacity(), self.rx_buf.capacity());
 
             for chunk in words.chunks_mut(chunk_size) {
@@ -2325,6 +2341,7 @@ mod dma {
             #[instability::unstable]
             pub async fn read_async(&mut self, words: &mut [u8]) -> Result<(), Error> {
                 self.spi_dma.wait_for_idle_async().await;
+                self.spi_dma.driver().setup_full_duplex()?;
                 let chunk_size = self.rx_buf.capacity();
 
                 for chunk in words.chunks_mut(chunk_size) {
@@ -2351,6 +2368,7 @@ mod dma {
             #[instability::unstable]
             pub async fn write_async(&mut self, words: &[u8]) -> Result<(), Error> {
                 self.spi_dma.wait_for_idle_async().await;
+                self.spi_dma.driver().setup_full_duplex()?;
 
                 let mut spi = DropGuard::new(&mut self.spi_dma, |spi| spi.cancel_transfer());
                 let chunk_size = self.tx_buf.capacity();
@@ -2378,6 +2396,7 @@ mod dma {
                 write: &[u8],
             ) -> Result<(), Error> {
                 self.spi_dma.wait_for_idle_async().await;
+                self.spi_dma.driver().setup_full_duplex()?;
 
                 let mut spi = DropGuard::new(&mut self.spi_dma, |spi| spi.cancel_transfer());
                 let chunk_size = min(self.tx_buf.capacity(), self.rx_buf.capacity());
@@ -2423,6 +2442,7 @@ mod dma {
             #[instability::unstable]
             pub async fn transfer_in_place_async(&mut self, words: &mut [u8]) -> Result<(), Error> {
                 self.spi_dma.wait_for_idle_async().await;
+                self.spi_dma.driver().setup_full_duplex()?;
 
                 let mut spi = DropGuard::new(&mut self.spi_dma, |spi| spi.cancel_transfer());
                 for chunk in words.chunks_mut(self.tx_buf.capacity()) {
@@ -2603,13 +2623,15 @@ mod ehal1 {
             // We need to flush because the blocking transfer functions may return while a
             // transfer is still in progress.
             self.flush_async().await?;
+            self.driver().setup_full_duplex()?;
             self.driver().read_async(words).await
         }
 
         async fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
             // We need to flush because the blocking transfer functions may return while a
             // transfer is still in progress.
             self.flush_async().await?;
+            self.driver().setup_full_duplex()?;
             self.driver().write_async(words).await
         }
 
@@ -3379,6 +3401,23 @@ impl Driver {
         future.await;
     }
 
+    fn setup_full_duplex(&self) -> Result<(), Error> {
+        self.regs().user().modify(|_, w| {
+            w.usr_miso().set_bit();
+            w.usr_mosi().set_bit();
+            w.doutdin().set_bit();
+            w.usr_dummy().clear_bit();
+            w.sio().clear_bit()
+        });
+
+        self.init_spi_data_mode(
+            DataMode::SingleTwoDataLines,
+            DataMode::SingleTwoDataLines,
+            DataMode::SingleTwoDataLines,
+        )?;
+        Ok(())
+    }
+
     #[allow(clippy::too_many_arguments)]
     fn setup_half_duplex(
         &self,

hil-test/tests/spi_full_duplex.rs

@@ -785,4 +785,59 @@ mod tests {
         transfer.cancel();
         _ = transfer.wait();
     }
+
+    #[test]
+    #[cfg(feature = "unstable")]
+    fn transfer_works_after_half_duplex_operation(ctx: Context) {
+        let mut spi = ctx.spi;
+
+        let mut buffer = [0u8; 4];
+        spi.half_duplex_read(
+            esp_hal::spi::DataMode::Dual,
+            esp_hal::spi::master::Command::_8Bit(0x92, esp_hal::spi::DataMode::SingleTwoDataLines),
+            esp_hal::spi::master::Address::_32Bit(0x000000_00, esp_hal::spi::DataMode::Dual),
+            0,
+            &mut buffer,
+        )
+        .unwrap();
+
+        const DATA: &[u8] = &[0xde, 0xad, 0xbe, 0xef];
+        let mut buffer: [u8; 4] = [0x00u8; 4];
+        buffer.copy_from_slice(DATA);
+
+        spi.transfer(&mut buffer)
+            .expect("Symmetric transfer failed");
+        assert_eq!(buffer, DATA);
+    }
+
+    #[test]
+    #[cfg(feature = "unstable")]
+    fn dma_transfer_works_after_half_duplex_operation(ctx: Context) {
+        let mut spi = ctx.spi;
+
+        let mut buffer = [0u8; 4];
+        spi.half_duplex_read(
+            esp_hal::spi::DataMode::Dual,
+            esp_hal::spi::master::Command::_8Bit(0x92, esp_hal::spi::DataMode::SingleTwoDataLines),
+            esp_hal::spi::master::Address::_32Bit(0x000000_00, esp_hal::spi::DataMode::Dual),
+            0,
+            &mut buffer,
+        )
+        .unwrap();
+
+        let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
+        let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
+        let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
+
+        let mut spi = spi
+            .with_dma(ctx.dma_channel)
+            .with_buffers(dma_rx_buf, dma_tx_buf);
+
+        let tx_buf = [0xde, 0xad, 0xbe, 0xef];
+        let mut rx_buf = [0; 4];
+
+        spi.transfer(&mut rx_buf, &tx_buf).unwrap();
+
+        assert_eq!(tx_buf, rx_buf);
+    }
 }