diff --git a/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s b/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s
index 4a4f20db6..719b6b8c2 100644
--- a/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s
+++ b/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s
@@ -176,6 +176,9 @@ _tx_initialize_low_level
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value
diff --git a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S
index aaf3ece2c..fd08b2822 100644
--- a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S
+++ b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S
@@ -134,6 +134,9 @@ _tx_initialize_low_level:
 @    /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference.  */
 @
     LDR     r0, =0xE000E000                         @ Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         // Reset SysTick Control
+    STR     r1, [r0, #0x18]                         // Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
     LDR     r1, =0x7                                // Build SysTick Control Enable Value
diff --git a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
index 3de316e59..49245c6be 100644
--- a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
+++ b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
@@ -125,6 +125,9 @@ _tx_initialize_low_level:
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value
diff --git a/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s b/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s
index 4a4f20db6..719b6b8c2 100644
--- a/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s
+++ b/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s
@@ -176,6 +176,9 @@ _tx_initialize_low_level
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value