[GISel]: Add MachineIRBuilder support for passing in Flags while building

https://reviews.llvm.org/D55516

Add the ability to pass in flags to buildInstr calls. Currently no
validation is performed but that can be easily performed based on the
opcode (if necessary).

Reviewed by: paquette.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348893 91177308-0d34-0410-b5e6-96231b3b80d8

Author: Aditya Nandakumar

include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h

@@ -78,7 +78,8 @@ class ConstantFoldingMIRBuilder : public MachineIRBuilder {
   // Try to provide an overload for buildInstr for binary ops in order to
   // constant fold.
   MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
-                                 ArrayRef<SrcOp> SrcOps) override {
+                                 ArrayRef<SrcOp> SrcOps,
+                                 Optional<unsigned> Flags = None) override {
     switch (Opc) {
     default:
       break;

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

@@ -1058,8 +1058,9 @@ class MachineIRBuilder {
   /// \return a MachineInstrBuilder for the newly created instruction.
 
   MachineInstrBuilder buildAdd(const DstOp &Dst, const SrcOp &Src0,
-                               const SrcOp &Src1) {
-    return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1});
+                               const SrcOp &Src1,
+                               Optional<unsigned> Flags = None) {
+    return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
   }
 
   /// Build and insert \p Res = G_SUB \p Op0, \p Op1
@@ -1074,8 +1075,9 @@ class MachineIRBuilder {
   /// \return a MachineInstrBuilder for the newly created instruction.
 
   MachineInstrBuilder buildSub(const DstOp &Dst, const SrcOp &Src0,
-                               const SrcOp &Src1) {
-    return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1});
+                               const SrcOp &Src1,
+                               Optional<unsigned> Flags = None) {
+    return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);
   }
 
   /// Build and insert \p Res = G_MUL \p Op0, \p Op1
@@ -1089,8 +1091,9 @@ class MachineIRBuilder {
   ///
   /// \return a MachineInstrBuilder for the newly created instruction.
   MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0,
-                               const SrcOp &Src1) {
-    return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1});
+                               const SrcOp &Src1,
+                               Optional<unsigned> Flags = None) {
+    return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);
   }
 
   /// Build and insert \p Res = G_AND \p Op0, \p Op1
@@ -1125,7 +1128,8 @@ class MachineIRBuilder {
   }
 
   virtual MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
-                                         ArrayRef<SrcOp> SrcOps);
+                                         ArrayRef<SrcOp> SrcOps,
+                                         Optional<unsigned> Flags = None);
 };
 
 } // End namespace llvm.

lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

@@ -786,7 +786,8 @@ void MachineIRBuilder::validateSelectOp(const LLT &ResTy, const LLT &TstTy,
 
 MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
                                                  ArrayRef<DstOp> DstOps,
-                                                 ArrayRef<SrcOp> SrcOps) {
+                                                 ArrayRef<SrcOp> SrcOps,
+                                                 Optional<unsigned> Flags) {
   switch (Opc) {
   default:
     break;
@@ -995,5 +996,7 @@ MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
     Op.addDefToMIB(*getMRI(), MIB);
   for (const SrcOp &Op : SrcOps)
     Op.addSrcToMIB(MIB);
+  if (Flags)
+    MIB->setFlags(*Flags);
   return MIB;
 }