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[LoongArch64] Fix some assertion failures for Debug ILC building Debug NativeAOT testcases. (#112229)
* Fix the break of backtrace when already establish the frame pointer chain. * Delete some unused codes.
1 parent 4008de1 commit 938f546

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5 files changed

+7
-37
lines changed

5 files changed

+7
-37
lines changed

src/coreclr/jit/codegenloongarch64.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -7166,7 +7166,8 @@ void CodeGen::genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegZeroe
71667166

71677167
if (leftFrameSize != 0)
71687168
{
7169-
genStackPointerAdjustment(-leftFrameSize, initReg, pInitRegZeroed, /* reportUnwindData */ true);
7169+
// We've already established the frame pointer, so no need to report the stack pointer change to unwind info.
7170+
genStackPointerAdjustment(-leftFrameSize, initReg, pInitRegZeroed, /* reportUnwindData */ false);
71707171
}
71717172
}
71727173

src/coreclr/jit/emitloongarch64.cpp

+3-4
Original file line numberDiff line numberDiff line change
@@ -2504,8 +2504,8 @@ void emitter::emitIns_Call(EmitCallType callType,
25042504
// else if (callType == EC_FUNC_TOKEN || callType == EC_FUNC_ADDR)
25052505
// if reloc:
25062506
// //pc + offset_38bits # only when reloc.
2507-
// pcaddu18i t2, addr-hi20
2508-
// jilr r0/1,t2,addr-lo18
2507+
// pcaddu18i t4, addr-hi20
2508+
// jilr r0/1, t4, addr-lo18
25092509
//
25102510
// else:
25112511
// lu12i_w t2, dst_offset_lo32-hi
@@ -2634,7 +2634,7 @@ unsigned emitter::emitOutputCall(insGroup* ig, BYTE* dst, instrDesc* id, code_t
26342634
// pc + offset_38bits
26352635
//
26362636
// pcaddu18i t4, addr-hi20
2637-
// jilr r0/1,t4,addr-lo18
2637+
// jilr r0/1, t4, addr-lo18
26382638

26392639
emitOutput_Instr(dst, 0x1e000000 | (int)REG_DEFAULT_HELPER_CALL_TARGET);
26402640

@@ -2643,7 +2643,6 @@ unsigned emitter::emitOutputCall(insGroup* ig, BYTE* dst, instrDesc* id, code_t
26432643
int reg2 = (int)addr & 1;
26442644
addr = addr ^ 1;
26452645

2646-
assert(isValidSimm38(addr - (ssize_t)dst));
26472646
assert((addr & 3) == 0);
26482647

26492648
dst += 4;

src/coreclr/jit/emitloongarch64.h

-30
Original file line numberDiff line numberDiff line change
@@ -170,42 +170,12 @@ static bool isValidSimm12(ssize_t value)
170170
return -(((int)1) << 11) <= value && value < (((int)1) << 11);
171171
};
172172

173-
// Returns true if 'value' is a legal signed immediate 16 bit encoding.
174-
static bool isValidSimm16(ssize_t value)
175-
{
176-
return -(((int)1) << 15) <= value && value < (((int)1) << 15);
177-
};
178-
179-
// Returns true if 'value' is a legal unsigned immediate 16 bit encoding.
180-
static bool isValidUimm16(ssize_t value)
181-
{
182-
return (0 == (value >> 16));
183-
};
184-
185-
// Returns true if 'value' is a legal signed immediate 18 bit encoding.
186-
static bool isValidSimm18(ssize_t value)
187-
{
188-
return -(((int)1) << 17) <= value && value < (((int)1) << 17);
189-
};
190-
191173
// Returns true if 'value' is a legal signed immediate 20 bit encoding.
192174
static bool isValidSimm20(ssize_t value)
193175
{
194176
return -(((int)1) << 19) <= value && value < (((int)1) << 19);
195177
};
196178

197-
// Returns true if 'value' is a legal signed immediate 28 bit encoding.
198-
static bool isValidSimm28(ssize_t value)
199-
{
200-
return -(((int)1) << 27) <= value && value < (((int)1) << 27);
201-
};
202-
203-
// Returns true if 'value' is a legal signed immediate 38 bit encoding.
204-
static bool isValidSimm38(ssize_t value)
205-
{
206-
return -(((ssize_t)1) << 37) <= value && value < (((ssize_t)1) << 37);
207-
};
208-
209179
// Returns the number of bits used by the given 'size'.
210180
inline static unsigned getBitWidth(emitAttr size)
211181
{

src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs

+1-1
Original file line numberDiff line numberDiff line change
@@ -418,7 +418,7 @@ private static unsafe void PutLoongArch64JIR(uint* pCode, long imm38)
418418

419419
uint pcInstr = *pCode;
420420

421-
Debug.Assert(pcInstr == 0x1e00000e); // Must be pcaddu18i R14, 0
421+
Debug.Assert(pcInstr == 0x1e000010); // Must be pcaddu18i t4, 0
422422

423423
long relOff = imm38 & 0x20000;
424424
long imm = imm38 + relOff;

src/coreclr/utilcode/util.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -2340,7 +2340,7 @@ void PutLoongArch64JIR(UINT32 * pCode, INT64 imm38)
23402340

23412341
UINT32 pcInstr = *pCode;
23422342

2343-
_ASSERTE(pcInstr == 0x1e00000e); // Must be pcaddu18i R14, 0
2343+
_ASSERTE(pcInstr == 0x1e000010); // Must be pcaddu18i t4, 0
23442344

23452345
INT64 relOff = imm38 & 0x20000;
23462346
INT64 imm = imm38 + relOff;

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