Merge pull request #70 from diffblue/verilog_preprocessor_error

Verilog: add a class for exceptions in the preprocessor

Author: kroening

src/verilog/verilog_preprocessor.cpp

@@ -6,12 +6,14 @@ Author: Daniel Kroening, [email protected]
 
 \*******************************************************************/
 
-#include <fstream>
+#include "verilog_preprocessor.h"
 
 #include <util/config.h>
 #include <util/file_util.h>
 
-#include "verilog_preprocessor.h"
+#include "verilog_preprocessor_error.h"
+
+#include <fstream>
 
 /*******************************************************************\
 
@@ -221,44 +223,55 @@ Function: verilog_preprocessort::preprocessor
 
 void verilog_preprocessort::preprocessor()
 {
-  files.emplace_back(false, &in, filename);
-
-  while(!files.empty())
+  try
   {
-    files.back().print_line(out, files.size()==1?0:2);
+    files.emplace_back(false, &in, filename);
 
-    char ch, last_out=0;
-
-    while(files.back().get(ch))
+    while(!files.empty())
     {
-      switch(ch)
-      {
-       case '`':
-        directive();
-        break;
+      files.back().print_line(out, files.size() == 1 ? 0 : 2);
 
-       default:
-        if(condition)
+      char ch, last_out = 0;
+
+      while(files.back().get(ch))
+      {
+        switch(ch)
         {
-          filet &file=files.back();
+        case '`':
+          directive();
+          break;
 
-          if(last_out=='\n' && file.last_line!=file.line &&
-             ch!='\n')
+        default:
+          if(condition)
           {
-            file.print_line(out, 0);
-            file.last_line=file.line;
-          }
+            filet &file = files.back();
+
+            if(last_out == '\n' && file.last_line != file.line && ch != '\n')
+            {
+              file.print_line(out, 0);
+              file.last_line = file.line;
+            }
 
-          out << ch;
-          last_out=ch;
+            out << ch;
+            last_out = ch;
 
-          if(ch=='\n') file.last_line++;
+            if(ch == '\n')
+              file.last_line++;
+          }
         }
       }
-    }
 
-    if(last_out!='\n') out << '\n';
-    files.pop_back();
+      if(last_out != '\n')
+        out << '\n';
+      files.pop_back();
+    }
+  }
+  catch(const verilog_preprocessor_errort &e)
+  {
+    if(!files.empty())
+      error().source_location = files.back().make_source_location();
+    error() << e.what() << eom;
+    throw 0;
   }
 }
 
@@ -567,9 +580,8 @@ void verilog_preprocessort::directive()
 
       if(it==defines.end())
       {
-        error().source_location = source_location;
-        error() << "unknown preprocessor directive \"" << text << "\"" << eom;
-        throw 0;
+        throw verilog_preprocessor_errort()
+          << "unknown preprocessor directive \"" << text << "\"";
       }
 
       // found it! replace it!

src/verilog/verilog_preprocessor_error.h

@@ -0,0 +1,41 @@
+/*******************************************************************\
+
+Module: Verilog Preprocessor Error Class
+
+Author: Daniel Kroening, [email protected]
+
+\*******************************************************************/
+
+#ifndef VERILOG_PREPROCESSOR_ERROR_H
+#define VERILOG_PREPROCESSOR_ERROR_H
+
+#include <sstream>
+#include <string>
+
+class verilog_preprocessor_errort
+{
+public:
+  std::string what() const
+  {
+    return message.str();
+  }
+
+  std::ostringstream &message_ostream()
+  {
+    return message;
+  }
+
+protected:
+  std::ostringstream message;
+};
+
+/// add to the diagnostic information in the given verilog_preprocessor_error exception
+template <typename T>
+verilog_preprocessor_errort
+operator<<(verilog_preprocessor_errort &&e, const T &message)
+{
+  e.message_ostream() << message;
+  return std::move(e);
+}
+
+#endif // VERILOG_PREPROCESSOR_ERROR_H